2014-06-23 18:20:59 +00:00
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/*
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* Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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/* AM437x SK EVM */
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/dts-v1/;
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#include "am4372.dtsi"
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#include <dt-bindings/pinctrl/am43xx.h>
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#include <dt-bindings/pwm/pwm.h>
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/input/input.h>
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/ {
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model = "TI AM437x SK EVM";
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compatible = "ti,am437x-sk-evm","ti,am4372","ti,am43";
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aliases {
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display0 = &lcd0;
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};
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backlight {
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compatible = "pwm-backlight";
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pwms = <&ecap0 0 50000 PWM_POLARITY_INVERTED>;
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brightness-levels = <0 51 53 56 62 75 101 152 255>;
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default-brightness-level = <8>;
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};
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sound {
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compatible = "ti,da830-evm-audio";
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ti,model = "AM437x-SK-EVM";
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ti,audio-codec = <&tlv320aic3106>;
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ti,mcasp-controller = <&mcasp1>;
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ti,codec-clock-rate = <24000000>;
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ti,audio-routing =
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"Headphone Jack", "HPLOUT",
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"Headphone Jack", "HPROUT";
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};
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matrix_keypad: matrix_keypad@0 {
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compatible = "gpio-matrix-keypad";
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pinctrl-names = "default";
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pinctrl-0 = <&matrix_keypad_pins>;
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debounce-delay-ms = <5>;
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2015-04-09 15:59:27 +00:00
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col-scan-delay-us = <5>;
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2014-06-23 18:20:59 +00:00
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row-gpios = <&gpio5 5 GPIO_ACTIVE_HIGH /* Bank5, pin5 */
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&gpio5 6 GPIO_ACTIVE_HIGH>; /* Bank5, pin6 */
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col-gpios = <&gpio5 13 GPIO_ACTIVE_HIGH /* Bank5, pin13 */
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&gpio5 4 GPIO_ACTIVE_HIGH>; /* Bank5, pin4 */
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linux,keymap = <
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MATRIX_KEY(0, 0, KEY_DOWN)
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MATRIX_KEY(0, 1, KEY_RIGHT)
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MATRIX_KEY(1, 0, KEY_LEFT)
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MATRIX_KEY(1, 1, KEY_UP)
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>;
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};
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leds {
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compatible = "gpio-leds";
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pinctrl-names = "default";
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pinctrl-0 = <&leds_pins>;
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led@0 {
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label = "am437x-sk:red:heartbeat";
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gpios = <&gpio5 0 GPIO_ACTIVE_HIGH>; /* Bank 5, pin 0 */
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linux,default-trigger = "heartbeat";
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default-state = "off";
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};
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led@1 {
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label = "am437x-sk:green:mmc1";
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gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>; /* Bank 5, pin 1 */
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linux,default-trigger = "mmc0";
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default-state = "off";
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};
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led@2 {
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label = "am437x-sk:blue:cpu0";
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gpios = <&gpio5 2 GPIO_ACTIVE_HIGH>; /* Bank 5, pin 2 */
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linux,default-trigger = "cpu0";
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default-state = "off";
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};
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led@3 {
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label = "am437x-sk:blue:usr3";
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gpios = <&gpio5 3 GPIO_ACTIVE_HIGH>; /* Bank 5, pin 3 */
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default-state = "off";
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};
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};
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lcd0: display {
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2014-12-05 07:39:31 +00:00
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compatible = "newhaven,nhd-4.3-480272ef-atxl", "panel-dpi";
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2014-06-23 18:20:59 +00:00
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label = "lcd";
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pinctrl-names = "default";
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pinctrl-0 = <&lcd_pins>;
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enable-gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>;
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panel-timing {
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clock-frequency = <9000000>;
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hactive = <480>;
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vactive = <272>;
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2014-12-05 07:39:31 +00:00
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hfront-porch = <2>;
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hback-porch = <2>;
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hsync-len = <41>;
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vfront-porch = <2>;
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vback-porch = <2>;
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2014-06-23 18:20:59 +00:00
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vsync-len = <10>;
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hsync-active = <0>;
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vsync-active = <0>;
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de-active = <1>;
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pixelclk-active = <1>;
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};
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port {
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lcd_in: endpoint {
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remote-endpoint = <&dpi_out>;
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};
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};
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};
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};
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&am43xx_pinmux {
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matrix_keypad_pins: matrix_keypad_pins {
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pinctrl-single,pins = <
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0x24c (PIN_OUTPUT | MUX_MODE7) /* gpio5_13.gpio5_13 */
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0x250 (PIN_OUTPUT | MUX_MODE7) /* spi4_sclk.gpio5_4 */
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0x254 (PIN_INPUT | MUX_MODE7) /* spi4_d0.gpio5_5 */
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0x258 (PIN_INPUT | MUX_MODE7) /* spi4_d1.gpio5_5 */
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>;
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};
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leds_pins: leds_pins {
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pinctrl-single,pins = <
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0x228 (PIN_OUTPUT | MUX_MODE7) /* uart3_rxd.gpio5_2 */
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0x22c (PIN_OUTPUT | MUX_MODE7) /* uart3_txd.gpio5_3 */
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0x230 (PIN_OUTPUT | MUX_MODE7) /* uart3_ctsn.gpio5_0 */
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0x234 (PIN_OUTPUT | MUX_MODE7) /* uart3_rtsn.gpio5_1 */
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>;
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};
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i2c0_pins: i2c0_pins {
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pinctrl-single,pins = <
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2014-12-04 17:01:58 +00:00
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0x188 (PIN_INPUT | SLEWCTRL_FAST | MUX_MODE0) /* i2c0_sda.i2c0_sda */
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0x18c (PIN_INPUT | SLEWCTRL_FAST | MUX_MODE0) /* i2c0_scl.i2c0_scl */
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2014-06-23 18:20:59 +00:00
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>;
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};
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i2c1_pins: i2c1_pins {
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pinctrl-single,pins = <
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2014-12-04 17:01:58 +00:00
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0x15c (PIN_INPUT | SLEWCTRL_FAST | MUX_MODE2) /* spi0_cs0.i2c1_scl */
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0x158 (PIN_INPUT | SLEWCTRL_FAST | MUX_MODE2) /* spi0_d1.i2c1_sda */
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2014-06-23 18:20:59 +00:00
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>;
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};
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mmc1_pins: pinmux_mmc1_pins {
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pinctrl-single,pins = <
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2014-12-04 17:01:55 +00:00
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0x0f0 (PIN_INPUT | MUX_MODE0) /* mmc0_dat3.mmc0_dat3 */
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0x0f4 (PIN_INPUT | MUX_MODE0) /* mmc0_dat2.mmc0_dat2 */
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0x0f8 (PIN_INPUT | MUX_MODE0) /* mmc0_dat1.mmc0_dat1 */
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0x0fc (PIN_INPUT | MUX_MODE0) /* mmc0_dat0.mmc0_dat0 */
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0x100 (PIN_INPUT | MUX_MODE0) /* mmc0_clk.mmc0_clk */
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0x104 (PIN_INPUT | MUX_MODE0) /* mmc0_cmd.mmc0_cmd */
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2014-06-23 18:20:59 +00:00
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0x160 (PIN_INPUT | MUX_MODE7) /* spi0_cs1.gpio0_6 */
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>;
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};
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ecap0_pins: backlight_pins {
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pinctrl-single,pins = <
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0x164 (PIN_OUTPUT | MUX_MODE0) /* eCAP0_in_PWM0_out.eCAP0_in_PWM0_out */
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>;
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};
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edt_ft5306_ts_pins: edt_ft5306_ts_pins {
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pinctrl-single,pins = <
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0x74 (PIN_INPUT | MUX_MODE7) /* gpmc_wpn.gpio0_31 */
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0x78 (PIN_OUTPUT | MUX_MODE7) /* gpmc_be1n.gpio1_28 */
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>;
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};
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2014-12-18 16:24:13 +00:00
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vpfe0_pins_default: vpfe0_pins_default {
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pinctrl-single,pins = <
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0x1b0 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_hd mode 0*/
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0x1b4 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_vd mode 0*/
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0x1b8 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_field mode 0*/
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0x1bc (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_wen mode 0*/
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0x1c0 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_pclk mode 0*/
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0x1c4 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data8 mode 0*/
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0x1c8 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data9 mode 0*/
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0x208 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data0 mode 0*/
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0x20c (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data1 mode 0*/
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0x210 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data2 mode 0*/
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0x214 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data3 mode 0*/
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0x218 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data4 mode 0*/
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0x21c (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data5 mode 0*/
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0x220 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data6 mode 0*/
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0x224 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data7 mode 0*/
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>;
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};
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vpfe0_pins_sleep: vpfe0_pins_sleep {
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pinctrl-single,pins = <
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0x1b0 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
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0x1b4 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
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0x1b8 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
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0x1bc (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
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0x1c0 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
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0x1c4 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
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0x1c8 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
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0x208 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
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0x20c (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
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0x210 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
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0x214 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
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0x218 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
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0x21c (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
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0x220 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
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0x224 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
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>;
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};
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2014-06-23 18:20:59 +00:00
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cpsw_default: cpsw_default {
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pinctrl-single,pins = <
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/* Slave 1 */
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2014-12-04 17:01:56 +00:00
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0x12c (PIN_OUTPUT | MUX_MODE2) /* mii1_txclk.rmii1_tclk */
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0x114 (PIN_OUTPUT | MUX_MODE2) /* mii1_txen.rgmii1_tctl */
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0x128 (PIN_OUTPUT | MUX_MODE2) /* mii1_txd0.rgmii1_td0 */
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0x124 (PIN_OUTPUT | MUX_MODE2) /* mii1_txd1.rgmii1_td1 */
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0x120 (PIN_OUTPUT | MUX_MODE2) /* mii1_txd0.rgmii1_td2 */
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0x11c (PIN_OUTPUT | MUX_MODE2) /* mii1_txd1.rgmii1_td3 */
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0x130 (PIN_INPUT | MUX_MODE2) /* mii1_rxclk.rmii1_rclk */
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0x118 (PIN_INPUT | MUX_MODE2) /* mii1_rxdv.rgmii1_rctl */
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0x140 (PIN_INPUT | MUX_MODE2) /* mii1_rxd0.rgmii1_rd0 */
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0x13c (PIN_INPUT | MUX_MODE2) /* mii1_rxd1.rgmii1_rd1 */
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0x138 (PIN_INPUT | MUX_MODE2) /* mii1_rxd0.rgmii1_rd2 */
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0x134 (PIN_INPUT | MUX_MODE2) /* mii1_rxd1.rgmii1_rd3 */
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2014-06-23 18:20:59 +00:00
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/* Slave 2 */
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2014-12-04 17:01:56 +00:00
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0x58 (PIN_OUTPUT | MUX_MODE2) /* gpmc_a6.rgmii2_tclk */
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0x40 (PIN_OUTPUT | MUX_MODE2) /* gpmc_a0.rgmii2_tctl */
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0x54 (PIN_OUTPUT | MUX_MODE2) /* gpmc_a5.rgmii2_td0 */
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0x50 (PIN_OUTPUT | MUX_MODE2) /* gpmc_a4.rgmii2_td1 */
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0x4c (PIN_OUTPUT | MUX_MODE2) /* gpmc_a3.rgmii2_td2 */
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0x48 (PIN_OUTPUT | MUX_MODE2) /* gpmc_a2.rgmii2_td3 */
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0x5c (PIN_INPUT | MUX_MODE2) /* gpmc_a7.rgmii2_rclk */
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0x44 (PIN_INPUT | MUX_MODE2) /* gpmc_a1.rgmii2_rtcl */
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0x6c (PIN_INPUT | MUX_MODE2) /* gpmc_a11.rgmii2_rd0 */
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0x68 (PIN_INPUT | MUX_MODE2) /* gpmc_a10.rgmii2_rd1 */
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0x64 (PIN_INPUT | MUX_MODE2) /* gpmc_a9.rgmii2_rd2 */
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0x60 (PIN_INPUT | MUX_MODE2) /* gpmc_a8.rgmii2_rd3 */
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2014-06-23 18:20:59 +00:00
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>;
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|
|
|
};
|
|
|
|
|
|
|
|
|
|
cpsw_sleep: cpsw_sleep {
|
|
|
|
|
pinctrl-single,pins = <
|
|
|
|
|
/* Slave 1 reset value */
|
|
|
|
|
0x12c (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
|
|
|
|
0x114 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
|
|
|
|
0x128 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
|
|
|
|
0x124 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
|
|
|
|
0x120 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
|
|
|
|
0x11c (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
|
|
|
|
0x130 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
|
|
|
|
0x118 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
|
|
|
|
0x140 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
|
|
|
|
0x13c (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
|
|
|
|
0x138 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
|
|
|
|
0x134 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
|
|
|
|
|
|
|
|
|
/* Slave 2 reset value */
|
|
|
|
|
0x58 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
|
|
|
|
0x40 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
|
|
|
|
0x54 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
|
|
|
|
0x50 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
|
|
|
|
0x4c (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
|
|
|
|
0x48 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
|
|
|
|
0x5c (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
|
|
|
|
0x44 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
|
|
|
|
0x6c (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
|
|
|
|
0x68 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
|
|
|
|
0x64 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
|
|
|
|
0x60 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
|
|
|
|
>;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
davinci_mdio_default: davinci_mdio_default {
|
|
|
|
|
pinctrl-single,pins = <
|
|
|
|
|
/* MDIO */
|
2014-12-04 17:01:56 +00:00
|
|
|
0x148 (PIN_INPUT | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */
|
|
|
|
|
0x14c (PIN_OUTPUT | MUX_MODE0) /* mdio_clk.mdio_clk */
|
2014-06-23 18:20:59 +00:00
|
|
|
>;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
davinci_mdio_sleep: davinci_mdio_sleep {
|
|
|
|
|
pinctrl-single,pins = <
|
|
|
|
|
/* MDIO reset value */
|
|
|
|
|
0x148 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
|
|
|
|
0x14c (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
|
|
|
|
>;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
dss_pins: dss_pins {
|
|
|
|
|
pinctrl-single,pins = <
|
2014-12-04 17:01:59 +00:00
|
|
|
0x020 (PIN_OUTPUT | MUX_MODE1) /* gpmc ad 8 -> DSS DATA 23 */
|
|
|
|
|
0x024 (PIN_OUTPUT | MUX_MODE1)
|
|
|
|
|
0x028 (PIN_OUTPUT | MUX_MODE1)
|
|
|
|
|
0x02c (PIN_OUTPUT | MUX_MODE1)
|
|
|
|
|
0x030 (PIN_OUTPUT | MUX_MODE1)
|
|
|
|
|
0x034 (PIN_OUTPUT | MUX_MODE1)
|
|
|
|
|
0x038 (PIN_OUTPUT | MUX_MODE1)
|
|
|
|
|
0x03c (PIN_OUTPUT | MUX_MODE1) /* gpmc ad 15 -> DSS DATA 16 */
|
|
|
|
|
0x0a0 (PIN_OUTPUT | MUX_MODE0) /* DSS DATA 0 */
|
|
|
|
|
0x0a4 (PIN_OUTPUT | MUX_MODE0)
|
|
|
|
|
0x0a8 (PIN_OUTPUT | MUX_MODE0)
|
|
|
|
|
0x0ac (PIN_OUTPUT | MUX_MODE0)
|
|
|
|
|
0x0b0 (PIN_OUTPUT | MUX_MODE0)
|
|
|
|
|
0x0b4 (PIN_OUTPUT | MUX_MODE0)
|
|
|
|
|
0x0b8 (PIN_OUTPUT | MUX_MODE0)
|
|
|
|
|
0x0bc (PIN_OUTPUT | MUX_MODE0)
|
|
|
|
|
0x0c0 (PIN_OUTPUT | MUX_MODE0)
|
|
|
|
|
0x0c4 (PIN_OUTPUT | MUX_MODE0)
|
|
|
|
|
0x0c8 (PIN_OUTPUT | MUX_MODE0)
|
|
|
|
|
0x0cc (PIN_OUTPUT | MUX_MODE0)
|
|
|
|
|
0x0d0 (PIN_OUTPUT | MUX_MODE0)
|
|
|
|
|
0x0d4 (PIN_OUTPUT | MUX_MODE0)
|
|
|
|
|
0x0d8 (PIN_OUTPUT | MUX_MODE0)
|
|
|
|
|
0x0dc (PIN_OUTPUT | MUX_MODE0) /* DSS DATA 15 */
|
|
|
|
|
0x0e0 (PIN_OUTPUT | MUX_MODE0) /* DSS VSYNC */
|
|
|
|
|
0x0e4 (PIN_OUTPUT | MUX_MODE0) /* DSS HSYNC */
|
|
|
|
|
0x0e8 (PIN_OUTPUT | MUX_MODE0) /* DSS PCLK */
|
|
|
|
|
0x0ec (PIN_OUTPUT | MUX_MODE0) /* DSS AC BIAS EN */
|
2014-06-23 18:20:59 +00:00
|
|
|
|
|
|
|
|
>;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
qspi_pins: qspi_pins {
|
|
|
|
|
pinctrl-single,pins = <
|
2014-12-04 17:01:54 +00:00
|
|
|
0x7c (PIN_OUTPUT | MUX_MODE3) /* gpmc_csn0.qspi_csn */
|
|
|
|
|
0x88 (PIN_OUTPUT | MUX_MODE2) /* gpmc_csn3.qspi_clk */
|
|
|
|
|
0x90 (PIN_INPUT | MUX_MODE3) /* gpmc_advn_ale.qspi_d0 */
|
|
|
|
|
0x94 (PIN_INPUT | MUX_MODE3) /* gpmc_oen_ren.qspi_d1 */
|
|
|
|
|
0x98 (PIN_INPUT | MUX_MODE3) /* gpmc_wen.qspi_d2 */
|
|
|
|
|
0x9c (PIN_INPUT | MUX_MODE3) /* gpmc_be0n_cle.qspi_d3 */
|
2014-06-23 18:20:59 +00:00
|
|
|
>;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
mcasp1_pins: mcasp1_pins {
|
|
|
|
|
pinctrl-single,pins = <
|
|
|
|
|
0x10c (PIN_INPUT_PULLDOWN | MUX_MODE4) /* mii1_crs.mcasp1_aclkx */
|
|
|
|
|
0x110 (PIN_INPUT_PULLDOWN | MUX_MODE4) /* mii1_rxerr.mcasp1_fsx */
|
|
|
|
|
0x108 (PIN_OUTPUT_PULLDOWN | MUX_MODE4) /* mii1_col.mcasp1_axr2 */
|
|
|
|
|
0x144 (PIN_INPUT_PULLDOWN | MUX_MODE4) /* rmii1_ref_clk.mcasp1_axr3 */
|
|
|
|
|
>;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
lcd_pins: lcd_pins {
|
|
|
|
|
pinctrl-single,pins = <
|
2014-12-04 15:10:21 +00:00
|
|
|
0x1c (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpcm_ad7.gpio1_7 */
|
2014-06-23 18:20:59 +00:00
|
|
|
>;
|
|
|
|
|
};
|
2014-12-04 17:01:57 +00:00
|
|
|
|
|
|
|
|
usb1_pins: usb1_pins {
|
|
|
|
|
pinctrl-single,pins = <
|
|
|
|
|
0x2c0 (PIN_OUTPUT | MUX_MODE0) /* usb0_drvvbus.usb0_drvvbus */
|
|
|
|
|
>;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
usb2_pins: usb2_pins {
|
|
|
|
|
pinctrl-single,pins = <
|
|
|
|
|
0x2c4 (PIN_OUTPUT | MUX_MODE0) /* usb0_drvvbus.usb0_drvvbus */
|
|
|
|
|
>;
|
|
|
|
|
};
|
2014-06-23 18:20:59 +00:00
|
|
|
};
|
|
|
|
|
|
|
|
|
|
&i2c0 {
|
|
|
|
|
status = "okay";
|
|
|
|
|
pinctrl-names = "default";
|
|
|
|
|
pinctrl-0 = <&i2c0_pins>;
|
|
|
|
|
clock-frequency = <400000>;
|
|
|
|
|
|
|
|
|
|
tps@24 {
|
|
|
|
|
compatible = "ti,tps65218";
|
|
|
|
|
reg = <0x24>;
|
|
|
|
|
interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
|
|
|
|
|
interrupt-controller;
|
|
|
|
|
#interrupt-cells = <2>;
|
|
|
|
|
|
|
|
|
|
dcdc1: regulator-dcdc1 {
|
|
|
|
|
compatible = "ti,tps65218-dcdc1";
|
|
|
|
|
/* VDD_CORE limits min of OPP50 and max of OPP100 */
|
|
|
|
|
regulator-name = "vdd_core";
|
|
|
|
|
regulator-min-microvolt = <912000>;
|
|
|
|
|
regulator-max-microvolt = <1144000>;
|
|
|
|
|
regulator-boot-on;
|
|
|
|
|
regulator-always-on;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
dcdc2: regulator-dcdc2 {
|
|
|
|
|
compatible = "ti,tps65218-dcdc2";
|
|
|
|
|
/* VDD_MPU limits min of OPP50 and max of OPP_NITRO */
|
|
|
|
|
regulator-name = "vdd_mpu";
|
|
|
|
|
regulator-min-microvolt = <912000>;
|
|
|
|
|
regulator-max-microvolt = <1378000>;
|
|
|
|
|
regulator-boot-on;
|
|
|
|
|
regulator-always-on;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
dcdc3: regulator-dcdc3 {
|
|
|
|
|
compatible = "ti,tps65218-dcdc3";
|
|
|
|
|
regulator-name = "vdds_ddr";
|
2014-11-06 10:50:04 +00:00
|
|
|
regulator-min-microvolt = <1500000>;
|
|
|
|
|
regulator-max-microvolt = <1500000>;
|
2014-06-23 18:20:59 +00:00
|
|
|
regulator-boot-on;
|
|
|
|
|
regulator-always-on;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
dcdc4: regulator-dcdc4 {
|
|
|
|
|
compatible = "ti,tps65218-dcdc4";
|
|
|
|
|
regulator-name = "v3_3d";
|
|
|
|
|
regulator-min-microvolt = <3300000>;
|
|
|
|
|
regulator-max-microvolt = <3300000>;
|
|
|
|
|
regulator-boot-on;
|
|
|
|
|
regulator-always-on;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
ldo1: regulator-ldo1 {
|
|
|
|
|
compatible = "ti,tps65218-ldo1";
|
|
|
|
|
regulator-name = "v1_8d";
|
|
|
|
|
regulator-min-microvolt = <1800000>;
|
|
|
|
|
regulator-max-microvolt = <1800000>;
|
|
|
|
|
regulator-boot-on;
|
|
|
|
|
regulator-always-on;
|
|
|
|
|
};
|
|
|
|
|
|
2014-12-26 19:28:23 +00:00
|
|
|
power-button {
|
|
|
|
|
compatible = "ti,tps65218-pwrbutton";
|
|
|
|
|
status = "okay";
|
|
|
|
|
interrupts = <3 IRQ_TYPE_EDGE_BOTH>;
|
|
|
|
|
};
|
2014-06-23 18:20:59 +00:00
|
|
|
};
|
|
|
|
|
|
|
|
|
|
at24@50 {
|
|
|
|
|
compatible = "at24,24c256";
|
|
|
|
|
pagesize = <64>;
|
|
|
|
|
reg = <0x50>;
|
|
|
|
|
};
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
&i2c1 {
|
|
|
|
|
status = "okay";
|
|
|
|
|
pinctrl-names = "default";
|
|
|
|
|
pinctrl-0 = <&i2c1_pins>;
|
|
|
|
|
clock-frequency = <400000>;
|
|
|
|
|
|
|
|
|
|
edt-ft5306@38 {
|
|
|
|
|
status = "okay";
|
|
|
|
|
compatible = "edt,edt-ft5306", "edt,edt-ft5x06";
|
|
|
|
|
pinctrl-names = "default";
|
|
|
|
|
pinctrl-0 = <&edt_ft5306_ts_pins>;
|
|
|
|
|
|
|
|
|
|
reg = <0x38>;
|
|
|
|
|
interrupt-parent = <&gpio0>;
|
|
|
|
|
interrupts = <31 0>;
|
|
|
|
|
|
2015-04-09 15:59:26 +00:00
|
|
|
reset-gpios = <&gpio1 28 GPIO_ACTIVE_LOW>;
|
2014-06-23 18:20:59 +00:00
|
|
|
|
|
|
|
|
touchscreen-size-x = <480>;
|
|
|
|
|
touchscreen-size-y = <272>;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
tlv320aic3106: tlv320aic3106@1b {
|
|
|
|
|
compatible = "ti,tlv320aic3106";
|
|
|
|
|
reg = <0x1b>;
|
|
|
|
|
status = "okay";
|
|
|
|
|
|
|
|
|
|
/* Regulators */
|
|
|
|
|
AVDD-supply = <&dcdc4>;
|
|
|
|
|
IOVDD-supply = <&dcdc4>;
|
|
|
|
|
DRVDD-supply = <&dcdc4>;
|
|
|
|
|
DVDD-supply = <&ldo1>;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
lis331dlh@18 {
|
|
|
|
|
compatible = "st,lis331dlh";
|
|
|
|
|
reg = <0x18>;
|
|
|
|
|
status = "okay";
|
|
|
|
|
|
|
|
|
|
Vdd-supply = <&dcdc4>;
|
|
|
|
|
Vdd_IO-supply = <&dcdc4>;
|
|
|
|
|
interrupts-extended = <&gpio1 6 0>, <&gpio2 1 0>;
|
|
|
|
|
};
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
&epwmss0 {
|
|
|
|
|
status = "okay";
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
&ecap0 {
|
|
|
|
|
status = "okay";
|
|
|
|
|
pinctrl-names = "default";
|
|
|
|
|
pinctrl-0 = <&ecap0_pins>;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
&gpio0 {
|
|
|
|
|
status = "okay";
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
&gpio1 {
|
|
|
|
|
status = "okay";
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
&gpio5 {
|
|
|
|
|
status = "okay";
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
&mmc1 {
|
|
|
|
|
status = "okay";
|
|
|
|
|
pinctrl-names = "default";
|
|
|
|
|
pinctrl-0 = <&mmc1_pins>;
|
|
|
|
|
|
|
|
|
|
vmmc-supply = <&dcdc4>;
|
|
|
|
|
bus-width = <4>;
|
|
|
|
|
cd-gpios = <&gpio0 6 GPIO_ACTIVE_HIGH>;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
&usb2_phy1 {
|
|
|
|
|
status = "okay";
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
&usb1 {
|
|
|
|
|
dr_mode = "peripheral";
|
|
|
|
|
status = "okay";
|
2014-12-04 17:01:57 +00:00
|
|
|
pinctrl-names = "default";
|
|
|
|
|
pinctrl-0 = <&usb1_pins>;
|
2014-06-23 18:20:59 +00:00
|
|
|
};
|
|
|
|
|
|
|
|
|
|
&usb2_phy2 {
|
|
|
|
|
status = "okay";
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
&usb2 {
|
|
|
|
|
dr_mode = "host";
|
|
|
|
|
status = "okay";
|
2014-12-04 17:01:57 +00:00
|
|
|
pinctrl-names = "default";
|
|
|
|
|
pinctrl-0 = <&usb2_pins>;
|
2014-06-23 18:20:59 +00:00
|
|
|
};
|
|
|
|
|
|
|
|
|
|
&qspi {
|
|
|
|
|
status = "okay";
|
|
|
|
|
pinctrl-names = "default";
|
|
|
|
|
pinctrl-0 = <&qspi_pins>;
|
|
|
|
|
|
|
|
|
|
spi-max-frequency = <48000000>;
|
|
|
|
|
m25p80@0 {
|
|
|
|
|
compatible = "mx66l51235l";
|
|
|
|
|
spi-max-frequency = <48000000>;
|
|
|
|
|
reg = <0>;
|
|
|
|
|
spi-cpol;
|
|
|
|
|
spi-cpha;
|
|
|
|
|
spi-tx-bus-width = <1>;
|
|
|
|
|
spi-rx-bus-width = <4>;
|
|
|
|
|
#address-cells = <1>;
|
|
|
|
|
#size-cells = <1>;
|
|
|
|
|
|
|
|
|
|
/* MTD partition table.
|
|
|
|
|
* The ROM checks the first 512KiB
|
|
|
|
|
* for a valid file to boot(XIP).
|
|
|
|
|
*/
|
|
|
|
|
partition@0 {
|
|
|
|
|
label = "QSPI.U_BOOT";
|
|
|
|
|
reg = <0x00000000 0x000080000>;
|
|
|
|
|
};
|
|
|
|
|
partition@1 {
|
|
|
|
|
label = "QSPI.U_BOOT.backup";
|
|
|
|
|
reg = <0x00080000 0x00080000>;
|
|
|
|
|
};
|
|
|
|
|
partition@2 {
|
|
|
|
|
label = "QSPI.U-BOOT-SPL_OS";
|
|
|
|
|
reg = <0x00100000 0x00010000>;
|
|
|
|
|
};
|
|
|
|
|
partition@3 {
|
|
|
|
|
label = "QSPI.U_BOOT_ENV";
|
|
|
|
|
reg = <0x00110000 0x00010000>;
|
|
|
|
|
};
|
|
|
|
|
partition@4 {
|
|
|
|
|
label = "QSPI.U-BOOT-ENV.backup";
|
|
|
|
|
reg = <0x00120000 0x00010000>;
|
|
|
|
|
};
|
|
|
|
|
partition@5 {
|
|
|
|
|
label = "QSPI.KERNEL";
|
|
|
|
|
reg = <0x00130000 0x0800000>;
|
|
|
|
|
};
|
|
|
|
|
partition@6 {
|
|
|
|
|
label = "QSPI.FILESYSTEM";
|
|
|
|
|
reg = <0x00930000 0x36D0000>;
|
|
|
|
|
};
|
|
|
|
|
};
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
&mac {
|
|
|
|
|
pinctrl-names = "default", "sleep";
|
|
|
|
|
pinctrl-0 = <&cpsw_default>;
|
|
|
|
|
pinctrl-1 = <&cpsw_sleep>;
|
|
|
|
|
dual_emac = <1>;
|
|
|
|
|
status = "okay";
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
&davinci_mdio {
|
|
|
|
|
pinctrl-names = "default", "sleep";
|
|
|
|
|
pinctrl-0 = <&davinci_mdio_default>;
|
|
|
|
|
pinctrl-1 = <&davinci_mdio_sleep>;
|
|
|
|
|
status = "okay";
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
&cpsw_emac0 {
|
|
|
|
|
phy_id = <&davinci_mdio>, <4>;
|
|
|
|
|
phy-mode = "rgmii";
|
|
|
|
|
dual_emac_res_vlan = <1>;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
&cpsw_emac1 {
|
|
|
|
|
phy_id = <&davinci_mdio>, <5>;
|
|
|
|
|
phy-mode = "rgmii";
|
|
|
|
|
dual_emac_res_vlan = <2>;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
&elm {
|
|
|
|
|
status = "okay";
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
&mcasp1 {
|
|
|
|
|
pinctrl-names = "default";
|
|
|
|
|
pinctrl-0 = <&mcasp1_pins>;
|
|
|
|
|
|
|
|
|
|
status = "okay";
|
|
|
|
|
|
|
|
|
|
op-mode = <0>;
|
|
|
|
|
tdm-slots = <2>;
|
|
|
|
|
serial-dir = <
|
|
|
|
|
0 0 1 2
|
|
|
|
|
>;
|
|
|
|
|
|
|
|
|
|
tx-num-evt = <1>;
|
|
|
|
|
rx-num-evt = <1>;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
&dss {
|
|
|
|
|
status = "okay";
|
|
|
|
|
|
|
|
|
|
pinctrl-names = "default";
|
|
|
|
|
pinctrl-0 = <&dss_pins>;
|
|
|
|
|
|
|
|
|
|
port {
|
|
|
|
|
dpi_out: endpoint@0 {
|
|
|
|
|
remote-endpoint = <&lcd_in>;
|
|
|
|
|
data-lines = <24>;
|
|
|
|
|
};
|
|
|
|
|
};
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
&rtc {
|
|
|
|
|
status = "okay";
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
&wdt {
|
|
|
|
|
status = "okay";
|
|
|
|
|
};
|
2014-12-04 15:24:39 +00:00
|
|
|
|
|
|
|
|
&cpu {
|
|
|
|
|
cpu0-supply = <&dcdc2>;
|
|
|
|
|
};
|
2014-12-18 16:24:13 +00:00
|
|
|
|
|
|
|
|
&vpfe0 {
|
|
|
|
|
status = "okay";
|
|
|
|
|
pinctrl-names = "default", "sleep";
|
|
|
|
|
pinctrl-0 = <&vpfe0_pins_default>;
|
|
|
|
|
pinctrl-1 = <&vpfe0_pins_sleep>;
|
|
|
|
|
|
|
|
|
|
/* Camera port */
|
|
|
|
|
port {
|
|
|
|
|
vpfe0_ep: endpoint {
|
|
|
|
|
/* remote-endpoint = <&sensor>; add once we have it */
|
|
|
|
|
ti,am437x-vpfe-interface = <0>;
|
|
|
|
|
bus-width = <8>;
|
|
|
|
|
hsync-active = <0>;
|
|
|
|
|
vsync-active = <0>;
|
|
|
|
|
};
|
|
|
|
|
};
|
|
|
|
|
};
|
