2009-10-26 20:06:31 +00:00
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<?xml version="1.0" encoding="UTF-8"?>
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<!DOCTYPE book PUBLIC "-//OASIS//DTD DocBook XML V4.1.2//EN"
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"http://www.oasis-open.org/docbook/xml/4.1.2/docbookx.dtd" []>
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<book id="drmDevelopersGuide">
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<bookinfo>
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<title>Linux DRM Developer's Guide</title>
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<copyright>
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<year>2008-2009</year>
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<holder>
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Intel Corporation (Jesse Barnes <jesse.barnes@intel.com>)
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</holder>
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</copyright>
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<legalnotice>
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<para>
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The contents of this file may be used under the terms of the GNU
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General Public License version 2 (the "GPL") as distributed in
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the kernel source COPYING file.
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</para>
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</legalnotice>
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</bookinfo>
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<toc></toc>
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<!-- Introduction -->
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<chapter id="drmIntroduction">
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<title>Introduction</title>
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<para>
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The Linux DRM layer contains code intended to support the needs
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of complex graphics devices, usually containing programmable
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pipelines well suited to 3D graphics acceleration. Graphics
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drivers in the kernel may make use of DRM functions to make
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tasks like memory management, interrupt handling and DMA easier,
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and provide a uniform interface to applications.
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</para>
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<para>
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A note on versions: this guide covers features found in the DRM
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tree, including the TTM memory manager, output configuration and
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mode setting, and the new vblank internals, in addition to all
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the regular features found in current kernels.
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</para>
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<para>
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[Insert diagram of typical DRM stack here]
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</para>
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</chapter>
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<!-- Internals -->
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<chapter id="drmInternals">
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<title>DRM Internals</title>
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<para>
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This chapter documents DRM internals relevant to driver authors
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and developers working to add support for the latest features to
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existing drivers.
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</para>
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<para>
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First, we go over some typical driver initialization
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requirements, like setting up command buffers, creating an
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initial output configuration, and initializing core services.
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Subsequent sections cover core internals in more detail,
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providing implementation notes and examples.
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</para>
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<para>
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The DRM layer provides several services to graphics drivers,
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many of them driven by the application interfaces it provides
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through libdrm, the library that wraps most of the DRM ioctls.
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These include vblank event handling, memory
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management, output management, framebuffer management, command
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submission & fencing, suspend/resume support, and DMA
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services.
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</para>
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<para>
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The core of every DRM driver is struct drm_driver. Drivers
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typically statically initialize a drm_driver structure,
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then pass it to drm_init() at load time.
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</para>
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<!-- Internals: driver init -->
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<sect1>
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<title>Driver initialization</title>
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<para>
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Before calling the DRM initialization routines, the driver must
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first create and fill out a struct drm_driver structure.
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</para>
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<programlisting>
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static struct drm_driver driver = {
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/* Don't use MTRRs here; the Xserver or userspace app should
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* deal with them for Intel hardware.
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*/
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.driver_features =
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DRIVER_USE_AGP | DRIVER_REQUIRE_AGP |
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DRIVER_HAVE_IRQ | DRIVER_IRQ_SHARED | DRIVER_MODESET,
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.load = i915_driver_load,
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.unload = i915_driver_unload,
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.firstopen = i915_driver_firstopen,
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.lastclose = i915_driver_lastclose,
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.preclose = i915_driver_preclose,
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.save = i915_save,
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.restore = i915_restore,
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.device_is_agp = i915_driver_device_is_agp,
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.get_vblank_counter = i915_get_vblank_counter,
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.enable_vblank = i915_enable_vblank,
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.disable_vblank = i915_disable_vblank,
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.irq_preinstall = i915_driver_irq_preinstall,
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.irq_postinstall = i915_driver_irq_postinstall,
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.irq_uninstall = i915_driver_irq_uninstall,
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.irq_handler = i915_driver_irq_handler,
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.reclaim_buffers = drm_core_reclaim_buffers,
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.get_map_ofs = drm_core_get_map_ofs,
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.get_reg_ofs = drm_core_get_reg_ofs,
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.fb_probe = intelfb_probe,
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.fb_remove = intelfb_remove,
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.fb_resize = intelfb_resize,
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.master_create = i915_master_create,
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.master_destroy = i915_master_destroy,
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#if defined(CONFIG_DEBUG_FS)
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.debugfs_init = i915_debugfs_init,
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.debugfs_cleanup = i915_debugfs_cleanup,
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#endif
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.gem_init_object = i915_gem_init_object,
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.gem_free_object = i915_gem_free_object,
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.gem_vm_ops = &i915_gem_vm_ops,
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.ioctls = i915_ioctls,
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.fops = {
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.owner = THIS_MODULE,
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.open = drm_open,
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.release = drm_release,
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.ioctl = drm_ioctl,
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.mmap = drm_mmap,
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.poll = drm_poll,
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.fasync = drm_fasync,
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#ifdef CONFIG_COMPAT
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.compat_ioctl = i915_compat_ioctl,
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#endif
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.llseek = noop_llseek,
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},
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.pci_driver = {
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.name = DRIVER_NAME,
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.id_table = pciidlist,
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.probe = probe,
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.remove = __devexit_p(drm_cleanup_pci),
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},
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.name = DRIVER_NAME,
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.desc = DRIVER_DESC,
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.date = DRIVER_DATE,
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.major = DRIVER_MAJOR,
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.minor = DRIVER_MINOR,
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.patchlevel = DRIVER_PATCHLEVEL,
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};
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</programlisting>
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<para>
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In the example above, taken from the i915 DRM driver, the driver
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sets several flags indicating what core features it supports;
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we go over the individual callbacks in later sections. Since
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flags indicate which features your driver supports to the DRM
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core, you need to set most of them prior to calling drm_init(). Some,
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like DRIVER_MODESET can be set later based on user supplied parameters,
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but that's the exception rather than the rule.
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</para>
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<variablelist>
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<title>Driver flags</title>
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<varlistentry>
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<term>DRIVER_USE_AGP</term>
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<listitem><para>
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Driver uses AGP interface
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</para></listitem>
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</varlistentry>
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<varlistentry>
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<term>DRIVER_REQUIRE_AGP</term>
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<listitem><para>
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Driver needs AGP interface to function.
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</para></listitem>
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</varlistentry>
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<varlistentry>
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<term>DRIVER_USE_MTRR</term>
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<listitem>
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<para>
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Driver uses MTRR interface for mapping memory. Deprecated.
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</para>
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</listitem>
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</varlistentry>
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<varlistentry>
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<term>DRIVER_PCI_DMA</term>
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<listitem><para>
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Driver is capable of PCI DMA. Deprecated.
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</para></listitem>
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</varlistentry>
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<varlistentry>
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<term>DRIVER_SG</term>
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<listitem><para>
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Driver can perform scatter/gather DMA. Deprecated.
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</para></listitem>
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</varlistentry>
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<varlistentry>
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<term>DRIVER_HAVE_DMA</term>
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<listitem><para>Driver supports DMA. Deprecated.</para></listitem>
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</varlistentry>
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<varlistentry>
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<term>DRIVER_HAVE_IRQ</term><term>DRIVER_IRQ_SHARED</term>
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<listitem>
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<para>
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DRIVER_HAVE_IRQ indicates whether the driver has an IRQ
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handler. DRIVER_IRQ_SHARED indicates whether the device &
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handler support shared IRQs (note that this is required of
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PCI drivers).
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</para>
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</listitem>
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</varlistentry>
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<varlistentry>
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<term>DRIVER_DMA_QUEUE</term>
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<listitem>
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<para>
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Should be set if the driver queues DMA requests and completes them
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asynchronously. Deprecated.
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</para>
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</listitem>
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</varlistentry>
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<varlistentry>
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<term>DRIVER_FB_DMA</term>
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<listitem>
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<para>
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Driver supports DMA to/from the framebuffer. Deprecated.
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</para>
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</listitem>
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</varlistentry>
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<varlistentry>
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<term>DRIVER_MODESET</term>
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<listitem>
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<para>
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Driver supports mode setting interfaces.
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</para>
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</listitem>
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</varlistentry>
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</variablelist>
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<para>
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In this specific case, the driver requires AGP and supports
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IRQs. DMA, as discussed later, is handled by device specific ioctls
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in this case. It also supports the kernel mode setting APIs, though
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unlike in the actual i915 driver source, this example unconditionally
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exports KMS capability.
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</para>
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</sect1>
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<!-- Internals: driver load -->
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<sect1>
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<title>Driver load</title>
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<para>
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In the previous section, we saw what a typical drm_driver
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structure might look like. One of the more important fields in
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the structure is the hook for the load function.
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</para>
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<programlisting>
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static struct drm_driver driver = {
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...
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.load = i915_driver_load,
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...
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};
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</programlisting>
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<para>
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The load function has many responsibilities: allocating a driver
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private structure, specifying supported performance counters,
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configuring the device (e.g. mapping registers & command
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buffers), initializing the memory manager, and setting up the
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initial output configuration.
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</para>
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<para>
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2011-08-25 18:37:05 +00:00
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If compatibility is a concern (e.g. with drivers converted over
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to the new interfaces from the old ones), care must be taken to
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prevent device initialization and control that is incompatible with
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currently active userspace drivers. For instance, if user
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level mode setting drivers are in use, it would be problematic
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to perform output discovery & configuration at load time.
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Likewise, if user-level drivers unaware of memory management are
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in use, memory management and command buffer setup may need to
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be omitted. These requirements are driver specific, and care
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needs to be taken to keep both old and new applications and
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libraries working. The i915 driver supports the "modeset"
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module parameter to control whether advanced features are
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enabled at load time or in legacy fashion.
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</para>
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<sect2>
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<title>Driver private & performance counters</title>
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<para>
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The driver private hangs off the main drm_device structure and
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can be used for tracking various device specific bits of
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information, like register offsets, command buffer status,
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register state for suspend/resume, etc. At load time, a
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driver may simply allocate one and set drm_device.dev_priv
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appropriately; it should be freed and drm_device.dev_priv set
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to NULL when the driver is unloaded.
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</para>
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<para>
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The DRM supports several counters which may be used for rough
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performance characterization. Note that the DRM stat counter
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system is not often used by applications, and supporting
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additional counters is completely optional.
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</para>
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<para>
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These interfaces are deprecated and should not be used. If performance
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monitoring is desired, the developer should investigate and
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potentially enhance the kernel perf and tracing infrastructure to export
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GPU related performance information for consumption by performance
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monitoring tools and applications.
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</para>
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</sect2>
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<sect2>
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<title>Configuring the device</title>
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<para>
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2011-08-25 17:18:08 +00:00
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Obviously, device configuration is device specific.
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However, there are several common operations: finding a
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device's PCI resources, mapping them, and potentially setting
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up an IRQ handler.
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</para>
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<para>
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Finding & mapping resources is fairly straightforward. The
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DRM wrapper functions, drm_get_resource_start() and
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drm_get_resource_len(), may be used to find BARs on the given
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drm_device struct. Once those values have been retrieved, the
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driver load function can call drm_addmap() to create a new
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2011-08-25 18:46:10 +00:00
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mapping for the BAR in question. Note that you probably want a
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drm_local_map_t in your driver private structure to track any
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mappings you create.
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<!-- !Fdrivers/gpu/drm/drm_bufs.c drm_get_resource_* -->
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<!-- !Finclude/drm/drmP.h drm_local_map_t -->
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</para>
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<para>
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if compatibility with other operating systems isn't a concern
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(DRM drivers can run under various BSD variants and OpenSolaris),
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native Linux calls may be used for the above, e.g. pci_resource_*
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and iomap*/iounmap. See the Linux device driver book for more
|
|
|
|
info.
|
|
|
|
</para>
|
|
|
|
<para>
|
2011-08-25 17:21:31 +00:00
|
|
|
Once you have a register map, you may use the DRM_READn() and
|
2009-10-26 20:06:31 +00:00
|
|
|
DRM_WRITEn() macros to access the registers on your device, or
|
|
|
|
use driver specific versions to offset into your MMIO space
|
|
|
|
relative to a driver specific base pointer (see I915_READ for
|
2011-08-25 18:48:15 +00:00
|
|
|
an example).
|
2009-10-26 20:06:31 +00:00
|
|
|
</para>
|
|
|
|
<para>
|
|
|
|
If your device supports interrupt generation, you may want to
|
2011-08-25 18:50:14 +00:00
|
|
|
set up an interrupt handler when the driver is loaded. This
|
2009-10-26 20:06:31 +00:00
|
|
|
is done using the drm_irq_install() function. If your device
|
|
|
|
supports vertical blank interrupts, it should call
|
|
|
|
drm_vblank_init() to initialize the core vblank handling code before
|
|
|
|
enabling interrupts on your device. This ensures the vblank related
|
|
|
|
structures are allocated and allows the core to handle vblank events.
|
|
|
|
</para>
|
|
|
|
<!--!Fdrivers/char/drm/drm_irq.c drm_irq_install-->
|
|
|
|
<para>
|
2011-08-25 17:18:08 +00:00
|
|
|
Once your interrupt handler is registered (it uses your
|
2009-10-26 20:06:31 +00:00
|
|
|
drm_driver.irq_handler as the actual interrupt handling
|
|
|
|
function), you can safely enable interrupts on your device,
|
|
|
|
assuming any other state your interrupt handler uses is also
|
|
|
|
initialized.
|
|
|
|
</para>
|
|
|
|
<para>
|
|
|
|
Another task that may be necessary during configuration is
|
|
|
|
mapping the video BIOS. On many devices, the VBIOS describes
|
|
|
|
device configuration, LCD panel timings (if any), and contains
|
|
|
|
flags indicating device state. Mapping the BIOS can be done
|
|
|
|
using the pci_map_rom() call, a convenience function that
|
|
|
|
takes care of mapping the actual ROM, whether it has been
|
|
|
|
shadowed into memory (typically at address 0xc0000) or exists
|
2011-08-25 18:56:12 +00:00
|
|
|
on the PCI device in the ROM BAR. Note that after the ROM
|
|
|
|
has been mapped and any necessary information has been extracted,
|
2011-08-25 18:57:04 +00:00
|
|
|
it should be unmapped; on many devices, the ROM address decoder is
|
2011-08-25 18:57:37 +00:00
|
|
|
shared with other BARs, so leaving it mapped could cause
|
2009-10-26 20:06:31 +00:00
|
|
|
undesired behavior like hangs or memory corruption.
|
|
|
|
<!--!Fdrivers/pci/rom.c pci_map_rom-->
|
|
|
|
</para>
|
|
|
|
</sect2>
|
|
|
|
|
|
|
|
<sect2>
|
|
|
|
<title>Memory manager initialization</title>
|
|
|
|
<para>
|
|
|
|
In order to allocate command buffers, cursor memory, scanout
|
|
|
|
buffers, etc., as well as support the latest features provided
|
|
|
|
by packages like Mesa and the X.Org X server, your driver
|
|
|
|
should support a memory manager.
|
|
|
|
</para>
|
|
|
|
<para>
|
2011-08-25 17:18:08 +00:00
|
|
|
If your driver supports memory management (it should!), you
|
2010-05-28 05:33:49 +00:00
|
|
|
need to set that up at load time as well. How you initialize
|
2011-08-25 18:58:42 +00:00
|
|
|
it depends on which memory manager you're using: TTM or GEM.
|
2009-10-26 20:06:31 +00:00
|
|
|
</para>
|
|
|
|
<sect3>
|
|
|
|
<title>TTM initialization</title>
|
|
|
|
<para>
|
|
|
|
TTM (for Translation Table Manager) manages video memory and
|
|
|
|
aperture space for graphics devices. TTM supports both UMA devices
|
|
|
|
and devices with dedicated video RAM (VRAM), i.e. most discrete
|
|
|
|
graphics devices. If your device has dedicated RAM, supporting
|
2010-05-28 05:33:49 +00:00
|
|
|
TTM is desirable. TTM also integrates tightly with your
|
2009-10-26 20:06:31 +00:00
|
|
|
driver specific buffer execution function. See the radeon
|
|
|
|
driver for examples.
|
|
|
|
</para>
|
|
|
|
<para>
|
|
|
|
The core TTM structure is the ttm_bo_driver struct. It contains
|
|
|
|
several fields with function pointers for initializing the TTM,
|
|
|
|
allocating and freeing memory, waiting for command completion
|
|
|
|
and fence synchronization, and memory migration. See the
|
|
|
|
radeon_ttm.c file for an example of usage.
|
|
|
|
</para>
|
|
|
|
<para>
|
|
|
|
The ttm_global_reference structure is made up of several fields:
|
|
|
|
</para>
|
|
|
|
<programlisting>
|
|
|
|
struct ttm_global_reference {
|
|
|
|
enum ttm_global_types global_type;
|
|
|
|
size_t size;
|
|
|
|
void *object;
|
|
|
|
int (*init) (struct ttm_global_reference *);
|
|
|
|
void (*release) (struct ttm_global_reference *);
|
|
|
|
};
|
|
|
|
</programlisting>
|
|
|
|
<para>
|
|
|
|
There should be one global reference structure for your memory
|
|
|
|
manager as a whole, and there will be others for each object
|
|
|
|
created by the memory manager at runtime. Your global TTM should
|
|
|
|
have a type of TTM_GLOBAL_TTM_MEM. The size field for the global
|
|
|
|
object should be sizeof(struct ttm_mem_global), and the init and
|
|
|
|
release hooks should point at your driver specific init and
|
2011-08-25 17:18:08 +00:00
|
|
|
release routines, which probably eventually call
|
2011-08-25 19:02:52 +00:00
|
|
|
ttm_mem_global_init and ttm_mem_global_release, respectively.
|
2009-10-26 20:06:31 +00:00
|
|
|
</para>
|
|
|
|
<para>
|
|
|
|
Once your global TTM accounting structure is set up and initialized
|
2011-08-25 19:19:18 +00:00
|
|
|
by calling ttm_global_item_ref() on it,
|
2011-08-25 19:14:26 +00:00
|
|
|
you need to create a buffer object TTM to
|
2009-10-26 20:06:31 +00:00
|
|
|
provide a pool for buffer object allocation by clients and the
|
|
|
|
kernel itself. The type of this object should be TTM_GLOBAL_TTM_BO,
|
|
|
|
and its size should be sizeof(struct ttm_bo_global). Again,
|
2011-08-25 17:21:31 +00:00
|
|
|
driver specific init and release functions may be provided,
|
2011-08-25 19:19:18 +00:00
|
|
|
likely eventually calling ttm_bo_global_init() and
|
|
|
|
ttm_bo_global_release(), respectively. Also, like the previous
|
|
|
|
object, ttm_global_item_ref() is used to create an initial reference
|
2010-05-28 05:33:49 +00:00
|
|
|
count for the TTM, which will call your initialization function.
|
2009-10-26 20:06:31 +00:00
|
|
|
</para>
|
|
|
|
</sect3>
|
|
|
|
<sect3>
|
|
|
|
<title>GEM initialization</title>
|
|
|
|
<para>
|
|
|
|
GEM is an alternative to TTM, designed specifically for UMA
|
|
|
|
devices. It has simpler initialization and execution requirements
|
|
|
|
than TTM, but has no VRAM management capability. Core GEM
|
2011-08-25 19:21:17 +00:00
|
|
|
is initialized by calling drm_mm_init() to create
|
2009-10-26 20:06:31 +00:00
|
|
|
a GTT DRM MM object, which provides an address space pool for
|
2011-08-25 17:18:08 +00:00
|
|
|
object allocation. In a KMS configuration, the driver
|
|
|
|
needs to allocate and initialize a command ring buffer following
|
2011-08-25 19:42:20 +00:00
|
|
|
core GEM initialization. A UMA device usually has what is called a
|
2009-10-26 20:06:31 +00:00
|
|
|
"stolen" memory region, which provides space for the initial
|
|
|
|
framebuffer and large, contiguous memory regions required by the
|
2011-08-25 19:48:32 +00:00
|
|
|
device. This space is not typically managed by GEM, and it must
|
2009-10-26 20:06:31 +00:00
|
|
|
be initialized separately into its own DRM MM object.
|
|
|
|
</para>
|
|
|
|
<para>
|
2011-08-25 19:49:10 +00:00
|
|
|
Initialization is driver specific. In the case of Intel
|
2009-10-26 20:06:31 +00:00
|
|
|
integrated graphics chips like 965GM, GEM initialization can
|
|
|
|
be done by calling the internal GEM init function,
|
|
|
|
i915_gem_do_init(). Since the 965GM is a UMA device
|
2011-08-25 17:18:08 +00:00
|
|
|
(i.e. it doesn't have dedicated VRAM), GEM manages
|
2009-10-26 20:06:31 +00:00
|
|
|
making regular RAM available for GPU operations. Memory set
|
|
|
|
aside by the BIOS (called "stolen" memory by the i915
|
2011-08-25 17:18:08 +00:00
|
|
|
driver) is managed by the DRM memrange allocator; the
|
|
|
|
rest of the aperture is managed by GEM.
|
2009-10-26 20:06:31 +00:00
|
|
|
<programlisting>
|
|
|
|
/* Basic memrange allocator for stolen space (aka vram) */
|
|
|
|
drm_memrange_init(&dev_priv->vram, 0, prealloc_size);
|
|
|
|
/* Let GEM Manage from end of prealloc space to end of aperture */
|
|
|
|
i915_gem_do_init(dev, prealloc_size, agp_size);
|
|
|
|
</programlisting>
|
|
|
|
<!--!Edrivers/char/drm/drm_memrange.c-->
|
|
|
|
</para>
|
|
|
|
<para>
|
2011-08-25 17:21:31 +00:00
|
|
|
Once the memory manager has been set up, we may allocate the
|
2009-10-26 20:06:31 +00:00
|
|
|
command buffer. In the i915 case, this is also done with a
|
|
|
|
GEM function, i915_gem_init_ringbuffer().
|
|
|
|
</para>
|
|
|
|
</sect3>
|
|
|
|
</sect2>
|
|
|
|
|
|
|
|
<sect2>
|
|
|
|
<title>Output configuration</title>
|
|
|
|
<para>
|
2011-08-25 20:18:14 +00:00
|
|
|
The final initialization task is output configuration. This involves:
|
|
|
|
<itemizedlist>
|
|
|
|
<listitem>
|
|
|
|
Finding and initializing the CRTCs, encoders, and connectors
|
|
|
|
for the device.
|
|
|
|
</listitem>
|
|
|
|
<listitem>
|
|
|
|
Creating an initial configuration.
|
|
|
|
</listitem>
|
|
|
|
<listitem>
|
|
|
|
Registering a framebuffer console driver.
|
|
|
|
</listitem>
|
|
|
|
</itemizedlist>
|
2009-10-26 20:06:31 +00:00
|
|
|
</para>
|
|
|
|
<sect3>
|
|
|
|
<title>Output discovery and initialization</title>
|
|
|
|
<para>
|
2011-08-25 19:02:52 +00:00
|
|
|
Several core functions exist to create CRTCs, encoders, and
|
2011-08-25 20:21:22 +00:00
|
|
|
connectors, namely: drm_crtc_init(), drm_connector_init(), and
|
2009-10-26 20:06:31 +00:00
|
|
|
drm_encoder_init(), along with several "helper" functions to
|
|
|
|
perform common tasks.
|
|
|
|
</para>
|
|
|
|
<para>
|
|
|
|
Connectors should be registered with sysfs once they've been
|
|
|
|
detected and initialized, using the
|
|
|
|
drm_sysfs_connector_add() function. Likewise, when they're
|
|
|
|
removed from the system, they should be destroyed with
|
|
|
|
drm_sysfs_connector_remove().
|
|
|
|
</para>
|
|
|
|
<programlisting>
|
|
|
|
<![CDATA[
|
|
|
|
void intel_crt_init(struct drm_device *dev)
|
|
|
|
{
|
|
|
|
struct drm_connector *connector;
|
|
|
|
struct intel_output *intel_output;
|
|
|
|
|
|
|
|
intel_output = kzalloc(sizeof(struct intel_output), GFP_KERNEL);
|
|
|
|
if (!intel_output)
|
|
|
|
return;
|
|
|
|
|
|
|
|
connector = &intel_output->base;
|
|
|
|
drm_connector_init(dev, &intel_output->base,
|
|
|
|
&intel_crt_connector_funcs, DRM_MODE_CONNECTOR_VGA);
|
|
|
|
|
|
|
|
drm_encoder_init(dev, &intel_output->enc, &intel_crt_enc_funcs,
|
|
|
|
DRM_MODE_ENCODER_DAC);
|
|
|
|
|
|
|
|
drm_mode_connector_attach_encoder(&intel_output->base,
|
|
|
|
&intel_output->enc);
|
|
|
|
|
|
|
|
/* Set up the DDC bus. */
|
|
|
|
intel_output->ddc_bus = intel_i2c_create(dev, GPIOA, "CRTDDC_A");
|
|
|
|
if (!intel_output->ddc_bus) {
|
|
|
|
dev_printk(KERN_ERR, &dev->pdev->dev, "DDC bus registration "
|
|
|
|
"failed.\n");
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
intel_output->type = INTEL_OUTPUT_ANALOG;
|
|
|
|
connector->interlace_allowed = 0;
|
|
|
|
connector->doublescan_allowed = 0;
|
|
|
|
|
|
|
|
drm_encoder_helper_add(&intel_output->enc, &intel_crt_helper_funcs);
|
|
|
|
drm_connector_helper_add(connector, &intel_crt_connector_helper_funcs);
|
|
|
|
|
|
|
|
drm_sysfs_connector_add(connector);
|
|
|
|
}
|
|
|
|
]]>
|
|
|
|
</programlisting>
|
|
|
|
<para>
|
|
|
|
In the example above (again, taken from the i915 driver), a
|
|
|
|
CRT connector and encoder combination is created. A device
|
2011-08-25 20:26:17 +00:00
|
|
|
specific i2c bus is also created for fetching EDID data and
|
2009-10-26 20:06:31 +00:00
|
|
|
performing monitor detection. Once the process is complete,
|
2011-08-25 20:26:17 +00:00
|
|
|
the new connector is registered with sysfs to make its
|
2009-10-26 20:06:31 +00:00
|
|
|
properties available to applications.
|
|
|
|
</para>
|
|
|
|
<sect4>
|
|
|
|
<title>Helper functions and core functions</title>
|
|
|
|
<para>
|
|
|
|
Since many PC-class graphics devices have similar display output
|
|
|
|
designs, the DRM provides a set of helper functions to make
|
|
|
|
output management easier. The core helper routines handle
|
2011-08-25 20:29:32 +00:00
|
|
|
encoder re-routing and the disabling of unused functions following
|
|
|
|
mode setting. Using the helpers is optional, but recommended for
|
2009-10-26 20:06:31 +00:00
|
|
|
devices with PC-style architectures (i.e. a set of display planes
|
|
|
|
for feeding pixels to encoders which are in turn routed to
|
|
|
|
connectors). Devices with more complex requirements needing
|
2011-08-25 17:21:31 +00:00
|
|
|
finer grained management may opt to use the core callbacks
|
2009-10-26 20:06:31 +00:00
|
|
|
directly.
|
|
|
|
</para>
|
|
|
|
<para>
|
|
|
|
[Insert typical diagram here.] [Insert OMAP style config here.]
|
|
|
|
</para>
|
|
|
|
</sect4>
|
|
|
|
<para>
|
2011-08-25 20:55:58 +00:00
|
|
|
Each encoder object needs to provide:
|
|
|
|
<itemizedlist>
|
|
|
|
<listitem>
|
|
|
|
A DPMS (basically on/off) function.
|
|
|
|
</listitem>
|
|
|
|
<listitem>
|
|
|
|
A mode-fixup function (for converting requested modes into
|
|
|
|
native hardware timings).
|
|
|
|
</listitem>
|
|
|
|
<listitem>
|
|
|
|
Functions (prepare, set, and commit) for use by the core DRM
|
|
|
|
helper functions.
|
|
|
|
</listitem>
|
|
|
|
</itemizedlist>
|
|
|
|
Connector helpers need to provide functions (mode-fetch, validity,
|
|
|
|
and encoder-matching) for returning an ideal encoder for a given
|
|
|
|
connector. The core connector functions include a DPMS callback,
|
|
|
|
save/restore routines (deprecated), detection, mode probing,
|
|
|
|
property handling, and cleanup functions.
|
2009-10-26 20:06:31 +00:00
|
|
|
</para>
|
|
|
|
<!--!Edrivers/char/drm/drm_crtc.h-->
|
|
|
|
<!--!Edrivers/char/drm/drm_crtc.c-->
|
|
|
|
<!--!Edrivers/char/drm/drm_crtc_helper.c-->
|
|
|
|
</sect3>
|
|
|
|
</sect2>
|
|
|
|
</sect1>
|
|
|
|
|
|
|
|
<!-- Internals: vblank handling -->
|
|
|
|
|
|
|
|
<sect1>
|
|
|
|
<title>VBlank event handling</title>
|
|
|
|
<para>
|
|
|
|
The DRM core exposes two vertical blank related ioctls:
|
2011-08-25 21:11:30 +00:00
|
|
|
<variablelist>
|
|
|
|
<varlistentry>
|
|
|
|
<term>DRM_IOCTL_WAIT_VBLANK</term>
|
|
|
|
<listitem>
|
|
|
|
<para>
|
|
|
|
This takes a struct drm_wait_vblank structure as its argument,
|
|
|
|
and it is used to block or request a signal when a specified
|
|
|
|
vblank event occurs.
|
|
|
|
</para>
|
|
|
|
</listitem>
|
|
|
|
</varlistentry>
|
|
|
|
<varlistentry>
|
|
|
|
<term>DRM_IOCTL_MODESET_CTL</term>
|
|
|
|
<listitem>
|
|
|
|
<para>
|
|
|
|
This should be called by application level drivers before and
|
|
|
|
after mode setting, since on many devices the vertical blank
|
|
|
|
counter is reset at that time. Internally, the DRM snapshots
|
|
|
|
the last vblank count when the ioctl is called with the
|
2011-08-25 21:16:15 +00:00
|
|
|
_DRM_PRE_MODESET command, so that the counter won't go backwards
|
2011-08-25 21:11:30 +00:00
|
|
|
(which is dealt with when _DRM_POST_MODESET is used).
|
|
|
|
</para>
|
|
|
|
</listitem>
|
|
|
|
</varlistentry>
|
|
|
|
</variablelist>
|
2009-10-26 20:06:31 +00:00
|
|
|
<!--!Edrivers/char/drm/drm_irq.c-->
|
|
|
|
</para>
|
|
|
|
<para>
|
|
|
|
To support the functions above, the DRM core provides several
|
|
|
|
helper functions for tracking vertical blank counters, and
|
|
|
|
requires drivers to provide several callbacks:
|
|
|
|
get_vblank_counter(), enable_vblank() and disable_vblank(). The
|
|
|
|
core uses get_vblank_counter() to keep the counter accurate
|
|
|
|
across interrupt disable periods. It should return the current
|
|
|
|
vertical blank event count, which is often tracked in a device
|
|
|
|
register. The enable and disable vblank callbacks should enable
|
|
|
|
and disable vertical blank interrupts, respectively. In the
|
|
|
|
absence of DRM clients waiting on vblank events, the core DRM
|
2011-08-25 17:18:08 +00:00
|
|
|
code uses the disable_vblank() function to disable
|
|
|
|
interrupts, which saves power. They are re-enabled again when
|
2009-10-26 20:06:31 +00:00
|
|
|
a client calls the vblank wait ioctl above.
|
|
|
|
</para>
|
|
|
|
<para>
|
2011-08-25 19:41:37 +00:00
|
|
|
A device that doesn't provide a count register may simply use an
|
2009-10-26 20:06:31 +00:00
|
|
|
internal atomic counter incremented on every vertical blank
|
2011-08-25 19:41:37 +00:00
|
|
|
interrupt (and then treat the enable_vblank() and disable_vblank()
|
|
|
|
callbacks as no-ops).
|
2009-10-26 20:06:31 +00:00
|
|
|
</para>
|
|
|
|
</sect1>
|
|
|
|
|
|
|
|
<sect1>
|
|
|
|
<title>Memory management</title>
|
|
|
|
<para>
|
2011-08-25 18:10:12 +00:00
|
|
|
The memory manager lies at the heart of many DRM operations; it
|
|
|
|
is required to support advanced client features like OpenGL
|
2011-08-25 18:58:42 +00:00
|
|
|
pbuffers. The DRM currently contains two memory managers: TTM
|
2009-10-26 20:06:31 +00:00
|
|
|
and GEM.
|
|
|
|
</para>
|
|
|
|
|
|
|
|
<sect2>
|
|
|
|
<title>The Translation Table Manager (TTM)</title>
|
|
|
|
<para>
|
|
|
|
TTM was developed by Tungsten Graphics, primarily by Thomas
|
|
|
|
Hellström, and is intended to be a flexible, high performance
|
|
|
|
graphics memory manager.
|
|
|
|
</para>
|
|
|
|
<para>
|
|
|
|
Drivers wishing to support TTM must fill out a drm_bo_driver
|
|
|
|
structure.
|
|
|
|
</para>
|
|
|
|
<para>
|
|
|
|
TTM design background and information belongs here.
|
|
|
|
</para>
|
|
|
|
</sect2>
|
|
|
|
|
|
|
|
<sect2>
|
|
|
|
<title>The Graphics Execution Manager (GEM)</title>
|
|
|
|
<para>
|
|
|
|
GEM is an Intel project, authored by Eric Anholt and Keith
|
|
|
|
Packard. It provides simpler interfaces than TTM, and is well
|
|
|
|
suited for UMA devices.
|
|
|
|
</para>
|
|
|
|
<para>
|
|
|
|
GEM-enabled drivers must provide gem_init_object() and
|
|
|
|
gem_free_object() callbacks to support the core memory
|
|
|
|
allocation routines. They should also provide several driver
|
|
|
|
specific ioctls to support command execution, pinning, buffer
|
|
|
|
read & write, mapping, and domain ownership transfers.
|
|
|
|
</para>
|
|
|
|
<para>
|
2011-08-29 15:59:56 +00:00
|
|
|
On a fundamental level, GEM involves several operations:
|
|
|
|
<itemizedlist>
|
|
|
|
<listitem>Memory allocation and freeing</listitem>
|
|
|
|
<listitem>Command execution</listitem>
|
|
|
|
<listitem>Aperture management at command execution time</listitem>
|
|
|
|
</itemizedlist>
|
|
|
|
Buffer object allocation is relatively
|
2009-10-26 20:06:31 +00:00
|
|
|
straightforward and largely provided by Linux's shmem layer, which
|
|
|
|
provides memory to back each object. When mapped into the GTT
|
|
|
|
or used in a command buffer, the backing pages for an object are
|
|
|
|
flushed to memory and marked write combined so as to be coherent
|
2011-08-29 16:00:55 +00:00
|
|
|
with the GPU. Likewise, if the CPU accesses an object after the GPU
|
|
|
|
has finished rendering to the object, then the object must be made
|
|
|
|
coherent with the CPU's view
|
2009-10-26 20:06:31 +00:00
|
|
|
of memory, usually involving GPU cache flushing of various kinds.
|
2011-08-29 17:34:00 +00:00
|
|
|
This core CPU<->GPU coherency management is provided by a
|
|
|
|
device-specific ioctl, which evaluates an object's current domain and
|
2009-10-26 20:06:31 +00:00
|
|
|
performs any necessary flushing or synchronization to put the object
|
|
|
|
into the desired coherency domain (note that the object may be busy,
|
2011-08-29 17:34:00 +00:00
|
|
|
i.e. an active render target; in that case, setting the domain
|
2011-08-25 17:18:08 +00:00
|
|
|
blocks the client and waits for rendering to complete before
|
2009-10-26 20:06:31 +00:00
|
|
|
performing any necessary flushing operations).
|
|
|
|
</para>
|
|
|
|
<para>
|
|
|
|
Perhaps the most important GEM function is providing a command
|
|
|
|
execution interface to clients. Client programs construct command
|
|
|
|
buffers containing references to previously allocated memory objects
|
2011-08-25 17:18:08 +00:00
|
|
|
and submit them to GEM. At that point, GEM takes care to bind
|
2009-10-26 20:06:31 +00:00
|
|
|
all the objects into the GTT, execute the buffer, and provide
|
|
|
|
necessary synchronization between clients accessing the same buffers.
|
|
|
|
This often involves evicting some objects from the GTT and re-binding
|
|
|
|
others (a fairly expensive operation), and providing relocation
|
|
|
|
support which hides fixed GTT offsets from clients. Clients must
|
|
|
|
take care not to submit command buffers that reference more objects
|
|
|
|
than can fit in the GTT or GEM will reject them and no rendering
|
|
|
|
will occur. Similarly, if several objects in the buffer require
|
|
|
|
fence registers to be allocated for correct rendering (e.g. 2D blits
|
|
|
|
on pre-965 chips), care must be taken not to require more fence
|
|
|
|
registers than are available to the client. Such resource management
|
|
|
|
should be abstracted from the client in libdrm.
|
|
|
|
</para>
|
|
|
|
</sect2>
|
|
|
|
|
|
|
|
</sect1>
|
|
|
|
|
|
|
|
<!-- Output management -->
|
|
|
|
<sect1>
|
|
|
|
<title>Output management</title>
|
|
|
|
<para>
|
|
|
|
At the core of the DRM output management code is a set of
|
2011-08-25 19:02:52 +00:00
|
|
|
structures representing CRTCs, encoders, and connectors.
|
2009-10-26 20:06:31 +00:00
|
|
|
</para>
|
|
|
|
<para>
|
|
|
|
A CRTC is an abstraction representing a part of the chip that
|
|
|
|
contains a pointer to a scanout buffer. Therefore, the number
|
|
|
|
of CRTCs available determines how many independent scanout
|
|
|
|
buffers can be active at any given time. The CRTC structure
|
|
|
|
contains several fields to support this: a pointer to some video
|
|
|
|
memory, a display mode, and an (x, y) offset into the video
|
|
|
|
memory to support panning or configurations where one piece of
|
|
|
|
video memory spans multiple CRTCs.
|
|
|
|
</para>
|
|
|
|
<para>
|
|
|
|
An encoder takes pixel data from a CRTC and converts it to a
|
|
|
|
format suitable for any attached connectors. On some devices,
|
|
|
|
it may be possible to have a CRTC send data to more than one
|
|
|
|
encoder. In that case, both encoders would receive data from
|
|
|
|
the same scanout buffer, resulting in a "cloned" display
|
|
|
|
configuration across the connectors attached to each encoder.
|
|
|
|
</para>
|
|
|
|
<para>
|
|
|
|
A connector is the final destination for pixel data on a device,
|
|
|
|
and usually connects directly to an external display device like
|
|
|
|
a monitor or laptop panel. A connector can only be attached to
|
|
|
|
one encoder at a time. The connector is also the structure
|
|
|
|
where information about the attached display is kept, so it
|
|
|
|
contains fields for display data, EDID data, DPMS &
|
|
|
|
connection status, and information about modes supported on the
|
|
|
|
attached displays.
|
|
|
|
</para>
|
|
|
|
<!--!Edrivers/char/drm/drm_crtc.c-->
|
|
|
|
</sect1>
|
|
|
|
|
|
|
|
<sect1>
|
|
|
|
<title>Framebuffer management</title>
|
|
|
|
<para>
|
|
|
|
In order to set a mode on a given CRTC, encoder and connector
|
|
|
|
configuration, clients need to provide a framebuffer object which
|
2011-08-25 17:18:08 +00:00
|
|
|
provides a source of pixels for the CRTC to deliver to the encoder(s)
|
2009-10-26 20:06:31 +00:00
|
|
|
and ultimately the connector(s) in the configuration. A framebuffer
|
|
|
|
is fundamentally a driver specific memory object, made into an opaque
|
|
|
|
handle by the DRM addfb function. Once an fb has been created this
|
|
|
|
way it can be passed to the KMS mode setting routines for use in
|
|
|
|
a configuration.
|
|
|
|
</para>
|
|
|
|
</sect1>
|
|
|
|
|
|
|
|
<sect1>
|
|
|
|
<title>Command submission & fencing</title>
|
|
|
|
<para>
|
|
|
|
This should cover a few device specific command submission
|
|
|
|
implementations.
|
|
|
|
</para>
|
|
|
|
</sect1>
|
|
|
|
|
|
|
|
<sect1>
|
|
|
|
<title>Suspend/resume</title>
|
|
|
|
<para>
|
|
|
|
The DRM core provides some suspend/resume code, but drivers
|
|
|
|
wanting full suspend/resume support should provide save() and
|
2011-08-25 17:18:08 +00:00
|
|
|
restore() functions. These are called at suspend,
|
2009-10-26 20:06:31 +00:00
|
|
|
hibernate, or resume time, and should perform any state save or
|
|
|
|
restore required by your device across suspend or hibernate
|
|
|
|
states.
|
|
|
|
</para>
|
|
|
|
</sect1>
|
|
|
|
|
|
|
|
<sect1>
|
|
|
|
<title>DMA services</title>
|
|
|
|
<para>
|
|
|
|
This should cover how DMA mapping etc. is supported by the core.
|
|
|
|
These functions are deprecated and should not be used.
|
|
|
|
</para>
|
|
|
|
</sect1>
|
|
|
|
</chapter>
|
|
|
|
|
|
|
|
<!-- External interfaces -->
|
|
|
|
|
|
|
|
<chapter id="drmExternals">
|
|
|
|
<title>Userland interfaces</title>
|
|
|
|
<para>
|
|
|
|
The DRM core exports several interfaces to applications,
|
|
|
|
generally intended to be used through corresponding libdrm
|
|
|
|
wrapper functions. In addition, drivers export device specific
|
|
|
|
interfaces for use by userspace drivers & device aware
|
|
|
|
applications through ioctls and sysfs files.
|
|
|
|
</para>
|
|
|
|
<para>
|
|
|
|
External interfaces include: memory mapping, context management,
|
|
|
|
DMA operations, AGP management, vblank control, fence
|
|
|
|
management, memory management, and output management.
|
|
|
|
</para>
|
|
|
|
<para>
|
|
|
|
Cover generic ioctls and sysfs layout here. Only need high
|
2011-08-25 17:18:08 +00:00
|
|
|
level info, since man pages should cover the rest.
|
2009-10-26 20:06:31 +00:00
|
|
|
</para>
|
|
|
|
</chapter>
|
|
|
|
|
|
|
|
<!-- API reference -->
|
|
|
|
|
|
|
|
<appendix id="drmDriverApi">
|
|
|
|
<title>DRM Driver API</title>
|
|
|
|
<para>
|
|
|
|
Include auto-generated API reference here (need to reference it
|
|
|
|
from paragraphs above too).
|
|
|
|
</para>
|
|
|
|
</appendix>
|
|
|
|
|
|
|
|
</book>
|