[ARM] add Marvell Kirkwood (88F6000) SoC support
The Marvell Kirkwood (88F6000) is a family of ARM SoCs based on a
Shiva CPU core, and features a DDR2 controller, a x1 PCIe interface,
a USB 2.0 interface, a SPI controller, a crypto accelerator, a TS
interface, and IDMA/XOR engines, and depending on the model, also
features one or two Gigabit Ethernet interfaces, two SATA II
interfaces, one or two TWSI interfaces, one or two UARTs, a
TDM/SLIC interface, a NAND controller, an I2S/SPDIF interface, and
an SDIO interface.
This patch adds supports for the Marvell DB-88F6281-BP Development
Board and the RD-88F6192-NAS and the RD-88F6281 Reference Designs,
enabling support for the PCIe interface, the USB interface, the
ethernet interfaces, the SATA interfaces, the TWSI interfaces, the
UARTs, and the NAND controller.
Signed-off-by: Saeed Bishara <saeed@marvell.com>
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
2008-06-22 20:45:06 +00:00
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/*
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* arch/arm/mach-kirkwood/common.c
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*
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* Core functions for Marvell Kirkwood SoCs
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*
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* This file is licensed under the terms of the GNU General Public
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* License version 2. This program is licensed "as is" without any
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* warranty of any kind, whether express or implied.
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*/
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#include <linux/kernel.h>
|
|
|
|
#include <linux/init.h>
|
|
|
|
#include <linux/platform_device.h>
|
|
|
|
#include <linux/serial_8250.h>
|
|
|
|
#include <linux/ata_platform.h>
|
2009-06-01 19:36:36 +00:00
|
|
|
#include <linux/mtd/nand.h>
|
2011-05-15 11:32:48 +00:00
|
|
|
#include <linux/dma-mapping.h>
|
2011-12-15 07:15:07 +00:00
|
|
|
#include <linux/clk-provider.h>
|
|
|
|
#include <linux/spinlock.h>
|
2012-07-20 11:51:55 +00:00
|
|
|
#include <linux/mv643xx_i2c.h>
|
2008-09-25 14:23:48 +00:00
|
|
|
#include <net/dsa.h>
|
[ARM] add Marvell Kirkwood (88F6000) SoC support
The Marvell Kirkwood (88F6000) is a family of ARM SoCs based on a
Shiva CPU core, and features a DDR2 controller, a x1 PCIe interface,
a USB 2.0 interface, a SPI controller, a crypto accelerator, a TS
interface, and IDMA/XOR engines, and depending on the model, also
features one or two Gigabit Ethernet interfaces, two SATA II
interfaces, one or two TWSI interfaces, one or two UARTs, a
TDM/SLIC interface, a NAND controller, an I2S/SPDIF interface, and
an SDIO interface.
This patch adds supports for the Marvell DB-88F6281-BP Development
Board and the RD-88F6192-NAS and the RD-88F6281 Reference Designs,
enabling support for the PCIe interface, the USB interface, the
ethernet interfaces, the SATA interfaces, the TWSI interfaces, the
UARTs, and the NAND controller.
Signed-off-by: Saeed Bishara <saeed@marvell.com>
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
2008-06-22 20:45:06 +00:00
|
|
|
#include <asm/page.h>
|
|
|
|
#include <asm/timex.h>
|
2011-02-02 22:16:11 +00:00
|
|
|
#include <asm/kexec.h>
|
[ARM] add Marvell Kirkwood (88F6000) SoC support
The Marvell Kirkwood (88F6000) is a family of ARM SoCs based on a
Shiva CPU core, and features a DDR2 controller, a x1 PCIe interface,
a USB 2.0 interface, a SPI controller, a crypto accelerator, a TS
interface, and IDMA/XOR engines, and depending on the model, also
features one or two Gigabit Ethernet interfaces, two SATA II
interfaces, one or two TWSI interfaces, one or two UARTs, a
TDM/SLIC interface, a NAND controller, an I2S/SPDIF interface, and
an SDIO interface.
This patch adds supports for the Marvell DB-88F6281-BP Development
Board and the RD-88F6192-NAS and the RD-88F6281 Reference Designs,
enabling support for the PCIe interface, the USB interface, the
ethernet interfaces, the SATA interfaces, the TWSI interfaces, the
UARTs, and the NAND controller.
Signed-off-by: Saeed Bishara <saeed@marvell.com>
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
2008-06-22 20:45:06 +00:00
|
|
|
#include <asm/mach/map.h>
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|
|
#include <asm/mach/time.h>
|
2008-08-05 15:14:15 +00:00
|
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|
#include <mach/kirkwood.h>
|
2009-04-22 19:08:17 +00:00
|
|
|
#include <mach/bridge-regs.h>
|
2010-05-31 11:49:12 +00:00
|
|
|
#include <plat/audio.h>
|
2008-08-09 11:44:58 +00:00
|
|
|
#include <plat/cache-feroceon-l2.h>
|
2009-02-14 08:15:55 +00:00
|
|
|
#include <plat/mvsdio.h>
|
2008-08-09 11:44:58 +00:00
|
|
|
#include <plat/orion_nand.h>
|
2012-02-08 14:52:47 +00:00
|
|
|
#include <plat/ehci-orion.h>
|
2011-05-15 11:32:41 +00:00
|
|
|
#include <plat/common.h>
|
2008-08-09 11:44:58 +00:00
|
|
|
#include <plat/time.h>
|
2011-12-07 20:48:06 +00:00
|
|
|
#include <plat/addr-map.h>
|
2011-12-15 07:15:07 +00:00
|
|
|
#include <plat/mv_xor.h>
|
[ARM] add Marvell Kirkwood (88F6000) SoC support
The Marvell Kirkwood (88F6000) is a family of ARM SoCs based on a
Shiva CPU core, and features a DDR2 controller, a x1 PCIe interface,
a USB 2.0 interface, a SPI controller, a crypto accelerator, a TS
interface, and IDMA/XOR engines, and depending on the model, also
features one or two Gigabit Ethernet interfaces, two SATA II
interfaces, one or two TWSI interfaces, one or two UARTs, a
TDM/SLIC interface, a NAND controller, an I2S/SPDIF interface, and
an SDIO interface.
This patch adds supports for the Marvell DB-88F6281-BP Development
Board and the RD-88F6192-NAS and the RD-88F6281 Reference Designs,
enabling support for the PCIe interface, the USB interface, the
ethernet interfaces, the SATA interfaces, the TWSI interfaces, the
UARTs, and the NAND controller.
Signed-off-by: Saeed Bishara <saeed@marvell.com>
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
2008-06-22 20:45:06 +00:00
|
|
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#include "common.h"
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/*****************************************************************************
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* I/O Address Mapping
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****************************************************************************/
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static struct map_desc kirkwood_io_desc[] __initdata = {
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|
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{
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.virtual = KIRKWOOD_PCIE_IO_VIRT_BASE,
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|
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.pfn = __phys_to_pfn(KIRKWOOD_PCIE_IO_PHYS_BASE),
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|
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.length = KIRKWOOD_PCIE_IO_SIZE,
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|
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.type = MT_DEVICE,
|
2010-06-08 11:21:34 +00:00
|
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|
}, {
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.virtual = KIRKWOOD_PCIE1_IO_VIRT_BASE,
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.pfn = __phys_to_pfn(KIRKWOOD_PCIE1_IO_PHYS_BASE),
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|
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.length = KIRKWOOD_PCIE1_IO_SIZE,
|
|
|
|
.type = MT_DEVICE,
|
[ARM] add Marvell Kirkwood (88F6000) SoC support
The Marvell Kirkwood (88F6000) is a family of ARM SoCs based on a
Shiva CPU core, and features a DDR2 controller, a x1 PCIe interface,
a USB 2.0 interface, a SPI controller, a crypto accelerator, a TS
interface, and IDMA/XOR engines, and depending on the model, also
features one or two Gigabit Ethernet interfaces, two SATA II
interfaces, one or two TWSI interfaces, one or two UARTs, a
TDM/SLIC interface, a NAND controller, an I2S/SPDIF interface, and
an SDIO interface.
This patch adds supports for the Marvell DB-88F6281-BP Development
Board and the RD-88F6192-NAS and the RD-88F6281 Reference Designs,
enabling support for the PCIe interface, the USB interface, the
ethernet interfaces, the SATA interfaces, the TWSI interfaces, the
UARTs, and the NAND controller.
Signed-off-by: Saeed Bishara <saeed@marvell.com>
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
2008-06-22 20:45:06 +00:00
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}, {
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.virtual = KIRKWOOD_REGS_VIRT_BASE,
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.pfn = __phys_to_pfn(KIRKWOOD_REGS_PHYS_BASE),
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.length = KIRKWOOD_REGS_SIZE,
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.type = MT_DEVICE,
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},
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};
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void __init kirkwood_map_io(void)
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{
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iotable_init(kirkwood_io_desc, ARRAY_SIZE(kirkwood_io_desc));
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}
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|
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|
|
2011-12-15 07:15:07 +00:00
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/*****************************************************************************
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* CLK tree
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****************************************************************************/
|
2012-04-11 19:07:45 +00:00
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|
2012-07-06 18:42:38 +00:00
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static void enable_sata0(void)
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{
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/* Enable PLL and IVREF */
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writel(readl(SATA0_PHY_MODE_2) | 0xf, SATA0_PHY_MODE_2);
|
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/* Enable PHY */
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writel(readl(SATA0_IF_CTRL) & ~0x200, SATA0_IF_CTRL);
|
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|
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}
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|
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|
|
2012-04-11 19:07:45 +00:00
|
|
|
static void disable_sata0(void)
|
|
|
|
{
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|
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/* Disable PLL and IVREF */
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|
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writel(readl(SATA0_PHY_MODE_2) & ~0xf, SATA0_PHY_MODE_2);
|
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|
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/* Disable PHY */
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writel(readl(SATA0_IF_CTRL) | 0x200, SATA0_IF_CTRL);
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}
|
|
|
|
|
2012-07-06 18:42:38 +00:00
|
|
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static void enable_sata1(void)
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|
|
|
{
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|
|
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/* Enable PLL and IVREF */
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|
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writel(readl(SATA1_PHY_MODE_2) | 0xf, SATA1_PHY_MODE_2);
|
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|
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/* Enable PHY */
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writel(readl(SATA1_IF_CTRL) & ~0x200, SATA1_IF_CTRL);
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|
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}
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|
2012-04-11 19:07:45 +00:00
|
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static void disable_sata1(void)
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|
|
|
{
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|
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/* Disable PLL and IVREF */
|
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writel(readl(SATA1_PHY_MODE_2) & ~0xf, SATA1_PHY_MODE_2);
|
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|
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/* Disable PHY */
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writel(readl(SATA1_IF_CTRL) | 0x200, SATA1_IF_CTRL);
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}
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static void disable_pcie0(void)
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|
|
{
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writel(readl(PCIE_LINK_CTRL) | 0x10, PCIE_LINK_CTRL);
|
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|
|
while (1)
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|
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if (readl(PCIE_STATUS) & 0x1)
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|
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break;
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writel(readl(PCIE_LINK_CTRL) & ~0x10, PCIE_LINK_CTRL);
|
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|
|
}
|
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static void disable_pcie1(void)
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|
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{
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u32 dev, rev;
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kirkwood_pcie_id(&dev, &rev);
|
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if (dev == MV88F6282_DEV_ID) {
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writel(readl(PCIE1_LINK_CTRL) | 0x10, PCIE1_LINK_CTRL);
|
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|
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while (1)
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|
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if (readl(PCIE1_STATUS) & 0x1)
|
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|
|
break;
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writel(readl(PCIE1_LINK_CTRL) & ~0x10, PCIE1_LINK_CTRL);
|
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}
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|
|
}
|
|
|
|
|
2012-07-06 18:42:38 +00:00
|
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/* An extended version of the gated clk. This calls fn_en()/fn_dis
|
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|
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* before enabling/disabling the clock. We use this to turn on/off
|
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|
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* PHYs etc. */
|
2012-04-11 19:07:45 +00:00
|
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struct clk_gate_fn {
|
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|
|
struct clk_gate gate;
|
2012-07-06 18:42:38 +00:00
|
|
|
void (*fn_en)(void);
|
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|
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void (*fn_dis)(void);
|
2012-04-11 19:07:45 +00:00
|
|
|
};
|
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|
|
|
|
|
|
#define to_clk_gate_fn(_gate) container_of(_gate, struct clk_gate_fn, gate)
|
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|
|
#define to_clk_gate(_hw) container_of(_hw, struct clk_gate, hw)
|
|
|
|
|
2012-07-06 18:42:38 +00:00
|
|
|
static int clk_gate_fn_enable(struct clk_hw *hw)
|
|
|
|
{
|
|
|
|
struct clk_gate *gate = to_clk_gate(hw);
|
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|
|
struct clk_gate_fn *gate_fn = to_clk_gate_fn(gate);
|
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|
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int ret;
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|
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ret = clk_gate_ops.enable(hw);
|
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|
|
if (!ret && gate_fn->fn_en)
|
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|
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gate_fn->fn_en();
|
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|
|
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|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
2012-04-11 19:07:45 +00:00
|
|
|
static void clk_gate_fn_disable(struct clk_hw *hw)
|
|
|
|
{
|
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|
|
struct clk_gate *gate = to_clk_gate(hw);
|
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|
|
struct clk_gate_fn *gate_fn = to_clk_gate_fn(gate);
|
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|
|
2012-07-06 18:42:38 +00:00
|
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if (gate_fn->fn_dis)
|
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|
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gate_fn->fn_dis();
|
2012-04-11 19:07:45 +00:00
|
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|
clk_gate_ops.disable(hw);
|
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|
|
}
|
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static struct clk_ops clk_gate_fn_ops;
|
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|
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|
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static struct clk __init *clk_register_gate_fn(struct device *dev,
|
|
|
|
const char *name,
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|
|
const char *parent_name, unsigned long flags,
|
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|
|
void __iomem *reg, u8 bit_idx,
|
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|
|
u8 clk_gate_flags, spinlock_t *lock,
|
2012-07-06 18:42:38 +00:00
|
|
|
void (*fn_en)(void), void (*fn_dis)(void))
|
2012-04-11 19:07:45 +00:00
|
|
|
{
|
|
|
|
struct clk_gate_fn *gate_fn;
|
|
|
|
struct clk *clk;
|
|
|
|
struct clk_init_data init;
|
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|
|
|
|
|
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gate_fn = kzalloc(sizeof(struct clk_gate_fn), GFP_KERNEL);
|
|
|
|
if (!gate_fn) {
|
|
|
|
pr_err("%s: could not allocate gated clk\n", __func__);
|
|
|
|
return ERR_PTR(-ENOMEM);
|
|
|
|
}
|
|
|
|
|
|
|
|
init.name = name;
|
|
|
|
init.ops = &clk_gate_fn_ops;
|
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|
|
init.flags = flags;
|
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|
|
init.parent_names = (parent_name ? &parent_name : NULL);
|
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|
|
init.num_parents = (parent_name ? 1 : 0);
|
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|
|
|
|
|
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/* struct clk_gate assignments */
|
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|
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gate_fn->gate.reg = reg;
|
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|
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gate_fn->gate.bit_idx = bit_idx;
|
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|
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gate_fn->gate.flags = clk_gate_flags;
|
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|
|
gate_fn->gate.lock = lock;
|
|
|
|
gate_fn->gate.hw.init = &init;
|
2012-07-06 18:42:38 +00:00
|
|
|
gate_fn->fn_en = fn_en;
|
|
|
|
gate_fn->fn_dis = fn_dis;
|
2012-04-11 19:07:45 +00:00
|
|
|
|
2012-07-06 18:42:38 +00:00
|
|
|
/* ops is the gate ops, but with our enable/disable functions */
|
|
|
|
if (clk_gate_fn_ops.enable != clk_gate_fn_enable ||
|
|
|
|
clk_gate_fn_ops.disable != clk_gate_fn_disable) {
|
2012-04-11 19:07:45 +00:00
|
|
|
clk_gate_fn_ops = clk_gate_ops;
|
2012-07-06 18:42:38 +00:00
|
|
|
clk_gate_fn_ops.enable = clk_gate_fn_enable;
|
2012-04-11 19:07:45 +00:00
|
|
|
clk_gate_fn_ops.disable = clk_gate_fn_disable;
|
|
|
|
}
|
|
|
|
|
|
|
|
clk = clk_register(dev, &gate_fn->gate.hw);
|
|
|
|
|
|
|
|
if (IS_ERR(clk))
|
|
|
|
kfree(gate_fn);
|
|
|
|
|
|
|
|
return clk;
|
|
|
|
}
|
|
|
|
|
2011-12-15 07:15:07 +00:00
|
|
|
static DEFINE_SPINLOCK(gating_lock);
|
|
|
|
static struct clk *tclk;
|
|
|
|
|
|
|
|
static struct clk __init *kirkwood_register_gate(const char *name, u8 bit_idx)
|
|
|
|
{
|
2012-04-11 19:07:45 +00:00
|
|
|
return clk_register_gate(NULL, name, "tclk", 0,
|
2011-12-15 07:15:07 +00:00
|
|
|
(void __iomem *)CLOCK_GATING_CTRL,
|
|
|
|
bit_idx, 0, &gating_lock);
|
|
|
|
}
|
|
|
|
|
2012-04-11 19:07:45 +00:00
|
|
|
static struct clk __init *kirkwood_register_gate_fn(const char *name,
|
|
|
|
u8 bit_idx,
|
2012-07-06 18:42:38 +00:00
|
|
|
void (*fn_en)(void),
|
|
|
|
void (*fn_dis)(void))
|
2012-04-11 19:07:45 +00:00
|
|
|
{
|
|
|
|
return clk_register_gate_fn(NULL, name, "tclk", 0,
|
|
|
|
(void __iomem *)CLOCK_GATING_CTRL,
|
2012-07-06 18:42:38 +00:00
|
|
|
bit_idx, 0, &gating_lock, fn_en, fn_dis);
|
2012-04-11 19:07:45 +00:00
|
|
|
}
|
|
|
|
|
ARM: Kirkwood: Fix clk problems modular ethernet driver
When the ethernet driver was built as a module, it would lock the
machine when loaded. At boot the ethernet clks are unused, so get
turned off. Later, when the module is loaded, the probe function
would access the hardware before the clock was restarted, and the
machine would lock. It has also been determined that when the clk is
turned off, the interface forgets its MAC address, which for most
systems, is set by the boot loader.
When the machine setup file creates a platform device for the
interface, prepare and enable the clock for the interface. This will
ensure it is not turned off. However, if the setup file only
instantiates one platform device, the other will have its clk
disabled, thus maybe saving a little power.
Report-by: Simon Baatz <gmbnomis@gmail.com>
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Tested-by: Simon Baatz <gmbnomis@gmail.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
2012-06-13 12:52:45 +00:00
|
|
|
static struct clk *ge0, *ge1;
|
|
|
|
|
2011-12-15 07:15:07 +00:00
|
|
|
void __init kirkwood_clk_init(void)
|
|
|
|
{
|
ARM: Kirkwood: Fix clk problems modular ethernet driver
When the ethernet driver was built as a module, it would lock the
machine when loaded. At boot the ethernet clks are unused, so get
turned off. Later, when the module is loaded, the probe function
would access the hardware before the clock was restarted, and the
machine would lock. It has also been determined that when the clk is
turned off, the interface forgets its MAC address, which for most
systems, is set by the boot loader.
When the machine setup file creates a platform device for the
interface, prepare and enable the clock for the interface. This will
ensure it is not turned off. However, if the setup file only
instantiates one platform device, the other will have its clk
disabled, thus maybe saving a little power.
Report-by: Simon Baatz <gmbnomis@gmail.com>
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Tested-by: Simon Baatz <gmbnomis@gmail.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
2012-06-13 12:52:45 +00:00
|
|
|
struct clk *runit, *sata0, *sata1, *usb0, *sdio;
|
2012-03-09 08:56:41 +00:00
|
|
|
struct clk *crypto, *xor0, *xor1, *pex0, *pex1, *audio;
|
2012-04-06 15:17:26 +00:00
|
|
|
|
2011-12-15 07:15:07 +00:00
|
|
|
tclk = clk_register_fixed_rate(NULL, "tclk", NULL,
|
|
|
|
CLK_IS_ROOT, kirkwood_tclk);
|
|
|
|
|
2012-04-06 15:17:26 +00:00
|
|
|
runit = kirkwood_register_gate("runit", CGC_BIT_RUNIT);
|
2011-12-24 00:24:24 +00:00
|
|
|
ge0 = kirkwood_register_gate("ge0", CGC_BIT_GE0);
|
|
|
|
ge1 = kirkwood_register_gate("ge1", CGC_BIT_GE1);
|
2012-04-11 19:07:45 +00:00
|
|
|
sata0 = kirkwood_register_gate_fn("sata0", CGC_BIT_SATA0,
|
2012-07-06 18:42:38 +00:00
|
|
|
enable_sata0, disable_sata0);
|
2012-04-11 19:07:45 +00:00
|
|
|
sata1 = kirkwood_register_gate_fn("sata1", CGC_BIT_SATA1,
|
2012-07-06 18:42:38 +00:00
|
|
|
enable_sata1, disable_sata1);
|
2012-04-15 10:53:47 +00:00
|
|
|
usb0 = kirkwood_register_gate("usb0", CGC_BIT_USB0);
|
2012-02-19 10:39:27 +00:00
|
|
|
sdio = kirkwood_register_gate("sdio", CGC_BIT_SDIO);
|
2012-02-19 10:56:19 +00:00
|
|
|
crypto = kirkwood_register_gate("crypto", CGC_BIT_CRYPTO);
|
2012-02-19 12:30:26 +00:00
|
|
|
xor0 = kirkwood_register_gate("xor0", CGC_BIT_XOR0);
|
|
|
|
xor1 = kirkwood_register_gate("xor1", CGC_BIT_XOR1);
|
2012-04-11 19:07:45 +00:00
|
|
|
pex0 = kirkwood_register_gate_fn("pex0", CGC_BIT_PEX0,
|
2012-07-06 18:42:38 +00:00
|
|
|
NULL, disable_pcie0);
|
2012-04-11 19:07:45 +00:00
|
|
|
pex1 = kirkwood_register_gate_fn("pex1", CGC_BIT_PEX1,
|
2012-07-06 18:42:38 +00:00
|
|
|
NULL, disable_pcie1);
|
2012-03-09 08:56:41 +00:00
|
|
|
audio = kirkwood_register_gate("audio", CGC_BIT_AUDIO);
|
2011-12-15 07:15:07 +00:00
|
|
|
kirkwood_register_gate("tdm", CGC_BIT_TDM);
|
|
|
|
kirkwood_register_gate("tsu", CGC_BIT_TSU);
|
2012-04-06 15:17:26 +00:00
|
|
|
|
|
|
|
/* clkdev entries, mapping clks to devices */
|
|
|
|
orion_clkdev_add(NULL, "orion_spi.0", runit);
|
|
|
|
orion_clkdev_add(NULL, "orion_spi.1", runit);
|
2011-12-24 00:24:24 +00:00
|
|
|
orion_clkdev_add(NULL, MV643XX_ETH_NAME ".0", ge0);
|
|
|
|
orion_clkdev_add(NULL, MV643XX_ETH_NAME ".1", ge1);
|
2012-03-04 15:57:31 +00:00
|
|
|
orion_clkdev_add(NULL, "orion_wdt", tclk);
|
2012-02-18 21:26:42 +00:00
|
|
|
orion_clkdev_add("0", "sata_mv.0", sata0);
|
|
|
|
orion_clkdev_add("1", "sata_mv.0", sata1);
|
2012-04-15 10:53:47 +00:00
|
|
|
orion_clkdev_add(NULL, "orion-ehci.0", usb0);
|
2012-02-19 10:01:22 +00:00
|
|
|
orion_clkdev_add(NULL, "orion_nand", runit);
|
2012-02-19 10:39:27 +00:00
|
|
|
orion_clkdev_add(NULL, "mvsdio", sdio);
|
2012-02-19 10:56:19 +00:00
|
|
|
orion_clkdev_add(NULL, "mv_crypto", crypto);
|
2012-02-19 12:30:26 +00:00
|
|
|
orion_clkdev_add(NULL, MV_XOR_SHARED_NAME ".0", xor0);
|
|
|
|
orion_clkdev_add(NULL, MV_XOR_SHARED_NAME ".1", xor1);
|
2012-03-08 20:45:59 +00:00
|
|
|
orion_clkdev_add("0", "pcie", pex0);
|
|
|
|
orion_clkdev_add("1", "pcie", pex1);
|
2012-03-09 08:56:41 +00:00
|
|
|
orion_clkdev_add(NULL, "kirkwood-i2s", audio);
|
2012-07-20 11:51:55 +00:00
|
|
|
orion_clkdev_add(NULL, MV64XXX_I2C_CTLR_NAME ".0", runit);
|
2012-07-19 06:58:08 +00:00
|
|
|
|
|
|
|
/* Marvell says runit is used by SPI, UART, NAND, TWSI, ...,
|
|
|
|
* so should never be gated.
|
|
|
|
*/
|
|
|
|
clk_prepare_enable(runit);
|
2011-12-15 07:15:07 +00:00
|
|
|
}
|
|
|
|
|
[ARM] add Marvell Kirkwood (88F6000) SoC support
The Marvell Kirkwood (88F6000) is a family of ARM SoCs based on a
Shiva CPU core, and features a DDR2 controller, a x1 PCIe interface,
a USB 2.0 interface, a SPI controller, a crypto accelerator, a TS
interface, and IDMA/XOR engines, and depending on the model, also
features one or two Gigabit Ethernet interfaces, two SATA II
interfaces, one or two TWSI interfaces, one or two UARTs, a
TDM/SLIC interface, a NAND controller, an I2S/SPDIF interface, and
an SDIO interface.
This patch adds supports for the Marvell DB-88F6281-BP Development
Board and the RD-88F6192-NAS and the RD-88F6281 Reference Designs,
enabling support for the PCIe interface, the USB interface, the
ethernet interfaces, the SATA interfaces, the TWSI interfaces, the
UARTs, and the NAND controller.
Signed-off-by: Saeed Bishara <saeed@marvell.com>
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
2008-06-22 20:45:06 +00:00
|
|
|
/*****************************************************************************
|
|
|
|
* EHCI0
|
|
|
|
****************************************************************************/
|
|
|
|
void __init kirkwood_ehci_init(void)
|
|
|
|
{
|
2012-02-08 14:52:47 +00:00
|
|
|
orion_ehci_init(USB_PHYS_BASE, IRQ_KIRKWOOD_USB, EHCI_PHY_NA);
|
[ARM] add Marvell Kirkwood (88F6000) SoC support
The Marvell Kirkwood (88F6000) is a family of ARM SoCs based on a
Shiva CPU core, and features a DDR2 controller, a x1 PCIe interface,
a USB 2.0 interface, a SPI controller, a crypto accelerator, a TS
interface, and IDMA/XOR engines, and depending on the model, also
features one or two Gigabit Ethernet interfaces, two SATA II
interfaces, one or two TWSI interfaces, one or two UARTs, a
TDM/SLIC interface, a NAND controller, an I2S/SPDIF interface, and
an SDIO interface.
This patch adds supports for the Marvell DB-88F6281-BP Development
Board and the RD-88F6192-NAS and the RD-88F6281 Reference Designs,
enabling support for the PCIe interface, the USB interface, the
ethernet interfaces, the SATA interfaces, the TWSI interfaces, the
UARTs, and the NAND controller.
Signed-off-by: Saeed Bishara <saeed@marvell.com>
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
2008-06-22 20:45:06 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
/*****************************************************************************
|
|
|
|
* GE00
|
|
|
|
****************************************************************************/
|
|
|
|
void __init kirkwood_ge00_init(struct mv643xx_eth_platform_data *eth_data)
|
|
|
|
{
|
2011-12-07 20:48:08 +00:00
|
|
|
orion_ge00_init(eth_data,
|
2011-05-15 11:32:44 +00:00
|
|
|
GE00_PHYS_BASE, IRQ_KIRKWOOD_GE00_SUM,
|
2011-12-24 00:24:24 +00:00
|
|
|
IRQ_KIRKWOOD_GE00_ERR);
|
ARM: Kirkwood: Fix clk problems modular ethernet driver
When the ethernet driver was built as a module, it would lock the
machine when loaded. At boot the ethernet clks are unused, so get
turned off. Later, when the module is loaded, the probe function
would access the hardware before the clock was restarted, and the
machine would lock. It has also been determined that when the clk is
turned off, the interface forgets its MAC address, which for most
systems, is set by the boot loader.
When the machine setup file creates a platform device for the
interface, prepare and enable the clock for the interface. This will
ensure it is not turned off. However, if the setup file only
instantiates one platform device, the other will have its clk
disabled, thus maybe saving a little power.
Report-by: Simon Baatz <gmbnomis@gmail.com>
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Tested-by: Simon Baatz <gmbnomis@gmail.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
2012-06-13 12:52:45 +00:00
|
|
|
/* The interface forgets the MAC address assigned by u-boot if
|
|
|
|
the clock is turned off, so claim the clk now. */
|
|
|
|
clk_prepare_enable(ge0);
|
[ARM] add Marvell Kirkwood (88F6000) SoC support
The Marvell Kirkwood (88F6000) is a family of ARM SoCs based on a
Shiva CPU core, and features a DDR2 controller, a x1 PCIe interface,
a USB 2.0 interface, a SPI controller, a crypto accelerator, a TS
interface, and IDMA/XOR engines, and depending on the model, also
features one or two Gigabit Ethernet interfaces, two SATA II
interfaces, one or two TWSI interfaces, one or two UARTs, a
TDM/SLIC interface, a NAND controller, an I2S/SPDIF interface, and
an SDIO interface.
This patch adds supports for the Marvell DB-88F6281-BP Development
Board and the RD-88F6192-NAS and the RD-88F6281 Reference Designs,
enabling support for the PCIe interface, the USB interface, the
ethernet interfaces, the SATA interfaces, the TWSI interfaces, the
UARTs, and the NAND controller.
Signed-off-by: Saeed Bishara <saeed@marvell.com>
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
2008-06-22 20:45:06 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
|
2008-10-19 21:10:14 +00:00
|
|
|
/*****************************************************************************
|
|
|
|
* GE01
|
|
|
|
****************************************************************************/
|
|
|
|
void __init kirkwood_ge01_init(struct mv643xx_eth_platform_data *eth_data)
|
|
|
|
{
|
2011-12-07 20:48:08 +00:00
|
|
|
orion_ge01_init(eth_data,
|
2011-05-15 11:32:44 +00:00
|
|
|
GE01_PHYS_BASE, IRQ_KIRKWOOD_GE01_SUM,
|
2011-12-24 00:24:24 +00:00
|
|
|
IRQ_KIRKWOOD_GE01_ERR);
|
ARM: Kirkwood: Fix clk problems modular ethernet driver
When the ethernet driver was built as a module, it would lock the
machine when loaded. At boot the ethernet clks are unused, so get
turned off. Later, when the module is loaded, the probe function
would access the hardware before the clock was restarted, and the
machine would lock. It has also been determined that when the clk is
turned off, the interface forgets its MAC address, which for most
systems, is set by the boot loader.
When the machine setup file creates a platform device for the
interface, prepare and enable the clock for the interface. This will
ensure it is not turned off. However, if the setup file only
instantiates one platform device, the other will have its clk
disabled, thus maybe saving a little power.
Report-by: Simon Baatz <gmbnomis@gmail.com>
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Tested-by: Simon Baatz <gmbnomis@gmail.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
2012-06-13 12:52:45 +00:00
|
|
|
clk_prepare_enable(ge1);
|
2008-10-19 21:10:14 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
|
2008-09-25 14:23:48 +00:00
|
|
|
/*****************************************************************************
|
|
|
|
* Ethernet switch
|
|
|
|
****************************************************************************/
|
|
|
|
void __init kirkwood_ge00_switch_init(struct dsa_platform_data *d, int irq)
|
|
|
|
{
|
2011-05-15 11:32:44 +00:00
|
|
|
orion_ge00_switch_init(d, irq);
|
2008-09-25 14:23:48 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
|
2009-06-01 19:36:36 +00:00
|
|
|
/*****************************************************************************
|
|
|
|
* NAND flash
|
|
|
|
****************************************************************************/
|
|
|
|
static struct resource kirkwood_nand_resource = {
|
|
|
|
.flags = IORESOURCE_MEM,
|
|
|
|
.start = KIRKWOOD_NAND_MEM_PHYS_BASE,
|
|
|
|
.end = KIRKWOOD_NAND_MEM_PHYS_BASE +
|
|
|
|
KIRKWOOD_NAND_MEM_SIZE - 1,
|
|
|
|
};
|
|
|
|
|
|
|
|
static struct orion_nand_data kirkwood_nand_data = {
|
|
|
|
.cle = 0,
|
|
|
|
.ale = 1,
|
|
|
|
.width = 8,
|
|
|
|
};
|
|
|
|
|
|
|
|
static struct platform_device kirkwood_nand_flash = {
|
|
|
|
.name = "orion_nand",
|
|
|
|
.id = -1,
|
|
|
|
.dev = {
|
|
|
|
.platform_data = &kirkwood_nand_data,
|
|
|
|
},
|
|
|
|
.resource = &kirkwood_nand_resource,
|
|
|
|
.num_resources = 1,
|
|
|
|
};
|
|
|
|
|
|
|
|
void __init kirkwood_nand_init(struct mtd_partition *parts, int nr_parts,
|
|
|
|
int chip_delay)
|
|
|
|
{
|
|
|
|
kirkwood_nand_data.parts = parts;
|
|
|
|
kirkwood_nand_data.nr_parts = nr_parts;
|
|
|
|
kirkwood_nand_data.chip_delay = chip_delay;
|
|
|
|
platform_device_register(&kirkwood_nand_flash);
|
|
|
|
}
|
|
|
|
|
2010-04-20 09:26:19 +00:00
|
|
|
void __init kirkwood_nand_init_rnb(struct mtd_partition *parts, int nr_parts,
|
|
|
|
int (*dev_ready)(struct mtd_info *))
|
|
|
|
{
|
|
|
|
kirkwood_nand_data.parts = parts;
|
|
|
|
kirkwood_nand_data.nr_parts = nr_parts;
|
|
|
|
kirkwood_nand_data.dev_ready = dev_ready;
|
|
|
|
platform_device_register(&kirkwood_nand_flash);
|
|
|
|
}
|
2009-06-01 19:36:36 +00:00
|
|
|
|
[ARM] add Marvell Kirkwood (88F6000) SoC support
The Marvell Kirkwood (88F6000) is a family of ARM SoCs based on a
Shiva CPU core, and features a DDR2 controller, a x1 PCIe interface,
a USB 2.0 interface, a SPI controller, a crypto accelerator, a TS
interface, and IDMA/XOR engines, and depending on the model, also
features one or two Gigabit Ethernet interfaces, two SATA II
interfaces, one or two TWSI interfaces, one or two UARTs, a
TDM/SLIC interface, a NAND controller, an I2S/SPDIF interface, and
an SDIO interface.
This patch adds supports for the Marvell DB-88F6281-BP Development
Board and the RD-88F6192-NAS and the RD-88F6281 Reference Designs,
enabling support for the PCIe interface, the USB interface, the
ethernet interfaces, the SATA interfaces, the TWSI interfaces, the
UARTs, and the NAND controller.
Signed-off-by: Saeed Bishara <saeed@marvell.com>
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
2008-06-22 20:45:06 +00:00
|
|
|
/*****************************************************************************
|
|
|
|
* SoC RTC
|
|
|
|
****************************************************************************/
|
2012-03-06 23:55:04 +00:00
|
|
|
static void __init kirkwood_rtc_init(void)
|
[ARM] add Marvell Kirkwood (88F6000) SoC support
The Marvell Kirkwood (88F6000) is a family of ARM SoCs based on a
Shiva CPU core, and features a DDR2 controller, a x1 PCIe interface,
a USB 2.0 interface, a SPI controller, a crypto accelerator, a TS
interface, and IDMA/XOR engines, and depending on the model, also
features one or two Gigabit Ethernet interfaces, two SATA II
interfaces, one or two TWSI interfaces, one or two UARTs, a
TDM/SLIC interface, a NAND controller, an I2S/SPDIF interface, and
an SDIO interface.
This patch adds supports for the Marvell DB-88F6281-BP Development
Board and the RD-88F6192-NAS and the RD-88F6281 Reference Designs,
enabling support for the PCIe interface, the USB interface, the
ethernet interfaces, the SATA interfaces, the TWSI interfaces, the
UARTs, and the NAND controller.
Signed-off-by: Saeed Bishara <saeed@marvell.com>
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
2008-06-22 20:45:06 +00:00
|
|
|
{
|
2011-05-15 11:32:43 +00:00
|
|
|
orion_rtc_init(RTC_PHYS_BASE, IRQ_KIRKWOOD_RTC);
|
[ARM] add Marvell Kirkwood (88F6000) SoC support
The Marvell Kirkwood (88F6000) is a family of ARM SoCs based on a
Shiva CPU core, and features a DDR2 controller, a x1 PCIe interface,
a USB 2.0 interface, a SPI controller, a crypto accelerator, a TS
interface, and IDMA/XOR engines, and depending on the model, also
features one or two Gigabit Ethernet interfaces, two SATA II
interfaces, one or two TWSI interfaces, one or two UARTs, a
TDM/SLIC interface, a NAND controller, an I2S/SPDIF interface, and
an SDIO interface.
This patch adds supports for the Marvell DB-88F6281-BP Development
Board and the RD-88F6192-NAS and the RD-88F6281 Reference Designs,
enabling support for the PCIe interface, the USB interface, the
ethernet interfaces, the SATA interfaces, the TWSI interfaces, the
UARTs, and the NAND controller.
Signed-off-by: Saeed Bishara <saeed@marvell.com>
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
2008-06-22 20:45:06 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
/*****************************************************************************
|
|
|
|
* SATA
|
|
|
|
****************************************************************************/
|
|
|
|
void __init kirkwood_sata_init(struct mv_sata_platform_data *sata_data)
|
|
|
|
{
|
2011-12-07 20:48:08 +00:00
|
|
|
orion_sata_init(sata_data, SATA_PHYS_BASE, IRQ_KIRKWOOD_SATA);
|
[ARM] add Marvell Kirkwood (88F6000) SoC support
The Marvell Kirkwood (88F6000) is a family of ARM SoCs based on a
Shiva CPU core, and features a DDR2 controller, a x1 PCIe interface,
a USB 2.0 interface, a SPI controller, a crypto accelerator, a TS
interface, and IDMA/XOR engines, and depending on the model, also
features one or two Gigabit Ethernet interfaces, two SATA II
interfaces, one or two TWSI interfaces, one or two UARTs, a
TDM/SLIC interface, a NAND controller, an I2S/SPDIF interface, and
an SDIO interface.
This patch adds supports for the Marvell DB-88F6281-BP Development
Board and the RD-88F6192-NAS and the RD-88F6281 Reference Designs,
enabling support for the PCIe interface, the USB interface, the
ethernet interfaces, the SATA interfaces, the TWSI interfaces, the
UARTs, and the NAND controller.
Signed-off-by: Saeed Bishara <saeed@marvell.com>
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
2008-06-22 20:45:06 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
|
2009-02-14 08:15:55 +00:00
|
|
|
/*****************************************************************************
|
|
|
|
* SD/SDIO/MMC
|
|
|
|
****************************************************************************/
|
|
|
|
static struct resource mvsdio_resources[] = {
|
|
|
|
[0] = {
|
|
|
|
.start = SDIO_PHYS_BASE,
|
|
|
|
.end = SDIO_PHYS_BASE + SZ_1K - 1,
|
|
|
|
.flags = IORESOURCE_MEM,
|
|
|
|
},
|
|
|
|
[1] = {
|
|
|
|
.start = IRQ_KIRKWOOD_SDIO,
|
|
|
|
.end = IRQ_KIRKWOOD_SDIO,
|
|
|
|
.flags = IORESOURCE_IRQ,
|
|
|
|
},
|
|
|
|
};
|
|
|
|
|
2011-05-15 11:32:40 +00:00
|
|
|
static u64 mvsdio_dmamask = DMA_BIT_MASK(32);
|
2009-02-14 08:15:55 +00:00
|
|
|
|
|
|
|
static struct platform_device kirkwood_sdio = {
|
|
|
|
.name = "mvsdio",
|
|
|
|
.id = -1,
|
|
|
|
.dev = {
|
|
|
|
.dma_mask = &mvsdio_dmamask,
|
2011-05-15 11:32:40 +00:00
|
|
|
.coherent_dma_mask = DMA_BIT_MASK(32),
|
2009-02-14 08:15:55 +00:00
|
|
|
},
|
|
|
|
.num_resources = ARRAY_SIZE(mvsdio_resources),
|
|
|
|
.resource = mvsdio_resources,
|
|
|
|
};
|
|
|
|
|
|
|
|
void __init kirkwood_sdio_init(struct mvsdio_platform_data *mvsdio_data)
|
|
|
|
{
|
|
|
|
u32 dev, rev;
|
|
|
|
|
|
|
|
kirkwood_pcie_id(&dev, &rev);
|
2010-06-01 15:09:27 +00:00
|
|
|
if (rev == 0 && dev != MV88F6282_DEV_ID) /* catch all Kirkwood Z0's */
|
2009-02-14 08:15:55 +00:00
|
|
|
mvsdio_data->clock = 100000000;
|
|
|
|
else
|
|
|
|
mvsdio_data->clock = 200000000;
|
|
|
|
kirkwood_sdio.dev.platform_data = mvsdio_data;
|
|
|
|
platform_device_register(&kirkwood_sdio);
|
|
|
|
}
|
|
|
|
|
|
|
|
|
2008-08-09 13:38:18 +00:00
|
|
|
/*****************************************************************************
|
|
|
|
* SPI
|
|
|
|
****************************************************************************/
|
|
|
|
void __init kirkwood_spi_init()
|
|
|
|
{
|
2012-04-06 15:17:26 +00:00
|
|
|
orion_spi_init(SPI_PHYS_BASE);
|
2008-08-09 13:38:18 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
|
2009-03-23 18:13:21 +00:00
|
|
|
/*****************************************************************************
|
|
|
|
* I2C
|
|
|
|
****************************************************************************/
|
|
|
|
void __init kirkwood_i2c_init(void)
|
|
|
|
{
|
2011-05-15 11:32:45 +00:00
|
|
|
orion_i2c_init(I2C_PHYS_BASE, IRQ_KIRKWOOD_TWSI, 8);
|
2009-03-23 18:13:21 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
|
[ARM] add Marvell Kirkwood (88F6000) SoC support
The Marvell Kirkwood (88F6000) is a family of ARM SoCs based on a
Shiva CPU core, and features a DDR2 controller, a x1 PCIe interface,
a USB 2.0 interface, a SPI controller, a crypto accelerator, a TS
interface, and IDMA/XOR engines, and depending on the model, also
features one or two Gigabit Ethernet interfaces, two SATA II
interfaces, one or two TWSI interfaces, one or two UARTs, a
TDM/SLIC interface, a NAND controller, an I2S/SPDIF interface, and
an SDIO interface.
This patch adds supports for the Marvell DB-88F6281-BP Development
Board and the RD-88F6192-NAS and the RD-88F6281 Reference Designs,
enabling support for the PCIe interface, the USB interface, the
ethernet interfaces, the SATA interfaces, the TWSI interfaces, the
UARTs, and the NAND controller.
Signed-off-by: Saeed Bishara <saeed@marvell.com>
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
2008-06-22 20:45:06 +00:00
|
|
|
/*****************************************************************************
|
|
|
|
* UART0
|
|
|
|
****************************************************************************/
|
|
|
|
|
|
|
|
void __init kirkwood_uart0_init(void)
|
|
|
|
{
|
2011-05-15 11:32:41 +00:00
|
|
|
orion_uart0_init(UART0_VIRT_BASE, UART0_PHYS_BASE,
|
2011-12-24 02:06:34 +00:00
|
|
|
IRQ_KIRKWOOD_UART_0, tclk);
|
[ARM] add Marvell Kirkwood (88F6000) SoC support
The Marvell Kirkwood (88F6000) is a family of ARM SoCs based on a
Shiva CPU core, and features a DDR2 controller, a x1 PCIe interface,
a USB 2.0 interface, a SPI controller, a crypto accelerator, a TS
interface, and IDMA/XOR engines, and depending on the model, also
features one or two Gigabit Ethernet interfaces, two SATA II
interfaces, one or two TWSI interfaces, one or two UARTs, a
TDM/SLIC interface, a NAND controller, an I2S/SPDIF interface, and
an SDIO interface.
This patch adds supports for the Marvell DB-88F6281-BP Development
Board and the RD-88F6192-NAS and the RD-88F6281 Reference Designs,
enabling support for the PCIe interface, the USB interface, the
ethernet interfaces, the SATA interfaces, the TWSI interfaces, the
UARTs, and the NAND controller.
Signed-off-by: Saeed Bishara <saeed@marvell.com>
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
2008-06-22 20:45:06 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
/*****************************************************************************
|
|
|
|
* UART1
|
|
|
|
****************************************************************************/
|
|
|
|
void __init kirkwood_uart1_init(void)
|
|
|
|
{
|
2011-05-15 11:32:41 +00:00
|
|
|
orion_uart1_init(UART1_VIRT_BASE, UART1_PHYS_BASE,
|
2011-12-24 02:06:34 +00:00
|
|
|
IRQ_KIRKWOOD_UART_1, tclk);
|
[ARM] add Marvell Kirkwood (88F6000) SoC support
The Marvell Kirkwood (88F6000) is a family of ARM SoCs based on a
Shiva CPU core, and features a DDR2 controller, a x1 PCIe interface,
a USB 2.0 interface, a SPI controller, a crypto accelerator, a TS
interface, and IDMA/XOR engines, and depending on the model, also
features one or two Gigabit Ethernet interfaces, two SATA II
interfaces, one or two TWSI interfaces, one or two UARTs, a
TDM/SLIC interface, a NAND controller, an I2S/SPDIF interface, and
an SDIO interface.
This patch adds supports for the Marvell DB-88F6281-BP Development
Board and the RD-88F6192-NAS and the RD-88F6281 Reference Designs,
enabling support for the PCIe interface, the USB interface, the
ethernet interfaces, the SATA interfaces, the TWSI interfaces, the
UARTs, and the NAND controller.
Signed-off-by: Saeed Bishara <saeed@marvell.com>
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
2008-06-22 20:45:06 +00:00
|
|
|
}
|
|
|
|
|
2009-06-03 19:24:36 +00:00
|
|
|
/*****************************************************************************
|
|
|
|
* Cryptographic Engines and Security Accelerator (CESA)
|
|
|
|
****************************************************************************/
|
|
|
|
void __init kirkwood_crypto_init(void)
|
|
|
|
{
|
2011-05-15 11:32:51 +00:00
|
|
|
orion_crypto_init(CRYPTO_PHYS_BASE, KIRKWOOD_SRAM_PHYS_BASE,
|
|
|
|
KIRKWOOD_SRAM_SIZE, IRQ_KIRKWOOD_CRYPTO);
|
2009-06-03 19:24:36 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
|
2008-06-23 15:26:07 +00:00
|
|
|
/*****************************************************************************
|
|
|
|
* XOR0
|
|
|
|
****************************************************************************/
|
2012-02-29 17:39:08 +00:00
|
|
|
void __init kirkwood_xor0_init(void)
|
2008-06-23 15:26:07 +00:00
|
|
|
{
|
2011-12-07 20:48:08 +00:00
|
|
|
orion_xor0_init(XOR0_PHYS_BASE, XOR0_HIGH_PHYS_BASE,
|
2011-05-15 11:32:48 +00:00
|
|
|
IRQ_KIRKWOOD_XOR_00, IRQ_KIRKWOOD_XOR_01);
|
2008-06-23 15:26:07 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
/*****************************************************************************
|
|
|
|
* XOR1
|
|
|
|
****************************************************************************/
|
2012-02-29 17:39:08 +00:00
|
|
|
void __init kirkwood_xor1_init(void)
|
2008-06-23 15:26:07 +00:00
|
|
|
{
|
2011-05-15 11:32:48 +00:00
|
|
|
orion_xor1_init(XOR1_PHYS_BASE, XOR1_HIGH_PHYS_BASE,
|
|
|
|
IRQ_KIRKWOOD_XOR_10, IRQ_KIRKWOOD_XOR_11);
|
2008-06-23 15:26:07 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
|
2009-06-01 11:38:34 +00:00
|
|
|
/*****************************************************************************
|
|
|
|
* Watchdog
|
|
|
|
****************************************************************************/
|
2012-02-29 17:39:08 +00:00
|
|
|
void __init kirkwood_wdt_init(void)
|
2009-06-01 11:38:34 +00:00
|
|
|
{
|
2012-03-04 15:57:31 +00:00
|
|
|
orion_wdt_init();
|
2009-06-01 11:38:34 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
|
[ARM] add Marvell Kirkwood (88F6000) SoC support
The Marvell Kirkwood (88F6000) is a family of ARM SoCs based on a
Shiva CPU core, and features a DDR2 controller, a x1 PCIe interface,
a USB 2.0 interface, a SPI controller, a crypto accelerator, a TS
interface, and IDMA/XOR engines, and depending on the model, also
features one or two Gigabit Ethernet interfaces, two SATA II
interfaces, one or two TWSI interfaces, one or two UARTs, a
TDM/SLIC interface, a NAND controller, an I2S/SPDIF interface, and
an SDIO interface.
This patch adds supports for the Marvell DB-88F6281-BP Development
Board and the RD-88F6192-NAS and the RD-88F6281 Reference Designs,
enabling support for the PCIe interface, the USB interface, the
ethernet interfaces, the SATA interfaces, the TWSI interfaces, the
UARTs, and the NAND controller.
Signed-off-by: Saeed Bishara <saeed@marvell.com>
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
2008-06-22 20:45:06 +00:00
|
|
|
/*****************************************************************************
|
|
|
|
* Time handling
|
|
|
|
****************************************************************************/
|
2010-10-15 14:50:26 +00:00
|
|
|
void __init kirkwood_init_early(void)
|
|
|
|
{
|
|
|
|
orion_time_set_base(TIMER_VIRT_BASE);
|
|
|
|
}
|
|
|
|
|
2008-09-14 22:56:38 +00:00
|
|
|
int kirkwood_tclk;
|
|
|
|
|
2011-03-03 20:08:53 +00:00
|
|
|
static int __init kirkwood_find_tclk(void)
|
2008-09-14 22:56:38 +00:00
|
|
|
{
|
2008-09-15 07:40:35 +00:00
|
|
|
u32 dev, rev;
|
|
|
|
|
|
|
|
kirkwood_pcie_id(&dev, &rev);
|
2010-06-01 15:09:27 +00:00
|
|
|
|
2010-10-21 09:42:28 +00:00
|
|
|
if (dev == MV88F6281_DEV_ID || dev == MV88F6282_DEV_ID)
|
|
|
|
if (((readl(SAMPLE_AT_RESET) >> 21) & 1) == 0)
|
|
|
|
return 200000000;
|
2008-09-15 07:40:35 +00:00
|
|
|
|
2008-09-14 22:56:38 +00:00
|
|
|
return 166666667;
|
|
|
|
}
|
|
|
|
|
2009-11-05 15:29:54 +00:00
|
|
|
static void __init kirkwood_timer_init(void)
|
[ARM] add Marvell Kirkwood (88F6000) SoC support
The Marvell Kirkwood (88F6000) is a family of ARM SoCs based on a
Shiva CPU core, and features a DDR2 controller, a x1 PCIe interface,
a USB 2.0 interface, a SPI controller, a crypto accelerator, a TS
interface, and IDMA/XOR engines, and depending on the model, also
features one or two Gigabit Ethernet interfaces, two SATA II
interfaces, one or two TWSI interfaces, one or two UARTs, a
TDM/SLIC interface, a NAND controller, an I2S/SPDIF interface, and
an SDIO interface.
This patch adds supports for the Marvell DB-88F6281-BP Development
Board and the RD-88F6192-NAS and the RD-88F6281 Reference Designs,
enabling support for the PCIe interface, the USB interface, the
ethernet interfaces, the SATA interfaces, the TWSI interfaces, the
UARTs, and the NAND controller.
Signed-off-by: Saeed Bishara <saeed@marvell.com>
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
2008-06-22 20:45:06 +00:00
|
|
|
{
|
2008-09-14 22:56:38 +00:00
|
|
|
kirkwood_tclk = kirkwood_find_tclk();
|
2010-10-15 14:50:26 +00:00
|
|
|
|
|
|
|
orion_time_init(BRIDGE_VIRT_BASE, BRIDGE_INT_TIMER1_CLR,
|
|
|
|
IRQ_KIRKWOOD_BRIDGE, kirkwood_tclk);
|
[ARM] add Marvell Kirkwood (88F6000) SoC support
The Marvell Kirkwood (88F6000) is a family of ARM SoCs based on a
Shiva CPU core, and features a DDR2 controller, a x1 PCIe interface,
a USB 2.0 interface, a SPI controller, a crypto accelerator, a TS
interface, and IDMA/XOR engines, and depending on the model, also
features one or two Gigabit Ethernet interfaces, two SATA II
interfaces, one or two TWSI interfaces, one or two UARTs, a
TDM/SLIC interface, a NAND controller, an I2S/SPDIF interface, and
an SDIO interface.
This patch adds supports for the Marvell DB-88F6281-BP Development
Board and the RD-88F6192-NAS and the RD-88F6281 Reference Designs,
enabling support for the PCIe interface, the USB interface, the
ethernet interfaces, the SATA interfaces, the TWSI interfaces, the
UARTs, and the NAND controller.
Signed-off-by: Saeed Bishara <saeed@marvell.com>
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
2008-06-22 20:45:06 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
struct sys_timer kirkwood_timer = {
|
|
|
|
.init = kirkwood_timer_init,
|
|
|
|
};
|
|
|
|
|
2010-05-31 11:49:12 +00:00
|
|
|
/*****************************************************************************
|
|
|
|
* Audio
|
|
|
|
****************************************************************************/
|
|
|
|
static struct resource kirkwood_i2s_resources[] = {
|
|
|
|
[0] = {
|
|
|
|
.start = AUDIO_PHYS_BASE,
|
|
|
|
.end = AUDIO_PHYS_BASE + SZ_16K - 1,
|
|
|
|
.flags = IORESOURCE_MEM,
|
|
|
|
},
|
|
|
|
[1] = {
|
|
|
|
.start = IRQ_KIRKWOOD_I2S,
|
|
|
|
.end = IRQ_KIRKWOOD_I2S,
|
|
|
|
.flags = IORESOURCE_IRQ,
|
|
|
|
},
|
|
|
|
};
|
|
|
|
|
|
|
|
static struct kirkwood_asoc_platform_data kirkwood_i2s_data = {
|
|
|
|
.burst = 128,
|
|
|
|
};
|
|
|
|
|
|
|
|
static struct platform_device kirkwood_i2s_device = {
|
|
|
|
.name = "kirkwood-i2s",
|
|
|
|
.id = -1,
|
|
|
|
.num_resources = ARRAY_SIZE(kirkwood_i2s_resources),
|
|
|
|
.resource = kirkwood_i2s_resources,
|
|
|
|
.dev = {
|
|
|
|
.platform_data = &kirkwood_i2s_data,
|
|
|
|
},
|
|
|
|
};
|
|
|
|
|
2010-03-17 20:15:21 +00:00
|
|
|
static struct platform_device kirkwood_pcm_device = {
|
2010-08-30 14:00:05 +00:00
|
|
|
.name = "kirkwood-pcm-audio",
|
2010-03-17 20:15:21 +00:00
|
|
|
.id = -1,
|
|
|
|
};
|
|
|
|
|
2010-05-31 11:49:12 +00:00
|
|
|
void __init kirkwood_audio_init(void)
|
|
|
|
{
|
|
|
|
platform_device_register(&kirkwood_i2s_device);
|
2010-03-17 20:15:21 +00:00
|
|
|
platform_device_register(&kirkwood_pcm_device);
|
2010-05-31 11:49:12 +00:00
|
|
|
}
|
[ARM] add Marvell Kirkwood (88F6000) SoC support
The Marvell Kirkwood (88F6000) is a family of ARM SoCs based on a
Shiva CPU core, and features a DDR2 controller, a x1 PCIe interface,
a USB 2.0 interface, a SPI controller, a crypto accelerator, a TS
interface, and IDMA/XOR engines, and depending on the model, also
features one or two Gigabit Ethernet interfaces, two SATA II
interfaces, one or two TWSI interfaces, one or two UARTs, a
TDM/SLIC interface, a NAND controller, an I2S/SPDIF interface, and
an SDIO interface.
This patch adds supports for the Marvell DB-88F6281-BP Development
Board and the RD-88F6192-NAS and the RD-88F6281 Reference Designs,
enabling support for the PCIe interface, the USB interface, the
ethernet interfaces, the SATA interfaces, the TWSI interfaces, the
UARTs, and the NAND controller.
Signed-off-by: Saeed Bishara <saeed@marvell.com>
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
2008-06-22 20:45:06 +00:00
|
|
|
|
|
|
|
/*****************************************************************************
|
|
|
|
* General
|
|
|
|
****************************************************************************/
|
2008-09-15 07:40:35 +00:00
|
|
|
/*
|
|
|
|
* Identify device ID and revision.
|
|
|
|
*/
|
2012-02-29 17:39:08 +00:00
|
|
|
char * __init kirkwood_id(void)
|
[ARM] add Marvell Kirkwood (88F6000) SoC support
The Marvell Kirkwood (88F6000) is a family of ARM SoCs based on a
Shiva CPU core, and features a DDR2 controller, a x1 PCIe interface,
a USB 2.0 interface, a SPI controller, a crypto accelerator, a TS
interface, and IDMA/XOR engines, and depending on the model, also
features one or two Gigabit Ethernet interfaces, two SATA II
interfaces, one or two TWSI interfaces, one or two UARTs, a
TDM/SLIC interface, a NAND controller, an I2S/SPDIF interface, and
an SDIO interface.
This patch adds supports for the Marvell DB-88F6281-BP Development
Board and the RD-88F6192-NAS and the RD-88F6281 Reference Designs,
enabling support for the PCIe interface, the USB interface, the
ethernet interfaces, the SATA interfaces, the TWSI interfaces, the
UARTs, and the NAND controller.
Signed-off-by: Saeed Bishara <saeed@marvell.com>
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
2008-06-22 20:45:06 +00:00
|
|
|
{
|
2008-09-15 07:40:35 +00:00
|
|
|
u32 dev, rev;
|
|
|
|
|
|
|
|
kirkwood_pcie_id(&dev, &rev);
|
|
|
|
|
|
|
|
if (dev == MV88F6281_DEV_ID) {
|
|
|
|
if (rev == MV88F6281_REV_Z0)
|
|
|
|
return "MV88F6281-Z0";
|
|
|
|
else if (rev == MV88F6281_REV_A0)
|
|
|
|
return "MV88F6281-A0";
|
2009-06-09 09:11:02 +00:00
|
|
|
else if (rev == MV88F6281_REV_A1)
|
|
|
|
return "MV88F6281-A1";
|
2008-09-15 07:40:35 +00:00
|
|
|
else
|
|
|
|
return "MV88F6281-Rev-Unsupported";
|
|
|
|
} else if (dev == MV88F6192_DEV_ID) {
|
|
|
|
if (rev == MV88F6192_REV_Z0)
|
|
|
|
return "MV88F6192-Z0";
|
|
|
|
else if (rev == MV88F6192_REV_A0)
|
|
|
|
return "MV88F6192-A0";
|
2010-06-01 15:09:26 +00:00
|
|
|
else if (rev == MV88F6192_REV_A1)
|
|
|
|
return "MV88F6192-A1";
|
2008-09-15 07:40:35 +00:00
|
|
|
else
|
|
|
|
return "MV88F6192-Rev-Unsupported";
|
|
|
|
} else if (dev == MV88F6180_DEV_ID) {
|
|
|
|
if (rev == MV88F6180_REV_A0)
|
|
|
|
return "MV88F6180-Rev-A0";
|
2010-06-01 15:09:26 +00:00
|
|
|
else if (rev == MV88F6180_REV_A1)
|
|
|
|
return "MV88F6180-Rev-A1";
|
2008-09-15 07:40:35 +00:00
|
|
|
else
|
|
|
|
return "MV88F6180-Rev-Unsupported";
|
2010-06-01 15:09:27 +00:00
|
|
|
} else if (dev == MV88F6282_DEV_ID) {
|
|
|
|
if (rev == MV88F6282_REV_A0)
|
|
|
|
return "MV88F6282-Rev-A0";
|
2011-11-03 12:57:43 +00:00
|
|
|
else if (rev == MV88F6282_REV_A1)
|
|
|
|
return "MV88F6282-Rev-A1";
|
2010-06-01 15:09:27 +00:00
|
|
|
else
|
|
|
|
return "MV88F6282-Rev-Unsupported";
|
2008-09-15 07:40:35 +00:00
|
|
|
} else {
|
|
|
|
return "Device-Unknown";
|
[ARM] add Marvell Kirkwood (88F6000) SoC support
The Marvell Kirkwood (88F6000) is a family of ARM SoCs based on a
Shiva CPU core, and features a DDR2 controller, a x1 PCIe interface,
a USB 2.0 interface, a SPI controller, a crypto accelerator, a TS
interface, and IDMA/XOR engines, and depending on the model, also
features one or two Gigabit Ethernet interfaces, two SATA II
interfaces, one or two TWSI interfaces, one or two UARTs, a
TDM/SLIC interface, a NAND controller, an I2S/SPDIF interface, and
an SDIO interface.
This patch adds supports for the Marvell DB-88F6281-BP Development
Board and the RD-88F6192-NAS and the RD-88F6281 Reference Designs,
enabling support for the PCIe interface, the USB interface, the
ethernet interfaces, the SATA interfaces, the TWSI interfaces, the
UARTs, and the NAND controller.
Signed-off-by: Saeed Bishara <saeed@marvell.com>
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
2008-06-22 20:45:06 +00:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2012-02-29 17:39:08 +00:00
|
|
|
void __init kirkwood_l2_init(void)
|
2008-06-23 12:05:08 +00:00
|
|
|
{
|
2008-09-23 12:28:10 +00:00
|
|
|
#ifdef CONFIG_CACHE_FEROCEON_L2_WRITETHROUGH
|
|
|
|
writel(readl(L2_CONFIG_REG) | L2_WRITETHROUGH, L2_CONFIG_REG);
|
|
|
|
feroceon_l2_init(1);
|
|
|
|
#else
|
|
|
|
writel(readl(L2_CONFIG_REG) & ~L2_WRITETHROUGH, L2_CONFIG_REG);
|
|
|
|
feroceon_l2_init(0);
|
|
|
|
#endif
|
2008-06-23 12:05:08 +00:00
|
|
|
}
|
|
|
|
|
[ARM] add Marvell Kirkwood (88F6000) SoC support
The Marvell Kirkwood (88F6000) is a family of ARM SoCs based on a
Shiva CPU core, and features a DDR2 controller, a x1 PCIe interface,
a USB 2.0 interface, a SPI controller, a crypto accelerator, a TS
interface, and IDMA/XOR engines, and depending on the model, also
features one or two Gigabit Ethernet interfaces, two SATA II
interfaces, one or two TWSI interfaces, one or two UARTs, a
TDM/SLIC interface, a NAND controller, an I2S/SPDIF interface, and
an SDIO interface.
This patch adds supports for the Marvell DB-88F6281-BP Development
Board and the RD-88F6192-NAS and the RD-88F6281 Reference Designs,
enabling support for the PCIe interface, the USB interface, the
ethernet interfaces, the SATA interfaces, the TWSI interfaces, the
UARTs, and the NAND controller.
Signed-off-by: Saeed Bishara <saeed@marvell.com>
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
2008-06-22 20:45:06 +00:00
|
|
|
void __init kirkwood_init(void)
|
|
|
|
{
|
|
|
|
printk(KERN_INFO "Kirkwood: %s, TCLK=%d.\n",
|
2008-09-14 22:56:38 +00:00
|
|
|
kirkwood_id(), kirkwood_tclk);
|
[ARM] add Marvell Kirkwood (88F6000) SoC support
The Marvell Kirkwood (88F6000) is a family of ARM SoCs based on a
Shiva CPU core, and features a DDR2 controller, a x1 PCIe interface,
a USB 2.0 interface, a SPI controller, a crypto accelerator, a TS
interface, and IDMA/XOR engines, and depending on the model, also
features one or two Gigabit Ethernet interfaces, two SATA II
interfaces, one or two TWSI interfaces, one or two UARTs, a
TDM/SLIC interface, a NAND controller, an I2S/SPDIF interface, and
an SDIO interface.
This patch adds supports for the Marvell DB-88F6281-BP Development
Board and the RD-88F6192-NAS and the RD-88F6281 Reference Designs,
enabling support for the PCIe interface, the USB interface, the
ethernet interfaces, the SATA interfaces, the TWSI interfaces, the
UARTs, and the NAND controller.
Signed-off-by: Saeed Bishara <saeed@marvell.com>
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
2008-06-22 20:45:06 +00:00
|
|
|
|
2009-11-12 19:31:14 +00:00
|
|
|
/*
|
|
|
|
* Disable propagation of mbus errors to the CPU local bus,
|
|
|
|
* as this causes mbus errors (which can occur for example
|
|
|
|
* for PCI aborts) to throw CPU aborts, which we're not set
|
|
|
|
* up to deal with.
|
|
|
|
*/
|
|
|
|
writel(readl(CPU_CONFIG) & ~CPU_CONFIG_ERROR_PROP, CPU_CONFIG);
|
|
|
|
|
[ARM] add Marvell Kirkwood (88F6000) SoC support
The Marvell Kirkwood (88F6000) is a family of ARM SoCs based on a
Shiva CPU core, and features a DDR2 controller, a x1 PCIe interface,
a USB 2.0 interface, a SPI controller, a crypto accelerator, a TS
interface, and IDMA/XOR engines, and depending on the model, also
features one or two Gigabit Ethernet interfaces, two SATA II
interfaces, one or two TWSI interfaces, one or two UARTs, a
TDM/SLIC interface, a NAND controller, an I2S/SPDIF interface, and
an SDIO interface.
This patch adds supports for the Marvell DB-88F6281-BP Development
Board and the RD-88F6192-NAS and the RD-88F6281 Reference Designs,
enabling support for the PCIe interface, the USB interface, the
ethernet interfaces, the SATA interfaces, the TWSI interfaces, the
UARTs, and the NAND controller.
Signed-off-by: Saeed Bishara <saeed@marvell.com>
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
2008-06-22 20:45:06 +00:00
|
|
|
kirkwood_setup_cpu_mbus();
|
|
|
|
|
|
|
|
#ifdef CONFIG_CACHE_FEROCEON_L2
|
2008-09-23 12:28:10 +00:00
|
|
|
kirkwood_l2_init();
|
[ARM] add Marvell Kirkwood (88F6000) SoC support
The Marvell Kirkwood (88F6000) is a family of ARM SoCs based on a
Shiva CPU core, and features a DDR2 controller, a x1 PCIe interface,
a USB 2.0 interface, a SPI controller, a crypto accelerator, a TS
interface, and IDMA/XOR engines, and depending on the model, also
features one or two Gigabit Ethernet interfaces, two SATA II
interfaces, one or two TWSI interfaces, one or two UARTs, a
TDM/SLIC interface, a NAND controller, an I2S/SPDIF interface, and
an SDIO interface.
This patch adds supports for the Marvell DB-88F6281-BP Development
Board and the RD-88F6192-NAS and the RD-88F6281 Reference Designs,
enabling support for the PCIe interface, the USB interface, the
ethernet interfaces, the SATA interfaces, the TWSI interfaces, the
UARTs, and the NAND controller.
Signed-off-by: Saeed Bishara <saeed@marvell.com>
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
2008-06-22 20:45:06 +00:00
|
|
|
#endif
|
2009-02-27 03:55:59 +00:00
|
|
|
|
2011-12-15 07:15:07 +00:00
|
|
|
/* Setup root of clk tree */
|
|
|
|
kirkwood_clk_init();
|
|
|
|
|
2009-02-27 03:55:59 +00:00
|
|
|
/* internal devices that every board has */
|
|
|
|
kirkwood_rtc_init();
|
2009-06-01 11:38:34 +00:00
|
|
|
kirkwood_wdt_init();
|
2009-02-27 03:55:59 +00:00
|
|
|
kirkwood_xor0_init();
|
|
|
|
kirkwood_xor1_init();
|
2009-06-03 19:24:36 +00:00
|
|
|
kirkwood_crypto_init();
|
2011-02-02 22:16:11 +00:00
|
|
|
|
|
|
|
#ifdef CONFIG_KEXEC
|
|
|
|
kexec_reinit = kirkwood_enable_pcie;
|
|
|
|
#endif
|
[ARM] add Marvell Kirkwood (88F6000) SoC support
The Marvell Kirkwood (88F6000) is a family of ARM SoCs based on a
Shiva CPU core, and features a DDR2 controller, a x1 PCIe interface,
a USB 2.0 interface, a SPI controller, a crypto accelerator, a TS
interface, and IDMA/XOR engines, and depending on the model, also
features one or two Gigabit Ethernet interfaces, two SATA II
interfaces, one or two TWSI interfaces, one or two UARTs, a
TDM/SLIC interface, a NAND controller, an I2S/SPDIF interface, and
an SDIO interface.
This patch adds supports for the Marvell DB-88F6281-BP Development
Board and the RD-88F6192-NAS and the RD-88F6281 Reference Designs,
enabling support for the PCIe interface, the USB interface, the
ethernet interfaces, the SATA interfaces, the TWSI interfaces, the
UARTs, and the NAND controller.
Signed-off-by: Saeed Bishara <saeed@marvell.com>
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
2008-06-22 20:45:06 +00:00
|
|
|
}
|
2009-03-22 15:30:32 +00:00
|
|
|
|
2011-11-05 10:03:47 +00:00
|
|
|
void kirkwood_restart(char mode, const char *cmd)
|
|
|
|
{
|
|
|
|
/*
|
|
|
|
* Enable soft reset to assert RSTOUTn.
|
|
|
|
*/
|
|
|
|
writel(SOFT_RESET_OUT_EN, RSTOUTn_MASK);
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Assert soft reset.
|
|
|
|
*/
|
|
|
|
writel(SOFT_RESET, SYSTEM_SOFT_RESET);
|
|
|
|
|
|
|
|
while (1)
|
|
|
|
;
|
|
|
|
}
|