2005-04-16 22:20:36 +00:00
|
|
|
config MIPS
|
|
|
|
bool
|
|
|
|
default y
|
|
|
|
# Horrible source of confusion. Die, die, die ...
|
|
|
|
select EMBEDDED
|
|
|
|
|
2005-09-03 22:56:16 +00:00
|
|
|
mainmenu "Linux/MIPS Kernel Configuration"
|
|
|
|
|
2005-04-16 22:20:36 +00:00
|
|
|
menu "Machine selection"
|
|
|
|
|
2005-10-29 18:32:41 +00:00
|
|
|
choice
|
|
|
|
prompt "System type"
|
|
|
|
default SGI_IP22
|
2005-04-16 22:20:36 +00:00
|
|
|
|
2005-10-29 18:32:41 +00:00
|
|
|
config MIPS_MTX1
|
2006-05-09 21:34:53 +00:00
|
|
|
bool "4G Systems MTX-1 board"
|
2005-04-16 22:20:36 +00:00
|
|
|
select DMA_NONCOHERENT
|
2005-10-29 18:32:41 +00:00
|
|
|
select HW_HAS_PCI
|
|
|
|
select SOC_AU1500
|
2005-10-20 21:33:09 +00:00
|
|
|
select SYS_HAS_CPU_MIPS32_R1
|
2005-10-29 18:32:41 +00:00
|
|
|
select SYS_SUPPORTS_LITTLE_ENDIAN
|
2005-04-16 22:20:36 +00:00
|
|
|
|
2005-10-29 18:32:41 +00:00
|
|
|
config MIPS_BOSPORUS
|
|
|
|
bool "AMD Alchemy Bosporus board"
|
|
|
|
select SOC_AU1500
|
2005-04-16 22:20:36 +00:00
|
|
|
select DMA_NONCOHERENT
|
2005-10-20 21:33:09 +00:00
|
|
|
select SYS_HAS_CPU_MIPS32_R1
|
2005-10-29 18:32:41 +00:00
|
|
|
select SYS_SUPPORTS_LITTLE_ENDIAN
|
2005-04-16 22:20:36 +00:00
|
|
|
|
2005-10-29 18:32:41 +00:00
|
|
|
config MIPS_PB1000
|
|
|
|
bool "AMD Alchemy PB1000 board"
|
|
|
|
select SOC_AU1000
|
2005-04-16 22:20:36 +00:00
|
|
|
select DMA_NONCOHERENT
|
2005-10-29 18:32:41 +00:00
|
|
|
select HW_HAS_PCI
|
|
|
|
select SWAP_IO_SPACE
|
2005-10-20 21:33:09 +00:00
|
|
|
select SYS_HAS_CPU_MIPS32_R1
|
2005-10-29 18:32:41 +00:00
|
|
|
select SYS_SUPPORTS_LITTLE_ENDIAN
|
2005-04-16 22:20:36 +00:00
|
|
|
|
2005-10-29 18:32:41 +00:00
|
|
|
config MIPS_PB1100
|
|
|
|
bool "AMD Alchemy PB1100 board"
|
|
|
|
select SOC_AU1100
|
2005-04-16 22:20:36 +00:00
|
|
|
select DMA_NONCOHERENT
|
|
|
|
select HW_HAS_PCI
|
2005-10-29 18:32:41 +00:00
|
|
|
select SWAP_IO_SPACE
|
2005-10-20 21:33:09 +00:00
|
|
|
select SYS_HAS_CPU_MIPS32_R1
|
2005-10-29 18:32:41 +00:00
|
|
|
select SYS_SUPPORTS_LITTLE_ENDIAN
|
2005-04-16 22:20:36 +00:00
|
|
|
|
2005-10-29 18:32:41 +00:00
|
|
|
config MIPS_PB1500
|
|
|
|
bool "AMD Alchemy PB1500 board"
|
|
|
|
select SOC_AU1500
|
|
|
|
select DMA_NONCOHERENT
|
|
|
|
select HW_HAS_PCI
|
2005-10-20 21:33:09 +00:00
|
|
|
select SYS_HAS_CPU_MIPS32_R1
|
2005-10-29 18:32:41 +00:00
|
|
|
select SYS_SUPPORTS_LITTLE_ENDIAN
|
2005-04-16 22:20:36 +00:00
|
|
|
|
2005-10-29 18:32:41 +00:00
|
|
|
config MIPS_PB1550
|
|
|
|
bool "AMD Alchemy PB1550 board"
|
|
|
|
select SOC_AU1550
|
2005-04-16 22:20:36 +00:00
|
|
|
select DMA_NONCOHERENT
|
2005-10-29 18:32:41 +00:00
|
|
|
select HW_HAS_PCI
|
|
|
|
select MIPS_DISABLE_OBSOLETE_IDE
|
2005-10-20 21:33:09 +00:00
|
|
|
select SYS_HAS_CPU_MIPS32_R1
|
2005-10-29 18:32:41 +00:00
|
|
|
select SYS_SUPPORTS_LITTLE_ENDIAN
|
2005-04-16 22:20:36 +00:00
|
|
|
|
2005-10-29 18:32:41 +00:00
|
|
|
config MIPS_PB1200
|
|
|
|
bool "AMD Alchemy PB1200 board"
|
|
|
|
select SOC_AU1200
|
2005-04-16 22:20:36 +00:00
|
|
|
select DMA_NONCOHERENT
|
2005-10-29 18:32:41 +00:00
|
|
|
select MIPS_DISABLE_OBSOLETE_IDE
|
2005-10-20 21:33:09 +00:00
|
|
|
select SYS_HAS_CPU_MIPS32_R1
|
2005-10-29 18:32:41 +00:00
|
|
|
select SYS_SUPPORTS_LITTLE_ENDIAN
|
2005-04-16 22:20:36 +00:00
|
|
|
|
2005-10-29 18:32:41 +00:00
|
|
|
config MIPS_DB1000
|
|
|
|
bool "AMD Alchemy DB1000 board"
|
|
|
|
select SOC_AU1000
|
2005-04-16 22:20:36 +00:00
|
|
|
select DMA_NONCOHERENT
|
2005-09-03 22:56:13 +00:00
|
|
|
select HW_HAS_PCI
|
2005-10-20 21:33:09 +00:00
|
|
|
select SYS_HAS_CPU_MIPS32_R1
|
2005-10-29 18:32:41 +00:00
|
|
|
select SYS_SUPPORTS_LITTLE_ENDIAN
|
2005-09-09 20:01:49 +00:00
|
|
|
|
2005-10-29 18:32:41 +00:00
|
|
|
config MIPS_DB1100
|
|
|
|
bool "AMD Alchemy DB1100 board"
|
|
|
|
select SOC_AU1100
|
2005-04-16 22:20:36 +00:00
|
|
|
select DMA_NONCOHERENT
|
2005-10-20 21:33:09 +00:00
|
|
|
select SYS_HAS_CPU_MIPS32_R1
|
2005-10-29 18:32:41 +00:00
|
|
|
select SYS_SUPPORTS_LITTLE_ENDIAN
|
2005-04-16 22:20:36 +00:00
|
|
|
|
2005-10-29 18:32:41 +00:00
|
|
|
config MIPS_DB1500
|
|
|
|
bool "AMD Alchemy DB1500 board"
|
|
|
|
select SOC_AU1500
|
2005-04-16 22:20:36 +00:00
|
|
|
select DMA_NONCOHERENT
|
2005-09-03 22:56:14 +00:00
|
|
|
select HW_HAS_PCI
|
2005-10-29 18:32:41 +00:00
|
|
|
select MIPS_DISABLE_OBSOLETE_IDE
|
2005-10-20 21:33:09 +00:00
|
|
|
select SYS_HAS_CPU_MIPS32_R1
|
2005-10-29 18:32:41 +00:00
|
|
|
select SYS_SUPPORTS_BIG_ENDIAN
|
|
|
|
select SYS_SUPPORTS_LITTLE_ENDIAN
|
2005-04-16 22:20:36 +00:00
|
|
|
|
2005-10-29 18:32:41 +00:00
|
|
|
config MIPS_DB1550
|
|
|
|
bool "AMD Alchemy DB1550 board"
|
|
|
|
select SOC_AU1550
|
|
|
|
select HW_HAS_PCI
|
|
|
|
select DMA_NONCOHERENT
|
|
|
|
select MIPS_DISABLE_OBSOLETE_IDE
|
2005-10-20 21:33:09 +00:00
|
|
|
select SYS_HAS_CPU_MIPS32_R1
|
2005-10-29 18:32:41 +00:00
|
|
|
select SYS_SUPPORTS_LITTLE_ENDIAN
|
2005-04-16 22:20:36 +00:00
|
|
|
|
2005-10-29 18:32:41 +00:00
|
|
|
config MIPS_DB1200
|
|
|
|
bool "AMD Alchemy DB1200 board"
|
|
|
|
select SOC_AU1200
|
|
|
|
select DMA_COHERENT
|
|
|
|
select MIPS_DISABLE_OBSOLETE_IDE
|
2005-10-20 21:33:09 +00:00
|
|
|
select SYS_HAS_CPU_MIPS32_R1
|
2005-10-29 18:32:41 +00:00
|
|
|
select SYS_SUPPORTS_LITTLE_ENDIAN
|
2005-04-16 22:20:36 +00:00
|
|
|
|
2005-10-29 18:32:41 +00:00
|
|
|
config MIPS_MIRAGE
|
|
|
|
bool "AMD Alchemy Mirage board"
|
2005-04-16 22:20:36 +00:00
|
|
|
select DMA_NONCOHERENT
|
2005-10-29 18:32:41 +00:00
|
|
|
select SOC_AU1500
|
2005-10-20 21:33:09 +00:00
|
|
|
select SYS_HAS_CPU_MIPS32_R1
|
2005-10-29 18:32:41 +00:00
|
|
|
select SYS_SUPPORTS_LITTLE_ENDIAN
|
2005-04-16 22:20:36 +00:00
|
|
|
|
|
|
|
config MIPS_COBALT
|
2006-05-09 21:34:53 +00:00
|
|
|
bool "Cobalt Server"
|
2005-04-16 22:20:36 +00:00
|
|
|
select DMA_NONCOHERENT
|
|
|
|
select HW_HAS_PCI
|
|
|
|
select I8259
|
|
|
|
select IRQ_CPU
|
2005-10-29 18:32:41 +00:00
|
|
|
select MIPS_GT64111
|
2005-10-20 21:33:09 +00:00
|
|
|
select SYS_HAS_CPU_NEVADA
|
2005-09-03 22:56:21 +00:00
|
|
|
select SYS_SUPPORTS_32BIT_KERNEL
|
|
|
|
select SYS_SUPPORTS_64BIT_KERNEL if EXPERIMENTAL
|
2005-10-29 18:32:41 +00:00
|
|
|
select SYS_SUPPORTS_LITTLE_ENDIAN
|
2005-04-16 22:20:36 +00:00
|
|
|
|
|
|
|
config MACH_DECSTATION
|
2006-05-09 21:34:53 +00:00
|
|
|
bool "DECstations"
|
2005-04-16 22:20:36 +00:00
|
|
|
select BOOT_ELF32
|
|
|
|
select DMA_NONCOHERENT
|
2005-02-02 20:36:21 +00:00
|
|
|
select EARLY_PRINTK
|
2005-04-16 22:20:36 +00:00
|
|
|
select IRQ_CPU
|
2005-10-20 21:33:09 +00:00
|
|
|
select SYS_HAS_CPU_R3000
|
|
|
|
select SYS_HAS_CPU_R4X00
|
2005-09-03 22:56:21 +00:00
|
|
|
select SYS_SUPPORTS_32BIT_KERNEL
|
|
|
|
select SYS_SUPPORTS_64BIT_KERNEL if EXPERIMENTAL
|
2005-10-29 18:32:41 +00:00
|
|
|
select SYS_SUPPORTS_LITTLE_ENDIAN
|
|
|
|
help
|
2005-04-16 22:20:36 +00:00
|
|
|
This enables support for DEC's MIPS based workstations. For details
|
|
|
|
see the Linux/MIPS FAQ on <http://www.linux-mips.org/> and the
|
|
|
|
DECstation porting pages on <http://decstation.unix-ag.org/>.
|
|
|
|
|
|
|
|
If you have one of the following DECstation Models you definitely
|
|
|
|
want to choose R4xx0 for the CPU Type:
|
|
|
|
|
|
|
|
DECstation 5000/50
|
|
|
|
DECstation 5000/150
|
|
|
|
DECstation 5000/260
|
|
|
|
DECsystem 5900/260
|
|
|
|
|
|
|
|
otherwise choose R3000.
|
|
|
|
|
|
|
|
config MIPS_EV64120
|
2006-05-09 21:34:53 +00:00
|
|
|
bool "Galileo EV64120 Evaluation board (EXPERIMENTAL)"
|
2005-04-16 22:20:36 +00:00
|
|
|
depends on EXPERIMENTAL
|
|
|
|
select DMA_NONCOHERENT
|
|
|
|
select HW_HAS_PCI
|
|
|
|
select MIPS_GT64120
|
2005-10-20 21:33:09 +00:00
|
|
|
select SYS_HAS_CPU_R5000
|
2005-09-03 22:56:21 +00:00
|
|
|
select SYS_SUPPORTS_32BIT_KERNEL
|
|
|
|
select SYS_SUPPORTS_64BIT_KERNEL
|
2005-10-29 18:32:41 +00:00
|
|
|
select SYS_SUPPORTS_BIG_ENDIAN
|
2005-04-16 22:20:36 +00:00
|
|
|
help
|
|
|
|
This is an evaluation board based on the Galileo GT-64120
|
|
|
|
single-chip system controller that contains a MIPS R5000 compatible
|
|
|
|
core running at 75/100MHz. Their website is located at
|
|
|
|
<http://www.marvell.com/>. Say Y here if you wish to build a
|
|
|
|
kernel for this platform.
|
|
|
|
|
|
|
|
config MIPS_EV96100
|
2006-05-09 21:34:53 +00:00
|
|
|
bool "Galileo EV96100 Evaluation board (EXPERIMENTAL)"
|
2005-04-16 22:20:36 +00:00
|
|
|
depends on EXPERIMENTAL
|
|
|
|
select DMA_NONCOHERENT
|
|
|
|
select HW_HAS_PCI
|
|
|
|
select IRQ_CPU
|
|
|
|
select MIPS_GT96100
|
|
|
|
select RM7000_CPU_SCACHE
|
|
|
|
select SWAP_IO_SPACE
|
2005-10-20 21:33:09 +00:00
|
|
|
select SYS_HAS_CPU_R5000
|
|
|
|
select SYS_HAS_CPU_RM7000
|
2005-09-03 22:56:21 +00:00
|
|
|
select SYS_SUPPORTS_32BIT_KERNEL
|
2005-10-29 18:32:41 +00:00
|
|
|
select SYS_SUPPORTS_64BIT_KERNEL if EXPERIMENTAL
|
|
|
|
select SYS_SUPPORTS_BIG_ENDIAN
|
2005-04-16 22:20:36 +00:00
|
|
|
help
|
|
|
|
This is an evaluation board based on the Galileo GT-96100 LAN/WAN
|
|
|
|
communications controllers containing a MIPS R5000 compatible core
|
|
|
|
running at 83MHz. Their website is <http://www.marvell.com/>. Say Y
|
|
|
|
here if you wish to build a kernel for this platform.
|
|
|
|
|
|
|
|
config MIPS_IVR
|
2006-05-09 21:34:53 +00:00
|
|
|
bool "Globespan IVR board"
|
2005-04-16 22:20:36 +00:00
|
|
|
select DMA_NONCOHERENT
|
|
|
|
select HW_HAS_PCI
|
2005-10-29 18:32:41 +00:00
|
|
|
select ITE_BOARD_GEN
|
2005-10-20 21:33:09 +00:00
|
|
|
select SYS_HAS_CPU_NEVADA
|
2005-09-03 22:56:21 +00:00
|
|
|
select SYS_SUPPORTS_32BIT_KERNEL
|
|
|
|
select SYS_SUPPORTS_64BIT_KERNEL if EXPERIMENTAL
|
2005-10-29 18:32:41 +00:00
|
|
|
select SYS_SUPPORTS_LITTLE_ENDIAN
|
2005-04-16 22:20:36 +00:00
|
|
|
help
|
|
|
|
This is an evaluation board built by Globespan to showcase thir
|
|
|
|
iVR (Internet Video Recorder) design. It utilizes a QED RM5231
|
|
|
|
R5000 MIPS core. More information can be found out their website
|
|
|
|
located at <http://www.globespan.net/>. Say Y here if you wish to
|
|
|
|
build a kernel for this platform.
|
|
|
|
|
|
|
|
config MIPS_ITE8172
|
2006-05-09 21:34:53 +00:00
|
|
|
bool "ITE 8172G board"
|
2005-04-16 22:20:36 +00:00
|
|
|
select DMA_NONCOHERENT
|
|
|
|
select HW_HAS_PCI
|
2005-10-29 18:32:41 +00:00
|
|
|
select ITE_BOARD_GEN
|
2005-10-20 21:33:09 +00:00
|
|
|
select SYS_HAS_CPU_R5432
|
|
|
|
select SYS_HAS_CPU_NEVADA
|
2005-09-03 22:56:21 +00:00
|
|
|
select SYS_SUPPORTS_32BIT_KERNEL
|
|
|
|
select SYS_SUPPORTS_64BIT_KERNEL if EXPERIMENTAL
|
2005-10-29 18:32:41 +00:00
|
|
|
select SYS_SUPPORTS_LITTLE_ENDIAN
|
2005-04-16 22:20:36 +00:00
|
|
|
help
|
|
|
|
Ths is an evaluation board made by ITE <http://www.ite.com.tw/>
|
|
|
|
with ATX form factor that utilizes a MIPS R5000 to work with its
|
|
|
|
ITE8172G companion internet appliance chip. The MIPS core can be
|
|
|
|
either a NEC Vr5432 or QED RM5231. Say Y here if you wish to build
|
|
|
|
a kernel for this platform.
|
|
|
|
|
2005-10-29 18:32:41 +00:00
|
|
|
config MACH_JAZZ
|
2006-05-09 21:34:53 +00:00
|
|
|
bool "Jazz family of machines"
|
2005-10-29 18:32:41 +00:00
|
|
|
select ARC
|
|
|
|
select ARC32
|
|
|
|
select ARCH_MAY_HAVE_PC_FDC
|
|
|
|
select GENERIC_ISA_DMA
|
2006-03-14 05:11:50 +00:00
|
|
|
select I8253
|
2005-10-29 18:32:41 +00:00
|
|
|
select I8259
|
|
|
|
select ISA
|
2005-10-20 21:33:09 +00:00
|
|
|
select SYS_HAS_CPU_R4X00
|
2005-10-29 18:32:41 +00:00
|
|
|
select SYS_SUPPORTS_32BIT_KERNEL
|
|
|
|
select SYS_SUPPORTS_64BIT_KERNEL if EXPERIMENTAL
|
2005-04-16 22:20:36 +00:00
|
|
|
help
|
2005-10-29 18:32:41 +00:00
|
|
|
This a family of machines based on the MIPS R4030 chipset which was
|
|
|
|
used by several vendors to build RISC/os and Windows NT workstations.
|
|
|
|
Members include the Acer PICA, MIPS Magnum 4000, MIPS Millenium and
|
|
|
|
Olivetti M700-10 workstations.
|
|
|
|
|
|
|
|
config LASAT
|
2006-05-09 21:34:53 +00:00
|
|
|
bool "LASAT Networks platforms"
|
2005-10-29 18:32:41 +00:00
|
|
|
select DMA_NONCOHERENT
|
|
|
|
select HW_HAS_PCI
|
|
|
|
select MIPS_GT64120
|
|
|
|
select MIPS_NILE4
|
|
|
|
select R5000_CPU_SCACHE
|
2005-10-20 21:33:09 +00:00
|
|
|
select SYS_HAS_CPU_R5000
|
2005-10-29 18:32:41 +00:00
|
|
|
select SYS_SUPPORTS_32BIT_KERNEL
|
|
|
|
select SYS_SUPPORTS_64BIT_KERNEL if EXPERIMENTAL
|
|
|
|
select SYS_SUPPORTS_LITTLE_ENDIAN
|
2005-04-16 22:20:36 +00:00
|
|
|
|
|
|
|
config MIPS_ATLAS
|
2006-05-09 21:34:53 +00:00
|
|
|
bool "MIPS Atlas board"
|
2005-04-16 22:20:36 +00:00
|
|
|
select BOOT_ELF32
|
|
|
|
select DMA_NONCOHERENT
|
2005-10-29 18:32:41 +00:00
|
|
|
select IRQ_CPU
|
2005-04-16 22:20:36 +00:00
|
|
|
select HW_HAS_PCI
|
2005-10-29 18:32:41 +00:00
|
|
|
select MIPS_BOARDS_GEN
|
|
|
|
select MIPS_BONITO64
|
2005-04-16 22:20:36 +00:00
|
|
|
select MIPS_GT64120
|
2005-10-29 18:32:41 +00:00
|
|
|
select MIPS_MSC
|
2005-02-12 04:31:49 +00:00
|
|
|
select RM7000_CPU_SCACHE
|
2005-04-16 22:20:36 +00:00
|
|
|
select SWAP_IO_SPACE
|
2005-10-20 21:33:09 +00:00
|
|
|
select SYS_HAS_CPU_MIPS32_R1
|
|
|
|
select SYS_HAS_CPU_MIPS32_R2
|
|
|
|
select SYS_HAS_CPU_MIPS64_R1
|
|
|
|
select SYS_HAS_CPU_NEVADA
|
|
|
|
select SYS_HAS_CPU_RM7000
|
2005-09-03 22:56:21 +00:00
|
|
|
select SYS_SUPPORTS_32BIT_KERNEL
|
|
|
|
select SYS_SUPPORTS_64BIT_KERNEL
|
2005-10-29 18:32:41 +00:00
|
|
|
select SYS_SUPPORTS_BIG_ENDIAN
|
|
|
|
select SYS_SUPPORTS_LITTLE_ENDIAN
|
2005-04-16 22:20:36 +00:00
|
|
|
help
|
2005-02-02 22:23:46 +00:00
|
|
|
This enables support for the MIPS Technologies Atlas evaluation
|
2005-04-16 22:20:36 +00:00
|
|
|
board.
|
|
|
|
|
|
|
|
config MIPS_MALTA
|
2006-05-09 21:34:53 +00:00
|
|
|
bool "MIPS Malta board"
|
2005-09-15 08:52:34 +00:00
|
|
|
select ARCH_MAY_HAVE_PC_FDC
|
2005-04-16 22:20:36 +00:00
|
|
|
select BOOT_ELF32
|
|
|
|
select HAVE_STD_PC_SERIAL_PORT
|
|
|
|
select DMA_NONCOHERENT
|
2005-07-14 15:57:16 +00:00
|
|
|
select IRQ_CPU
|
2005-04-16 22:20:36 +00:00
|
|
|
select GENERIC_ISA_DMA
|
|
|
|
select HW_HAS_PCI
|
|
|
|
select I8259
|
2005-10-29 18:32:41 +00:00
|
|
|
select MIPS_BOARDS_GEN
|
|
|
|
select MIPS_BONITO64
|
2005-04-16 22:20:36 +00:00
|
|
|
select MIPS_GT64120
|
2005-10-29 18:32:41 +00:00
|
|
|
select MIPS_MSC
|
2005-04-16 22:20:36 +00:00
|
|
|
select SWAP_IO_SPACE
|
2005-10-20 21:33:09 +00:00
|
|
|
select SYS_HAS_CPU_MIPS32_R1
|
|
|
|
select SYS_HAS_CPU_MIPS32_R2
|
|
|
|
select SYS_HAS_CPU_MIPS64_R1
|
|
|
|
select SYS_HAS_CPU_NEVADA
|
|
|
|
select SYS_HAS_CPU_RM7000
|
2005-09-03 22:56:21 +00:00
|
|
|
select SYS_SUPPORTS_32BIT_KERNEL
|
|
|
|
select SYS_SUPPORTS_64BIT_KERNEL
|
2005-10-29 18:32:41 +00:00
|
|
|
select SYS_SUPPORTS_BIG_ENDIAN
|
|
|
|
select SYS_SUPPORTS_LITTLE_ENDIAN
|
2005-04-16 22:20:36 +00:00
|
|
|
help
|
2005-02-02 22:23:46 +00:00
|
|
|
This enables support for the MIPS Technologies Malta evaluation
|
2005-04-16 22:20:36 +00:00
|
|
|
board.
|
|
|
|
|
|
|
|
config MIPS_SEAD
|
2006-05-09 21:34:53 +00:00
|
|
|
bool "MIPS SEAD board (EXPERIMENTAL)"
|
2005-04-16 22:20:36 +00:00
|
|
|
depends on EXPERIMENTAL
|
|
|
|
select IRQ_CPU
|
|
|
|
select DMA_NONCOHERENT
|
2005-10-29 18:32:41 +00:00
|
|
|
select MIPS_BOARDS_GEN
|
2005-10-20 21:33:09 +00:00
|
|
|
select SYS_HAS_CPU_MIPS32_R1
|
|
|
|
select SYS_HAS_CPU_MIPS32_R2
|
|
|
|
select SYS_HAS_CPU_MIPS64_R1
|
2005-09-03 22:56:21 +00:00
|
|
|
select SYS_SUPPORTS_32BIT_KERNEL
|
2005-10-29 18:32:41 +00:00
|
|
|
select SYS_SUPPORTS_64BIT_KERNEL if EXPERIMENTAL
|
|
|
|
select SYS_SUPPORTS_BIG_ENDIAN
|
|
|
|
select SYS_SUPPORTS_LITTLE_ENDIAN
|
2005-02-02 22:23:46 +00:00
|
|
|
help
|
|
|
|
This enables support for the MIPS Technologies SEAD evaluation
|
|
|
|
board.
|
2005-04-16 22:20:36 +00:00
|
|
|
|
2006-05-06 09:04:20 +00:00
|
|
|
config WR_PPMC
|
|
|
|
bool "Support for Wind River PPMC board"
|
|
|
|
select IRQ_CPU
|
|
|
|
select BOOT_ELF32
|
|
|
|
select DMA_NONCOHERENT
|
|
|
|
select HW_HAS_PCI
|
|
|
|
select MIPS_GT64120
|
|
|
|
select SWAP_IO_SPACE
|
|
|
|
select SYS_HAS_CPU_MIPS32_R1
|
|
|
|
select SYS_HAS_CPU_MIPS32_R2
|
|
|
|
select SYS_HAS_CPU_MIPS64_R1
|
|
|
|
select SYS_HAS_CPU_NEVADA
|
|
|
|
select SYS_HAS_CPU_RM7000
|
|
|
|
select SYS_SUPPORTS_32BIT_KERNEL
|
|
|
|
select SYS_SUPPORTS_64BIT_KERNEL
|
|
|
|
select SYS_SUPPORTS_BIG_ENDIAN
|
|
|
|
select SYS_SUPPORTS_LITTLE_ENDIAN
|
|
|
|
help
|
|
|
|
This enables support for the Wind River MIPS32 4KC PPMC evaluation
|
|
|
|
board, which is based on GT64120 bridge chip.
|
|
|
|
|
2005-10-29 18:32:41 +00:00
|
|
|
config MIPS_SIM
|
2006-05-09 21:34:53 +00:00
|
|
|
bool 'MIPS simulator (MIPSsim)'
|
2005-04-16 22:20:36 +00:00
|
|
|
select DMA_NONCOHERENT
|
|
|
|
select IRQ_CPU
|
2005-10-20 21:33:09 +00:00
|
|
|
select SYS_HAS_CPU_MIPS32_R1
|
|
|
|
select SYS_HAS_CPU_MIPS32_R2
|
2005-09-03 22:56:21 +00:00
|
|
|
select SYS_SUPPORTS_32BIT_KERNEL
|
2005-10-29 18:32:41 +00:00
|
|
|
select SYS_SUPPORTS_BIG_ENDIAN
|
|
|
|
select SYS_SUPPORTS_LITTLE_ENDIAN
|
2005-04-16 22:20:36 +00:00
|
|
|
help
|
2005-10-29 18:32:41 +00:00
|
|
|
This option enables support for MIPS Technologies MIPSsim software
|
|
|
|
emulator.
|
2005-04-16 22:20:36 +00:00
|
|
|
|
2005-10-29 18:32:41 +00:00
|
|
|
config MOMENCO_JAGUAR_ATX
|
2006-05-09 21:34:53 +00:00
|
|
|
bool "Momentum Jaguar board"
|
2005-10-29 18:32:41 +00:00
|
|
|
select BOOT_ELF32
|
2005-04-16 22:20:36 +00:00
|
|
|
select DMA_NONCOHERENT
|
|
|
|
select HW_HAS_PCI
|
|
|
|
select IRQ_CPU
|
|
|
|
select IRQ_CPU_RM7K
|
2005-10-29 18:32:41 +00:00
|
|
|
select IRQ_MV64340
|
|
|
|
select LIMITED_DMA
|
2005-04-16 22:20:36 +00:00
|
|
|
select PCI_MARVELL
|
|
|
|
select RM7000_CPU_SCACHE
|
|
|
|
select SWAP_IO_SPACE
|
2005-10-20 21:33:09 +00:00
|
|
|
select SYS_HAS_CPU_RM9000
|
2005-09-03 22:56:21 +00:00
|
|
|
select SYS_SUPPORTS_32BIT_KERNEL
|
|
|
|
select SYS_SUPPORTS_64BIT_KERNEL
|
2005-10-29 18:32:41 +00:00
|
|
|
select SYS_SUPPORTS_BIG_ENDIAN
|
2005-04-16 22:20:36 +00:00
|
|
|
help
|
2005-10-29 18:32:41 +00:00
|
|
|
The Jaguar ATX is a MIPS-based Single Board Computer (SBC) made by
|
2005-04-16 22:20:36 +00:00
|
|
|
Momentum Computer <http://www.momenco.com/>.
|
|
|
|
|
2005-10-29 18:32:41 +00:00
|
|
|
config MOMENCO_OCELOT
|
2006-05-09 21:34:53 +00:00
|
|
|
bool "Momentum Ocelot board"
|
2005-04-16 22:20:36 +00:00
|
|
|
select DMA_NONCOHERENT
|
|
|
|
select HW_HAS_PCI
|
|
|
|
select IRQ_CPU
|
2005-10-29 18:32:41 +00:00
|
|
|
select IRQ_CPU_RM7K
|
|
|
|
select MIPS_GT64120
|
2005-04-16 22:20:36 +00:00
|
|
|
select RM7000_CPU_SCACHE
|
|
|
|
select SWAP_IO_SPACE
|
2005-10-20 21:33:09 +00:00
|
|
|
select SYS_HAS_CPU_RM7000
|
2005-09-03 22:56:21 +00:00
|
|
|
select SYS_SUPPORTS_32BIT_KERNEL
|
|
|
|
select SYS_SUPPORTS_64BIT_KERNEL
|
2005-10-29 18:32:41 +00:00
|
|
|
select SYS_SUPPORTS_BIG_ENDIAN
|
2005-04-16 22:20:36 +00:00
|
|
|
help
|
|
|
|
The Ocelot is a MIPS-based Single Board Computer (SBC) made by
|
|
|
|
Momentum Computer <http://www.momenco.com/>.
|
|
|
|
|
|
|
|
config MOMENCO_OCELOT_3
|
2006-05-09 21:34:53 +00:00
|
|
|
bool "Momentum Ocelot-3 board"
|
2005-04-16 22:20:36 +00:00
|
|
|
select BOOT_ELF32
|
|
|
|
select DMA_NONCOHERENT
|
|
|
|
select HW_HAS_PCI
|
|
|
|
select IRQ_CPU
|
|
|
|
select IRQ_CPU_RM7K
|
|
|
|
select IRQ_MV64340
|
|
|
|
select PCI_MARVELL
|
|
|
|
select RM7000_CPU_SCACHE
|
|
|
|
select SWAP_IO_SPACE
|
2005-10-20 21:33:09 +00:00
|
|
|
select SYS_HAS_CPU_RM9000
|
2005-09-03 22:56:21 +00:00
|
|
|
select SYS_SUPPORTS_32BIT_KERNEL
|
|
|
|
select SYS_SUPPORTS_64BIT_KERNEL
|
2005-10-29 18:32:41 +00:00
|
|
|
select SYS_SUPPORTS_BIG_ENDIAN
|
2005-04-16 22:20:36 +00:00
|
|
|
help
|
|
|
|
The Ocelot-3 is based off Discovery III System Controller and
|
|
|
|
PMC-Sierra Rm79000 core.
|
|
|
|
|
2005-10-29 18:32:41 +00:00
|
|
|
config MOMENCO_OCELOT_C
|
2006-05-09 21:34:53 +00:00
|
|
|
bool "Momentum Ocelot-C board"
|
2005-04-16 22:20:36 +00:00
|
|
|
select DMA_NONCOHERENT
|
|
|
|
select HW_HAS_PCI
|
|
|
|
select IRQ_CPU
|
|
|
|
select IRQ_MV64340
|
|
|
|
select PCI_MARVELL
|
|
|
|
select RM7000_CPU_SCACHE
|
|
|
|
select SWAP_IO_SPACE
|
2005-10-20 21:33:09 +00:00
|
|
|
select SYS_HAS_CPU_RM7000
|
2005-09-03 22:56:21 +00:00
|
|
|
select SYS_SUPPORTS_32BIT_KERNEL
|
|
|
|
select SYS_SUPPORTS_64BIT_KERNEL
|
2005-10-29 18:32:41 +00:00
|
|
|
select SYS_SUPPORTS_BIG_ENDIAN
|
2005-04-16 22:20:36 +00:00
|
|
|
help
|
2005-10-29 18:32:41 +00:00
|
|
|
The Ocelot is a MIPS-based Single Board Computer (SBC) made by
|
2005-04-16 22:20:36 +00:00
|
|
|
Momentum Computer <http://www.momenco.com/>.
|
|
|
|
|
2005-10-29 18:32:41 +00:00
|
|
|
config MOMENCO_OCELOT_G
|
2006-05-09 21:34:53 +00:00
|
|
|
bool "Momentum Ocelot-G board"
|
2005-10-29 18:32:41 +00:00
|
|
|
select DMA_NONCOHERENT
|
2005-04-16 22:20:36 +00:00
|
|
|
select HW_HAS_PCI
|
|
|
|
select IRQ_CPU
|
|
|
|
select IRQ_CPU_RM7K
|
2005-10-29 18:32:41 +00:00
|
|
|
select PCI_MARVELL
|
|
|
|
select RM7000_CPU_SCACHE
|
2005-04-16 22:20:36 +00:00
|
|
|
select SWAP_IO_SPACE
|
2005-10-20 21:33:09 +00:00
|
|
|
select SYS_HAS_CPU_RM7000
|
2005-09-03 22:56:21 +00:00
|
|
|
select SYS_SUPPORTS_32BIT_KERNEL
|
|
|
|
select SYS_SUPPORTS_64BIT_KERNEL
|
2005-10-29 18:32:41 +00:00
|
|
|
select SYS_SUPPORTS_BIG_ENDIAN
|
2005-04-16 22:20:36 +00:00
|
|
|
help
|
2005-10-29 18:32:41 +00:00
|
|
|
The Ocelot is a MIPS-based Single Board Computer (SBC) made by
|
|
|
|
Momentum Computer <http://www.momenco.com/>.
|
2005-04-16 22:20:36 +00:00
|
|
|
|
2005-10-29 18:32:41 +00:00
|
|
|
config MIPS_XXS1500
|
2006-05-09 21:34:53 +00:00
|
|
|
bool "MyCable XXS1500 board"
|
2005-10-29 18:32:41 +00:00
|
|
|
select DMA_NONCOHERENT
|
|
|
|
select SOC_AU1500
|
|
|
|
select SYS_SUPPORTS_LITTLE_ENDIAN
|
2005-04-16 22:20:36 +00:00
|
|
|
|
2005-07-14 17:47:57 +00:00
|
|
|
config PNX8550_V2PCI
|
2006-05-09 21:34:53 +00:00
|
|
|
bool "Philips PNX8550 based Viper2-PCI board"
|
2006-06-07 14:24:44 +00:00
|
|
|
depends on BROKEN
|
2005-07-14 17:47:57 +00:00
|
|
|
select PNX8550
|
|
|
|
select SYS_SUPPORTS_LITTLE_ENDIAN
|
|
|
|
|
|
|
|
config PNX8550_JBS
|
2006-05-09 21:34:53 +00:00
|
|
|
bool "Philips PNX8550 based JBS board"
|
2006-06-07 14:24:44 +00:00
|
|
|
depends on BROKEN
|
2005-07-14 17:47:57 +00:00
|
|
|
select PNX8550
|
|
|
|
select SYS_SUPPORTS_LITTLE_ENDIAN
|
|
|
|
|
2005-04-16 22:20:36 +00:00
|
|
|
config DDB5074
|
2006-05-09 21:34:53 +00:00
|
|
|
bool "NEC DDB Vrc-5074 (EXPERIMENTAL)"
|
2005-04-16 22:20:36 +00:00
|
|
|
depends on EXPERIMENTAL
|
2005-10-29 18:32:41 +00:00
|
|
|
select DDB5XXX_COMMON
|
2005-04-16 22:20:36 +00:00
|
|
|
select DMA_NONCOHERENT
|
|
|
|
select HAVE_STD_PC_SERIAL_PORT
|
|
|
|
select HW_HAS_PCI
|
|
|
|
select IRQ_CPU
|
|
|
|
select I8259
|
|
|
|
select ISA
|
2005-10-20 21:33:09 +00:00
|
|
|
select SYS_HAS_CPU_R5000
|
2005-09-03 22:56:21 +00:00
|
|
|
select SYS_SUPPORTS_32BIT_KERNEL
|
2005-10-29 18:32:41 +00:00
|
|
|
select SYS_SUPPORTS_64BIT_KERNEL if EXPERIMENTAL
|
|
|
|
select SYS_SUPPORTS_LITTLE_ENDIAN
|
2005-04-16 22:20:36 +00:00
|
|
|
help
|
|
|
|
This enables support for the VR5000-based NEC DDB Vrc-5074
|
|
|
|
evaluation board.
|
|
|
|
|
|
|
|
config DDB5476
|
2006-05-09 21:34:53 +00:00
|
|
|
bool "NEC DDB Vrc-5476"
|
2005-10-29 18:32:41 +00:00
|
|
|
select DDB5XXX_COMMON
|
2005-04-16 22:20:36 +00:00
|
|
|
select DMA_NONCOHERENT
|
|
|
|
select HAVE_STD_PC_SERIAL_PORT
|
|
|
|
select HW_HAS_PCI
|
|
|
|
select IRQ_CPU
|
|
|
|
select I8259
|
|
|
|
select ISA
|
2005-10-20 21:33:09 +00:00
|
|
|
select SYS_HAS_CPU_R5432
|
2005-09-03 22:56:21 +00:00
|
|
|
select SYS_SUPPORTS_32BIT_KERNEL
|
|
|
|
select SYS_SUPPORTS_64BIT_KERNEL if EXPERIMENTAL
|
2005-10-29 18:32:41 +00:00
|
|
|
select SYS_SUPPORTS_LITTLE_ENDIAN
|
2005-04-16 22:20:36 +00:00
|
|
|
help
|
|
|
|
This enables support for the R5432-based NEC DDB Vrc-5476
|
|
|
|
evaluation board.
|
|
|
|
|
|
|
|
Features : kernel debugging, serial terminal, NFS root fs, on-board
|
|
|
|
ether port USB, AC97, PCI, PCI VGA card & framebuffer console,
|
|
|
|
IDE controller, PS2 keyboard, PS2 mouse, etc.
|
|
|
|
|
|
|
|
config DDB5477
|
2006-05-09 21:34:53 +00:00
|
|
|
bool "NEC DDB Vrc-5477"
|
2005-10-29 18:32:41 +00:00
|
|
|
select DDB5XXX_COMMON
|
2005-04-16 22:20:36 +00:00
|
|
|
select DMA_NONCOHERENT
|
|
|
|
select HW_HAS_PCI
|
|
|
|
select I8259
|
|
|
|
select IRQ_CPU
|
2005-10-20 21:33:09 +00:00
|
|
|
select SYS_HAS_CPU_R5432
|
2005-09-03 22:56:21 +00:00
|
|
|
select SYS_SUPPORTS_32BIT_KERNEL
|
|
|
|
select SYS_SUPPORTS_64BIT_KERNEL if EXPERIMENTAL
|
2005-10-29 18:32:41 +00:00
|
|
|
select SYS_SUPPORTS_LITTLE_ENDIAN
|
2005-04-16 22:20:36 +00:00
|
|
|
help
|
|
|
|
This enables support for the R5432-based NEC DDB Vrc-5477,
|
|
|
|
or Rockhopper/SolutionGear boards with R5432/R5500 CPUs.
|
|
|
|
|
|
|
|
Features : kernel debugging, serial terminal, NFS root fs, on-board
|
|
|
|
ether port USB, AC97, PCI, etc.
|
|
|
|
|
2005-10-29 18:32:41 +00:00
|
|
|
config MACH_VR41XX
|
2006-05-09 21:34:53 +00:00
|
|
|
bool "NEC VR41XX-based machines"
|
2005-10-20 21:33:09 +00:00
|
|
|
select SYS_HAS_CPU_VR41XX
|
2005-10-29 18:32:41 +00:00
|
|
|
select SYS_SUPPORTS_32BIT_KERNEL
|
|
|
|
select SYS_SUPPORTS_64BIT_KERNEL if EXPERIMENTAL
|
|
|
|
|
|
|
|
config PMC_YOSEMITE
|
2006-05-09 21:34:53 +00:00
|
|
|
bool "PMC-Sierra Yosemite eval board"
|
2005-10-29 18:32:41 +00:00
|
|
|
select DMA_COHERENT
|
|
|
|
select HW_HAS_PCI
|
|
|
|
select IRQ_CPU
|
|
|
|
select IRQ_CPU_RM7K
|
|
|
|
select IRQ_CPU_RM9K
|
|
|
|
select SWAP_IO_SPACE
|
2005-10-20 21:33:09 +00:00
|
|
|
select SYS_HAS_CPU_RM9000
|
2005-10-29 18:32:41 +00:00
|
|
|
select SYS_SUPPORTS_32BIT_KERNEL
|
|
|
|
select SYS_SUPPORTS_64BIT_KERNEL
|
|
|
|
select SYS_SUPPORTS_BIG_ENDIAN
|
|
|
|
select SYS_SUPPORTS_HIGHMEM
|
|
|
|
help
|
|
|
|
Yosemite is an evaluation board for the RM9000x2 processor
|
|
|
|
manufactured by PMC-Sierra.
|
2005-04-16 22:20:36 +00:00
|
|
|
|
2005-09-03 22:56:11 +00:00
|
|
|
config QEMU
|
2006-05-09 21:34:53 +00:00
|
|
|
bool "Qemu"
|
2005-09-03 22:56:11 +00:00
|
|
|
select DMA_COHERENT
|
|
|
|
select GENERIC_ISA_DMA
|
|
|
|
select HAVE_STD_PC_SERIAL_PORT
|
2006-03-14 05:11:50 +00:00
|
|
|
select I8253
|
2005-09-03 22:56:11 +00:00
|
|
|
select I8259
|
|
|
|
select ISA
|
|
|
|
select SWAP_IO_SPACE
|
2005-10-20 21:33:09 +00:00
|
|
|
select SYS_HAS_CPU_MIPS32_R1
|
2005-09-03 22:56:11 +00:00
|
|
|
select SYS_SUPPORTS_32BIT_KERNEL
|
|
|
|
select SYS_SUPPORTS_BIG_ENDIAN
|
|
|
|
help
|
2005-10-29 18:32:41 +00:00
|
|
|
Qemu is a software emulator which among other architectures also
|
|
|
|
can simulate a MIPS32 4Kc system. This patch adds support for the
|
|
|
|
system architecture that currently is being simulated by Qemu. It
|
|
|
|
will eventually be removed again when Qemu has the capability to
|
|
|
|
simulate actual MIPS hardware platforms. More information on Qemu
|
|
|
|
can be found at http://www.linux-mips.org/wiki/Qemu.
|
2005-09-03 22:56:11 +00:00
|
|
|
|
2005-04-16 22:20:36 +00:00
|
|
|
config SGI_IP22
|
2006-05-09 21:34:53 +00:00
|
|
|
bool "SGI IP22 (Indy/Indigo2)"
|
2005-04-16 22:20:36 +00:00
|
|
|
select ARC
|
|
|
|
select ARC32
|
|
|
|
select BOOT_ELF32
|
|
|
|
select DMA_NONCOHERENT
|
2005-10-29 18:32:41 +00:00
|
|
|
select HW_HAS_EISA
|
2005-04-16 22:20:36 +00:00
|
|
|
select IP22_CPU_SCACHE
|
|
|
|
select IRQ_CPU
|
2006-06-07 11:53:17 +00:00
|
|
|
select NO_ISA if ISA
|
2005-04-16 22:20:36 +00:00
|
|
|
select SWAP_IO_SPACE
|
2005-10-20 21:33:09 +00:00
|
|
|
select SYS_HAS_CPU_R4X00
|
|
|
|
select SYS_HAS_CPU_R5000
|
2005-09-03 22:56:21 +00:00
|
|
|
select SYS_SUPPORTS_32BIT_KERNEL
|
|
|
|
select SYS_SUPPORTS_64BIT_KERNEL
|
2005-10-29 18:32:41 +00:00
|
|
|
select SYS_SUPPORTS_BIG_ENDIAN
|
2005-04-16 22:20:36 +00:00
|
|
|
help
|
|
|
|
This are the SGI Indy, Challenge S and Indigo2, as well as certain
|
|
|
|
OEM variants like the Tandem CMN B006S. To compile a Linux kernel
|
|
|
|
that runs on these, say Y here.
|
|
|
|
|
|
|
|
config SGI_IP27
|
2006-05-09 21:34:53 +00:00
|
|
|
bool "SGI IP27 (Origin200/2000)"
|
2005-04-16 22:20:36 +00:00
|
|
|
select ARC
|
|
|
|
select ARC64
|
2005-10-29 18:32:41 +00:00
|
|
|
select BOOT_ELF64
|
2005-04-16 22:20:36 +00:00
|
|
|
select DMA_IP27
|
|
|
|
select HW_HAS_PCI
|
|
|
|
select PCI_DOMAINS
|
2005-10-20 21:33:09 +00:00
|
|
|
select SYS_HAS_CPU_R10000
|
2005-09-03 22:56:21 +00:00
|
|
|
select SYS_SUPPORTS_64BIT_KERNEL
|
2005-10-29 18:32:41 +00:00
|
|
|
select SYS_SUPPORTS_BIG_ENDIAN
|
2006-06-11 22:03:08 +00:00
|
|
|
select SYS_SUPPORTS_NUMA
|
2005-04-16 22:20:36 +00:00
|
|
|
help
|
|
|
|
This are the SGI Origin 200, Origin 2000 and Onyx 2 Graphics
|
|
|
|
workstations. To compile a Linux kernel that runs on these, say Y
|
|
|
|
here.
|
|
|
|
|
|
|
|
config SGI_IP32
|
2006-05-09 21:34:53 +00:00
|
|
|
bool "SGI IP32 (O2) (EXPERIMENTAL)"
|
2005-09-03 22:56:21 +00:00
|
|
|
depends on EXPERIMENTAL
|
2005-04-16 22:20:36 +00:00
|
|
|
select ARC
|
|
|
|
select ARC32
|
|
|
|
select BOOT_ELF32
|
|
|
|
select OWN_DMA
|
|
|
|
select DMA_IP32
|
|
|
|
select DMA_NONCOHERENT
|
|
|
|
select HW_HAS_PCI
|
|
|
|
select R5000_CPU_SCACHE
|
|
|
|
select RM7000_CPU_SCACHE
|
2005-10-20 21:33:09 +00:00
|
|
|
select SYS_HAS_CPU_R5000
|
|
|
|
select SYS_HAS_CPU_R10000 if BROKEN
|
|
|
|
select SYS_HAS_CPU_RM7000
|
2006-01-19 14:55:42 +00:00
|
|
|
select SYS_HAS_CPU_NEVADA
|
2005-09-03 22:56:21 +00:00
|
|
|
select SYS_SUPPORTS_64BIT_KERNEL
|
2005-07-25 22:45:45 +00:00
|
|
|
select SYS_SUPPORTS_BIG_ENDIAN
|
|
|
|
help
|
2005-10-29 18:32:41 +00:00
|
|
|
If you want this kernel to run on SGI O2 workstation, say Y here.
|
2005-04-16 22:20:36 +00:00
|
|
|
|
2005-10-20 06:57:11 +00:00
|
|
|
config SIBYTE_BIGSUR
|
2006-05-09 21:34:53 +00:00
|
|
|
bool "Sibyte BCM91480B-BigSur"
|
2005-10-20 06:57:11 +00:00
|
|
|
select BOOT_ELF32
|
|
|
|
select DMA_COHERENT
|
2005-10-20 21:33:09 +00:00
|
|
|
select PCI_DOMAINS
|
2005-10-20 06:57:11 +00:00
|
|
|
select SIBYTE_BCM1x80
|
|
|
|
select SWAP_IO_SPACE
|
2005-10-20 21:33:09 +00:00
|
|
|
select SYS_HAS_CPU_SB1
|
2005-10-20 06:57:11 +00:00
|
|
|
select SYS_SUPPORTS_BIG_ENDIAN
|
|
|
|
select SYS_SUPPORTS_LITTLE_ENDIAN
|
|
|
|
|
2005-10-29 18:32:41 +00:00
|
|
|
config SIBYTE_SWARM
|
2006-05-09 21:34:53 +00:00
|
|
|
bool "Sibyte BCM91250A-SWARM"
|
2005-10-29 18:32:41 +00:00
|
|
|
select BOOT_ELF32
|
2005-04-16 22:20:36 +00:00
|
|
|
select DMA_COHERENT
|
2005-10-29 18:32:41 +00:00
|
|
|
select SIBYTE_SB1250
|
|
|
|
select SWAP_IO_SPACE
|
2005-10-20 21:33:09 +00:00
|
|
|
select SYS_HAS_CPU_SB1
|
2005-06-05 03:57:20 +00:00
|
|
|
select SYS_SUPPORTS_BIG_ENDIAN
|
2005-10-29 18:32:41 +00:00
|
|
|
select SYS_SUPPORTS_HIGHMEM
|
|
|
|
select SYS_SUPPORTS_LITTLE_ENDIAN
|
2005-04-16 22:20:36 +00:00
|
|
|
|
2005-10-29 18:32:41 +00:00
|
|
|
config SIBYTE_SENTOSA
|
2006-05-09 21:34:53 +00:00
|
|
|
bool "Sibyte BCM91250E-Sentosa"
|
2005-10-29 18:32:41 +00:00
|
|
|
depends on EXPERIMENTAL
|
|
|
|
select BOOT_ELF32
|
|
|
|
select DMA_COHERENT
|
|
|
|
select SIBYTE_SB1250
|
|
|
|
select SWAP_IO_SPACE
|
2005-10-20 21:33:09 +00:00
|
|
|
select SYS_HAS_CPU_SB1
|
2005-10-29 18:32:41 +00:00
|
|
|
select SYS_SUPPORTS_BIG_ENDIAN
|
|
|
|
select SYS_SUPPORTS_LITTLE_ENDIAN
|
2005-04-16 22:20:36 +00:00
|
|
|
|
2005-10-29 18:32:41 +00:00
|
|
|
config SIBYTE_RHONE
|
2006-05-09 21:34:53 +00:00
|
|
|
bool "Sibyte BCM91125E-Rhone"
|
2005-10-29 18:32:41 +00:00
|
|
|
depends on EXPERIMENTAL
|
|
|
|
select BOOT_ELF32
|
|
|
|
select DMA_COHERENT
|
|
|
|
select SIBYTE_BCM1125H
|
|
|
|
select SWAP_IO_SPACE
|
2005-10-20 21:33:09 +00:00
|
|
|
select SYS_HAS_CPU_SB1
|
2005-10-29 18:32:41 +00:00
|
|
|
select SYS_SUPPORTS_BIG_ENDIAN
|
|
|
|
select SYS_SUPPORTS_LITTLE_ENDIAN
|
2005-04-16 22:20:36 +00:00
|
|
|
|
2005-10-29 18:32:41 +00:00
|
|
|
config SIBYTE_CARMEL
|
2006-05-09 21:34:53 +00:00
|
|
|
bool "Sibyte BCM91120x-Carmel"
|
2005-10-29 18:32:41 +00:00
|
|
|
depends on EXPERIMENTAL
|
|
|
|
select BOOT_ELF32
|
2005-09-15 08:03:12 +00:00
|
|
|
select DMA_COHERENT
|
2005-10-29 18:32:41 +00:00
|
|
|
select SIBYTE_BCM1120
|
|
|
|
select SWAP_IO_SPACE
|
2005-10-20 21:33:09 +00:00
|
|
|
select SYS_HAS_CPU_SB1
|
2005-10-29 18:32:41 +00:00
|
|
|
select SYS_SUPPORTS_BIG_ENDIAN
|
2005-03-01 06:33:16 +00:00
|
|
|
select SYS_SUPPORTS_LITTLE_ENDIAN
|
|
|
|
|
2005-10-29 18:32:41 +00:00
|
|
|
config SIBYTE_PTSWARM
|
2006-05-09 21:34:53 +00:00
|
|
|
bool "Sibyte BCM91250PT-PTSWARM"
|
2005-10-29 18:32:41 +00:00
|
|
|
depends on EXPERIMENTAL
|
|
|
|
select BOOT_ELF32
|
|
|
|
select DMA_COHERENT
|
|
|
|
select SIBYTE_SB1250
|
|
|
|
select SWAP_IO_SPACE
|
2005-10-20 21:33:09 +00:00
|
|
|
select SYS_HAS_CPU_SB1
|
2005-10-29 18:32:41 +00:00
|
|
|
select SYS_SUPPORTS_BIG_ENDIAN
|
|
|
|
select SYS_SUPPORTS_HIGHMEM
|
|
|
|
select SYS_SUPPORTS_LITTLE_ENDIAN
|
2005-04-16 22:20:36 +00:00
|
|
|
|
2005-10-29 18:32:41 +00:00
|
|
|
config SIBYTE_LITTLESUR
|
2006-05-09 21:34:53 +00:00
|
|
|
bool "Sibyte BCM91250C2-LittleSur"
|
2005-10-29 18:32:41 +00:00
|
|
|
depends on EXPERIMENTAL
|
|
|
|
select BOOT_ELF32
|
|
|
|
select DMA_COHERENT
|
|
|
|
select SIBYTE_SB1250
|
|
|
|
select SWAP_IO_SPACE
|
2005-10-20 21:33:09 +00:00
|
|
|
select SYS_HAS_CPU_SB1
|
2005-10-29 18:32:41 +00:00
|
|
|
select SYS_SUPPORTS_BIG_ENDIAN
|
|
|
|
select SYS_SUPPORTS_HIGHMEM
|
|
|
|
select SYS_SUPPORTS_LITTLE_ENDIAN
|
2005-04-16 22:20:36 +00:00
|
|
|
|
2005-10-29 18:32:41 +00:00
|
|
|
config SIBYTE_CRHINE
|
2006-05-09 21:34:53 +00:00
|
|
|
bool "Sibyte BCM91120C-CRhine"
|
2005-10-29 18:32:41 +00:00
|
|
|
depends on EXPERIMENTAL
|
|
|
|
select BOOT_ELF32
|
|
|
|
select DMA_COHERENT
|
|
|
|
select SIBYTE_BCM1120
|
|
|
|
select SWAP_IO_SPACE
|
2005-10-20 21:33:09 +00:00
|
|
|
select SYS_HAS_CPU_SB1
|
2005-10-29 18:32:41 +00:00
|
|
|
select SYS_SUPPORTS_BIG_ENDIAN
|
|
|
|
select SYS_SUPPORTS_LITTLE_ENDIAN
|
2005-04-16 22:20:36 +00:00
|
|
|
|
2005-10-29 18:32:41 +00:00
|
|
|
config SIBYTE_CRHONE
|
2006-05-09 21:34:53 +00:00
|
|
|
bool "Sibyte BCM91125C-CRhone"
|
2005-10-29 18:32:41 +00:00
|
|
|
depends on EXPERIMENTAL
|
|
|
|
select BOOT_ELF32
|
|
|
|
select DMA_COHERENT
|
|
|
|
select SIBYTE_BCM1125
|
|
|
|
select SWAP_IO_SPACE
|
2005-10-20 21:33:09 +00:00
|
|
|
select SYS_HAS_CPU_SB1
|
2005-10-29 18:32:41 +00:00
|
|
|
select SYS_SUPPORTS_BIG_ENDIAN
|
|
|
|
select SYS_SUPPORTS_HIGHMEM
|
|
|
|
select SYS_SUPPORTS_LITTLE_ENDIAN
|
2005-04-16 22:20:36 +00:00
|
|
|
|
|
|
|
config SNI_RM200_PCI
|
2006-05-09 21:34:53 +00:00
|
|
|
bool "SNI RM200 PCI"
|
2005-04-16 22:20:36 +00:00
|
|
|
select ARC
|
|
|
|
select ARC32
|
2005-09-15 08:52:34 +00:00
|
|
|
select ARCH_MAY_HAVE_PC_FDC
|
2005-04-16 22:20:36 +00:00
|
|
|
select BOOT_ELF32
|
|
|
|
select DMA_NONCOHERENT
|
|
|
|
select GENERIC_ISA_DMA
|
|
|
|
select HAVE_STD_PC_SERIAL_PORT
|
2005-10-29 18:32:41 +00:00
|
|
|
select HW_HAS_EISA
|
2005-04-16 22:20:36 +00:00
|
|
|
select HW_HAS_PCI
|
2006-03-14 05:11:50 +00:00
|
|
|
select I8253
|
2005-04-16 22:20:36 +00:00
|
|
|
select I8259
|
|
|
|
select ISA
|
2005-10-20 21:33:09 +00:00
|
|
|
select SYS_HAS_CPU_R4X00
|
2005-09-03 22:56:21 +00:00
|
|
|
select SYS_SUPPORTS_32BIT_KERNEL
|
|
|
|
select SYS_SUPPORTS_64BIT_KERNEL if EXPERIMENTAL
|
2005-10-29 18:32:41 +00:00
|
|
|
select SYS_SUPPORTS_BIG_ENDIAN if EXPERIMENTAL
|
2005-08-10 15:17:11 +00:00
|
|
|
select SYS_SUPPORTS_HIGHMEM
|
2005-10-29 18:32:41 +00:00
|
|
|
select SYS_SUPPORTS_LITTLE_ENDIAN
|
2005-04-16 22:20:36 +00:00
|
|
|
help
|
|
|
|
The SNI RM200 PCI was a MIPS-based platform manufactured by Siemens
|
|
|
|
Nixdorf Informationssysteme (SNI), parent company of Pyramid
|
|
|
|
Technology and now in turn merged with Fujitsu. Say Y here to
|
|
|
|
support this machine type.
|
|
|
|
|
2005-10-29 18:32:41 +00:00
|
|
|
config TOSHIBA_JMR3927
|
2006-05-09 21:34:53 +00:00
|
|
|
bool "Toshiba JMR-TX3927 board"
|
2005-10-29 18:32:41 +00:00
|
|
|
select DMA_NONCOHERENT
|
|
|
|
select HW_HAS_PCI
|
|
|
|
select MIPS_TX3927
|
|
|
|
select SWAP_IO_SPACE
|
2005-10-20 21:33:09 +00:00
|
|
|
select SYS_HAS_CPU_TX39XX
|
2005-10-29 18:32:41 +00:00
|
|
|
select SYS_SUPPORTS_32BIT_KERNEL
|
|
|
|
select SYS_SUPPORTS_BIG_ENDIAN
|
|
|
|
select TOSHIBA_BOARDS
|
|
|
|
|
2005-04-16 22:20:36 +00:00
|
|
|
config TOSHIBA_RBTX4927
|
2006-05-09 21:34:53 +00:00
|
|
|
bool "Toshiba TBTX49[23]7 board"
|
2005-04-16 22:20:36 +00:00
|
|
|
select DMA_NONCOHERENT
|
|
|
|
select HAS_TXX9_SERIAL
|
|
|
|
select HW_HAS_PCI
|
|
|
|
select I8259
|
|
|
|
select ISA
|
|
|
|
select SWAP_IO_SPACE
|
2005-10-20 21:33:09 +00:00
|
|
|
select SYS_HAS_CPU_TX49XX
|
2005-09-03 22:56:21 +00:00
|
|
|
select SYS_SUPPORTS_32BIT_KERNEL
|
|
|
|
select SYS_SUPPORTS_64BIT_KERNEL
|
2005-10-29 18:32:41 +00:00
|
|
|
select SYS_SUPPORTS_BIG_ENDIAN
|
|
|
|
select TOSHIBA_BOARDS
|
2005-04-16 22:20:36 +00:00
|
|
|
help
|
|
|
|
This Toshiba board is based on the TX4927 processor. Say Y here to
|
|
|
|
support this machine type
|
|
|
|
|
2005-10-29 18:32:41 +00:00
|
|
|
config TOSHIBA_RBTX4938
|
2006-05-09 21:34:53 +00:00
|
|
|
bool "Toshiba RBTX4938 board"
|
2005-10-29 18:32:41 +00:00
|
|
|
select HAVE_STD_PC_SERIAL_PORT
|
|
|
|
select DMA_NONCOHERENT
|
|
|
|
select GENERIC_ISA_DMA
|
|
|
|
select HAS_TXX9_SERIAL
|
|
|
|
select HW_HAS_PCI
|
|
|
|
select I8259
|
|
|
|
select ISA
|
|
|
|
select SWAP_IO_SPACE
|
2005-10-20 21:33:09 +00:00
|
|
|
select SYS_HAS_CPU_TX49XX
|
2005-10-29 18:32:41 +00:00
|
|
|
select SYS_SUPPORTS_32BIT_KERNEL
|
|
|
|
select SYS_SUPPORTS_LITTLE_ENDIAN
|
|
|
|
select SYS_SUPPORTS_BIG_ENDIAN
|
|
|
|
select TOSHIBA_BOARDS
|
|
|
|
help
|
|
|
|
This Toshiba board is based on the TX4938 processor. Say Y here to
|
|
|
|
support this machine type
|
|
|
|
|
|
|
|
endchoice
|
2005-04-16 22:20:36 +00:00
|
|
|
|
2005-10-29 18:32:41 +00:00
|
|
|
source "arch/mips/ddb5xxx/Kconfig"
|
|
|
|
source "arch/mips/gt64120/ev64120/Kconfig"
|
|
|
|
source "arch/mips/jazz/Kconfig"
|
|
|
|
source "arch/mips/ite-boards/Kconfig"
|
|
|
|
source "arch/mips/lasat/Kconfig"
|
|
|
|
source "arch/mips/momentum/Kconfig"
|
|
|
|
source "arch/mips/pmc-sierra/Kconfig"
|
2005-02-07 01:27:14 +00:00
|
|
|
source "arch/mips/sgi-ip27/Kconfig"
|
2005-02-03 14:28:23 +00:00
|
|
|
source "arch/mips/sibyte/Kconfig"
|
2005-10-29 18:32:41 +00:00
|
|
|
source "arch/mips/tx4927/Kconfig"
|
2005-07-25 22:45:45 +00:00
|
|
|
source "arch/mips/tx4938/Kconfig"
|
2005-10-29 18:32:41 +00:00
|
|
|
source "arch/mips/vr41xx/Kconfig"
|
2005-07-14 17:47:57 +00:00
|
|
|
source "arch/mips/philips/pnx8550/common/Kconfig"
|
2006-02-12 17:10:25 +00:00
|
|
|
source "arch/mips/cobalt/Kconfig"
|
2005-02-03 14:28:23 +00:00
|
|
|
|
2005-10-29 18:32:41 +00:00
|
|
|
endmenu
|
|
|
|
|
2005-04-16 22:20:36 +00:00
|
|
|
config RWSEM_GENERIC_SPINLOCK
|
|
|
|
bool
|
|
|
|
default y
|
|
|
|
|
|
|
|
config RWSEM_XCHGADD_ALGORITHM
|
|
|
|
bool
|
|
|
|
|
[PATCH] bitops: mips: use generic bitops
- remove __{,test_and_}{set,clear,change}_bit() and test_bit()
- unless defined(CONFIG_CPU_MIPS32) or defined(CONFIG_CPU_MIPS64)
- remove __ffs()
- remove ffs()
- remove ffz()
- remove fls()
- remove fls64()
- remove find_{next,first}{,_zero}_bit()
- remove sched_find_first_bit()
- remove generic_hweight64()
- remove generic_hweight{32,16,8}()
- remove ext2_{set,clear,test,find_first_zero,find_next_zero}_bit()
- remove ext2_{set,clear}_bit_atomic()
- remove minix_{test,set,test_and_clear,test,find_first_zero}_bit()
Signed-off-by: Akinobu Mita <mita@miraclelinux.com>
Cc: Ralf Baechle <ralf@linux-mips.org>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-03-26 09:39:30 +00:00
|
|
|
config GENERIC_FIND_NEXT_BIT
|
|
|
|
bool
|
|
|
|
default y
|
|
|
|
|
|
|
|
config GENERIC_HWEIGHT
|
|
|
|
bool
|
|
|
|
default y
|
|
|
|
|
2005-04-16 22:20:36 +00:00
|
|
|
config GENERIC_CALIBRATE_DELAY
|
|
|
|
bool
|
|
|
|
default y
|
|
|
|
|
2006-04-04 04:11:45 +00:00
|
|
|
config SCHED_NO_NO_OMIT_FRAME_POINTER
|
|
|
|
bool
|
|
|
|
default y
|
|
|
|
|
2005-04-16 22:20:36 +00:00
|
|
|
#
|
|
|
|
# Select some configuration options automatically based on user selections.
|
|
|
|
#
|
|
|
|
config ARC
|
|
|
|
bool
|
|
|
|
|
2005-09-15 08:52:34 +00:00
|
|
|
config ARCH_MAY_HAVE_PC_FDC
|
|
|
|
bool
|
|
|
|
|
2005-09-03 22:56:19 +00:00
|
|
|
config DMA_COHERENT
|
2005-04-16 22:20:36 +00:00
|
|
|
bool
|
|
|
|
|
2005-09-03 22:56:19 +00:00
|
|
|
config DMA_IP27
|
2005-04-16 22:20:36 +00:00
|
|
|
bool
|
|
|
|
|
2005-09-03 22:56:19 +00:00
|
|
|
config DMA_IP32
|
|
|
|
bool
|
|
|
|
select DMA_NEED_PCI_MAP_STATE
|
|
|
|
|
|
|
|
config DMA_NONCOHERENT
|
|
|
|
bool
|
|
|
|
select DMA_NEED_PCI_MAP_STATE
|
|
|
|
|
|
|
|
config DMA_NEED_PCI_MAP_STATE
|
2005-04-16 22:20:36 +00:00
|
|
|
bool
|
|
|
|
|
2005-10-29 18:32:41 +00:00
|
|
|
config OWN_DMA
|
|
|
|
bool
|
|
|
|
|
2005-04-16 22:20:36 +00:00
|
|
|
config EARLY_PRINTK
|
|
|
|
bool
|
|
|
|
|
|
|
|
config GENERIC_ISA_DMA
|
|
|
|
bool
|
|
|
|
|
|
|
|
config I8259
|
|
|
|
bool
|
|
|
|
|
|
|
|
config LIMITED_DMA
|
|
|
|
bool
|
|
|
|
select HIGHMEM
|
2005-08-10 15:17:11 +00:00
|
|
|
select SYS_SUPPORTS_HIGHMEM
|
2005-04-16 22:20:36 +00:00
|
|
|
|
|
|
|
config MIPS_BONITO64
|
|
|
|
bool
|
|
|
|
|
|
|
|
config MIPS_MSC
|
|
|
|
bool
|
|
|
|
|
|
|
|
config MIPS_NILE4
|
|
|
|
bool
|
|
|
|
|
|
|
|
config MIPS_DISABLE_OBSOLETE_IDE
|
|
|
|
bool
|
|
|
|
|
2005-10-29 18:32:41 +00:00
|
|
|
#
|
|
|
|
# Endianess selection. Suffiently obscure so many users don't know what to
|
|
|
|
# answer,so we try hard to limit the available choices. Also the use of a
|
|
|
|
# choice statement should be more obvious to the user.
|
|
|
|
#
|
|
|
|
choice
|
|
|
|
prompt "Endianess selection"
|
2005-04-16 22:20:36 +00:00
|
|
|
help
|
|
|
|
Some MIPS machines can be configured for either little or big endian
|
2005-10-29 18:32:41 +00:00
|
|
|
byte order. These modes require different kernels and a different
|
|
|
|
Linux distribution. In general there is one prefered byteorder for a
|
|
|
|
particular system but some systems are just as commonly used in the
|
|
|
|
one or the other endianess.
|
|
|
|
|
|
|
|
config CPU_BIG_ENDIAN
|
|
|
|
bool "Big endian"
|
|
|
|
depends on SYS_SUPPORTS_BIG_ENDIAN
|
|
|
|
|
|
|
|
config CPU_LITTLE_ENDIAN
|
|
|
|
bool "Little endian"
|
|
|
|
depends on SYS_SUPPORTS_LITTLE_ENDIAN
|
|
|
|
help
|
|
|
|
|
|
|
|
endchoice
|
|
|
|
|
|
|
|
config SYS_SUPPORTS_BIG_ENDIAN
|
|
|
|
bool
|
|
|
|
|
|
|
|
config SYS_SUPPORTS_LITTLE_ENDIAN
|
|
|
|
bool
|
2005-04-16 22:20:36 +00:00
|
|
|
|
|
|
|
config IRQ_CPU
|
|
|
|
bool
|
|
|
|
|
|
|
|
config IRQ_CPU_RM7K
|
|
|
|
bool
|
|
|
|
|
2005-10-29 18:32:41 +00:00
|
|
|
config IRQ_CPU_RM9K
|
|
|
|
bool
|
|
|
|
|
2005-04-16 22:20:36 +00:00
|
|
|
config IRQ_MV64340
|
|
|
|
bool
|
|
|
|
|
|
|
|
config DDB5XXX_COMMON
|
|
|
|
bool
|
|
|
|
|
|
|
|
config MIPS_BOARDS_GEN
|
|
|
|
bool
|
|
|
|
|
|
|
|
config MIPS_GT64111
|
|
|
|
bool
|
|
|
|
|
|
|
|
config MIPS_GT64120
|
|
|
|
bool
|
|
|
|
|
|
|
|
config MIPS_TX3927
|
|
|
|
bool
|
|
|
|
select HAS_TXX9_SERIAL
|
|
|
|
|
|
|
|
config PCI_MARVELL
|
|
|
|
bool
|
|
|
|
|
|
|
|
config ITE_BOARD_GEN
|
|
|
|
bool
|
2005-10-29 18:32:41 +00:00
|
|
|
|
|
|
|
config SOC_AU1000
|
|
|
|
bool
|
|
|
|
select SOC_AU1X00
|
|
|
|
|
|
|
|
config SOC_AU1100
|
|
|
|
bool
|
|
|
|
select SOC_AU1X00
|
|
|
|
|
|
|
|
config SOC_AU1500
|
|
|
|
bool
|
|
|
|
select SOC_AU1X00
|
|
|
|
|
|
|
|
config SOC_AU1550
|
|
|
|
bool
|
|
|
|
select SOC_AU1X00
|
|
|
|
|
|
|
|
config SOC_AU1200
|
|
|
|
bool
|
|
|
|
select SOC_AU1X00
|
|
|
|
|
|
|
|
config SOC_AU1X00
|
|
|
|
bool
|
2005-10-20 21:33:09 +00:00
|
|
|
select SYS_HAS_CPU_MIPS32_R1
|
2005-10-29 18:32:41 +00:00
|
|
|
select SYS_SUPPORTS_32BIT_KERNEL
|
2005-04-16 22:20:36 +00:00
|
|
|
|
2005-07-14 17:47:57 +00:00
|
|
|
config PNX8550
|
|
|
|
bool
|
|
|
|
select SOC_PNX8550
|
|
|
|
|
|
|
|
config SOC_PNX8550
|
|
|
|
bool
|
|
|
|
select DMA_NONCOHERENT
|
|
|
|
select HW_HAS_PCI
|
2005-10-31 13:08:37 +00:00
|
|
|
select SYS_HAS_CPU_MIPS32_R1
|
2005-10-20 21:33:09 +00:00
|
|
|
select SYS_SUPPORTS_32BIT_KERNEL
|
2005-07-14 17:47:57 +00:00
|
|
|
|
2005-04-16 22:20:36 +00:00
|
|
|
config SWAP_IO_SPACE
|
|
|
|
bool
|
|
|
|
|
|
|
|
#
|
|
|
|
# Unfortunately not all GT64120 systems run the chip at the same clock.
|
|
|
|
# As the user for the clock rate and try to minimize the available options.
|
|
|
|
#
|
|
|
|
choice
|
|
|
|
prompt "Galileo Chip Clock"
|
|
|
|
#default SYSCLK_83 if MIPS_EV64120
|
|
|
|
depends on MIPS_EV64120 || MOMENCO_OCELOT || MOMENCO_OCELOT_G
|
|
|
|
default SYSCLK_83 if MIPS_EV64120
|
|
|
|
default SYSCLK_100 if MOMENCO_OCELOT || MOMENCO_OCELOT_G
|
|
|
|
|
|
|
|
config SYSCLK_75
|
|
|
|
bool "75" if MIPS_EV64120
|
|
|
|
|
|
|
|
config SYSCLK_83
|
|
|
|
bool "83.3" if MIPS_EV64120
|
|
|
|
|
|
|
|
config SYSCLK_100
|
|
|
|
bool "100" if MIPS_EV64120 || MOMENCO_OCELOT || MOMENCO_OCELOT_G
|
|
|
|
|
|
|
|
endchoice
|
|
|
|
|
2005-10-29 18:32:41 +00:00
|
|
|
config ARC32
|
|
|
|
bool
|
|
|
|
|
2005-04-16 22:20:36 +00:00
|
|
|
config AU1X00_USB_DEVICE
|
|
|
|
bool
|
|
|
|
depends on MIPS_PB1500 || MIPS_PB1100 || MIPS_PB1000
|
|
|
|
default n
|
|
|
|
|
|
|
|
config MIPS_GT96100
|
|
|
|
bool
|
2005-10-29 18:32:41 +00:00
|
|
|
select MIPS_GT64120
|
2005-04-16 22:20:36 +00:00
|
|
|
|
|
|
|
config IT8172_CIR
|
|
|
|
bool
|
|
|
|
depends on MIPS_ITE8172 || MIPS_IVR
|
|
|
|
default y
|
|
|
|
|
|
|
|
config IT8712
|
|
|
|
bool
|
|
|
|
depends on MIPS_ITE8172
|
|
|
|
default y
|
|
|
|
|
|
|
|
config BOOT_ELF32
|
|
|
|
bool
|
|
|
|
|
|
|
|
config MIPS_L1_CACHE_SHIFT
|
|
|
|
int
|
|
|
|
default "4" if MACH_DECSTATION
|
|
|
|
default "7" if SGI_IP27
|
|
|
|
default "5"
|
|
|
|
|
|
|
|
config HAVE_STD_PC_SERIAL_PORT
|
|
|
|
bool
|
|
|
|
|
|
|
|
config ARC_CONSOLE
|
|
|
|
bool "ARC console support"
|
|
|
|
depends on SGI_IP22 || SNI_RM200_PCI
|
|
|
|
|
|
|
|
config ARC_MEMORY
|
|
|
|
bool
|
|
|
|
depends on MACH_JAZZ || SNI_RM200_PCI || SGI_IP32
|
|
|
|
default y
|
|
|
|
|
|
|
|
config ARC_PROMLIB
|
|
|
|
bool
|
|
|
|
depends on MACH_JAZZ || SNI_RM200_PCI || SGI_IP22 || SGI_IP32
|
|
|
|
default y
|
|
|
|
|
|
|
|
config ARC64
|
|
|
|
bool
|
|
|
|
|
|
|
|
config BOOT_ELF64
|
|
|
|
bool
|
|
|
|
|
|
|
|
config TOSHIBA_BOARDS
|
|
|
|
bool
|
|
|
|
|
|
|
|
menu "CPU selection"
|
|
|
|
|
|
|
|
choice
|
|
|
|
prompt "CPU type"
|
|
|
|
default CPU_R4X00
|
|
|
|
|
2005-07-06 12:08:11 +00:00
|
|
|
config CPU_MIPS32_R1
|
|
|
|
bool "MIPS32 Release 1"
|
2005-10-20 21:33:09 +00:00
|
|
|
depends on SYS_HAS_CPU_MIPS32_R1
|
2006-04-24 13:58:53 +00:00
|
|
|
select CPU_HAS_LLSC
|
2005-07-06 12:08:11 +00:00
|
|
|
select CPU_HAS_PREFETCH
|
2005-08-10 15:17:11 +00:00
|
|
|
select CPU_SUPPORTS_32BIT_KERNEL
|
2006-03-05 00:45:33 +00:00
|
|
|
select CPU_SUPPORTS_HIGHMEM
|
2005-07-12 14:51:22 +00:00
|
|
|
help
|
2005-10-29 18:32:41 +00:00
|
|
|
Choose this option to build a kernel for release 1 or later of the
|
2005-07-12 14:51:22 +00:00
|
|
|
MIPS32 architecture. Most modern embedded systems with a 32-bit
|
|
|
|
MIPS processor are based on a MIPS32 processor. If you know the
|
|
|
|
specific type of processor in your system, choose those that one
|
|
|
|
otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system.
|
|
|
|
Release 2 of the MIPS32 architecture is available since several
|
|
|
|
years so chances are you even have a MIPS32 Release 2 processor
|
|
|
|
in which case you should choose CPU_MIPS32_R2 instead for better
|
|
|
|
performance.
|
|
|
|
|
|
|
|
config CPU_MIPS32_R2
|
|
|
|
bool "MIPS32 Release 2"
|
2005-10-20 21:33:09 +00:00
|
|
|
depends on SYS_HAS_CPU_MIPS32_R2
|
2006-04-24 13:58:53 +00:00
|
|
|
select CPU_HAS_LLSC
|
2005-07-12 14:51:22 +00:00
|
|
|
select CPU_HAS_PREFETCH
|
2005-08-10 15:17:11 +00:00
|
|
|
select CPU_SUPPORTS_32BIT_KERNEL
|
2006-03-05 00:45:33 +00:00
|
|
|
select CPU_SUPPORTS_HIGHMEM
|
2005-07-06 12:08:11 +00:00
|
|
|
help
|
2005-10-29 18:32:41 +00:00
|
|
|
Choose this option to build a kernel for release 2 or later of the
|
2005-07-06 12:08:11 +00:00
|
|
|
MIPS32 architecture. Most modern embedded systems with a 32-bit
|
|
|
|
MIPS processor are based on a MIPS32 processor. If you know the
|
|
|
|
specific type of processor in your system, choose those that one
|
|
|
|
otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system.
|
|
|
|
|
|
|
|
config CPU_MIPS64_R1
|
|
|
|
bool "MIPS64 Release 1"
|
2005-10-20 21:33:09 +00:00
|
|
|
depends on SYS_HAS_CPU_MIPS64_R1
|
2006-04-24 13:58:53 +00:00
|
|
|
select CPU_HAS_LLSC
|
2005-08-10 15:17:11 +00:00
|
|
|
select CPU_HAS_PREFETCH
|
2005-09-03 22:56:21 +00:00
|
|
|
select CPU_SUPPORTS_32BIT_KERNEL
|
|
|
|
select CPU_SUPPORTS_64BIT_KERNEL
|
2006-03-05 00:45:33 +00:00
|
|
|
select CPU_SUPPORTS_HIGHMEM
|
2005-07-06 12:08:11 +00:00
|
|
|
help
|
|
|
|
Choose this option to build a kernel for release 1 or later of the
|
|
|
|
MIPS64 architecture. Many modern embedded systems with a 64-bit
|
|
|
|
MIPS processor are based on a MIPS64 processor. If you know the
|
|
|
|
specific type of processor in your system, choose those that one
|
|
|
|
otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system.
|
2005-07-12 14:51:22 +00:00
|
|
|
Release 2 of the MIPS64 architecture is available since several
|
|
|
|
years so chances are you even have a MIPS64 Release 2 processor
|
|
|
|
in which case you should choose CPU_MIPS64_R2 instead for better
|
|
|
|
performance.
|
|
|
|
|
|
|
|
config CPU_MIPS64_R2
|
|
|
|
bool "MIPS64 Release 2"
|
2005-10-20 21:33:09 +00:00
|
|
|
depends on SYS_HAS_CPU_MIPS64_R2
|
2006-04-24 13:58:53 +00:00
|
|
|
select CPU_HAS_LLSC
|
2005-08-10 15:17:11 +00:00
|
|
|
select CPU_HAS_PREFETCH
|
2005-07-12 14:51:22 +00:00
|
|
|
select CPU_SUPPORTS_32BIT_KERNEL
|
|
|
|
select CPU_SUPPORTS_64BIT_KERNEL
|
2006-03-05 00:45:33 +00:00
|
|
|
select CPU_SUPPORTS_HIGHMEM
|
2005-07-12 14:51:22 +00:00
|
|
|
help
|
|
|
|
Choose this option to build a kernel for release 2 or later of the
|
|
|
|
MIPS64 architecture. Many modern embedded systems with a 64-bit
|
|
|
|
MIPS processor are based on a MIPS64 processor. If you know the
|
|
|
|
specific type of processor in your system, choose those that one
|
|
|
|
otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system.
|
2005-04-16 22:20:36 +00:00
|
|
|
|
|
|
|
config CPU_R3000
|
|
|
|
bool "R3000"
|
2005-10-20 21:33:09 +00:00
|
|
|
depends on SYS_HAS_CPU_R3000
|
2006-04-24 13:58:53 +00:00
|
|
|
select CPU_HAS_WB
|
2005-09-03 22:56:21 +00:00
|
|
|
select CPU_SUPPORTS_32BIT_KERNEL
|
2005-08-10 15:17:11 +00:00
|
|
|
select CPU_SUPPORTS_HIGHMEM
|
2005-04-16 22:20:36 +00:00
|
|
|
help
|
|
|
|
Please make sure to pick the right CPU type. Linux/MIPS is not
|
|
|
|
designed to be generic, i.e. Kernels compiled for R3000 CPUs will
|
|
|
|
*not* work on R4000 machines and vice versa. However, since most
|
|
|
|
of the supported machines have an R4000 (or similar) CPU, R4x00
|
|
|
|
might be a safe bet. If the resulting kernel does not work,
|
|
|
|
try to recompile with R3000.
|
|
|
|
|
|
|
|
config CPU_TX39XX
|
|
|
|
bool "R39XX"
|
2005-10-20 21:33:09 +00:00
|
|
|
depends on SYS_HAS_CPU_TX39XX
|
2005-09-03 22:56:21 +00:00
|
|
|
select CPU_SUPPORTS_32BIT_KERNEL
|
2005-04-16 22:20:36 +00:00
|
|
|
|
|
|
|
config CPU_VR41XX
|
|
|
|
bool "R41xx"
|
2005-10-20 21:33:09 +00:00
|
|
|
depends on SYS_HAS_CPU_VR41XX
|
2005-09-03 22:56:21 +00:00
|
|
|
select CPU_SUPPORTS_32BIT_KERNEL
|
|
|
|
select CPU_SUPPORTS_64BIT_KERNEL
|
2005-04-16 22:20:36 +00:00
|
|
|
help
|
2005-10-29 18:32:41 +00:00
|
|
|
The options selects support for the NEC VR4100 series of processors.
|
2005-04-16 22:20:36 +00:00
|
|
|
Only choose this option if you have one of these processors as a
|
|
|
|
kernel built with this option will not run on any other type of
|
|
|
|
processor or vice versa.
|
|
|
|
|
|
|
|
config CPU_R4300
|
|
|
|
bool "R4300"
|
2005-10-20 21:33:09 +00:00
|
|
|
depends on SYS_HAS_CPU_R4300
|
2006-04-24 13:58:53 +00:00
|
|
|
select CPU_HAS_LLSC
|
2005-09-03 22:56:21 +00:00
|
|
|
select CPU_SUPPORTS_32BIT_KERNEL
|
|
|
|
select CPU_SUPPORTS_64BIT_KERNEL
|
2005-04-16 22:20:36 +00:00
|
|
|
help
|
|
|
|
MIPS Technologies R4300-series processors.
|
|
|
|
|
|
|
|
config CPU_R4X00
|
|
|
|
bool "R4x00"
|
2005-10-20 21:33:09 +00:00
|
|
|
depends on SYS_HAS_CPU_R4X00
|
2006-04-24 13:58:53 +00:00
|
|
|
select CPU_HAS_LLSC
|
2005-09-03 22:56:21 +00:00
|
|
|
select CPU_SUPPORTS_32BIT_KERNEL
|
|
|
|
select CPU_SUPPORTS_64BIT_KERNEL
|
2005-04-16 22:20:36 +00:00
|
|
|
help
|
|
|
|
MIPS Technologies R4000-series processors other than 4300, including
|
|
|
|
the R4000, R4400, R4600, and 4700.
|
|
|
|
|
|
|
|
config CPU_TX49XX
|
|
|
|
bool "R49XX"
|
2005-10-20 21:33:09 +00:00
|
|
|
depends on SYS_HAS_CPU_TX49XX
|
2006-04-24 13:58:53 +00:00
|
|
|
select CPU_HAS_LLSC
|
2006-03-17 03:59:22 +00:00
|
|
|
select CPU_HAS_PREFETCH
|
2005-09-03 22:56:21 +00:00
|
|
|
select CPU_SUPPORTS_32BIT_KERNEL
|
|
|
|
select CPU_SUPPORTS_64BIT_KERNEL
|
2005-04-16 22:20:36 +00:00
|
|
|
|
|
|
|
config CPU_R5000
|
|
|
|
bool "R5000"
|
2005-10-20 21:33:09 +00:00
|
|
|
depends on SYS_HAS_CPU_R5000
|
2006-04-24 13:58:53 +00:00
|
|
|
select CPU_HAS_LLSC
|
2005-09-03 22:56:21 +00:00
|
|
|
select CPU_SUPPORTS_32BIT_KERNEL
|
|
|
|
select CPU_SUPPORTS_64BIT_KERNEL
|
2005-04-16 22:20:36 +00:00
|
|
|
help
|
|
|
|
MIPS Technologies R5000-series processors other than the Nevada.
|
|
|
|
|
|
|
|
config CPU_R5432
|
|
|
|
bool "R5432"
|
2005-10-20 21:33:09 +00:00
|
|
|
depends on SYS_HAS_CPU_R5432
|
2006-04-24 13:58:53 +00:00
|
|
|
select CPU_HAS_LLSC
|
2005-10-29 18:32:41 +00:00
|
|
|
select CPU_SUPPORTS_32BIT_KERNEL
|
|
|
|
select CPU_SUPPORTS_64BIT_KERNEL
|
2005-04-16 22:20:36 +00:00
|
|
|
|
|
|
|
config CPU_R6000
|
|
|
|
bool "R6000"
|
2005-09-03 22:56:21 +00:00
|
|
|
depends on EXPERIMENTAL
|
2006-04-24 13:58:53 +00:00
|
|
|
select CPU_HAS_LLSC
|
2005-10-20 21:33:09 +00:00
|
|
|
depends on SYS_HAS_CPU_R6000
|
2005-09-03 22:56:21 +00:00
|
|
|
select CPU_SUPPORTS_32BIT_KERNEL
|
2005-04-16 22:20:36 +00:00
|
|
|
help
|
|
|
|
MIPS Technologies R6000 and R6000A series processors. Note these
|
|
|
|
processors are extremly rare and the support for them is incomplete.
|
|
|
|
|
|
|
|
config CPU_NEVADA
|
|
|
|
bool "RM52xx"
|
2005-10-20 21:33:09 +00:00
|
|
|
depends on SYS_HAS_CPU_NEVADA
|
2006-04-24 13:58:53 +00:00
|
|
|
select CPU_HAS_LLSC
|
2005-09-03 22:56:21 +00:00
|
|
|
select CPU_SUPPORTS_32BIT_KERNEL
|
|
|
|
select CPU_SUPPORTS_64BIT_KERNEL
|
2005-04-16 22:20:36 +00:00
|
|
|
help
|
|
|
|
QED / PMC-Sierra RM52xx-series ("Nevada") processors.
|
|
|
|
|
|
|
|
config CPU_R8000
|
|
|
|
bool "R8000"
|
2005-09-03 22:56:21 +00:00
|
|
|
depends on EXPERIMENTAL
|
2005-10-20 21:33:09 +00:00
|
|
|
depends on SYS_HAS_CPU_R8000
|
2006-04-24 13:58:53 +00:00
|
|
|
select CPU_HAS_LLSC
|
2005-10-29 18:32:41 +00:00
|
|
|
select CPU_HAS_PREFETCH
|
2005-09-03 22:56:21 +00:00
|
|
|
select CPU_SUPPORTS_64BIT_KERNEL
|
2005-04-16 22:20:36 +00:00
|
|
|
help
|
|
|
|
MIPS Technologies R8000 processors. Note these processors are
|
|
|
|
uncommon and the support for them is incomplete.
|
|
|
|
|
|
|
|
config CPU_R10000
|
|
|
|
bool "R10000"
|
2005-10-20 21:33:09 +00:00
|
|
|
depends on SYS_HAS_CPU_R10000
|
2006-04-24 13:58:53 +00:00
|
|
|
select CPU_HAS_LLSC
|
2005-10-29 18:32:41 +00:00
|
|
|
select CPU_HAS_PREFETCH
|
2005-09-03 22:56:21 +00:00
|
|
|
select CPU_SUPPORTS_32BIT_KERNEL
|
|
|
|
select CPU_SUPPORTS_64BIT_KERNEL
|
2005-08-10 15:17:11 +00:00
|
|
|
select CPU_SUPPORTS_HIGHMEM
|
2005-04-16 22:20:36 +00:00
|
|
|
help
|
|
|
|
MIPS Technologies R10000-series processors.
|
|
|
|
|
|
|
|
config CPU_RM7000
|
|
|
|
bool "RM7000"
|
2005-10-20 21:33:09 +00:00
|
|
|
depends on SYS_HAS_CPU_RM7000
|
2006-04-24 13:58:53 +00:00
|
|
|
select CPU_HAS_LLSC
|
2005-10-29 18:32:41 +00:00
|
|
|
select CPU_HAS_PREFETCH
|
2005-09-03 22:56:21 +00:00
|
|
|
select CPU_SUPPORTS_32BIT_KERNEL
|
|
|
|
select CPU_SUPPORTS_64BIT_KERNEL
|
2005-08-10 15:17:11 +00:00
|
|
|
select CPU_SUPPORTS_HIGHMEM
|
2005-04-16 22:20:36 +00:00
|
|
|
|
|
|
|
config CPU_RM9000
|
|
|
|
bool "RM9000"
|
2005-10-20 21:33:09 +00:00
|
|
|
depends on SYS_HAS_CPU_RM9000
|
2006-04-24 13:58:53 +00:00
|
|
|
select CPU_HAS_LLSC
|
2005-10-29 18:32:41 +00:00
|
|
|
select CPU_HAS_PREFETCH
|
2005-09-03 22:56:21 +00:00
|
|
|
select CPU_SUPPORTS_32BIT_KERNEL
|
|
|
|
select CPU_SUPPORTS_64BIT_KERNEL
|
2005-08-10 15:17:11 +00:00
|
|
|
select CPU_SUPPORTS_HIGHMEM
|
2005-04-16 22:20:36 +00:00
|
|
|
|
|
|
|
config CPU_SB1
|
|
|
|
bool "SB1"
|
2005-10-20 21:33:09 +00:00
|
|
|
depends on SYS_HAS_CPU_SB1
|
2006-04-24 13:58:53 +00:00
|
|
|
select CPU_HAS_LLSC
|
2005-09-03 22:56:21 +00:00
|
|
|
select CPU_SUPPORTS_32BIT_KERNEL
|
|
|
|
select CPU_SUPPORTS_64BIT_KERNEL
|
2005-08-10 15:17:11 +00:00
|
|
|
select CPU_SUPPORTS_HIGHMEM
|
2005-04-16 22:20:36 +00:00
|
|
|
|
|
|
|
endchoice
|
|
|
|
|
2005-10-20 21:33:09 +00:00
|
|
|
config SYS_HAS_CPU_MIPS32_R1
|
|
|
|
bool
|
|
|
|
|
|
|
|
config SYS_HAS_CPU_MIPS32_R2
|
|
|
|
bool
|
|
|
|
|
|
|
|
config SYS_HAS_CPU_MIPS64_R1
|
|
|
|
bool
|
|
|
|
|
|
|
|
config SYS_HAS_CPU_MIPS64_R2
|
|
|
|
bool
|
|
|
|
|
|
|
|
config SYS_HAS_CPU_R3000
|
|
|
|
bool
|
|
|
|
|
|
|
|
config SYS_HAS_CPU_TX39XX
|
|
|
|
bool
|
|
|
|
|
|
|
|
config SYS_HAS_CPU_VR41XX
|
|
|
|
bool
|
|
|
|
|
|
|
|
config SYS_HAS_CPU_R4300
|
|
|
|
bool
|
|
|
|
|
|
|
|
config SYS_HAS_CPU_R4X00
|
|
|
|
bool
|
|
|
|
|
|
|
|
config SYS_HAS_CPU_TX49XX
|
|
|
|
bool
|
|
|
|
|
|
|
|
config SYS_HAS_CPU_R5000
|
|
|
|
bool
|
|
|
|
|
|
|
|
config SYS_HAS_CPU_R5432
|
|
|
|
bool
|
|
|
|
|
|
|
|
config SYS_HAS_CPU_R6000
|
|
|
|
bool
|
|
|
|
|
|
|
|
config SYS_HAS_CPU_NEVADA
|
|
|
|
bool
|
|
|
|
|
|
|
|
config SYS_HAS_CPU_R8000
|
|
|
|
bool
|
|
|
|
|
|
|
|
config SYS_HAS_CPU_R10000
|
|
|
|
bool
|
|
|
|
|
|
|
|
config SYS_HAS_CPU_RM7000
|
|
|
|
bool
|
|
|
|
|
|
|
|
config SYS_HAS_CPU_RM9000
|
|
|
|
bool
|
|
|
|
|
|
|
|
config SYS_HAS_CPU_SB1
|
|
|
|
bool
|
|
|
|
|
2005-10-29 18:32:41 +00:00
|
|
|
endmenu
|
|
|
|
|
|
|
|
#
|
|
|
|
# These two indicate any levelof the MIPS32 and MIPS64 architecture
|
|
|
|
#
|
|
|
|
config CPU_MIPS32
|
|
|
|
bool
|
|
|
|
default y if CPU_MIPS32_R1 || CPU_MIPS32_R2
|
|
|
|
|
|
|
|
config CPU_MIPS64
|
|
|
|
bool
|
|
|
|
default y if CPU_MIPS64_R1 || CPU_MIPS64_R2
|
|
|
|
|
|
|
|
#
|
|
|
|
# These two indicate the revision of the architecture, either 32 bot 64 bit.
|
|
|
|
#
|
|
|
|
config CPU_MIPSR1
|
|
|
|
bool
|
|
|
|
default y if CPU_MIPS32_R1 || CPU_MIPS64_R1
|
|
|
|
|
|
|
|
config CPU_MIPSR2
|
|
|
|
bool
|
|
|
|
default y if CPU_MIPS32_R2 || CPU_MIPS64_R2
|
|
|
|
|
|
|
|
config SYS_SUPPORTS_32BIT_KERNEL
|
|
|
|
bool
|
|
|
|
config SYS_SUPPORTS_64BIT_KERNEL
|
|
|
|
bool
|
|
|
|
config CPU_SUPPORTS_32BIT_KERNEL
|
|
|
|
bool
|
|
|
|
config CPU_SUPPORTS_64BIT_KERNEL
|
|
|
|
bool
|
|
|
|
|
|
|
|
menu "Kernel type"
|
|
|
|
|
|
|
|
choice
|
|
|
|
|
|
|
|
prompt "Kernel code model"
|
|
|
|
help
|
|
|
|
You should only select this option if you have a workload that
|
|
|
|
actually benefits from 64-bit processing or if your machine has
|
|
|
|
large memory. You will only be presented a single option in this
|
|
|
|
menu if your system does not support both 32-bit and 64-bit kernels.
|
|
|
|
|
|
|
|
config 32BIT
|
|
|
|
bool "32-bit kernel"
|
|
|
|
depends on CPU_SUPPORTS_32BIT_KERNEL && SYS_SUPPORTS_32BIT_KERNEL
|
|
|
|
select TRAD_SIGNALS
|
|
|
|
help
|
|
|
|
Select this option if you want to build a 32-bit kernel.
|
|
|
|
config 64BIT
|
|
|
|
bool "64-bit kernel"
|
|
|
|
depends on CPU_SUPPORTS_64BIT_KERNEL && SYS_SUPPORTS_64BIT_KERNEL
|
|
|
|
help
|
|
|
|
Select this option if you want to build a 64-bit kernel.
|
|
|
|
|
|
|
|
endchoice
|
|
|
|
|
2005-04-16 22:20:36 +00:00
|
|
|
choice
|
|
|
|
prompt "Kernel page size"
|
|
|
|
default PAGE_SIZE_4KB
|
|
|
|
|
|
|
|
config PAGE_SIZE_4KB
|
|
|
|
bool "4kB"
|
|
|
|
help
|
|
|
|
This option select the standard 4kB Linux page size. On some
|
|
|
|
R3000-family processors this is the only available page size. Using
|
|
|
|
4kB page size will minimize memory consumption and is therefore
|
|
|
|
recommended for low memory systems.
|
|
|
|
|
|
|
|
config PAGE_SIZE_8KB
|
|
|
|
bool "8kB"
|
|
|
|
depends on EXPERIMENTAL && CPU_R8000
|
|
|
|
help
|
|
|
|
Using 8kB page size will result in higher performance kernel at
|
|
|
|
the price of higher memory consumption. This option is available
|
|
|
|
only on the R8000 processor. Not that at the time of this writing
|
|
|
|
this option is still high experimental; there are also issues with
|
|
|
|
compatibility of user applications.
|
|
|
|
|
|
|
|
config PAGE_SIZE_16KB
|
|
|
|
bool "16kB"
|
2006-05-17 13:04:30 +00:00
|
|
|
depends on !CPU_R3000 && !CPU_TX39XX
|
2005-04-16 22:20:36 +00:00
|
|
|
help
|
|
|
|
Using 16kB page size will result in higher performance kernel at
|
|
|
|
the price of higher memory consumption. This option is available on
|
2006-05-17 13:04:30 +00:00
|
|
|
all non-R3000 family processors. Note that you will need a suitable
|
|
|
|
Linux distribution to support this.
|
2005-04-16 22:20:36 +00:00
|
|
|
|
|
|
|
config PAGE_SIZE_64KB
|
|
|
|
bool "64kB"
|
|
|
|
depends on EXPERIMENTAL && !CPU_R3000 && !CPU_TX39XX
|
|
|
|
help
|
|
|
|
Using 64kB page size will result in higher performance kernel at
|
|
|
|
the price of higher memory consumption. This option is available on
|
|
|
|
all non-R3000 family processor. Not that at the time of this
|
2006-05-17 13:04:30 +00:00
|
|
|
writing this option is still high experimental.
|
2005-04-16 22:20:36 +00:00
|
|
|
|
|
|
|
endchoice
|
|
|
|
|
|
|
|
config BOARD_SCACHE
|
|
|
|
bool
|
|
|
|
|
|
|
|
config IP22_CPU_SCACHE
|
|
|
|
bool
|
|
|
|
select BOARD_SCACHE
|
|
|
|
|
|
|
|
config R5000_CPU_SCACHE
|
|
|
|
bool
|
|
|
|
select BOARD_SCACHE
|
|
|
|
|
|
|
|
config RM7000_CPU_SCACHE
|
|
|
|
bool
|
|
|
|
select BOARD_SCACHE
|
|
|
|
|
|
|
|
config SIBYTE_DMA_PAGEOPS
|
|
|
|
bool "Use DMA to clear/copy pages"
|
|
|
|
depends on CPU_SB1
|
|
|
|
help
|
|
|
|
Instead of using the CPU to zero and copy pages, use a Data Mover
|
|
|
|
channel. These DMA channels are otherwise unused by the standard
|
|
|
|
SiByte Linux port. Seems to give a small performance benefit.
|
|
|
|
|
|
|
|
config CPU_HAS_PREFETCH
|
2005-08-05 14:28:54 +00:00
|
|
|
bool
|
2005-04-16 22:20:36 +00:00
|
|
|
|
2005-07-14 15:57:16 +00:00
|
|
|
config MIPS_MT
|
|
|
|
bool "Enable MIPS MT"
|
|
|
|
|
2005-08-17 17:44:08 +00:00
|
|
|
choice
|
|
|
|
prompt "MIPS MT options"
|
|
|
|
depends on MIPS_MT
|
|
|
|
|
2006-04-05 08:45:45 +00:00
|
|
|
config MIPS_MT_SMTC
|
|
|
|
bool "SMTC: Use all TCs on all VPEs for SMP"
|
2006-04-24 13:58:53 +00:00
|
|
|
select CPU_MIPSR2_IRQ_VI
|
|
|
|
select CPU_MIPSR2_SRS
|
2006-04-05 08:45:45 +00:00
|
|
|
select SMP
|
|
|
|
|
2005-08-17 17:44:08 +00:00
|
|
|
config MIPS_MT_SMP
|
|
|
|
bool "Use 1 TC on each available VPE for SMP"
|
|
|
|
select SMP
|
|
|
|
|
2005-07-14 15:57:16 +00:00
|
|
|
config MIPS_VPE_LOADER
|
|
|
|
bool "VPE loader support."
|
|
|
|
depends on MIPS_MT
|
|
|
|
help
|
|
|
|
Includes a loader for loading an elf relocatable object
|
|
|
|
onto another VPE and running it.
|
|
|
|
|
2005-08-17 17:44:08 +00:00
|
|
|
endchoice
|
|
|
|
|
2006-04-05 08:45:47 +00:00
|
|
|
config MIPS_MT_FPAFF
|
|
|
|
bool "Dynamic FPU affinity for FP-intensive threads"
|
|
|
|
depends on MIPS_MT
|
|
|
|
default y
|
|
|
|
|
2005-07-14 15:57:16 +00:00
|
|
|
config MIPS_VPE_LOADER_TOM
|
|
|
|
bool "Load VPE program into memory hidden from linux"
|
|
|
|
depends on MIPS_VPE_LOADER
|
|
|
|
default y
|
|
|
|
help
|
|
|
|
The loader can use memory that is present but has been hidden from
|
|
|
|
Linux using the kernel command line option "mem=xxMB". It's up to
|
|
|
|
you to ensure the amount you put in the option and the space your
|
|
|
|
program requires is less or equal to the amount physically present.
|
|
|
|
|
|
|
|
# this should possibly be in drivers/char, but it is rather cpu related. Hmmm
|
|
|
|
config MIPS_VPE_APSP_API
|
2005-10-29 18:32:41 +00:00
|
|
|
bool "Enable support for AP/SP API (RTLX)"
|
|
|
|
depends on MIPS_VPE_LOADER
|
|
|
|
help
|
2005-07-14 15:57:16 +00:00
|
|
|
|
2006-04-05 08:45:45 +00:00
|
|
|
config MIPS_APSP_KSPD
|
|
|
|
bool "Enable KSPD"
|
|
|
|
depends on MIPS_VPE_APSP_API
|
|
|
|
default y
|
|
|
|
help
|
|
|
|
KSPD is a kernel daemon that accepts syscall requests from the SP
|
|
|
|
side, actions them and returns the results. It also handles the
|
|
|
|
"exit" syscall notifying other kernel modules the SP program is
|
|
|
|
exiting. You probably want to say yes here.
|
|
|
|
|
2005-04-16 22:20:36 +00:00
|
|
|
config SB1_PASS_1_WORKAROUNDS
|
|
|
|
bool
|
|
|
|
depends on CPU_SB1_PASS_1
|
|
|
|
default y
|
|
|
|
|
|
|
|
config SB1_PASS_2_WORKAROUNDS
|
|
|
|
bool
|
|
|
|
depends on CPU_SB1 && (CPU_SB1_PASS_2_2 || CPU_SB1_PASS_2)
|
|
|
|
default y
|
|
|
|
|
|
|
|
config SB1_PASS_2_1_WORKAROUNDS
|
|
|
|
bool
|
|
|
|
depends on CPU_SB1 && CPU_SB1_PASS_2
|
|
|
|
default y
|
|
|
|
|
|
|
|
config 64BIT_PHYS_ADDR
|
|
|
|
bool "Support for 64-bit physical address space"
|
2005-12-23 01:16:44 +00:00
|
|
|
depends on (CPU_R4X00 || CPU_R5000 || CPU_RM7000 || CPU_RM9000 || CPU_R10000 || CPU_SB1 || CPU_MIPS32 || CPU_MIPS64) && 32BIT
|
2005-04-16 22:20:36 +00:00
|
|
|
|
|
|
|
config CPU_HAS_LLSC
|
2006-04-24 13:58:53 +00:00
|
|
|
bool
|
2005-04-16 22:20:36 +00:00
|
|
|
|
|
|
|
config CPU_HAS_WB
|
2006-04-24 13:58:53 +00:00
|
|
|
bool
|
2005-07-14 15:57:16 +00:00
|
|
|
|
|
|
|
config CPU_MIPSR2_IRQ_VI
|
|
|
|
bool "Vectored interrupt mode"
|
2006-04-24 13:58:53 +00:00
|
|
|
depends on CPU_MIPSR2
|
2005-07-14 15:57:16 +00:00
|
|
|
help
|
|
|
|
Vectored interrupt mode allowing faster dispatching of interrupts.
|
|
|
|
The board support code needs to be written to take advantage of this
|
|
|
|
mode. Compatibility code is included to allow the kernel to run on
|
|
|
|
a CPU that does not support vectored interrupts. It's safe to
|
|
|
|
say Y here.
|
|
|
|
|
|
|
|
config CPU_MIPSR2_IRQ_EI
|
|
|
|
bool "External interrupt controller mode"
|
2006-04-24 13:58:53 +00:00
|
|
|
depends on CPU_MIPSR2
|
2005-07-14 15:57:16 +00:00
|
|
|
help
|
|
|
|
Extended interrupt mode takes advantage of an external interrupt
|
|
|
|
controller to allow fast dispatching from many possible interrupt
|
|
|
|
sources. Say N unless you know that external interrupt support is
|
|
|
|
required.
|
|
|
|
|
|
|
|
config CPU_MIPSR2_SRS
|
|
|
|
bool "Make shadow set registers available for interrupt handlers"
|
|
|
|
depends on CPU_MIPSR2_IRQ_VI || CPU_MIPSR2_IRQ_EI
|
|
|
|
help
|
|
|
|
Allow the kernel to use shadow register sets for fast interrupts.
|
|
|
|
Interrupt handlers must be specially written to use shadow sets.
|
|
|
|
Say N unless you know that shadow register set upport is needed.
|
|
|
|
|
2005-04-16 22:20:36 +00:00
|
|
|
config CPU_HAS_SYNC
|
|
|
|
bool
|
|
|
|
depends on !CPU_R3000
|
|
|
|
default y
|
|
|
|
|
2005-08-10 15:17:11 +00:00
|
|
|
#
|
|
|
|
# Use the generic interrupt handling code in kernel/irq/:
|
|
|
|
#
|
|
|
|
config GENERIC_HARDIRQS
|
|
|
|
bool
|
|
|
|
default y
|
|
|
|
|
|
|
|
config GENERIC_IRQ_PROBE
|
|
|
|
bool
|
|
|
|
default y
|
|
|
|
|
2005-04-16 22:20:36 +00:00
|
|
|
#
|
|
|
|
# - Highmem only makes sense for the 32-bit kernel.
|
|
|
|
# - The current highmem code will only work properly on physically indexed
|
|
|
|
# caches such as R3000, SB1, R7000 or those that look like they're virtually
|
|
|
|
# indexed such as R4000/R4400 SC and MC versions or R10000. So for the
|
|
|
|
# moment we protect the user and offer the highmem option only on machines
|
|
|
|
# where it's known to be safe. This will not offer highmem on a few systems
|
|
|
|
# such as MIPS32 and MIPS64 CPUs which may have virtual and physically
|
|
|
|
# indexed CPUs but we're playing safe.
|
2005-08-10 15:17:11 +00:00
|
|
|
# - We use SYS_SUPPORTS_HIGHMEM to offer highmem only for systems where we
|
|
|
|
# know they might have memory configurations that could make use of highmem
|
|
|
|
# support.
|
2005-04-16 22:20:36 +00:00
|
|
|
#
|
|
|
|
config HIGHMEM
|
|
|
|
bool "High Memory Support"
|
2005-08-10 15:17:11 +00:00
|
|
|
depends on 32BIT && CPU_SUPPORTS_HIGHMEM && SYS_SUPPORTS_HIGHMEM
|
|
|
|
|
|
|
|
config CPU_SUPPORTS_HIGHMEM
|
|
|
|
bool
|
|
|
|
|
|
|
|
config SYS_SUPPORTS_HIGHMEM
|
|
|
|
bool
|
2005-04-16 22:20:36 +00:00
|
|
|
|
2005-06-25 21:54:31 +00:00
|
|
|
config ARCH_FLATMEM_ENABLE
|
|
|
|
def_bool y
|
|
|
|
depends on !NUMA
|
|
|
|
|
2006-06-11 22:03:08 +00:00
|
|
|
config ARCH_DISCONTIGMEM_ENABLE
|
|
|
|
bool
|
|
|
|
default y if SGI_IP27
|
|
|
|
help
|
|
|
|
Say Y to upport efficient handling of discontiguous physical memory,
|
|
|
|
for architectures which are either NUMA (Non-Uniform Memory Access)
|
|
|
|
or have huge holes in the physical address space for other reasons.
|
|
|
|
See <file:Documentation/vm/numa> for more.
|
|
|
|
|
|
|
|
config NUMA
|
|
|
|
bool "NUMA Support"
|
|
|
|
depends on SYS_SUPPORTS_NUMA
|
|
|
|
help
|
|
|
|
Say Y to compile the kernel to support NUMA (Non-Uniform Memory
|
|
|
|
Access). This option improves performance on systems with more
|
|
|
|
than two nodes; on two node systems it is generally better to
|
|
|
|
leave it disabled; on single node systems disable this option
|
|
|
|
disabled.
|
|
|
|
|
|
|
|
config SYS_SUPPORTS_NUMA
|
|
|
|
bool
|
|
|
|
|
2006-04-11 05:53:53 +00:00
|
|
|
config NODES_SHIFT
|
|
|
|
int
|
|
|
|
default "6"
|
|
|
|
depends on NEED_MULTIPLE_NODES
|
|
|
|
|
2005-06-25 21:54:31 +00:00
|
|
|
source "mm/Kconfig"
|
|
|
|
|
2005-04-16 22:20:36 +00:00
|
|
|
config SMP
|
|
|
|
bool "Multi-Processing support"
|
2006-04-05 08:45:45 +00:00
|
|
|
depends on CPU_RM9000 || ((SIBYTE_BCM1x80 || SIBYTE_BCM1x55 || SIBYTE_SB1250 || QEMU) && !SIBYTE_STANDALONE) || SGI_IP27 || MIPS_MT_SMP || MIPS_MT_SMTC
|
2005-04-16 22:20:36 +00:00
|
|
|
---help---
|
|
|
|
This enables support for systems with more than one CPU. If you have
|
|
|
|
a system with only one CPU, like most personal computers, say N. If
|
|
|
|
you have a system with more than one CPU, say Y.
|
|
|
|
|
|
|
|
If you say N here, the kernel will run on single and multiprocessor
|
|
|
|
machines, but will use only one CPU of a multiprocessor machine. If
|
|
|
|
you say Y here, the kernel will run on many, but not all,
|
|
|
|
singleprocessor machines. On a singleprocessor machine, the kernel
|
|
|
|
will run faster if you say N here.
|
|
|
|
|
|
|
|
People using multiprocessor machines who say Y here should also say
|
|
|
|
Y to "Enhanced Real Time Clock Support", below.
|
|
|
|
|
|
|
|
See also the <file:Documentation/smp.txt> and the SMP-HOWTO
|
|
|
|
available at <http://www.tldp.org/docs.html#howto>.
|
|
|
|
|
|
|
|
If you don't know what to do here, say N.
|
|
|
|
|
|
|
|
config NR_CPUS
|
|
|
|
int "Maximum number of CPUs (2-64)"
|
|
|
|
range 2 64
|
|
|
|
depends on SMP
|
|
|
|
default "64" if SGI_IP27
|
|
|
|
default "2"
|
|
|
|
help
|
|
|
|
This allows you to specify the maximum number of CPUs which this
|
|
|
|
kernel will support. The maximum supported value is 32 for 32-bit
|
|
|
|
kernel and 64 for 64-bit kernels; the minimum value which makes
|
|
|
|
sense is 2.
|
|
|
|
|
|
|
|
This is purely to save memory - each supported CPU adds
|
|
|
|
approximately eight kilobytes to the kernel image.
|
|
|
|
|
2005-07-11 20:45:51 +00:00
|
|
|
source "kernel/Kconfig.preempt"
|
2005-04-16 22:20:36 +00:00
|
|
|
|
|
|
|
config RTC_DS1742
|
|
|
|
bool "DS1742 BRAM/RTC support"
|
|
|
|
depends on TOSHIBA_JMR3927 || TOSHIBA_RBTX4927
|
|
|
|
|
|
|
|
config MIPS_INSANE_LARGE
|
|
|
|
bool "Support for large 64-bit configurations"
|
2005-09-03 22:56:16 +00:00
|
|
|
depends on CPU_R10000 && 64BIT
|
2005-04-16 22:20:36 +00:00
|
|
|
help
|
|
|
|
MIPS R10000 does support a 44 bit / 16TB address space as opposed to
|
|
|
|
previous 64-bit processors which only supported 40 bit / 1TB. If you
|
|
|
|
need processes of more than 1TB virtual address space, say Y here.
|
|
|
|
This will result in additional memory usage, so it is not
|
|
|
|
recommended for normal users.
|
|
|
|
|
2005-10-29 18:32:41 +00:00
|
|
|
endmenu
|
|
|
|
|
2005-04-16 22:20:36 +00:00
|
|
|
config RWSEM_GENERIC_SPINLOCK
|
|
|
|
bool
|
|
|
|
default y
|
|
|
|
|
2005-11-25 11:35:40 +00:00
|
|
|
source "init/Kconfig"
|
|
|
|
|
2005-04-16 22:20:36 +00:00
|
|
|
menu "Bus options (PCI, PCMCIA, EISA, ISA, TC)"
|
|
|
|
|
2005-10-29 18:32:41 +00:00
|
|
|
config HW_HAS_EISA
|
|
|
|
bool
|
2005-04-16 22:20:36 +00:00
|
|
|
config HW_HAS_PCI
|
|
|
|
bool
|
|
|
|
|
|
|
|
config PCI
|
|
|
|
bool "Support for PCI controller"
|
|
|
|
depends on HW_HAS_PCI
|
|
|
|
help
|
|
|
|
Find out whether you have a PCI motherboard. PCI is the name of a
|
|
|
|
bus system, i.e. the way the CPU talks to the other stuff inside
|
|
|
|
your box. Other bus systems are ISA, EISA, or VESA. If you have PCI,
|
|
|
|
say Y, otherwise N.
|
|
|
|
|
|
|
|
The PCI-HOWTO, available from
|
|
|
|
<http://www.tldp.org/docs.html#howto>, contains valuable
|
|
|
|
information about which PCI hardware does work under Linux and which
|
|
|
|
doesn't.
|
|
|
|
|
|
|
|
config PCI_DOMAINS
|
|
|
|
bool
|
|
|
|
depends on PCI
|
|
|
|
|
|
|
|
source "drivers/pci/Kconfig"
|
|
|
|
|
|
|
|
#
|
|
|
|
# ISA support is now enabled via select. Too many systems still have the one
|
|
|
|
# or other ISA chip on the board that users don't know about so don't expect
|
|
|
|
# users to choose the right thing ...
|
|
|
|
#
|
|
|
|
config ISA
|
|
|
|
bool
|
|
|
|
|
2006-06-07 11:53:17 +00:00
|
|
|
config NO_ISA
|
|
|
|
bool
|
|
|
|
|
2005-04-16 22:20:36 +00:00
|
|
|
config EISA
|
|
|
|
bool "EISA support"
|
2005-10-29 18:32:41 +00:00
|
|
|
depends on HW_HAS_EISA
|
2005-04-16 22:20:36 +00:00
|
|
|
select ISA
|
|
|
|
---help---
|
|
|
|
The Extended Industry Standard Architecture (EISA) bus was
|
|
|
|
developed as an open alternative to the IBM MicroChannel bus.
|
|
|
|
|
|
|
|
The EISA bus provided some of the features of the IBM MicroChannel
|
|
|
|
bus while maintaining backward compatibility with cards made for
|
|
|
|
the older ISA bus. The EISA bus saw limited use between 1988 and
|
|
|
|
1995 when it was made obsolete by the PCI bus.
|
|
|
|
|
|
|
|
Say Y here if you are building a kernel for an EISA-based machine.
|
|
|
|
|
|
|
|
Otherwise, say N.
|
|
|
|
|
|
|
|
source "drivers/eisa/Kconfig"
|
|
|
|
|
|
|
|
config TC
|
|
|
|
bool "TURBOchannel support"
|
|
|
|
depends on MACH_DECSTATION
|
|
|
|
help
|
|
|
|
TurboChannel is a DEC (now Compaq (now HP)) bus for Alpha and MIPS
|
|
|
|
processors. Documentation on writing device drivers for TurboChannel
|
|
|
|
is available at:
|
|
|
|
<http://www.cs.arizona.edu/computer.help/policy/DIGITAL_unix/AA-PS3HD-TET1_html/TITLE.html>.
|
|
|
|
|
|
|
|
#config ACCESSBUS
|
|
|
|
# bool "Access.Bus support"
|
|
|
|
# depends on TC
|
|
|
|
|
|
|
|
config MMU
|
|
|
|
bool
|
|
|
|
default y
|
|
|
|
|
2006-03-14 05:11:50 +00:00
|
|
|
config I8253
|
|
|
|
bool
|
|
|
|
|
2005-04-16 22:20:36 +00:00
|
|
|
source "drivers/pcmcia/Kconfig"
|
|
|
|
|
|
|
|
source "drivers/pci/hotplug/Kconfig"
|
|
|
|
|
|
|
|
endmenu
|
|
|
|
|
|
|
|
menu "Executable file formats"
|
|
|
|
|
|
|
|
source "fs/Kconfig.binfmt"
|
|
|
|
|
|
|
|
config TRAD_SIGNALS
|
|
|
|
bool
|
|
|
|
|
|
|
|
config BUILD_ELF64
|
|
|
|
bool "Use 64-bit ELF format for building"
|
2005-09-03 22:56:16 +00:00
|
|
|
depends on 64BIT
|
2005-04-16 22:20:36 +00:00
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help
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A 64-bit kernel is usually built using the 64-bit ELF binary object
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format as it's one that allows arbitrary 64-bit constructs. For
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kernels that are loaded within the KSEG compatibility segments the
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32-bit ELF format can optionally be used resulting in a somewhat
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smaller binary, but this option is not explicitly supported by the
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toolchain and since binutils 2.14 it does not even work at all.
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Say Y to use the 64-bit format or N to use the 32-bit one.
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If unsure say Y.
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config BINFMT_IRIX
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bool "Include IRIX binary compatibility"
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2005-10-29 18:32:41 +00:00
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depends on CPU_BIG_ENDIAN && 32BIT && BROKEN
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2005-04-16 22:20:36 +00:00
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config MIPS32_COMPAT
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bool "Kernel support for Linux/MIPS 32-bit binary compatibility"
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2005-09-03 22:56:16 +00:00
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depends on 64BIT
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2005-04-16 22:20:36 +00:00
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help
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Select this option if you want Linux/MIPS 32-bit binary
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compatibility. Since all software available for Linux/MIPS is
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currently 32-bit you should say Y here.
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config COMPAT
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bool
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depends on MIPS32_COMPAT
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default y
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config MIPS32_O32
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bool "Kernel support for o32 binaries"
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depends on MIPS32_COMPAT
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help
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Select this option if you want to run o32 binaries. These are pure
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32-bit binaries as used by the 32-bit Linux/MIPS port. Most of
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existing binaries are in this format.
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If unsure, say Y.
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config MIPS32_N32
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bool "Kernel support for n32 binaries"
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depends on MIPS32_COMPAT
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help
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Select this option if you want to run n32 binaries. These are
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64-bit binaries using 32-bit quantities for addressing and certain
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data that would normally be 64-bit. They are used in special
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cases.
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If unsure, say N.
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config BINFMT_ELF32
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bool
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default y if MIPS32_O32 || MIPS32_N32
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2005-03-18 17:36:42 +00:00
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config SECCOMP
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bool "Enable seccomp to safely compute untrusted bytecode"
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depends on PROC_FS && BROKEN
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default y
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help
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This kernel feature is useful for number crunching applications
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that may need to compute untrusted bytecode during their
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execution. By using pipes or other transports made available to
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the process as file descriptors supporting the read/write
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syscalls, it's possible to isolate those applications in
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their own address space using seccomp. Once seccomp is
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enabled via /proc/<pid>/seccomp, it cannot be disabled
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and the task is only allowed to execute a few safe syscalls
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defined by each seccomp mode.
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If unsure, say Y. Only embedded should say N here.
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2005-04-16 22:20:36 +00:00
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config PM
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bool "Power Management support (EXPERIMENTAL)"
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2005-10-29 18:32:41 +00:00
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depends on EXPERIMENTAL && SOC_AU1X00
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2005-04-16 22:20:36 +00:00
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endmenu
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2005-07-12 04:03:49 +00:00
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source "net/Kconfig"
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2005-04-16 22:20:36 +00:00
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source "drivers/Kconfig"
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source "fs/Kconfig"
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2005-10-29 18:32:41 +00:00
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source "arch/mips/oprofile/Kconfig"
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2005-04-16 22:20:36 +00:00
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source "arch/mips/Kconfig.debug"
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source "security/Kconfig"
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source "crypto/Kconfig"
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source "lib/Kconfig"
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