2012-05-26 07:04:43 +00:00
|
|
|
/include/ "skeleton.dtsi"
|
|
|
|
|
|
|
|
|
|
/ {
|
|
|
|
|
compatible = "brcm,bcm2835";
|
|
|
|
|
model = "BCM2835";
|
ARM: bcm2835: add interrupt controller driver
The BCM2835 contains a custom interrupt controller, which supports 72
interrupt sources using a 2-level register scheme. The interrupt
controller, or the HW block containing it, is referred to occasionally
as "armctrl" in the SoC documentation, hence the symbol naming in the
code.
This patch was extracted from git://github.com/lp0/linux.git branch
rpi-split as of 2012/09/08, and modified as follows:
* s/bcm2708/bcm2835/.
* Modified device tree vendor prefix.
* Moved implementation to drivers/irchip/.
* Added devicetree documentation, and hence removed list of IRQs from
bcm2835.dtsi.
* Changed shift in MAKE_HWIRQ() and HWIRQ_BANK() from 8 to 5 to reduce
the size of the hwirq space, and pass the total size of the hwirq space
to irq_domain_add_linear(), rather than just the number of valid hwirqs;
the two are different due to the hwirq space being sparse.
* Added the interrupt controller DT node to the top-level of the DT,
rather than nesting it inside a /axi node. Hence, changed the reg value
since /axi had a ranges property. This seems simpler to me, but I'm not
sure if everyone will like this change or not.
* Don't set struct irq_domain_ops.map = irq_domain_simple_map, hence
removing the need to patch include/linux/irqdomain.h or
kernel/irq/irqdomain.c.
* Simplified armctrl_of_init() using of_iomap().
* Removed unused IS_VALID_BANK()/IS_VALID_IRQ() macros.
* Renamed armctrl_handle_irq() to prevent possible symbol clashes.
* Made armctrl_of_init() static.
* Removed comment "Each bank is registered as a separate interrupt
controller" since this is no longer true.
* Removed FSF address from license header.
* Added my name to copyright header.
Signed-off-by: Chris Boot <bootc@bootc.net>
Signed-off-by: Simon Arlott <simon@fire.lp0.eu>
Signed-off-by: Dom Cobley <popcornmix@gmail.com>
Signed-off-by: Dom Cobley <dc4@broadcom.com>
Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
Acked-by: Arnd Bergmann <arnd@arndb.de>
2012-09-13 01:57:26 +00:00
|
|
|
interrupt-parent = <&intc>;
|
2012-05-26 07:04:43 +00:00
|
|
|
|
|
|
|
|
chosen {
|
2012-09-11 05:29:17 +00:00
|
|
|
bootargs = "earlyprintk console=ttyAMA0";
|
2012-05-26 07:04:43 +00:00
|
|
|
};
|
|
|
|
|
|
|
|
|
|
soc {
|
|
|
|
|
compatible = "simple-bus";
|
|
|
|
|
#address-cells = <1>;
|
|
|
|
|
#size-cells = <1>;
|
|
|
|
|
ranges = <0x7e000000 0x20000000 0x02000000>;
|
ARM: bcm2835: add interrupt controller driver
The BCM2835 contains a custom interrupt controller, which supports 72
interrupt sources using a 2-level register scheme. The interrupt
controller, or the HW block containing it, is referred to occasionally
as "armctrl" in the SoC documentation, hence the symbol naming in the
code.
This patch was extracted from git://github.com/lp0/linux.git branch
rpi-split as of 2012/09/08, and modified as follows:
* s/bcm2708/bcm2835/.
* Modified device tree vendor prefix.
* Moved implementation to drivers/irchip/.
* Added devicetree documentation, and hence removed list of IRQs from
bcm2835.dtsi.
* Changed shift in MAKE_HWIRQ() and HWIRQ_BANK() from 8 to 5 to reduce
the size of the hwirq space, and pass the total size of the hwirq space
to irq_domain_add_linear(), rather than just the number of valid hwirqs;
the two are different due to the hwirq space being sparse.
* Added the interrupt controller DT node to the top-level of the DT,
rather than nesting it inside a /axi node. Hence, changed the reg value
since /axi had a ranges property. This seems simpler to me, but I'm not
sure if everyone will like this change or not.
* Don't set struct irq_domain_ops.map = irq_domain_simple_map, hence
removing the need to patch include/linux/irqdomain.h or
kernel/irq/irqdomain.c.
* Simplified armctrl_of_init() using of_iomap().
* Removed unused IS_VALID_BANK()/IS_VALID_IRQ() macros.
* Renamed armctrl_handle_irq() to prevent possible symbol clashes.
* Made armctrl_of_init() static.
* Removed comment "Each bank is registered as a separate interrupt
controller" since this is no longer true.
* Removed FSF address from license header.
* Added my name to copyright header.
Signed-off-by: Chris Boot <bootc@bootc.net>
Signed-off-by: Simon Arlott <simon@fire.lp0.eu>
Signed-off-by: Dom Cobley <popcornmix@gmail.com>
Signed-off-by: Dom Cobley <dc4@broadcom.com>
Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
Acked-by: Arnd Bergmann <arnd@arndb.de>
2012-09-13 01:57:26 +00:00
|
|
|
|
2012-09-11 04:38:35 +00:00
|
|
|
timer {
|
|
|
|
|
compatible = "brcm,bcm2835-system-timer";
|
|
|
|
|
reg = <0x7e003000 0x1000>;
|
|
|
|
|
interrupts = <1 0>, <1 1>, <1 2>, <1 3>;
|
|
|
|
|
clock-frequency = <1000000>;
|
|
|
|
|
};
|
|
|
|
|
|
ARM: bcm2835: add interrupt controller driver
The BCM2835 contains a custom interrupt controller, which supports 72
interrupt sources using a 2-level register scheme. The interrupt
controller, or the HW block containing it, is referred to occasionally
as "armctrl" in the SoC documentation, hence the symbol naming in the
code.
This patch was extracted from git://github.com/lp0/linux.git branch
rpi-split as of 2012/09/08, and modified as follows:
* s/bcm2708/bcm2835/.
* Modified device tree vendor prefix.
* Moved implementation to drivers/irchip/.
* Added devicetree documentation, and hence removed list of IRQs from
bcm2835.dtsi.
* Changed shift in MAKE_HWIRQ() and HWIRQ_BANK() from 8 to 5 to reduce
the size of the hwirq space, and pass the total size of the hwirq space
to irq_domain_add_linear(), rather than just the number of valid hwirqs;
the two are different due to the hwirq space being sparse.
* Added the interrupt controller DT node to the top-level of the DT,
rather than nesting it inside a /axi node. Hence, changed the reg value
since /axi had a ranges property. This seems simpler to me, but I'm not
sure if everyone will like this change or not.
* Don't set struct irq_domain_ops.map = irq_domain_simple_map, hence
removing the need to patch include/linux/irqdomain.h or
kernel/irq/irqdomain.c.
* Simplified armctrl_of_init() using of_iomap().
* Removed unused IS_VALID_BANK()/IS_VALID_IRQ() macros.
* Renamed armctrl_handle_irq() to prevent possible symbol clashes.
* Made armctrl_of_init() static.
* Removed comment "Each bank is registered as a separate interrupt
controller" since this is no longer true.
* Removed FSF address from license header.
* Added my name to copyright header.
Signed-off-by: Chris Boot <bootc@bootc.net>
Signed-off-by: Simon Arlott <simon@fire.lp0.eu>
Signed-off-by: Dom Cobley <popcornmix@gmail.com>
Signed-off-by: Dom Cobley <dc4@broadcom.com>
Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
Acked-by: Arnd Bergmann <arnd@arndb.de>
2012-09-13 01:57:26 +00:00
|
|
|
intc: interrupt-controller {
|
|
|
|
|
compatible = "brcm,bcm2835-armctrl-ic";
|
|
|
|
|
reg = <0x7e00b200 0x200>;
|
|
|
|
|
interrupt-controller;
|
|
|
|
|
#interrupt-cells = <2>;
|
|
|
|
|
};
|
2012-09-11 05:29:17 +00:00
|
|
|
|
2012-09-16 04:18:10 +00:00
|
|
|
watchdog {
|
|
|
|
|
compatible = "brcm,bcm2835-pm-wdt";
|
|
|
|
|
reg = <0x7e100000 0x28>;
|
|
|
|
|
};
|
|
|
|
|
|
2012-09-11 05:29:17 +00:00
|
|
|
uart@20201000 {
|
|
|
|
|
compatible = "brcm,bcm2835-pl011", "arm,pl011", "arm,primecell";
|
|
|
|
|
reg = <0x7e201000 0x1000>;
|
|
|
|
|
interrupts = <2 25>;
|
|
|
|
|
clock-frequency = <3000000>;
|
|
|
|
|
};
|
2012-09-28 03:54:21 +00:00
|
|
|
|
|
|
|
|
gpio: gpio {
|
|
|
|
|
compatible = "brcm,bcm2835-gpio";
|
|
|
|
|
reg = <0x7e200000 0xb4>;
|
|
|
|
|
/*
|
|
|
|
|
* The GPIO IP block is designed for 3 banks of GPIOs.
|
|
|
|
|
* Each bank has a GPIO interrupt for itself.
|
|
|
|
|
* There is an overall "any bank" interrupt.
|
|
|
|
|
* In order, these are GIC interrupts 17, 18, 19, 20.
|
|
|
|
|
* Since the BCM2835 only has 2 banks, the 2nd bank
|
|
|
|
|
* interrupt output appears to be mirrored onto the
|
|
|
|
|
* 3rd bank's interrupt signal.
|
|
|
|
|
* So, a bank0 interrupt shows up on 17, 20, and
|
|
|
|
|
* a bank1 interrupt shows up on 18, 19, 20!
|
|
|
|
|
*/
|
|
|
|
|
interrupts = <2 17>, <2 18>, <2 19>, <2 20>;
|
|
|
|
|
|
|
|
|
|
gpio-controller;
|
|
|
|
|
#gpio-cells = <2>;
|
|
|
|
|
|
|
|
|
|
interrupt-controller;
|
|
|
|
|
#interrupt-cells = <2>;
|
|
|
|
|
};
|
2012-12-25 04:58:56 +00:00
|
|
|
|
2013-01-01 06:26:45 +00:00
|
|
|
i2c0: i2c@20205000 {
|
|
|
|
|
compatible = "brcm,bcm2835-i2c";
|
|
|
|
|
reg = <0x7e205000 0x1000>;
|
|
|
|
|
interrupts = <2 21>;
|
|
|
|
|
clocks = <&clk_i2c>;
|
|
|
|
|
status = "disabled";
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
i2c1: i2c@20804000 {
|
|
|
|
|
compatible = "brcm,bcm2835-i2c";
|
|
|
|
|
reg = <0x7e804000 0x1000>;
|
|
|
|
|
interrupts = <2 21>;
|
|
|
|
|
clocks = <&clk_i2c>;
|
|
|
|
|
status = "disabled";
|
|
|
|
|
};
|
|
|
|
|
|
2012-12-25 04:58:56 +00:00
|
|
|
sdhci: sdhci {
|
|
|
|
|
compatible = "brcm,bcm2835-sdhci";
|
|
|
|
|
reg = <0x7e300000 0x100>;
|
|
|
|
|
interrupts = <2 30>;
|
|
|
|
|
clocks = <&clk_mmc>;
|
|
|
|
|
status = "disabled";
|
|
|
|
|
};
|
|
|
|
|
};
|
|
|
|
|
|
2013-01-15 04:07:20 +00:00
|
|
|
clocks {
|
|
|
|
|
compatible = "simple-bus";
|
|
|
|
|
#address-cells = <1>;
|
|
|
|
|
#size-cells = <0>;
|
2013-01-01 06:26:45 +00:00
|
|
|
|
2013-01-15 04:07:20 +00:00
|
|
|
clk_mmc: mmc {
|
|
|
|
|
compatible = "fixed-clock";
|
|
|
|
|
reg = <0>;
|
|
|
|
|
#clock-cells = <0>;
|
|
|
|
|
clock-frequency = <100000000>;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
clk_i2c: i2c {
|
|
|
|
|
compatible = "fixed-clock";
|
|
|
|
|
reg = <1>;
|
|
|
|
|
#clock-cells = <0>;
|
2013-02-22 05:42:38 +00:00
|
|
|
clock-frequency = <250000000>;
|
2013-01-15 04:07:20 +00:00
|
|
|
};
|
2012-05-26 07:04:43 +00:00
|
|
|
};
|
|
|
|
|
};
|
