2005-04-16 22:20:36 +00:00
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/**
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* @file nmi_int.c
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*
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2009-07-08 11:49:38 +00:00
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* @remark Copyright 2002-2009 OProfile authors
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2005-04-16 22:20:36 +00:00
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* @remark Read the file COPYING
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*
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* @author John Levon <levon@movementarian.org>
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2008-07-22 19:08:48 +00:00
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* @author Robert Richter <robert.richter@amd.com>
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2009-07-08 11:49:38 +00:00
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* @author Barry Kasindorf <barry.kasindorf@amd.com>
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* @author Jason Yeh <jason.yeh@amd.com>
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* @author Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
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2005-04-16 22:20:36 +00:00
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*/
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#include <linux/init.h>
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#include <linux/notifier.h>
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#include <linux/smp.h>
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#include <linux/oprofile.h>
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#include <linux/sysdev.h>
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#include <linux/slab.h>
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2006-07-10 15:06:21 +00:00
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#include <linux/moduleparam.h>
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2007-05-08 07:27:03 +00:00
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#include <linux/kdebug.h>
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2008-08-19 01:13:38 +00:00
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#include <linux/cpu.h>
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2005-04-16 22:20:36 +00:00
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#include <asm/nmi.h>
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#include <asm/msr.h>
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#include <asm/apic.h>
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2008-01-30 12:32:33 +00:00
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2005-04-16 22:20:36 +00:00
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#include "op_counter.h"
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#include "op_x86_model.h"
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2006-09-26 08:52:27 +00:00
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2009-07-08 11:49:38 +00:00
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#ifdef CONFIG_OPROFILE_EVENT_MULTIPLEX
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DEFINE_PER_CPU(int, switch_index);
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#endif
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2008-01-30 12:32:33 +00:00
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static struct op_x86_model_spec const *model;
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2008-03-25 22:06:59 +00:00
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static DEFINE_PER_CPU(struct op_msrs, cpu_msrs);
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static DEFINE_PER_CPU(unsigned long, saved_lvtpc);
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2006-09-26 08:52:27 +00:00
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2005-04-16 22:20:36 +00:00
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/* 0 == registered but off, 1 == registered and on */
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static int nmi_enabled = 0;
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2009-07-08 11:49:38 +00:00
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#ifdef CONFIG_OPROFILE_EVENT_MULTIPLEX
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extern atomic_t multiplex_counter;
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#endif
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struct op_counter_config counter_config[OP_MAX_COUNTER];
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2009-05-25 13:10:32 +00:00
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/* common functions */
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u64 op_x86_get_ctrl(struct op_x86_model_spec const *model,
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struct op_counter_config *counter_config)
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{
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u64 val = 0;
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u16 event = (u16)counter_config->event;
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val |= ARCH_PERFMON_EVENTSEL_INT;
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val |= counter_config->user ? ARCH_PERFMON_EVENTSEL_USR : 0;
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val |= counter_config->kernel ? ARCH_PERFMON_EVENTSEL_OS : 0;
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val |= (counter_config->unit_mask & 0xFF) << 8;
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event &= model->event_mask ? model->event_mask : 0xFF;
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val |= event & 0xFF;
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val |= (event & 0x0F00) << 24;
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return val;
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}
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2006-09-26 08:52:27 +00:00
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static int profile_exceptions_notify(struct notifier_block *self,
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unsigned long val, void *data)
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2005-04-16 22:20:36 +00:00
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{
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2006-09-26 08:52:27 +00:00
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struct die_args *args = (struct die_args *)data;
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int ret = NOTIFY_DONE;
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int cpu = smp_processor_id();
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2008-01-30 12:32:33 +00:00
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switch (val) {
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2006-09-26 08:52:27 +00:00
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case DIE_NMI:
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2009-02-04 16:11:34 +00:00
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case DIE_NMI_IPI:
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model->check_ctrs(args->regs, &per_cpu(cpu_msrs, cpu));
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ret = NOTIFY_STOP;
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2006-09-26 08:52:27 +00:00
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break;
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default:
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break;
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}
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return ret;
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2005-04-16 22:20:36 +00:00
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}
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2006-09-26 08:52:27 +00:00
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2008-01-30 12:32:33 +00:00
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static void nmi_cpu_save_registers(struct op_msrs *msrs)
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2005-04-16 22:20:36 +00:00
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{
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2008-01-30 12:32:33 +00:00
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struct op_msr *counters = msrs->counters;
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struct op_msr *controls = msrs->controls;
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2005-04-16 22:20:36 +00:00
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unsigned int i;
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2009-06-05 13:54:24 +00:00
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for (i = 0; i < model->num_counters; ++i) {
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2009-06-03 17:09:27 +00:00
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if (counters[i].addr)
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rdmsrl(counters[i].addr, counters[i].saved);
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2005-04-16 22:20:36 +00:00
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}
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2008-01-30 12:32:33 +00:00
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2009-06-05 13:54:24 +00:00
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for (i = 0; i < model->num_controls; ++i) {
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2009-06-03 17:09:27 +00:00
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if (controls[i].addr)
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rdmsrl(controls[i].addr, controls[i].saved);
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2005-04-16 22:20:36 +00:00
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}
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}
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static void free_msrs(void)
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{
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int i;
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2006-03-28 09:56:39 +00:00
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for_each_possible_cpu(i) {
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2008-03-25 22:06:59 +00:00
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kfree(per_cpu(cpu_msrs, i).counters);
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per_cpu(cpu_msrs, i).counters = NULL;
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kfree(per_cpu(cpu_msrs, i).controls);
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per_cpu(cpu_msrs, i).controls = NULL;
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2009-07-08 11:49:38 +00:00
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#ifdef CONFIG_OPROFILE_EVENT_MULTIPLEX
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kfree(per_cpu(cpu_msrs, i).multiplex);
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per_cpu(cpu_msrs, i).multiplex = NULL;
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#endif
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2005-04-16 22:20:36 +00:00
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}
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}
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static int allocate_msrs(void)
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{
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2008-09-24 09:08:52 +00:00
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int success = 1;
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2005-04-16 22:20:36 +00:00
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size_t controls_size = sizeof(struct op_msr) * model->num_controls;
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size_t counters_size = sizeof(struct op_msr) * model->num_counters;
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2009-07-08 11:49:38 +00:00
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#ifdef CONFIG_OPROFILE_EVENT_MULTIPLEX
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size_t multiplex_size = sizeof(struct op_msr) * model->num_virt_counters;
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#endif
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2005-04-16 22:20:36 +00:00
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2008-09-24 09:08:52 +00:00
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int i;
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2007-06-01 07:46:39 +00:00
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for_each_possible_cpu(i) {
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2008-03-25 22:06:59 +00:00
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per_cpu(cpu_msrs, i).counters = kmalloc(counters_size,
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GFP_KERNEL);
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if (!per_cpu(cpu_msrs, i).counters) {
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2005-04-16 22:20:36 +00:00
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success = 0;
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break;
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}
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2008-09-24 09:08:52 +00:00
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per_cpu(cpu_msrs, i).controls = kmalloc(controls_size,
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GFP_KERNEL);
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2008-03-25 22:06:59 +00:00
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if (!per_cpu(cpu_msrs, i).controls) {
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2005-04-16 22:20:36 +00:00
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success = 0;
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break;
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}
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2009-07-08 11:49:38 +00:00
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#ifdef CONFIG_OPROFILE_EVENT_MULTIPLEX
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per_cpu(cpu_msrs, i).multiplex =
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kmalloc(multiplex_size, GFP_KERNEL);
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if (!per_cpu(cpu_msrs, i).multiplex) {
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success = 0;
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break;
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}
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#endif
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2005-04-16 22:20:36 +00:00
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}
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if (!success)
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free_msrs();
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return success;
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}
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2009-07-08 11:49:38 +00:00
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#ifdef CONFIG_OPROFILE_EVENT_MULTIPLEX
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2009-07-09 17:23:50 +00:00
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static void nmi_cpu_setup_mux(int cpu, struct op_msrs const * const msrs)
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2009-07-08 11:49:38 +00:00
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{
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int i;
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struct op_msr *multiplex = msrs->multiplex;
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for (i = 0; i < model->num_virt_counters; ++i) {
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if (counter_config[i].enabled) {
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multiplex[i].saved = -(u64)counter_config[i].count;
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} else {
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multiplex[i].addr = 0;
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multiplex[i].saved = 0;
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}
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}
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2009-07-09 17:23:50 +00:00
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per_cpu(switch_index, cpu) = 0;
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2009-07-08 11:49:38 +00:00
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}
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2009-07-09 17:23:50 +00:00
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#else
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static inline void
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nmi_cpu_setup_mux(int cpu, struct op_msrs const * const msrs) { }
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2009-07-08 11:49:38 +00:00
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#endif
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2008-01-30 12:32:33 +00:00
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static void nmi_cpu_setup(void *dummy)
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2005-04-16 22:20:36 +00:00
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{
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int cpu = smp_processor_id();
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2008-03-25 22:06:59 +00:00
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struct op_msrs *msrs = &per_cpu(cpu_msrs, cpu);
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2009-07-09 16:33:02 +00:00
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nmi_cpu_save_registers(msrs);
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2005-04-16 22:20:36 +00:00
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spin_lock(&oprofilefs_lock);
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2009-05-25 17:31:44 +00:00
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model->setup_ctrs(model, msrs);
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2009-07-09 17:23:50 +00:00
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nmi_cpu_setup_mux(cpu, msrs);
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2005-04-16 22:20:36 +00:00
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spin_unlock(&oprofilefs_lock);
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2008-03-25 22:06:59 +00:00
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per_cpu(saved_lvtpc, cpu) = apic_read(APIC_LVTPC);
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2005-04-16 22:20:36 +00:00
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apic_write(APIC_LVTPC, APIC_DM_NMI);
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}
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2006-09-26 08:52:27 +00:00
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static struct notifier_block profile_exceptions_nb = {
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.notifier_call = profile_exceptions_notify,
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.next = NULL,
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2009-02-04 16:11:34 +00:00
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.priority = 2
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2006-09-26 08:52:27 +00:00
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};
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2005-04-16 22:20:36 +00:00
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static int nmi_setup(void)
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{
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2008-01-30 12:32:33 +00:00
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int err = 0;
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2007-05-21 12:31:45 +00:00
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int cpu;
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2006-09-26 08:52:27 +00:00
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2005-04-16 22:20:36 +00:00
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if (!allocate_msrs())
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return -ENOMEM;
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2008-01-30 12:32:33 +00:00
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err = register_die_notifier(&profile_exceptions_nb);
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if (err) {
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2005-04-16 22:20:36 +00:00
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free_msrs();
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2006-09-26 08:52:27 +00:00
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return err;
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2005-04-16 22:20:36 +00:00
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}
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2006-09-26 08:52:27 +00:00
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2008-09-24 09:08:52 +00:00
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/* We need to serialize save and setup for HT because the subset
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2005-04-16 22:20:36 +00:00
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* of msrs are distinct for save and setup operations
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*/
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2007-05-21 12:31:45 +00:00
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/* Assume saved/restored counters are the same on all CPUs */
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2008-03-25 22:06:59 +00:00
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model->fill_in_addresses(&per_cpu(cpu_msrs, 0));
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2008-01-30 12:32:33 +00:00
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for_each_possible_cpu(cpu) {
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2007-06-01 07:46:39 +00:00
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if (cpu != 0) {
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2008-03-25 22:06:59 +00:00
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memcpy(per_cpu(cpu_msrs, cpu).counters,
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per_cpu(cpu_msrs, 0).counters,
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2007-06-01 07:46:39 +00:00
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sizeof(struct op_msr) * model->num_counters);
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2008-03-25 22:06:59 +00:00
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memcpy(per_cpu(cpu_msrs, cpu).controls,
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per_cpu(cpu_msrs, 0).controls,
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2007-06-01 07:46:39 +00:00
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sizeof(struct op_msr) * model->num_controls);
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2009-07-08 11:49:38 +00:00
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#ifdef CONFIG_OPROFILE_EVENT_MULTIPLEX
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memcpy(per_cpu(cpu_msrs, cpu).multiplex,
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per_cpu(cpu_msrs, 0).multiplex,
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sizeof(struct op_msr) * model->num_virt_counters);
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#endif
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2007-06-01 07:46:39 +00:00
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}
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2007-05-21 12:31:45 +00:00
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}
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2008-05-09 07:39:44 +00:00
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on_each_cpu(nmi_cpu_setup, NULL, 1);
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2005-04-16 22:20:36 +00:00
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nmi_enabled = 1;
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return 0;
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}
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2009-07-08 11:49:38 +00:00
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#ifdef CONFIG_OPROFILE_EVENT_MULTIPLEX
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static void nmi_cpu_save_mpx_registers(struct op_msrs *msrs)
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{
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unsigned int si = __get_cpu_var(switch_index);
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struct op_msr *multiplex = msrs->multiplex;
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unsigned int i;
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for (i = 0; i < model->num_counters; ++i) {
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int offset = i + si;
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if (multiplex[offset].addr) {
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rdmsrl(multiplex[offset].addr,
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multiplex[offset].saved);
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}
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}
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}
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static void nmi_cpu_restore_mpx_registers(struct op_msrs *msrs)
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{
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unsigned int si = __get_cpu_var(switch_index);
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struct op_msr *multiplex = msrs->multiplex;
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unsigned int i;
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for (i = 0; i < model->num_counters; ++i) {
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int offset = i + si;
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if (multiplex[offset].addr) {
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wrmsrl(multiplex[offset].addr,
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multiplex[offset].saved);
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}
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}
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}
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#endif
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2009-07-09 16:33:02 +00:00
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static void nmi_cpu_restore_registers(struct op_msrs *msrs)
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2005-04-16 22:20:36 +00:00
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{
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2008-01-30 12:32:33 +00:00
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struct op_msr *counters = msrs->counters;
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struct op_msr *controls = msrs->controls;
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2005-04-16 22:20:36 +00:00
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unsigned int i;
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2009-06-05 13:54:24 +00:00
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for (i = 0; i < model->num_controls; ++i) {
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2009-06-03 17:09:27 +00:00
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if (controls[i].addr)
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wrmsrl(controls[i].addr, controls[i].saved);
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2005-04-16 22:20:36 +00:00
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}
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2008-01-30 12:32:33 +00:00
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2009-06-05 13:54:24 +00:00
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for (i = 0; i < model->num_counters; ++i) {
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2009-06-03 17:09:27 +00:00
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if (counters[i].addr)
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wrmsrl(counters[i].addr, counters[i].saved);
|
2005-04-16 22:20:36 +00:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2008-01-30 12:32:33 +00:00
|
|
|
static void nmi_cpu_shutdown(void *dummy)
|
2005-04-16 22:20:36 +00:00
|
|
|
{
|
|
|
|
unsigned int v;
|
|
|
|
int cpu = smp_processor_id();
|
2009-07-09 14:29:34 +00:00
|
|
|
struct op_msrs *msrs = &per_cpu(cpu_msrs, cpu);
|
2008-01-30 12:32:33 +00:00
|
|
|
|
2005-04-16 22:20:36 +00:00
|
|
|
/* restoring APIC_LVTPC can trigger an apic error because the delivery
|
|
|
|
* mode and vector nr combination can be illegal. That's by design: on
|
|
|
|
* power on apic lvt contain a zero vector nr which are legal only for
|
|
|
|
* NMI delivery mode. So inhibit apic err before restoring lvtpc
|
|
|
|
*/
|
|
|
|
v = apic_read(APIC_LVTERR);
|
|
|
|
apic_write(APIC_LVTERR, v | APIC_LVT_MASKED);
|
2008-03-25 22:06:59 +00:00
|
|
|
apic_write(APIC_LVTPC, per_cpu(saved_lvtpc, cpu));
|
2005-04-16 22:20:36 +00:00
|
|
|
apic_write(APIC_LVTERR, v);
|
2009-07-09 16:33:02 +00:00
|
|
|
nmi_cpu_restore_registers(msrs);
|
2009-07-08 11:49:38 +00:00
|
|
|
#ifdef CONFIG_OPROFILE_EVENT_MULTIPLEX
|
2009-07-09 14:29:34 +00:00
|
|
|
per_cpu(switch_index, cpu) = 0;
|
2009-07-08 11:49:38 +00:00
|
|
|
#endif
|
2005-04-16 22:20:36 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
static void nmi_shutdown(void)
|
|
|
|
{
|
2008-09-20 16:02:27 +00:00
|
|
|
struct op_msrs *msrs;
|
|
|
|
|
2005-04-16 22:20:36 +00:00
|
|
|
nmi_enabled = 0;
|
2008-05-09 07:39:44 +00:00
|
|
|
on_each_cpu(nmi_cpu_shutdown, NULL, 1);
|
2006-09-26 08:52:27 +00:00
|
|
|
unregister_die_notifier(&profile_exceptions_nb);
|
2008-09-20 16:02:27 +00:00
|
|
|
msrs = &get_cpu_var(cpu_msrs);
|
2008-03-25 22:06:59 +00:00
|
|
|
model->shutdown(msrs);
|
2005-04-16 22:20:36 +00:00
|
|
|
free_msrs();
|
2008-06-22 07:40:18 +00:00
|
|
|
put_cpu_var(cpu_msrs);
|
2005-04-16 22:20:36 +00:00
|
|
|
}
|
|
|
|
|
2008-01-30 12:32:33 +00:00
|
|
|
static void nmi_cpu_start(void *dummy)
|
2005-04-16 22:20:36 +00:00
|
|
|
{
|
2008-03-25 22:06:59 +00:00
|
|
|
struct op_msrs const *msrs = &__get_cpu_var(cpu_msrs);
|
2005-04-16 22:20:36 +00:00
|
|
|
model->start(msrs);
|
|
|
|
}
|
|
|
|
|
|
|
|
static int nmi_start(void)
|
|
|
|
{
|
2008-05-09 07:39:44 +00:00
|
|
|
on_each_cpu(nmi_cpu_start, NULL, 1);
|
2005-04-16 22:20:36 +00:00
|
|
|
return 0;
|
|
|
|
}
|
2008-01-30 12:32:33 +00:00
|
|
|
|
|
|
|
static void nmi_cpu_stop(void *dummy)
|
2005-04-16 22:20:36 +00:00
|
|
|
{
|
2008-03-25 22:06:59 +00:00
|
|
|
struct op_msrs const *msrs = &__get_cpu_var(cpu_msrs);
|
2005-04-16 22:20:36 +00:00
|
|
|
model->stop(msrs);
|
|
|
|
}
|
2008-01-30 12:32:33 +00:00
|
|
|
|
2005-04-16 22:20:36 +00:00
|
|
|
static void nmi_stop(void)
|
|
|
|
{
|
2008-05-09 07:39:44 +00:00
|
|
|
on_each_cpu(nmi_cpu_stop, NULL, 1);
|
2005-04-16 22:20:36 +00:00
|
|
|
}
|
|
|
|
|
2008-01-30 12:32:33 +00:00
|
|
|
static int nmi_create_files(struct super_block *sb, struct dentry *root)
|
2005-04-16 22:20:36 +00:00
|
|
|
{
|
|
|
|
unsigned int i;
|
|
|
|
|
2009-07-08 11:49:38 +00:00
|
|
|
for (i = 0; i < model->num_virt_counters; ++i) {
|
2008-01-30 12:32:33 +00:00
|
|
|
struct dentry *dir;
|
2006-06-26 07:24:34 +00:00
|
|
|
char buf[4];
|
2008-01-30 12:32:33 +00:00
|
|
|
|
2009-07-08 11:49:38 +00:00
|
|
|
#ifndef CONFIG_OPROFILE_EVENT_MULTIPLEX
|
2008-01-30 12:32:33 +00:00
|
|
|
/* quick little hack to _not_ expose a counter if it is not
|
2006-09-26 08:52:26 +00:00
|
|
|
* available for use. This should protect userspace app.
|
|
|
|
* NOTE: assumes 1:1 mapping here (that counters are organized
|
|
|
|
* sequentially in their struct assignment).
|
|
|
|
*/
|
|
|
|
if (unlikely(!avail_to_resrv_perfctr_nmi_bit(i)))
|
|
|
|
continue;
|
2009-07-08 11:49:38 +00:00
|
|
|
#endif /* CONFIG_OPROFILE_EVENT_MULTIPLEX */
|
2006-09-26 08:52:26 +00:00
|
|
|
|
2006-06-26 07:24:34 +00:00
|
|
|
snprintf(buf, sizeof(buf), "%d", i);
|
2005-04-16 22:20:36 +00:00
|
|
|
dir = oprofilefs_mkdir(sb, root, buf);
|
2008-01-30 12:32:33 +00:00
|
|
|
oprofilefs_create_ulong(sb, dir, "enabled", &counter_config[i].enabled);
|
|
|
|
oprofilefs_create_ulong(sb, dir, "event", &counter_config[i].event);
|
|
|
|
oprofilefs_create_ulong(sb, dir, "count", &counter_config[i].count);
|
|
|
|
oprofilefs_create_ulong(sb, dir, "unit_mask", &counter_config[i].unit_mask);
|
|
|
|
oprofilefs_create_ulong(sb, dir, "kernel", &counter_config[i].kernel);
|
|
|
|
oprofilefs_create_ulong(sb, dir, "user", &counter_config[i].user);
|
2005-04-16 22:20:36 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
2008-01-30 12:32:33 +00:00
|
|
|
|
2009-07-08 11:49:38 +00:00
|
|
|
#ifdef CONFIG_OPROFILE_EVENT_MULTIPLEX
|
|
|
|
|
|
|
|
static void nmi_cpu_switch(void *dummy)
|
|
|
|
{
|
|
|
|
int cpu = smp_processor_id();
|
|
|
|
int si = per_cpu(switch_index, cpu);
|
|
|
|
struct op_msrs *msrs = &per_cpu(cpu_msrs, cpu);
|
|
|
|
|
|
|
|
nmi_cpu_stop(NULL);
|
|
|
|
nmi_cpu_save_mpx_registers(msrs);
|
|
|
|
|
|
|
|
/* move to next set */
|
|
|
|
si += model->num_counters;
|
|
|
|
if ((si > model->num_virt_counters) || (counter_config[si].count == 0))
|
|
|
|
per_cpu(switch_index, cpu) = 0;
|
|
|
|
else
|
|
|
|
per_cpu(switch_index, cpu) = si;
|
|
|
|
|
|
|
|
model->switch_ctrl(model, msrs);
|
|
|
|
nmi_cpu_restore_mpx_registers(msrs);
|
|
|
|
|
|
|
|
nmi_cpu_start(NULL);
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Quick check to see if multiplexing is necessary.
|
|
|
|
* The check should be sufficient since counters are used
|
|
|
|
* in ordre.
|
|
|
|
*/
|
|
|
|
static int nmi_multiplex_on(void)
|
|
|
|
{
|
|
|
|
return counter_config[model->num_counters].count ? 0 : -EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int nmi_switch_event(void)
|
|
|
|
{
|
|
|
|
if (!model->switch_ctrl)
|
|
|
|
return -ENOSYS; /* not implemented */
|
|
|
|
if (nmi_multiplex_on() < 0)
|
|
|
|
return -EINVAL; /* not necessary */
|
|
|
|
|
|
|
|
on_each_cpu(nmi_cpu_switch, NULL, 1);
|
|
|
|
|
|
|
|
atomic_inc(&multiplex_counter);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
#endif
|
|
|
|
|
2008-09-05 10:17:40 +00:00
|
|
|
#ifdef CONFIG_SMP
|
|
|
|
static int oprofile_cpu_notifier(struct notifier_block *b, unsigned long action,
|
|
|
|
void *data)
|
|
|
|
{
|
|
|
|
int cpu = (unsigned long)data;
|
|
|
|
switch (action) {
|
|
|
|
case CPU_DOWN_FAILED:
|
|
|
|
case CPU_ONLINE:
|
|
|
|
smp_call_function_single(cpu, nmi_cpu_start, NULL, 0);
|
|
|
|
break;
|
|
|
|
case CPU_DOWN_PREPARE:
|
|
|
|
smp_call_function_single(cpu, nmi_cpu_stop, NULL, 1);
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
return NOTIFY_DONE;
|
|
|
|
}
|
|
|
|
|
|
|
|
static struct notifier_block oprofile_cpu_nb = {
|
|
|
|
.notifier_call = oprofile_cpu_notifier
|
|
|
|
};
|
|
|
|
#endif
|
|
|
|
|
|
|
|
#ifdef CONFIG_PM
|
|
|
|
|
|
|
|
static int nmi_suspend(struct sys_device *dev, pm_message_t state)
|
|
|
|
{
|
|
|
|
/* Only one CPU left, just stop that one */
|
|
|
|
if (nmi_enabled == 1)
|
|
|
|
nmi_cpu_stop(NULL);
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int nmi_resume(struct sys_device *dev)
|
|
|
|
{
|
|
|
|
if (nmi_enabled == 1)
|
|
|
|
nmi_cpu_start(NULL);
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static struct sysdev_class oprofile_sysclass = {
|
|
|
|
.name = "oprofile",
|
|
|
|
.resume = nmi_resume,
|
|
|
|
.suspend = nmi_suspend,
|
|
|
|
};
|
|
|
|
|
|
|
|
static struct sys_device device_oprofile = {
|
|
|
|
.id = 0,
|
|
|
|
.cls = &oprofile_sysclass,
|
|
|
|
};
|
|
|
|
|
|
|
|
static int __init init_sysfs(void)
|
|
|
|
{
|
|
|
|
int error;
|
|
|
|
|
|
|
|
error = sysdev_class_register(&oprofile_sysclass);
|
|
|
|
if (!error)
|
|
|
|
error = sysdev_register(&device_oprofile);
|
|
|
|
return error;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void exit_sysfs(void)
|
|
|
|
{
|
|
|
|
sysdev_unregister(&device_oprofile);
|
|
|
|
sysdev_class_unregister(&oprofile_sysclass);
|
|
|
|
}
|
|
|
|
|
|
|
|
#else
|
|
|
|
#define init_sysfs() do { } while (0)
|
|
|
|
#define exit_sysfs() do { } while (0)
|
|
|
|
#endif /* CONFIG_PM */
|
|
|
|
|
2008-01-30 12:32:33 +00:00
|
|
|
static int __init p4_init(char **cpu_type)
|
2005-04-16 22:20:36 +00:00
|
|
|
{
|
|
|
|
__u8 cpu_model = boot_cpu_data.x86_model;
|
|
|
|
|
2009-04-27 15:44:12 +00:00
|
|
|
if (cpu_model > 6 || cpu_model == 5)
|
2005-04-16 22:20:36 +00:00
|
|
|
return 0;
|
|
|
|
|
|
|
|
#ifndef CONFIG_SMP
|
|
|
|
*cpu_type = "i386/p4";
|
|
|
|
model = &op_p4_spec;
|
|
|
|
return 1;
|
|
|
|
#else
|
|
|
|
switch (smp_num_siblings) {
|
2008-01-30 12:32:33 +00:00
|
|
|
case 1:
|
|
|
|
*cpu_type = "i386/p4";
|
|
|
|
model = &op_p4_spec;
|
|
|
|
return 1;
|
|
|
|
|
|
|
|
case 2:
|
|
|
|
*cpu_type = "i386/p4-ht";
|
|
|
|
model = &op_p4_ht2_spec;
|
|
|
|
return 1;
|
2005-04-16 22:20:36 +00:00
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
|
|
|
printk(KERN_INFO "oprofile: P4 HyperThreading detected with > 2 threads\n");
|
|
|
|
printk(KERN_INFO "oprofile: Reverting to timer mode.\n");
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2009-05-06 10:10:23 +00:00
|
|
|
static int force_arch_perfmon;
|
|
|
|
static int force_cpu_type(const char *str, struct kernel_param *kp)
|
|
|
|
{
|
2009-06-23 09:48:14 +00:00
|
|
|
if (!strcmp(str, "arch_perfmon")) {
|
2009-05-06 10:10:23 +00:00
|
|
|
force_arch_perfmon = 1;
|
|
|
|
printk(KERN_INFO "oprofile: forcing architectural perfmon\n");
|
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
module_param_call(cpu_type, force_cpu_type, NULL, NULL, 0);
|
2009-04-27 15:44:11 +00:00
|
|
|
|
2008-01-30 12:32:33 +00:00
|
|
|
static int __init ppro_init(char **cpu_type)
|
2005-04-16 22:20:36 +00:00
|
|
|
{
|
|
|
|
__u8 cpu_model = boot_cpu_data.x86_model;
|
2009-06-12 16:32:07 +00:00
|
|
|
struct op_x86_model_spec const *spec = &op_ppro_spec; /* default */
|
2005-04-16 22:20:36 +00:00
|
|
|
|
2009-04-27 15:44:11 +00:00
|
|
|
if (force_arch_perfmon && cpu_has_arch_perfmon)
|
|
|
|
return 0;
|
|
|
|
|
2008-07-25 00:29:00 +00:00
|
|
|
switch (cpu_model) {
|
|
|
|
case 0 ... 2:
|
|
|
|
*cpu_type = "i386/ppro";
|
|
|
|
break;
|
|
|
|
case 3 ... 5:
|
|
|
|
*cpu_type = "i386/pii";
|
|
|
|
break;
|
|
|
|
case 6 ... 8:
|
2008-11-30 20:39:10 +00:00
|
|
|
case 10 ... 11:
|
2008-07-25 00:29:00 +00:00
|
|
|
*cpu_type = "i386/piii";
|
|
|
|
break;
|
|
|
|
case 9:
|
2008-11-30 20:39:10 +00:00
|
|
|
case 13:
|
2008-07-25 00:29:00 +00:00
|
|
|
*cpu_type = "i386/p6_mobile";
|
|
|
|
break;
|
|
|
|
case 14:
|
2006-05-15 16:44:24 +00:00
|
|
|
*cpu_type = "i386/core";
|
2008-07-25 00:29:00 +00:00
|
|
|
break;
|
|
|
|
case 15: case 23:
|
|
|
|
*cpu_type = "i386/core_2";
|
|
|
|
break;
|
2009-04-27 15:44:13 +00:00
|
|
|
case 26:
|
2009-06-12 16:32:07 +00:00
|
|
|
spec = &op_arch_perfmon_spec;
|
2009-04-27 15:44:13 +00:00
|
|
|
*cpu_type = "i386/core_i7";
|
|
|
|
break;
|
|
|
|
case 28:
|
|
|
|
*cpu_type = "i386/atom";
|
|
|
|
break;
|
2008-07-25 00:29:00 +00:00
|
|
|
default:
|
|
|
|
/* Unknown */
|
2005-04-16 22:20:36 +00:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2009-06-12 16:32:07 +00:00
|
|
|
model = spec;
|
2005-04-16 22:20:36 +00:00
|
|
|
return 1;
|
|
|
|
}
|
|
|
|
|
2007-02-17 18:13:42 +00:00
|
|
|
/* in order to get sysfs right */
|
2005-04-16 22:20:36 +00:00
|
|
|
static int using_nmi;
|
|
|
|
|
2005-09-06 22:17:26 +00:00
|
|
|
int __init op_nmi_init(struct oprofile_operations *ops)
|
2005-04-16 22:20:36 +00:00
|
|
|
{
|
|
|
|
__u8 vendor = boot_cpu_data.x86_vendor;
|
|
|
|
__u8 family = boot_cpu_data.x86;
|
2008-08-18 12:50:31 +00:00
|
|
|
char *cpu_type = NULL;
|
2008-07-22 19:08:48 +00:00
|
|
|
int ret = 0;
|
2005-04-16 22:20:36 +00:00
|
|
|
|
|
|
|
if (!cpu_has_apic)
|
|
|
|
return -ENODEV;
|
2008-01-30 12:32:33 +00:00
|
|
|
|
2005-04-16 22:20:36 +00:00
|
|
|
switch (vendor) {
|
2008-01-30 12:32:33 +00:00
|
|
|
case X86_VENDOR_AMD:
|
|
|
|
/* Needs to be at least an Athlon (or hammer in 32bit mode) */
|
2005-04-16 22:20:36 +00:00
|
|
|
|
2008-01-30 12:32:33 +00:00
|
|
|
switch (family) {
|
|
|
|
case 6:
|
|
|
|
cpu_type = "i386/athlon";
|
|
|
|
break;
|
|
|
|
case 0xf:
|
2009-01-11 12:01:16 +00:00
|
|
|
/*
|
|
|
|
* Actually it could be i386/hammer too, but
|
|
|
|
* give user space an consistent name.
|
|
|
|
*/
|
2008-01-30 12:32:33 +00:00
|
|
|
cpu_type = "x86-64/hammer";
|
|
|
|
break;
|
|
|
|
case 0x10:
|
|
|
|
cpu_type = "x86-64/family10";
|
|
|
|
break;
|
2008-07-22 19:08:47 +00:00
|
|
|
case 0x11:
|
|
|
|
cpu_type = "x86-64/family11h";
|
|
|
|
break;
|
2009-01-11 12:01:16 +00:00
|
|
|
default:
|
|
|
|
return -ENODEV;
|
2008-01-30 12:32:33 +00:00
|
|
|
}
|
2009-01-11 12:01:16 +00:00
|
|
|
model = &op_amd_spec;
|
2008-01-30 12:32:33 +00:00
|
|
|
break;
|
|
|
|
|
|
|
|
case X86_VENDOR_INTEL:
|
|
|
|
switch (family) {
|
|
|
|
/* Pentium IV */
|
|
|
|
case 0xf:
|
2008-08-18 12:50:31 +00:00
|
|
|
p4_init(&cpu_type);
|
2005-04-16 22:20:36 +00:00
|
|
|
break;
|
2008-01-30 12:32:33 +00:00
|
|
|
|
|
|
|
/* A P6-class processor */
|
|
|
|
case 6:
|
2008-08-18 12:50:31 +00:00
|
|
|
ppro_init(&cpu_type);
|
2005-04-16 22:20:36 +00:00
|
|
|
break;
|
|
|
|
|
|
|
|
default:
|
2008-08-18 12:50:31 +00:00
|
|
|
break;
|
2008-01-30 12:32:33 +00:00
|
|
|
}
|
2008-08-18 12:50:31 +00:00
|
|
|
|
2008-10-12 19:12:34 +00:00
|
|
|
if (cpu_type)
|
|
|
|
break;
|
|
|
|
|
|
|
|
if (!cpu_has_arch_perfmon)
|
2008-08-18 12:50:31 +00:00
|
|
|
return -ENODEV;
|
2008-10-12 19:12:34 +00:00
|
|
|
|
|
|
|
/* use arch perfmon as fallback */
|
|
|
|
cpu_type = "i386/arch_perfmon";
|
|
|
|
model = &op_arch_perfmon_spec;
|
2008-01-30 12:32:33 +00:00
|
|
|
break;
|
|
|
|
|
|
|
|
default:
|
|
|
|
return -ENODEV;
|
2005-04-16 22:20:36 +00:00
|
|
|
}
|
|
|
|
|
2008-08-19 01:13:38 +00:00
|
|
|
#ifdef CONFIG_SMP
|
|
|
|
register_cpu_notifier(&oprofile_cpu_nb);
|
|
|
|
#endif
|
2008-07-22 19:09:01 +00:00
|
|
|
/* default values, can be overwritten by model */
|
2009-07-07 17:25:39 +00:00
|
|
|
ops->create_files = nmi_create_files;
|
|
|
|
ops->setup = nmi_setup;
|
|
|
|
ops->shutdown = nmi_shutdown;
|
|
|
|
ops->start = nmi_start;
|
|
|
|
ops->stop = nmi_stop;
|
|
|
|
ops->cpu_type = cpu_type;
|
2009-07-08 11:49:38 +00:00
|
|
|
#ifdef CONFIG_OPROFILE_EVENT_MULTIPLEX
|
|
|
|
ops->switch_events = nmi_switch_event;
|
|
|
|
#endif
|
2008-07-22 19:09:01 +00:00
|
|
|
|
2008-07-22 19:08:48 +00:00
|
|
|
if (model->init)
|
|
|
|
ret = model->init(ops);
|
|
|
|
if (ret)
|
|
|
|
return ret;
|
|
|
|
|
2007-02-17 18:13:42 +00:00
|
|
|
init_sysfs();
|
2005-04-16 22:20:36 +00:00
|
|
|
using_nmi = 1;
|
|
|
|
printk(KERN_INFO "oprofile: using NMI interrupt.\n");
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2005-09-06 22:17:26 +00:00
|
|
|
void op_nmi_exit(void)
|
2005-04-16 22:20:36 +00:00
|
|
|
{
|
2008-08-19 01:13:38 +00:00
|
|
|
if (using_nmi) {
|
2007-02-17 18:13:42 +00:00
|
|
|
exit_sysfs();
|
2008-08-19 01:13:38 +00:00
|
|
|
#ifdef CONFIG_SMP
|
|
|
|
unregister_cpu_notifier(&oprofile_cpu_nb);
|
|
|
|
#endif
|
|
|
|
}
|
2008-07-22 19:08:48 +00:00
|
|
|
if (model->exit)
|
|
|
|
model->exit();
|
2005-04-16 22:20:36 +00:00
|
|
|
}
|