2015-07-30 19:17:43 +00:00
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/*
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2016-02-15 04:22:17 +00:00
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* Copyright(c) 2015, 2016 Intel Corporation.
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2015-07-30 19:17:43 +00:00
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*
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* This file is provided under a dual BSD/GPLv2 license. When using or
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* redistributing this file, you may do so under either license.
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*
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* GPL LICENSE SUMMARY
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* General Public License for more details.
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*
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* BSD LICENSE
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* - Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* - Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* - Neither the name of Intel Corporation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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*/
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#include "hfi.h"
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2016-02-14 20:44:43 +00:00
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#include "verbs_txreq.h"
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2015-07-30 19:17:43 +00:00
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#include "qp.h"
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/* cut down ridiculously long IB macro names */
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#define OP(x) IB_OPCODE_UC_##x
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2016-02-14 20:45:36 +00:00
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/* only opcode mask for adaptive pio */
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const u32 uc_only_opcode =
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BIT(OP(SEND_ONLY) & 0x1f) |
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BIT(OP(SEND_ONLY_WITH_IMMEDIATE & 0x1f)) |
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BIT(OP(RDMA_WRITE_ONLY & 0x1f)) |
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BIT(OP(RDMA_WRITE_ONLY_WITH_IMMEDIATE & 0x1f));
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2015-07-30 19:17:43 +00:00
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/**
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* hfi1_make_uc_req - construct a request packet (SEND, RDMA write)
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* @qp: a pointer to the QP
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*
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2016-02-14 20:10:04 +00:00
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* Assume s_lock is held.
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*
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2015-07-30 19:17:43 +00:00
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* Return 1 if constructed; otherwise, return 0.
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*/
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2016-02-14 20:44:43 +00:00
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int hfi1_make_uc_req(struct rvt_qp *qp, struct hfi1_pkt_state *ps)
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2015-07-30 19:17:43 +00:00
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{
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2016-01-19 22:42:00 +00:00
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struct hfi1_qp_priv *priv = qp->priv;
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2015-07-30 19:17:43 +00:00
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struct hfi1_other_headers *ohdr;
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2016-01-19 22:42:28 +00:00
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struct rvt_swqe *wqe;
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2015-07-30 19:17:43 +00:00
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u32 hwords = 5;
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u32 bth0 = 0;
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u32 len;
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u32 pmtu = qp->pmtu;
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int middle = 0;
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2016-02-14 20:44:43 +00:00
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ps->s_txreq = get_txreq(ps->dev, qp);
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if (IS_ERR(ps->s_txreq))
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goto bail_no_tx;
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2016-01-19 22:43:33 +00:00
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if (!(ib_rvt_state_ops[qp->state] & RVT_PROCESS_SEND_OK)) {
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if (!(ib_rvt_state_ops[qp->state] & RVT_FLUSH_SEND))
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2015-07-30 19:17:43 +00:00
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goto bail;
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/* We are in the error state, flush the work request. */
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2016-02-14 20:10:04 +00:00
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smp_read_barrier_depends(); /* see post_one_send() */
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if (qp->s_last == ACCESS_ONCE(qp->s_head))
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2015-07-30 19:17:43 +00:00
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goto bail;
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/* If DMAs are in progress, we can't flush immediately. */
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2016-02-14 20:45:36 +00:00
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if (iowait_sdma_pending(&priv->s_iowait)) {
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2016-01-19 22:43:01 +00:00
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qp->s_flags |= RVT_S_WAIT_DMA;
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2015-07-30 19:17:43 +00:00
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goto bail;
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}
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clear_ahg(qp);
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2016-01-19 22:43:33 +00:00
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wqe = rvt_get_swqe_ptr(qp, qp->s_last);
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2015-07-30 19:17:43 +00:00
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hfi1_send_complete(qp, wqe, IB_WC_WR_FLUSH_ERR);
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2016-02-14 20:44:43 +00:00
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goto done_free_tx;
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2015-07-30 19:17:43 +00:00
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}
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2016-02-14 20:44:43 +00:00
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ohdr = &ps->s_txreq->phdr.hdr.u.oth;
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2015-07-30 19:17:43 +00:00
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if (qp->remote_ah_attr.ah_flags & IB_AH_GRH)
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2016-02-14 20:44:43 +00:00
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ohdr = &ps->s_txreq->phdr.hdr.u.l.oth;
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2015-07-30 19:17:43 +00:00
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/* Get the next send request. */
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2016-01-19 22:43:33 +00:00
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wqe = rvt_get_swqe_ptr(qp, qp->s_cur);
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2015-07-30 19:17:43 +00:00
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qp->s_wqe = NULL;
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switch (qp->s_state) {
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default:
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2016-01-19 22:43:33 +00:00
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if (!(ib_rvt_state_ops[qp->state] &
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RVT_PROCESS_NEXT_SEND_OK))
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2015-07-30 19:17:43 +00:00
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goto bail;
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/* Check if send work queue is empty. */
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2016-02-14 20:10:04 +00:00
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smp_read_barrier_depends(); /* see post_one_send() */
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if (qp->s_cur == ACCESS_ONCE(qp->s_head)) {
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2015-07-30 19:17:43 +00:00
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clear_ahg(qp);
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goto bail;
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}
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/*
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* Start a new request.
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*/
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2016-02-14 20:10:04 +00:00
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qp->s_psn = wqe->psn;
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2015-07-30 19:17:43 +00:00
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qp->s_sge.sge = wqe->sg_list[0];
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qp->s_sge.sg_list = wqe->sg_list + 1;
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qp->s_sge.num_sge = wqe->wr.num_sge;
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qp->s_sge.total_len = wqe->length;
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len = wqe->length;
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qp->s_len = len;
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switch (wqe->wr.opcode) {
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case IB_WR_SEND:
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case IB_WR_SEND_WITH_IMM:
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if (len > pmtu) {
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qp->s_state = OP(SEND_FIRST);
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len = pmtu;
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break;
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}
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2016-02-15 04:22:00 +00:00
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if (wqe->wr.opcode == IB_WR_SEND) {
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2015-07-30 19:17:43 +00:00
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qp->s_state = OP(SEND_ONLY);
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2016-02-15 04:22:00 +00:00
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} else {
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2015-07-30 19:17:43 +00:00
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qp->s_state =
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OP(SEND_ONLY_WITH_IMMEDIATE);
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/* Immediate data comes after the BTH */
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ohdr->u.imm_data = wqe->wr.ex.imm_data;
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hwords += 1;
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}
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if (wqe->wr.send_flags & IB_SEND_SOLICITED)
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bth0 |= IB_BTH_SOLICITED;
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qp->s_wqe = wqe;
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if (++qp->s_cur >= qp->s_size)
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qp->s_cur = 0;
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break;
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case IB_WR_RDMA_WRITE:
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case IB_WR_RDMA_WRITE_WITH_IMM:
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ohdr->u.rc.reth.vaddr =
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2015-10-08 08:16:33 +00:00
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cpu_to_be64(wqe->rdma_wr.remote_addr);
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2015-07-30 19:17:43 +00:00
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ohdr->u.rc.reth.rkey =
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2015-10-08 08:16:33 +00:00
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cpu_to_be32(wqe->rdma_wr.rkey);
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2015-07-30 19:17:43 +00:00
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ohdr->u.rc.reth.length = cpu_to_be32(len);
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hwords += sizeof(struct ib_reth) / 4;
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if (len > pmtu) {
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qp->s_state = OP(RDMA_WRITE_FIRST);
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len = pmtu;
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break;
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}
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2016-02-15 04:22:00 +00:00
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if (wqe->wr.opcode == IB_WR_RDMA_WRITE) {
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2015-07-30 19:17:43 +00:00
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qp->s_state = OP(RDMA_WRITE_ONLY);
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2016-02-15 04:22:00 +00:00
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} else {
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2015-07-30 19:17:43 +00:00
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qp->s_state =
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OP(RDMA_WRITE_ONLY_WITH_IMMEDIATE);
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/* Immediate data comes after the RETH */
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ohdr->u.rc.imm_data = wqe->wr.ex.imm_data;
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hwords += 1;
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if (wqe->wr.send_flags & IB_SEND_SOLICITED)
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bth0 |= IB_BTH_SOLICITED;
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}
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qp->s_wqe = wqe;
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if (++qp->s_cur >= qp->s_size)
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qp->s_cur = 0;
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break;
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default:
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goto bail;
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}
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break;
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case OP(SEND_FIRST):
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qp->s_state = OP(SEND_MIDDLE);
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/* FALLTHROUGH */
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case OP(SEND_MIDDLE):
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len = qp->s_len;
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if (len > pmtu) {
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len = pmtu;
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middle = HFI1_CAP_IS_KSET(SDMA_AHG);
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break;
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}
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2016-02-15 04:22:00 +00:00
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if (wqe->wr.opcode == IB_WR_SEND) {
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2015-07-30 19:17:43 +00:00
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qp->s_state = OP(SEND_LAST);
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2016-02-15 04:22:00 +00:00
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} else {
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2015-07-30 19:17:43 +00:00
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qp->s_state = OP(SEND_LAST_WITH_IMMEDIATE);
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/* Immediate data comes after the BTH */
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ohdr->u.imm_data = wqe->wr.ex.imm_data;
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hwords += 1;
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}
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if (wqe->wr.send_flags & IB_SEND_SOLICITED)
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bth0 |= IB_BTH_SOLICITED;
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qp->s_wqe = wqe;
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if (++qp->s_cur >= qp->s_size)
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qp->s_cur = 0;
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break;
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case OP(RDMA_WRITE_FIRST):
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qp->s_state = OP(RDMA_WRITE_MIDDLE);
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/* FALLTHROUGH */
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case OP(RDMA_WRITE_MIDDLE):
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len = qp->s_len;
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if (len > pmtu) {
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len = pmtu;
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middle = HFI1_CAP_IS_KSET(SDMA_AHG);
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break;
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}
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2016-02-15 04:22:00 +00:00
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if (wqe->wr.opcode == IB_WR_RDMA_WRITE) {
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2015-07-30 19:17:43 +00:00
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qp->s_state = OP(RDMA_WRITE_LAST);
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2016-02-15 04:22:00 +00:00
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} else {
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2015-07-30 19:17:43 +00:00
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qp->s_state =
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OP(RDMA_WRITE_LAST_WITH_IMMEDIATE);
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/* Immediate data comes after the BTH */
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ohdr->u.imm_data = wqe->wr.ex.imm_data;
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hwords += 1;
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if (wqe->wr.send_flags & IB_SEND_SOLICITED)
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bth0 |= IB_BTH_SOLICITED;
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}
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qp->s_wqe = wqe;
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if (++qp->s_cur >= qp->s_size)
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qp->s_cur = 0;
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break;
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}
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qp->s_len -= len;
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qp->s_hdrwords = hwords;
|
2016-02-14 20:45:36 +00:00
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ps->s_txreq->sde = priv->s_sde;
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2015-07-30 19:17:43 +00:00
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qp->s_cur_sge = &qp->s_sge;
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qp->s_cur_size = len;
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hfi1_make_ruc_header(qp, ohdr, bth0 | (qp->s_state << 24),
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2016-02-14 20:44:43 +00:00
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mask_psn(qp->s_psn++), middle, ps);
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2016-02-26 21:33:13 +00:00
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/* pbc */
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ps->s_txreq->hdr_dwords = qp->s_hdrwords + 2;
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2016-02-14 20:44:43 +00:00
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return 1;
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done_free_tx:
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hfi1_put_txreq(ps->s_txreq);
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ps->s_txreq = NULL;
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2016-02-14 20:10:04 +00:00
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return 1;
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2015-07-30 19:17:43 +00:00
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bail:
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2016-02-14 20:44:43 +00:00
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hfi1_put_txreq(ps->s_txreq);
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bail_no_tx:
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ps->s_txreq = NULL;
|
2016-01-19 22:43:01 +00:00
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qp->s_flags &= ~RVT_S_BUSY;
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2016-02-14 20:44:43 +00:00
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qp->s_hdrwords = 0;
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return 0;
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2015-07-30 19:17:43 +00:00
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}
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/**
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* hfi1_uc_rcv - handle an incoming UC packet
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* @ibp: the port the packet came in on
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* @hdr: the header of the packet
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* @rcv_flags: flags relevant to rcv processing
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* @data: the packet data
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* @tlen: the length of the packet
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* @qp: the QP for this packet.
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*
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* This is called from qp_rcv() to process an incoming UC packet
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* for the given QP.
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* Called at interrupt level.
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*/
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void hfi1_uc_rcv(struct hfi1_packet *packet)
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{
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struct hfi1_ibport *ibp = &packet->rcd->ppd->ibport_data;
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struct hfi1_ib_header *hdr = packet->hdr;
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u32 rcv_flags = packet->rcv_flags;
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void *data = packet->ebuf;
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u32 tlen = packet->tlen;
|
2016-01-19 22:42:28 +00:00
|
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struct rvt_qp *qp = packet->qp;
|
2015-07-30 19:17:43 +00:00
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struct hfi1_other_headers *ohdr = packet->ohdr;
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staging/rdma/hfi1: optionally prescan rx queue for {B, F}ECNs - UC, RC
To more rapidly respond to Explicit Congestion Notifications, prescan the
receive queue, and process FECNs, and BECNs first. When a UC, or RC packet
containing a FECN, or BECN is found, immediately react to the ECN (either by
returning a CNP, or adjusting the injection rate). Afterward, the packet will
be processed normally.
Reviewed-by: Mike Marciniszyn <mike.marciniszyn@intel.com>
Reviewed-by: Dennis Dalessandro <dennis.dalessandro@intel.com>
Signed-off-by: Arthur Kepner <arthur.kepner@intel.com>
Signed-off-by: Ira Weiny <ira.weiny@intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2015-11-05 02:10:10 +00:00
|
|
|
u32 bth0, opcode;
|
2015-07-30 19:17:43 +00:00
|
|
|
u32 hdrsize = packet->hlen;
|
|
|
|
u32 psn;
|
|
|
|
u32 pad;
|
|
|
|
struct ib_wc wc;
|
|
|
|
u32 pmtu = qp->pmtu;
|
|
|
|
struct ib_reth *reth;
|
|
|
|
int has_grh = rcv_flags & HFI1_HAS_GRH;
|
|
|
|
int ret;
|
|
|
|
|
staging/rdma/hfi1: optionally prescan rx queue for {B, F}ECNs - UC, RC
To more rapidly respond to Explicit Congestion Notifications, prescan the
receive queue, and process FECNs, and BECNs first. When a UC, or RC packet
containing a FECN, or BECN is found, immediately react to the ECN (either by
returning a CNP, or adjusting the injection rate). Afterward, the packet will
be processed normally.
Reviewed-by: Mike Marciniszyn <mike.marciniszyn@intel.com>
Reviewed-by: Dennis Dalessandro <dennis.dalessandro@intel.com>
Signed-off-by: Arthur Kepner <arthur.kepner@intel.com>
Signed-off-by: Ira Weiny <ira.weiny@intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2015-11-05 02:10:10 +00:00
|
|
|
bth0 = be32_to_cpu(ohdr->bth[0]);
|
|
|
|
if (hfi1_ruc_check_hdr(ibp, hdr, has_grh, qp, bth0))
|
2015-07-30 19:17:43 +00:00
|
|
|
return;
|
|
|
|
|
2016-07-25 20:38:07 +00:00
|
|
|
process_ecn(qp, packet, true);
|
2015-07-30 19:17:43 +00:00
|
|
|
|
|
|
|
psn = be32_to_cpu(ohdr->bth[2]);
|
staging/rdma/hfi1: optionally prescan rx queue for {B, F}ECNs - UC, RC
To more rapidly respond to Explicit Congestion Notifications, prescan the
receive queue, and process FECNs, and BECNs first. When a UC, or RC packet
containing a FECN, or BECN is found, immediately react to the ECN (either by
returning a CNP, or adjusting the injection rate). Afterward, the packet will
be processed normally.
Reviewed-by: Mike Marciniszyn <mike.marciniszyn@intel.com>
Reviewed-by: Dennis Dalessandro <dennis.dalessandro@intel.com>
Signed-off-by: Arthur Kepner <arthur.kepner@intel.com>
Signed-off-by: Ira Weiny <ira.weiny@intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2015-11-05 02:10:10 +00:00
|
|
|
opcode = (bth0 >> 24) & 0xff;
|
2015-07-30 19:17:43 +00:00
|
|
|
|
|
|
|
/* Compare the PSN verses the expected PSN. */
|
|
|
|
if (unlikely(cmp_psn(psn, qp->r_psn) != 0)) {
|
|
|
|
/*
|
|
|
|
* Handle a sequence error.
|
|
|
|
* Silently drop any current message.
|
|
|
|
*/
|
|
|
|
qp->r_psn = psn;
|
|
|
|
inv:
|
|
|
|
if (qp->r_state == OP(SEND_FIRST) ||
|
|
|
|
qp->r_state == OP(SEND_MIDDLE)) {
|
2016-01-19 22:43:01 +00:00
|
|
|
set_bit(RVT_R_REWIND_SGE, &qp->r_aflags);
|
2015-07-30 19:17:43 +00:00
|
|
|
qp->r_sge.num_sge = 0;
|
2016-02-15 04:22:00 +00:00
|
|
|
} else {
|
2016-01-19 22:43:44 +00:00
|
|
|
rvt_put_ss(&qp->r_sge);
|
2016-02-15 04:22:00 +00:00
|
|
|
}
|
2015-07-30 19:17:43 +00:00
|
|
|
qp->r_state = OP(SEND_LAST);
|
|
|
|
switch (opcode) {
|
|
|
|
case OP(SEND_FIRST):
|
|
|
|
case OP(SEND_ONLY):
|
|
|
|
case OP(SEND_ONLY_WITH_IMMEDIATE):
|
|
|
|
goto send_first;
|
|
|
|
|
|
|
|
case OP(RDMA_WRITE_FIRST):
|
|
|
|
case OP(RDMA_WRITE_ONLY):
|
|
|
|
case OP(RDMA_WRITE_ONLY_WITH_IMMEDIATE):
|
|
|
|
goto rdma_first;
|
|
|
|
|
|
|
|
default:
|
|
|
|
goto drop;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Check for opcode sequence errors. */
|
|
|
|
switch (qp->r_state) {
|
|
|
|
case OP(SEND_FIRST):
|
|
|
|
case OP(SEND_MIDDLE):
|
|
|
|
if (opcode == OP(SEND_MIDDLE) ||
|
|
|
|
opcode == OP(SEND_LAST) ||
|
|
|
|
opcode == OP(SEND_LAST_WITH_IMMEDIATE))
|
|
|
|
break;
|
|
|
|
goto inv;
|
|
|
|
|
|
|
|
case OP(RDMA_WRITE_FIRST):
|
|
|
|
case OP(RDMA_WRITE_MIDDLE):
|
|
|
|
if (opcode == OP(RDMA_WRITE_MIDDLE) ||
|
|
|
|
opcode == OP(RDMA_WRITE_LAST) ||
|
|
|
|
opcode == OP(RDMA_WRITE_LAST_WITH_IMMEDIATE))
|
|
|
|
break;
|
|
|
|
goto inv;
|
|
|
|
|
|
|
|
default:
|
|
|
|
if (opcode == OP(SEND_FIRST) ||
|
|
|
|
opcode == OP(SEND_ONLY) ||
|
|
|
|
opcode == OP(SEND_ONLY_WITH_IMMEDIATE) ||
|
|
|
|
opcode == OP(RDMA_WRITE_FIRST) ||
|
|
|
|
opcode == OP(RDMA_WRITE_ONLY) ||
|
|
|
|
opcode == OP(RDMA_WRITE_ONLY_WITH_IMMEDIATE))
|
|
|
|
break;
|
|
|
|
goto inv;
|
|
|
|
}
|
|
|
|
|
2016-01-19 22:43:01 +00:00
|
|
|
if (qp->state == IB_QPS_RTR && !(qp->r_flags & RVT_R_COMM_EST))
|
2015-07-30 19:17:43 +00:00
|
|
|
qp_comm_est(qp);
|
|
|
|
|
|
|
|
/* OK, process the packet. */
|
|
|
|
switch (opcode) {
|
|
|
|
case OP(SEND_FIRST):
|
|
|
|
case OP(SEND_ONLY):
|
|
|
|
case OP(SEND_ONLY_WITH_IMMEDIATE):
|
|
|
|
send_first:
|
2016-02-15 04:22:00 +00:00
|
|
|
if (test_and_clear_bit(RVT_R_REWIND_SGE, &qp->r_aflags)) {
|
2015-07-30 19:17:43 +00:00
|
|
|
qp->r_sge = qp->s_rdma_read_sge;
|
2016-02-15 04:22:00 +00:00
|
|
|
} else {
|
2016-01-19 22:43:44 +00:00
|
|
|
ret = hfi1_rvt_get_rwqe(qp, 0);
|
2015-07-30 19:17:43 +00:00
|
|
|
if (ret < 0)
|
|
|
|
goto op_err;
|
|
|
|
if (!ret)
|
|
|
|
goto drop;
|
|
|
|
/*
|
|
|
|
* qp->s_rdma_read_sge will be the owner
|
|
|
|
* of the mr references.
|
|
|
|
*/
|
|
|
|
qp->s_rdma_read_sge = qp->r_sge;
|
|
|
|
}
|
|
|
|
qp->r_rcv_len = 0;
|
|
|
|
if (opcode == OP(SEND_ONLY))
|
|
|
|
goto no_immediate_data;
|
|
|
|
else if (opcode == OP(SEND_ONLY_WITH_IMMEDIATE))
|
|
|
|
goto send_last_imm;
|
|
|
|
/* FALLTHROUGH */
|
|
|
|
case OP(SEND_MIDDLE):
|
|
|
|
/* Check for invalid length PMTU or posted rwqe len. */
|
|
|
|
if (unlikely(tlen != (hdrsize + pmtu + 4)))
|
|
|
|
goto rewind;
|
|
|
|
qp->r_rcv_len += pmtu;
|
|
|
|
if (unlikely(qp->r_rcv_len > qp->r_len))
|
|
|
|
goto rewind;
|
2016-02-03 22:35:49 +00:00
|
|
|
hfi1_copy_sge(&qp->r_sge, data, pmtu, 0, 0);
|
2015-07-30 19:17:43 +00:00
|
|
|
break;
|
|
|
|
|
|
|
|
case OP(SEND_LAST_WITH_IMMEDIATE):
|
|
|
|
send_last_imm:
|
|
|
|
wc.ex.imm_data = ohdr->u.imm_data;
|
|
|
|
wc.wc_flags = IB_WC_WITH_IMM;
|
|
|
|
goto send_last;
|
|
|
|
case OP(SEND_LAST):
|
|
|
|
no_immediate_data:
|
|
|
|
wc.ex.imm_data = 0;
|
|
|
|
wc.wc_flags = 0;
|
|
|
|
send_last:
|
|
|
|
/* Get the number of bytes the message was padded by. */
|
|
|
|
pad = (be32_to_cpu(ohdr->bth[0]) >> 20) & 3;
|
|
|
|
/* Check for invalid length. */
|
|
|
|
/* LAST len should be >= 1 */
|
|
|
|
if (unlikely(tlen < (hdrsize + pad + 4)))
|
|
|
|
goto rewind;
|
|
|
|
/* Don't count the CRC. */
|
|
|
|
tlen -= (hdrsize + pad + 4);
|
|
|
|
wc.byte_len = tlen + qp->r_rcv_len;
|
|
|
|
if (unlikely(wc.byte_len > qp->r_len))
|
|
|
|
goto rewind;
|
|
|
|
wc.opcode = IB_WC_RECV;
|
2016-02-03 22:35:49 +00:00
|
|
|
hfi1_copy_sge(&qp->r_sge, data, tlen, 0, 0);
|
2016-01-19 22:43:44 +00:00
|
|
|
rvt_put_ss(&qp->s_rdma_read_sge);
|
2015-07-30 19:17:43 +00:00
|
|
|
last_imm:
|
|
|
|
wc.wr_id = qp->r_wr_id;
|
|
|
|
wc.status = IB_WC_SUCCESS;
|
|
|
|
wc.qp = &qp->ibqp;
|
|
|
|
wc.src_qp = qp->remote_qpn;
|
|
|
|
wc.slid = qp->remote_ah_attr.dlid;
|
|
|
|
/*
|
|
|
|
* It seems that IB mandates the presence of an SL in a
|
|
|
|
* work completion only for the UD transport (see section
|
|
|
|
* 11.4.2 of IBTA Vol. 1).
|
|
|
|
*
|
|
|
|
* However, the way the SL is chosen below is consistent
|
|
|
|
* with the way that IB/qib works and is trying avoid
|
|
|
|
* introducing incompatibilities.
|
|
|
|
*
|
|
|
|
* See also OPA Vol. 1, section 9.7.6, and table 9-17.
|
|
|
|
*/
|
|
|
|
wc.sl = qp->remote_ah_attr.sl;
|
|
|
|
/* zero fields that are N/A */
|
|
|
|
wc.vendor_err = 0;
|
|
|
|
wc.pkey_index = 0;
|
|
|
|
wc.dlid_path_bits = 0;
|
|
|
|
wc.port_num = 0;
|
|
|
|
/* Signal completion event if the solicited bit is set. */
|
2016-01-19 22:43:22 +00:00
|
|
|
rvt_cq_enter(ibcq_to_rvtcq(qp->ibqp.recv_cq), &wc,
|
|
|
|
(ohdr->bth[0] &
|
|
|
|
cpu_to_be32(IB_BTH_SOLICITED)) != 0);
|
2015-07-30 19:17:43 +00:00
|
|
|
break;
|
|
|
|
|
|
|
|
case OP(RDMA_WRITE_FIRST):
|
|
|
|
case OP(RDMA_WRITE_ONLY):
|
|
|
|
case OP(RDMA_WRITE_ONLY_WITH_IMMEDIATE): /* consume RWQE */
|
|
|
|
rdma_first:
|
|
|
|
if (unlikely(!(qp->qp_access_flags &
|
|
|
|
IB_ACCESS_REMOTE_WRITE))) {
|
|
|
|
goto drop;
|
|
|
|
}
|
|
|
|
reth = &ohdr->u.rc.reth;
|
|
|
|
qp->r_len = be32_to_cpu(reth->length);
|
|
|
|
qp->r_rcv_len = 0;
|
|
|
|
qp->r_sge.sg_list = NULL;
|
|
|
|
if (qp->r_len != 0) {
|
|
|
|
u32 rkey = be32_to_cpu(reth->rkey);
|
|
|
|
u64 vaddr = be64_to_cpu(reth->vaddr);
|
|
|
|
int ok;
|
|
|
|
|
|
|
|
/* Check rkey */
|
2016-01-19 22:42:28 +00:00
|
|
|
ok = rvt_rkey_ok(qp, &qp->r_sge.sge, qp->r_len,
|
|
|
|
vaddr, rkey, IB_ACCESS_REMOTE_WRITE);
|
2015-07-30 19:17:43 +00:00
|
|
|
if (unlikely(!ok))
|
|
|
|
goto drop;
|
|
|
|
qp->r_sge.num_sge = 1;
|
|
|
|
} else {
|
|
|
|
qp->r_sge.num_sge = 0;
|
|
|
|
qp->r_sge.sge.mr = NULL;
|
|
|
|
qp->r_sge.sge.vaddr = NULL;
|
|
|
|
qp->r_sge.sge.length = 0;
|
|
|
|
qp->r_sge.sge.sge_length = 0;
|
|
|
|
}
|
2016-02-15 04:22:00 +00:00
|
|
|
if (opcode == OP(RDMA_WRITE_ONLY)) {
|
2015-07-30 19:17:43 +00:00
|
|
|
goto rdma_last;
|
2016-02-15 04:22:00 +00:00
|
|
|
} else if (opcode == OP(RDMA_WRITE_ONLY_WITH_IMMEDIATE)) {
|
2015-07-30 19:17:43 +00:00
|
|
|
wc.ex.imm_data = ohdr->u.rc.imm_data;
|
|
|
|
goto rdma_last_imm;
|
|
|
|
}
|
|
|
|
/* FALLTHROUGH */
|
|
|
|
case OP(RDMA_WRITE_MIDDLE):
|
|
|
|
/* Check for invalid length PMTU or posted rwqe len. */
|
|
|
|
if (unlikely(tlen != (hdrsize + pmtu + 4)))
|
|
|
|
goto drop;
|
|
|
|
qp->r_rcv_len += pmtu;
|
|
|
|
if (unlikely(qp->r_rcv_len > qp->r_len))
|
|
|
|
goto drop;
|
2016-02-03 22:35:49 +00:00
|
|
|
hfi1_copy_sge(&qp->r_sge, data, pmtu, 1, 0);
|
2015-07-30 19:17:43 +00:00
|
|
|
break;
|
|
|
|
|
|
|
|
case OP(RDMA_WRITE_LAST_WITH_IMMEDIATE):
|
|
|
|
wc.ex.imm_data = ohdr->u.imm_data;
|
|
|
|
rdma_last_imm:
|
|
|
|
wc.wc_flags = IB_WC_WITH_IMM;
|
|
|
|
|
|
|
|
/* Get the number of bytes the message was padded by. */
|
|
|
|
pad = (be32_to_cpu(ohdr->bth[0]) >> 20) & 3;
|
|
|
|
/* Check for invalid length. */
|
|
|
|
/* LAST len should be >= 1 */
|
|
|
|
if (unlikely(tlen < (hdrsize + pad + 4)))
|
|
|
|
goto drop;
|
|
|
|
/* Don't count the CRC. */
|
|
|
|
tlen -= (hdrsize + pad + 4);
|
|
|
|
if (unlikely(tlen + qp->r_rcv_len != qp->r_len))
|
|
|
|
goto drop;
|
2016-02-15 04:22:00 +00:00
|
|
|
if (test_and_clear_bit(RVT_R_REWIND_SGE, &qp->r_aflags)) {
|
2016-01-19 22:43:44 +00:00
|
|
|
rvt_put_ss(&qp->s_rdma_read_sge);
|
2016-02-15 04:22:00 +00:00
|
|
|
} else {
|
2016-01-19 22:43:44 +00:00
|
|
|
ret = hfi1_rvt_get_rwqe(qp, 1);
|
2015-07-30 19:17:43 +00:00
|
|
|
if (ret < 0)
|
|
|
|
goto op_err;
|
|
|
|
if (!ret)
|
|
|
|
goto drop;
|
|
|
|
}
|
|
|
|
wc.byte_len = qp->r_len;
|
|
|
|
wc.opcode = IB_WC_RECV_RDMA_WITH_IMM;
|
2016-02-03 22:35:49 +00:00
|
|
|
hfi1_copy_sge(&qp->r_sge, data, tlen, 1, 0);
|
2016-01-19 22:43:44 +00:00
|
|
|
rvt_put_ss(&qp->r_sge);
|
2015-07-30 19:17:43 +00:00
|
|
|
goto last_imm;
|
|
|
|
|
|
|
|
case OP(RDMA_WRITE_LAST):
|
|
|
|
rdma_last:
|
|
|
|
/* Get the number of bytes the message was padded by. */
|
|
|
|
pad = (be32_to_cpu(ohdr->bth[0]) >> 20) & 3;
|
|
|
|
/* Check for invalid length. */
|
|
|
|
/* LAST len should be >= 1 */
|
|
|
|
if (unlikely(tlen < (hdrsize + pad + 4)))
|
|
|
|
goto drop;
|
|
|
|
/* Don't count the CRC. */
|
|
|
|
tlen -= (hdrsize + pad + 4);
|
|
|
|
if (unlikely(tlen + qp->r_rcv_len != qp->r_len))
|
|
|
|
goto drop;
|
2016-02-03 22:35:49 +00:00
|
|
|
hfi1_copy_sge(&qp->r_sge, data, tlen, 1, 0);
|
2016-01-19 22:43:44 +00:00
|
|
|
rvt_put_ss(&qp->r_sge);
|
2015-07-30 19:17:43 +00:00
|
|
|
break;
|
|
|
|
|
|
|
|
default:
|
|
|
|
/* Drop packet for unknown opcodes. */
|
|
|
|
goto drop;
|
|
|
|
}
|
|
|
|
qp->r_psn++;
|
|
|
|
qp->r_state = opcode;
|
|
|
|
return;
|
|
|
|
|
|
|
|
rewind:
|
2016-01-19 22:43:01 +00:00
|
|
|
set_bit(RVT_R_REWIND_SGE, &qp->r_aflags);
|
2015-07-30 19:17:43 +00:00
|
|
|
qp->r_sge.num_sge = 0;
|
|
|
|
drop:
|
2016-01-19 22:42:39 +00:00
|
|
|
ibp->rvp.n_pkt_drops++;
|
2015-07-30 19:17:43 +00:00
|
|
|
return;
|
|
|
|
|
|
|
|
op_err:
|
|
|
|
hfi1_rc_error(qp, IB_WC_LOC_QP_OP_ERR);
|
|
|
|
}
|