This website requires JavaScript.
Explore
Help
Register
Sign In
leandrof
/
linux
Watch
1
Star
0
Fork
0
You've already forked linux
forked from
Minki/linux
Code
Issues
Pull Requests
Packages
Projects
Releases
Wiki
Activity
a245fecbb8
linux
/
drivers
/
clk
/
rockchip
/
Makefile
7 lines
79 B
Makefile
Raw
Normal View
History
Unescape
Escape
clk: add support for Rockchip gate clocks This adds basic support for gate-clocks on Rockchip SoCs. There are 16 gates in each register and use the HIWORD_MASK mechanism for changing gate settings. The gate registers form a continuos block which makes the dt node structure a matter of taste, as either all 160 gates can be put into one gate clock spanning all registers or they can be divided into the 10 individual gates containing 16 clocks each. The code supports both approaches. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-06-13 14:59:40 +00:00
#
# Rockchip Clock specific Makefile
#
obj-y
+=
clk-rockchip.o
clk: rockchip: add basic infrastructure for clock branches This adds infrastructure for registering clock branches. On Rockchip SoCs most clock branches are a combination of mux,divider and gate components, thus a composite clock is used when appropriate. Clock branches are supposed to be declared in an array using the COMPOSITE* or MUX, etc makros defined in the header and then registered using rockchip_clk_register_branches. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Acked-By: Max Schwarz <max.schwarz@online.de> Tested-By: Max Schwarz <max.schwarz@online.de> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2014-07-02 23:58:39 +00:00
obj-y
+=
clk.o
Reference in New Issue
Copy Permalink