2015-09-23 07:14:54 +00:00
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/*
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* Copyright 2015 Advanced Micro Devices, Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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*/
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#ifndef _EVENTMGR_H_
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#define _EVENTMGR_H_
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#include <linux/mutex.h>
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#include "pp_instance.h"
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#include "hardwaremanager.h"
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#include "eventmanager.h"
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#include "pp_feature.h"
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#include "pp_power_source.h"
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#include "power_state.h"
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typedef int (*pem_event_action)(struct pp_eventmgr *eventmgr,
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struct pem_event_data *event_data);
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struct action_chain {
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const char *description; /* action chain description for debugging purpose */
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2016-04-10 14:30:02 +00:00
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const pem_event_action * const *action_chain; /* pointer to chain of event actions */
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2015-09-23 07:14:54 +00:00
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};
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struct pem_power_source_ui_state_info {
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enum PP_StateUILabel current_ui_label;
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enum PP_StateUILabel default_ui_lable;
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unsigned long configurable_ui_mapping;
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};
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struct pp_clock_range {
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uint32_t min_sclk_khz;
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uint32_t max_sclk_khz;
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uint32_t min_mclk_khz;
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uint32_t max_mclk_khz;
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uint32_t min_vclk_khz;
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uint32_t max_vclk_khz;
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uint32_t min_dclk_khz;
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uint32_t max_dclk_khz;
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uint32_t min_aclk_khz;
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uint32_t max_aclk_khz;
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uint32_t min_eclk_khz;
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uint32_t max_eclk_khz;
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};
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enum pp_state {
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UNINITIALIZED,
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INACTIVE,
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ACTIVE
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};
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enum pp_ring_index {
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PP_RING_TYPE_GFX_INDEX = 0,
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PP_RING_TYPE_DMA_INDEX,
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PP_RING_TYPE_DMA1_INDEX,
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PP_RING_TYPE_UVD_INDEX,
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PP_RING_TYPE_VCE0_INDEX,
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PP_RING_TYPE_VCE1_INDEX,
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PP_RING_TYPE_CP1_INDEX,
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PP_RING_TYPE_CP2_INDEX,
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PP_NUM_RINGS,
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};
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struct pp_request {
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uint32_t flags;
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uint32_t sclk;
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uint32_t sclk_throttle;
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uint32_t mclk;
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uint32_t vclk;
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uint32_t dclk;
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uint32_t eclk;
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uint32_t aclk;
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uint32_t iclk;
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uint32_t vp8clk;
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uint32_t rsv[32];
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};
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struct pp_eventmgr {
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struct pp_hwmgr *hwmgr;
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struct pp_smumgr *smumgr;
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struct pp_feature_info features[PP_Feature_Max];
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const struct action_chain *event_chain[AMD_PP_EVENT_MAX];
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struct phm_platform_descriptor *platform_descriptor;
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struct pp_clock_range clock_range;
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enum pp_power_source current_power_source;
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struct pem_power_source_ui_state_info ui_state_info[PP_PowerSource_Max];
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enum pp_state states[PP_NUM_RINGS];
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struct pp_request hi_req;
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struct list_head context_list;
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struct mutex lock;
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bool block_adjust_power_state;
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bool enable_cg;
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bool enable_gfx_cgpg;
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int (*pp_eventmgr_init)(struct pp_eventmgr *eventmgr);
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void (*pp_eventmgr_fini)(struct pp_eventmgr *eventmgr);
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};
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int eventmgr_init(struct pp_instance *handle);
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int eventmgr_fini(struct pp_eventmgr *eventmgr);
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#endif /* _EVENTMGR_H_ */
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