2008-10-23 05:26:29 +00:00
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#ifndef _ASM_X86_GENAPIC_32_H
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#define _ASM_X86_GENAPIC_32_H
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2005-04-16 22:20:36 +00:00
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2006-09-26 08:52:26 +00:00
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#include <asm/mpspec.h>
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x86: fix wakeup_cpu with numaq/es7000, v2
Impact: fix secondary-CPU wakeup/init path with numaq and es7000
While looking at wakeup_secondary_cpu for WAKE_SECONDARY_VIA_NMI:
|#ifdef WAKE_SECONDARY_VIA_NMI
|/*
| * Poke the other CPU in the eye via NMI to wake it up. Remember that the normal
| * INIT, INIT, STARTUP sequence will reset the chip hard for us, and this
| * won't ... remember to clear down the APIC, etc later.
| */
|static int __devinit
|wakeup_secondary_cpu(int logical_apicid, unsigned long start_eip)
|{
| unsigned long send_status, accept_status = 0;
| int maxlvt;
|...
| if (APIC_INTEGRATED(apic_version[phys_apicid])) {
| maxlvt = lapic_get_maxlvt();
I noticed that there is no warning about undefined phys_apicid...
because WAKE_SECONDARY_VIA_NMI and WAKE_SECONDARY_VIA_INIT can not be
defined at the same time. So NUMAQ is using wrong wakeup_secondary_cpu.
WAKE_SECONDARY_VIA_NMI, WAKE_SECONDARY_VIA_INIT and
WAKE_SECONDARY_VIA_MIP are variants of a weird and fragile
preprocessor-driven "HAL" mechanisms to specify the kind of secondary-CPU
wakeup strategy a given x86 kernel will use.
The vast majority of systems want to use INIT for secondary wakeup - NUMAQ
uses an NMI, (old-style-) ES7000 uses 'MIP' (a firmware driven in-memory
flag to let secondaries continue).
So convert these mechanisms to x86_quirks and add a
->wakeup_secondary_cpu() method to specify the rare exception
to the sane default.
Extend genapic accordingly as well, for 32-bit.
While looking further, I noticed that functions in wakecup.h for numaq
and es7000 are different to the default in mach_wakecpu.h - but smpboot.c
will only use default mach_wakecpu.h with smphook.h.
So we need to add mach_wakecpu.h for mach_generic, to properly support
numaq and es7000, and vectorize the following SMP init methods:
int trampoline_phys_low;
int trampoline_phys_high;
void (*wait_for_init_deassert)(atomic_t *deassert);
void (*smp_callin_clear_local_apic)(void);
void (*store_NMI_vector)(unsigned short *high, unsigned short *low);
void (*restore_NMI_vector)(unsigned short *high, unsigned short *low);
void (*inquire_remote_apic)(int apicid);
Signed-off-by: Yinghai Lu <yinghai@kernel.org>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2008-11-16 11:12:49 +00:00
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#include <asm/atomic.h>
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2006-09-26 08:52:26 +00:00
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2005-04-16 22:20:36 +00:00
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/*
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* Generic APIC driver interface.
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*
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* An straight forward mapping of the APIC related parts of the
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* x86 subarchitecture interface to a dynamic object.
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*
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* This is used by the "generic" x86 subarchitecture.
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*
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* Copyright 2003 Andi Kleen, SuSE Labs.
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*/
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struct mpc_config_bus;
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struct mp_config_table;
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struct mpc_config_processor;
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2008-03-23 08:02:13 +00:00
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struct genapic {
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char *name;
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int (*probe)(void);
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2005-04-16 22:20:36 +00:00
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int (*apic_id_registered)(void);
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2008-12-17 01:33:52 +00:00
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const cpumask_t *(*target_cpus)(void);
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2005-04-16 22:20:36 +00:00
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int int_delivery_mode;
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2008-03-23 08:02:13 +00:00
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int int_dest_mode;
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2005-04-16 22:20:36 +00:00
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int ESR_DISABLE;
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int apic_destination_logical;
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unsigned long (*check_apicid_used)(physid_mask_t bitmap, int apicid);
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2008-03-23 08:02:13 +00:00
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unsigned long (*check_apicid_present)(int apicid);
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2005-04-16 22:20:36 +00:00
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int no_balance_irq;
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int no_ioapic_check;
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void (*init_apic_ldr)(void);
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physid_mask_t (*ioapic_phys_id_map)(physid_mask_t map);
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2007-05-02 17:27:04 +00:00
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void (*setup_apic_routing)(void);
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2005-04-16 22:20:36 +00:00
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int (*multi_timer_check)(int apic, int irq);
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2008-03-23 08:02:13 +00:00
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int (*apicid_to_node)(int logical_apicid);
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2005-04-16 22:20:36 +00:00
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int (*cpu_to_logical_apicid)(int cpu);
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int (*cpu_present_to_apicid)(int mps_cpu);
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physid_mask_t (*apicid_to_cpu_present)(int phys_apicid);
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2008-03-23 08:02:13 +00:00
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void (*setup_portio_remap)(void);
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2005-04-16 22:20:36 +00:00
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int (*check_phys_apicid_present)(int boot_cpu_physical_apicid);
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void (*enable_apic_mode)(void);
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u32 (*phys_pkg_id)(u32 cpuid_apic, int index_msb);
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/* mpparse */
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/* When one of the next two hooks returns 1 the genapic
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2008-03-23 08:02:13 +00:00
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is switched to this. Essentially they are additional probe
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2005-04-16 22:20:36 +00:00
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functions. */
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2008-03-23 08:02:13 +00:00
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int (*mps_oem_check)(struct mp_config_table *mpc, char *oem,
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char *productid);
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2005-04-16 22:20:36 +00:00
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int (*acpi_madt_oem_check)(char *oem_id, char *oem_table_id);
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unsigned (*get_apic_id)(unsigned long x);
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unsigned long apic_id_mask;
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2008-12-17 01:33:52 +00:00
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unsigned int (*cpu_mask_to_apicid)(const cpumask_t *cpumask);
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2008-12-17 01:33:54 +00:00
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unsigned int (*cpu_mask_to_apicid_and)(const cpumask_t *cpumask,
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const cpumask_t *andmask);
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2008-12-17 01:33:52 +00:00
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void (*vector_allocation_domain)(int cpu, cpumask_t *retmask);
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2006-09-26 08:52:26 +00:00
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#ifdef CONFIG_SMP
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2005-04-16 22:20:36 +00:00
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/* ipi */
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2008-12-17 01:33:52 +00:00
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void (*send_IPI_mask)(const cpumask_t *mask, int vector);
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void (*send_IPI_mask_allbutself)(const cpumask_t *mask, int vector);
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2005-04-16 22:20:36 +00:00
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void (*send_IPI_allbutself)(int vector);
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void (*send_IPI_all)(int vector);
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2006-09-26 08:52:26 +00:00
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#endif
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2008-11-17 23:19:53 +00:00
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int (*wakeup_cpu)(int apicid, unsigned long start_eip);
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x86: fix wakeup_cpu with numaq/es7000, v2
Impact: fix secondary-CPU wakeup/init path with numaq and es7000
While looking at wakeup_secondary_cpu for WAKE_SECONDARY_VIA_NMI:
|#ifdef WAKE_SECONDARY_VIA_NMI
|/*
| * Poke the other CPU in the eye via NMI to wake it up. Remember that the normal
| * INIT, INIT, STARTUP sequence will reset the chip hard for us, and this
| * won't ... remember to clear down the APIC, etc later.
| */
|static int __devinit
|wakeup_secondary_cpu(int logical_apicid, unsigned long start_eip)
|{
| unsigned long send_status, accept_status = 0;
| int maxlvt;
|...
| if (APIC_INTEGRATED(apic_version[phys_apicid])) {
| maxlvt = lapic_get_maxlvt();
I noticed that there is no warning about undefined phys_apicid...
because WAKE_SECONDARY_VIA_NMI and WAKE_SECONDARY_VIA_INIT can not be
defined at the same time. So NUMAQ is using wrong wakeup_secondary_cpu.
WAKE_SECONDARY_VIA_NMI, WAKE_SECONDARY_VIA_INIT and
WAKE_SECONDARY_VIA_MIP are variants of a weird and fragile
preprocessor-driven "HAL" mechanisms to specify the kind of secondary-CPU
wakeup strategy a given x86 kernel will use.
The vast majority of systems want to use INIT for secondary wakeup - NUMAQ
uses an NMI, (old-style-) ES7000 uses 'MIP' (a firmware driven in-memory
flag to let secondaries continue).
So convert these mechanisms to x86_quirks and add a
->wakeup_secondary_cpu() method to specify the rare exception
to the sane default.
Extend genapic accordingly as well, for 32-bit.
While looking further, I noticed that functions in wakecup.h for numaq
and es7000 are different to the default in mach_wakecpu.h - but smpboot.c
will only use default mach_wakecpu.h with smphook.h.
So we need to add mach_wakecpu.h for mach_generic, to properly support
numaq and es7000, and vectorize the following SMP init methods:
int trampoline_phys_low;
int trampoline_phys_high;
void (*wait_for_init_deassert)(atomic_t *deassert);
void (*smp_callin_clear_local_apic)(void);
void (*store_NMI_vector)(unsigned short *high, unsigned short *low);
void (*restore_NMI_vector)(unsigned short *high, unsigned short *low);
void (*inquire_remote_apic)(int apicid);
Signed-off-by: Yinghai Lu <yinghai@kernel.org>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2008-11-16 11:12:49 +00:00
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int trampoline_phys_low;
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int trampoline_phys_high;
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void (*wait_for_init_deassert)(atomic_t *deassert);
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void (*smp_callin_clear_local_apic)(void);
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void (*store_NMI_vector)(unsigned short *high, unsigned short *low);
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void (*restore_NMI_vector)(unsigned short *high, unsigned short *low);
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void (*inquire_remote_apic)(int apicid);
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2008-03-23 08:02:13 +00:00
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};
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2005-04-16 22:20:36 +00:00
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2006-09-26 08:52:26 +00:00
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#define APICFUNC(x) .x = x,
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/* More functions could be probably marked IPIFUNC and save some space
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in UP GENERICARCH kernels, but I don't have the nerve right now
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to untangle this mess. -AK */
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#ifdef CONFIG_SMP
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#define IPIFUNC(x) APICFUNC(x)
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#else
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#define IPIFUNC(x)
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#endif
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2005-04-16 22:20:36 +00:00
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2008-03-23 08:02:13 +00:00
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#define APIC_INIT(aname, aprobe) \
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{ \
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.name = aname, \
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.probe = aprobe, \
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.int_delivery_mode = INT_DELIVERY_MODE, \
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.int_dest_mode = INT_DEST_MODE, \
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.no_balance_irq = NO_BALANCE_IRQ, \
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.ESR_DISABLE = esr_disable, \
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.apic_destination_logical = APIC_DEST_LOGICAL, \
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APICFUNC(apic_id_registered) \
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APICFUNC(target_cpus) \
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APICFUNC(check_apicid_used) \
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APICFUNC(check_apicid_present) \
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APICFUNC(init_apic_ldr) \
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APICFUNC(ioapic_phys_id_map) \
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APICFUNC(setup_apic_routing) \
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APICFUNC(multi_timer_check) \
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APICFUNC(apicid_to_node) \
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APICFUNC(cpu_to_logical_apicid) \
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APICFUNC(cpu_present_to_apicid) \
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APICFUNC(apicid_to_cpu_present) \
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APICFUNC(setup_portio_remap) \
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APICFUNC(check_phys_apicid_present) \
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APICFUNC(mps_oem_check) \
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APICFUNC(get_apic_id) \
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.apic_id_mask = APIC_ID_MASK, \
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APICFUNC(cpu_mask_to_apicid) \
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2008-12-17 01:33:54 +00:00
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APICFUNC(cpu_mask_to_apicid_and) \
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x86: fix wakeup_cpu with numaq/es7000, v2
Impact: fix secondary-CPU wakeup/init path with numaq and es7000
While looking at wakeup_secondary_cpu for WAKE_SECONDARY_VIA_NMI:
|#ifdef WAKE_SECONDARY_VIA_NMI
|/*
| * Poke the other CPU in the eye via NMI to wake it up. Remember that the normal
| * INIT, INIT, STARTUP sequence will reset the chip hard for us, and this
| * won't ... remember to clear down the APIC, etc later.
| */
|static int __devinit
|wakeup_secondary_cpu(int logical_apicid, unsigned long start_eip)
|{
| unsigned long send_status, accept_status = 0;
| int maxlvt;
|...
| if (APIC_INTEGRATED(apic_version[phys_apicid])) {
| maxlvt = lapic_get_maxlvt();
I noticed that there is no warning about undefined phys_apicid...
because WAKE_SECONDARY_VIA_NMI and WAKE_SECONDARY_VIA_INIT can not be
defined at the same time. So NUMAQ is using wrong wakeup_secondary_cpu.
WAKE_SECONDARY_VIA_NMI, WAKE_SECONDARY_VIA_INIT and
WAKE_SECONDARY_VIA_MIP are variants of a weird and fragile
preprocessor-driven "HAL" mechanisms to specify the kind of secondary-CPU
wakeup strategy a given x86 kernel will use.
The vast majority of systems want to use INIT for secondary wakeup - NUMAQ
uses an NMI, (old-style-) ES7000 uses 'MIP' (a firmware driven in-memory
flag to let secondaries continue).
So convert these mechanisms to x86_quirks and add a
->wakeup_secondary_cpu() method to specify the rare exception
to the sane default.
Extend genapic accordingly as well, for 32-bit.
While looking further, I noticed that functions in wakecup.h for numaq
and es7000 are different to the default in mach_wakecpu.h - but smpboot.c
will only use default mach_wakecpu.h with smphook.h.
So we need to add mach_wakecpu.h for mach_generic, to properly support
numaq and es7000, and vectorize the following SMP init methods:
int trampoline_phys_low;
int trampoline_phys_high;
void (*wait_for_init_deassert)(atomic_t *deassert);
void (*smp_callin_clear_local_apic)(void);
void (*store_NMI_vector)(unsigned short *high, unsigned short *low);
void (*restore_NMI_vector)(unsigned short *high, unsigned short *low);
void (*inquire_remote_apic)(int apicid);
Signed-off-by: Yinghai Lu <yinghai@kernel.org>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2008-11-16 11:12:49 +00:00
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APICFUNC(vector_allocation_domain) \
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2008-03-23 08:02:13 +00:00
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APICFUNC(acpi_madt_oem_check) \
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IPIFUNC(send_IPI_mask) \
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IPIFUNC(send_IPI_allbutself) \
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IPIFUNC(send_IPI_all) \
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APICFUNC(enable_apic_mode) \
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APICFUNC(phys_pkg_id) \
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x86: fix wakeup_cpu with numaq/es7000, v2
Impact: fix secondary-CPU wakeup/init path with numaq and es7000
While looking at wakeup_secondary_cpu for WAKE_SECONDARY_VIA_NMI:
|#ifdef WAKE_SECONDARY_VIA_NMI
|/*
| * Poke the other CPU in the eye via NMI to wake it up. Remember that the normal
| * INIT, INIT, STARTUP sequence will reset the chip hard for us, and this
| * won't ... remember to clear down the APIC, etc later.
| */
|static int __devinit
|wakeup_secondary_cpu(int logical_apicid, unsigned long start_eip)
|{
| unsigned long send_status, accept_status = 0;
| int maxlvt;
|...
| if (APIC_INTEGRATED(apic_version[phys_apicid])) {
| maxlvt = lapic_get_maxlvt();
I noticed that there is no warning about undefined phys_apicid...
because WAKE_SECONDARY_VIA_NMI and WAKE_SECONDARY_VIA_INIT can not be
defined at the same time. So NUMAQ is using wrong wakeup_secondary_cpu.
WAKE_SECONDARY_VIA_NMI, WAKE_SECONDARY_VIA_INIT and
WAKE_SECONDARY_VIA_MIP are variants of a weird and fragile
preprocessor-driven "HAL" mechanisms to specify the kind of secondary-CPU
wakeup strategy a given x86 kernel will use.
The vast majority of systems want to use INIT for secondary wakeup - NUMAQ
uses an NMI, (old-style-) ES7000 uses 'MIP' (a firmware driven in-memory
flag to let secondaries continue).
So convert these mechanisms to x86_quirks and add a
->wakeup_secondary_cpu() method to specify the rare exception
to the sane default.
Extend genapic accordingly as well, for 32-bit.
While looking further, I noticed that functions in wakecup.h for numaq
and es7000 are different to the default in mach_wakecpu.h - but smpboot.c
will only use default mach_wakecpu.h with smphook.h.
So we need to add mach_wakecpu.h for mach_generic, to properly support
numaq and es7000, and vectorize the following SMP init methods:
int trampoline_phys_low;
int trampoline_phys_high;
void (*wait_for_init_deassert)(atomic_t *deassert);
void (*smp_callin_clear_local_apic)(void);
void (*store_NMI_vector)(unsigned short *high, unsigned short *low);
void (*restore_NMI_vector)(unsigned short *high, unsigned short *low);
void (*inquire_remote_apic)(int apicid);
Signed-off-by: Yinghai Lu <yinghai@kernel.org>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2008-11-16 11:12:49 +00:00
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.trampoline_phys_low = TRAMPOLINE_PHYS_LOW, \
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.trampoline_phys_high = TRAMPOLINE_PHYS_HIGH, \
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APICFUNC(wait_for_init_deassert) \
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APICFUNC(smp_callin_clear_local_apic) \
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APICFUNC(store_NMI_vector) \
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APICFUNC(restore_NMI_vector) \
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APICFUNC(inquire_remote_apic) \
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2008-03-23 08:02:13 +00:00
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}
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2005-04-16 22:20:36 +00:00
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2007-05-02 17:27:04 +00:00
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extern struct genapic *genapic;
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2008-11-18 16:14:14 +00:00
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extern void es7000_update_genapic_to_cluster(void);
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2005-04-16 22:20:36 +00:00
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2008-03-28 19:12:06 +00:00
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enum uv_system_type {UV_NONE, UV_LEGACY_APIC, UV_X2APIC, UV_NON_UNIQUE_APIC};
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#define get_uv_system_type() UV_NONE
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#define is_uv_system() 0
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2008-04-16 16:45:15 +00:00
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#define uv_wakeup_secondary(a, b) 1
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2008-08-21 18:49:05 +00:00
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#define uv_system_init() do {} while (0)
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2008-03-28 19:12:06 +00:00
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2008-10-23 05:26:29 +00:00
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#endif /* _ASM_X86_GENAPIC_32_H */
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