2005-04-16 22:20:36 +00:00
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/**
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* \file radeon_drv.c
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* ATI Radeon driver
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*
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* \author Gareth Hughes <gareth@valinux.com>
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*/
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/*
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* Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
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* All Rights Reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*/
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2012-10-02 17:01:07 +00:00
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#include <drm/drmP.h>
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#include <drm/radeon_drm.h>
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2005-04-16 22:20:36 +00:00
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#include "radeon_drv.h"
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2012-10-02 17:01:07 +00:00
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#include <drm/drm_pciids.h>
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2009-06-05 12:42:42 +00:00
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#include <linux/console.h>
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2011-08-30 15:04:30 +00:00
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#include <linux/module.h>
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2012-09-17 04:40:31 +00:00
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#include <linux/pm_runtime.h>
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#include <linux/vga_switcheroo.h>
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2017-06-03 20:19:18 +00:00
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#include <linux/compat.h>
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2014-09-23 13:46:53 +00:00
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#include <drm/drm_gem.h>
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2016-08-10 16:52:34 +00:00
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#include <drm/drm_fb_helper.h>
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2014-09-23 13:46:53 +00:00
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2017-04-24 04:50:31 +00:00
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#include <drm/drm_crtc_helper.h>
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2014-07-15 10:53:32 +00:00
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2009-06-05 12:42:42 +00:00
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/*
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* KMS wrapper.
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2010-03-01 06:32:15 +00:00
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* - 2.0.0 - initial interface
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* - 2.1.0 - add square tiling interface
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2010-03-26 19:24:14 +00:00
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* - 2.2.0 - add r6xx/r7xx const buffer support
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2010-02-21 20:24:15 +00:00
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* - 2.3.0 - add MSPOS + 3D texture + r500 VAP regs
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2010-05-12 16:01:13 +00:00
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* - 2.4.0 - add crtc id query
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2010-06-03 23:00:03 +00:00
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* - 2.5.0 - add get accel 2 to work around ddx breakage for evergreen
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2010-07-13 01:11:11 +00:00
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* - 2.6.0 - add tiling config query (r6xx+), add initial HiZ support (r300->r500)
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2010-10-21 17:45:30 +00:00
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* 2.7.0 - fixups for r600 2D tiling support. (no external ABI change), add eg dyn gpr regs
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2011-01-24 22:14:26 +00:00
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* 2.8.0 - pageflip support, r500 US_FORMAT regs. r500 ARGB2101010 colorbuf, r300->r500 CMASK, clock crystal query
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2011-03-01 04:32:27 +00:00
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* 2.9.0 - r600 tiling (s3tc,rgtc) working, SET_PREDICATION packet 3 on r600 + eg, backend query
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2011-07-27 04:17:25 +00:00
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* 2.10.0 - fusion 2D tiling
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* 2.11.0 - backend map, initial compute support for the CS checker
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2011-10-24 23:38:45 +00:00
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* 2.12.0 - RADEON_CS_KEEP_TILING_FLAGS
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2012-01-27 17:17:59 +00:00
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* 2.13.0 - virtual memory support, streamout
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2011-12-16 22:03:42 +00:00
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* 2.14.0 - add evergreen tiling informations
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2012-03-20 21:17:55 +00:00
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* 2.15.0 - add max_pipes query
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2012-06-09 14:57:41 +00:00
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* 2.16.0 - fix evergreen 2D tiled surface calculation
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2012-06-14 20:06:37 +00:00
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* 2.17.0 - add STRMOUT_BASE_UPDATE for r7xx
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2012-07-29 14:24:57 +00:00
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* 2.18.0 - r600-eg: allow "invalid" DB formats
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2012-08-09 14:34:16 +00:00
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* 2.19.0 - r600-eg: MSAA textures
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2012-08-09 14:34:17 +00:00
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* 2.20.0 - r600-si: RADEON_INFO_TIMESTAMP query
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2012-08-19 00:22:09 +00:00
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* 2.21.0 - r600-r700: FMASK and CMASK
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2012-08-24 12:27:36 +00:00
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* 2.22.0 - r600 only: RESOLVE_BOX allowed
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2012-09-24 23:45:33 +00:00
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* 2.23.0 - allow STRMOUT_BASE_UPDATE on RS780 and RS880
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2012-09-25 01:34:01 +00:00
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* 2.24.0 - eg only: allow MIP_ADDRESS=0 for MSAA textures
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2012-12-08 01:00:30 +00:00
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* 2.25.0 - eg+: new info request for num SE and num SH
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2012-12-13 17:08:11 +00:00
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* 2.26.0 - r600-eg: fix htile size computation
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2012-12-13 23:57:07 +00:00
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* 2.27.0 - r600-SI: Add CS ioctl support for async DMA
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2012-12-19 17:26:45 +00:00
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* 2.28.0 - r600-eg: Add MEM_WRITE packet support
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2013-01-12 03:19:37 +00:00
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* 2.29.0 - R500 FP16 color clear registers
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2013-03-01 12:40:31 +00:00
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* 2.30.0 - fix for FMASK texturing
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2013-04-08 21:25:47 +00:00
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* 2.31.0 - Add fastfb support for rs690
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2013-04-09 14:35:42 +00:00
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* 2.32.0 - new info request for rings working
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2013-04-09 15:17:08 +00:00
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* 2.33.0 - Add SI tiling mode array query
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2013-04-10 17:41:25 +00:00
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* 2.34.0 - Add CIK tiling mode array query
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2013-11-18 09:26:00 +00:00
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* 2.35.0 - Add CIK macrotile mode array query
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2013-12-23 16:31:44 +00:00
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* 2.36.0 - Fix CIK DCE tiling setup
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2014-01-30 04:11:12 +00:00
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* 2.37.0 - allow GS ring setup on r6xx/r7xx
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2014-03-22 15:20:43 +00:00
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* 2.38.0 - RADEON_GEM_OP (GET_INITIAL_DOMAIN, SET_INITIAL_DOMAIN),
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* CIK: 1D and linear tiling modes contain valid PIPE_CONFIG
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2014-06-02 20:13:21 +00:00
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* 2.39.0 - Add INFO query for number of active CUs
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2014-07-31 09:43:49 +00:00
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* 2.40.0 - Add RADEON_GEM_GTT_WC/UC, flush HDP cache before submitting
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2014-09-17 07:25:55 +00:00
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* CS to GPU on >= r600
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2014-12-13 02:32:37 +00:00
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* 2.41.0 - evergreen/cayman: Add SET_BASE/DRAW_INDIRECT command parsing support
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2015-03-31 15:19:50 +00:00
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* 2.42.0 - Add VCE/VUI (Video Usability Information) support
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2015-04-29 17:40:33 +00:00
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* 2.43.0 - RADEON_INFO_GPU_RESET_COUNTER
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2016-04-06 20:50:25 +00:00
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* 2.44.0 - SET_APPEND_CNT packet3 support
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2016-04-15 00:47:49 +00:00
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* 2.45.0 - Allow setting shader registers using DMA/COPY packet3 on SI
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2016-05-30 23:11:14 +00:00
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* 2.46.0 - Add PFP_SYNC_ME support on evergreen
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2016-08-22 22:03:22 +00:00
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* 2.47.0 - Add UVD_NO_OP register support
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2016-10-10 11:23:25 +00:00
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* 2.48.0 - TA_CS_BC_BASE_ADDR allowed on SI
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2017-01-30 03:06:35 +00:00
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* 2.49.0 - DRM_RADEON_GEM_INFO ioctl returns correct vram_size/visible values
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2017-02-13 16:37:05 +00:00
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* 2.50.0 - Allows unaligned shader loads on CIK. (needed by OpenGL)
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2009-06-05 12:42:42 +00:00
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*/
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#define KMS_DRIVER_MAJOR 2
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2017-02-13 16:37:05 +00:00
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#define KMS_DRIVER_MINOR 50
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2009-06-05 12:42:42 +00:00
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#define KMS_DRIVER_PATCHLEVEL 0
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int radeon_driver_load_kms(struct drm_device *dev, unsigned long flags);
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2017-01-06 17:57:31 +00:00
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void radeon_driver_unload_kms(struct drm_device *dev);
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2009-06-05 12:42:42 +00:00
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void radeon_driver_lastclose_kms(struct drm_device *dev);
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int radeon_driver_open_kms(struct drm_device *dev, struct drm_file *file_priv);
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void radeon_driver_postclose_kms(struct drm_device *dev,
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struct drm_file *file_priv);
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2016-03-18 15:58:39 +00:00
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int radeon_suspend_kms(struct drm_device *dev, bool suspend,
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bool fbcon, bool freeze);
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2012-09-17 04:40:31 +00:00
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int radeon_resume_kms(struct drm_device *dev, bool resume, bool fbcon);
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2015-09-24 16:35:31 +00:00
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u32 radeon_get_vblank_counter_kms(struct drm_device *dev, unsigned int pipe);
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int radeon_enable_vblank_kms(struct drm_device *dev, unsigned int pipe);
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void radeon_disable_vblank_kms(struct drm_device *dev, unsigned int pipe);
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2009-06-05 12:42:42 +00:00
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void radeon_driver_irq_preinstall_kms(struct drm_device *dev);
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int radeon_driver_irq_postinstall_kms(struct drm_device *dev);
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void radeon_driver_irq_uninstall_kms(struct drm_device *dev);
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2013-12-11 10:34:42 +00:00
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irqreturn_t radeon_driver_irq_handler_kms(int irq, void *arg);
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2009-06-05 12:42:42 +00:00
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void radeon_gem_object_free(struct drm_gem_object *obj);
|
drm/radeon: GPU virtual memory support v22
Virtual address space are per drm client (opener of /dev/drm).
Client are in charge of virtual address space, they need to
map bo into it by calling DRM_RADEON_GEM_VA ioctl.
First 16M of virtual address space is reserved by the kernel.
Once using 2 level page table we should be able to have a small
vram memory footprint for each pt (there would be one pt for all
gart, one for all vram and then one first level for each virtual
address space).
Plan include using the sub allocator for a common vm page table
area and using memcpy to copy vm page table in & out. Or use
a gart object and copy things in & out using dma.
v2: agd5f fixes:
- Add vram base offset for vram pages. The GPU physical address of a
vram page is FB_OFFSET + page offset. FB_OFFSET is 0 on discrete
cards and the physical bus address of the stolen memory on
integrated chips.
- VM_CONTEXT1_PROTECTION_FAULT_DEFAULT_ADDR covers all vmid's >= 1
v3: agd5f:
- integrate with the semaphore/multi-ring stuff
v4:
- rebase on top ttm dma & multi-ring stuff
- userspace is now in charge of the address space
- no more specific cs vm ioctl, instead cs ioctl has a new
chunk
v5:
- properly handle mem == NULL case from move_notify callback
- fix the vm cleanup path
v6:
- fix update of page table to only happen on valid mem placement
v7:
- add tlb flush for each vm context
- add flags to define mapping property (readable, writeable, snooped)
- make ring id implicit from ib->fence->ring, up to each asic callback
to then do ring specific scheduling if vm ib scheduling function
v8:
- add query for ib limit and kernel reserved virtual space
- rename vm->size to max_pfn (maximum number of page)
- update gem_va ioctl to also allow unmap operation
- bump kernel version to allow userspace to query for vm support
v9:
- rebuild page table only when bind and incrementaly depending
on bo referenced by cs and that have been moved
- allow virtual address space to grow
- use sa allocator for vram page table
- return invalid when querying vm limit on non cayman GPU
- dump vm fault register on lockup
v10: agd5f:
- Move the vm schedule_ib callback to a standalone function, remove
the callback and use the existing ib_execute callback for VM IBs.
v11:
- rebase on top of lastest Linus
v12: agd5f:
- remove spurious backslash
- set IB vm_id to 0 in radeon_ib_get()
v13: agd5f:
- fix handling of RADEON_CHUNK_ID_FLAGS
v14:
- fix va destruction
- fix suspend resume
- forbid bo to have several different va in same vm
v15:
- rebase
v16:
- cleanup left over of vm init/fini
v17: agd5f:
- cs checker
v18: agd5f:
- reworks the CS ioctl to better support multiple rings and
VM. Rather than adding a new chunk id for VM, just re-use the
IB chunk id and add a new flags for VM mode. Also define additional
dwords for the flags chunk id to define the what ring we want to use
(gfx, compute, uvd, etc.) and the priority.
v19:
- fix cs fini in weird case of no ib
- semi working flush fix for ni
- rebase on top of sa allocator changes
v20: agd5f:
- further CS ioctl cleanups from Christian's comments
v21: agd5f:
- integrate CS checker improvements
v22: agd5f:
- final cleanups for release, only allow VM CS on cayman
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-01-06 03:11:05 +00:00
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int radeon_gem_object_open(struct drm_gem_object *obj,
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struct drm_file *file_priv);
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void radeon_gem_object_close(struct drm_gem_object *obj,
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struct drm_file *file_priv);
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drm/radeon: add userptr support v8
This patch adds an IOCTL for turning a pointer supplied by
userspace into a buffer object.
It imposes several restrictions upon the memory being mapped:
1. It must be page aligned (both start/end addresses, i.e ptr and size).
2. It must be normal system memory, not a pointer into another map of IO
space (e.g. it must not be a GTT mmapping of another object).
3. The BO is mapped into GTT, so the maximum amount of memory mapped at
all times is still the GTT limit.
4. The BO is only mapped readonly for now, so no write support.
5. List of backing pages is only acquired once, so they represent a
snapshot of the first use.
Exporting and sharing as well as mapping of buffer objects created by
this function is forbidden and results in an -EPERM.
v2: squash all previous changes into first public version
v3: fix tabs, map readonly, don't use MM callback any more
v4: set TTM_PAGE_FLAG_SG so that TTM never messes with the pages,
pin/unpin pages on bind/unbind instead of populate/unpopulate
v5: rebased on 3.17-wip, IOCTL renamed to userptr, reject any unknown
flags, better handle READONLY flag, improve permission check
v6: fix ptr cast warning, use set_page_dirty/mark_page_accessed on unpin
v7: add warning about it's availability in the API definition
v8: drop access_ok check, fix VM mapping bits
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com> (v4)
Reviewed-by: Jérôme Glisse <jglisse@redhat.com> (v4)
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2014-08-07 07:36:00 +00:00
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struct dma_buf *radeon_gem_prime_export(struct drm_device *dev,
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struct drm_gem_object *gobj,
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int flags);
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2015-09-24 16:35:31 +00:00
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extern int radeon_get_crtc_scanoutpos(struct drm_device *dev, unsigned int crtc,
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unsigned int flags, int *vpos, int *hpos,
|
2015-09-14 19:43:44 +00:00
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ktime_t *stime, ktime_t *etime,
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const struct drm_display_mode *mode);
|
2014-04-11 02:29:01 +00:00
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extern bool radeon_is_px(struct drm_device *dev);
|
2013-08-02 17:27:49 +00:00
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extern const struct drm_ioctl_desc radeon_ioctls_kms[];
|
2009-06-05 12:42:42 +00:00
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extern int radeon_max_kms_ioctl;
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int radeon_mmap(struct file *filp, struct vm_area_struct *vma);
|
2011-02-07 02:16:14 +00:00
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int radeon_mode_dumb_mmap(struct drm_file *filp,
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struct drm_device *dev,
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uint32_t handle, uint64_t *offset_p);
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int radeon_mode_dumb_create(struct drm_file *file_priv,
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struct drm_device *dev,
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struct drm_mode_create_dumb *args);
|
2013-01-15 20:47:44 +00:00
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struct sg_table *radeon_gem_prime_get_sg_table(struct drm_gem_object *obj);
|
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struct drm_gem_object *radeon_gem_prime_import_sg_table(struct drm_device *dev,
|
2014-01-09 10:03:14 +00:00
|
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struct dma_buf_attachment *,
|
2013-01-15 20:47:44 +00:00
|
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struct sg_table *sg);
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int radeon_gem_prime_pin(struct drm_gem_object *obj);
|
2013-06-27 11:38:18 +00:00
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void radeon_gem_prime_unpin(struct drm_gem_object *obj);
|
2014-07-01 10:57:26 +00:00
|
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struct reservation_object *radeon_gem_prime_res_obj(struct drm_gem_object *);
|
2013-01-15 20:47:44 +00:00
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void *radeon_gem_prime_vmap(struct drm_gem_object *obj);
|
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void radeon_gem_prime_vunmap(struct drm_gem_object *obj, void *vaddr);
|
2011-02-07 02:16:14 +00:00
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|
2013-01-21 12:58:46 +00:00
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|
/* atpx handler */
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#if defined(CONFIG_VGA_SWITCHEROO)
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void radeon_register_atpx_handler(void);
|
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void radeon_unregister_atpx_handler(void);
|
2016-06-01 19:05:05 +00:00
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|
bool radeon_has_atpx_dgpu_power_cntl(void);
|
2016-06-02 13:24:53 +00:00
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|
|
bool radeon_is_atpx_hybrid(void);
|
2013-01-21 12:58:46 +00:00
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|
#else
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static inline void radeon_register_atpx_handler(void) {}
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static inline void radeon_unregister_atpx_handler(void) {}
|
2016-06-01 19:05:05 +00:00
|
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|
static inline bool radeon_has_atpx_dgpu_power_cntl(void) { return false; }
|
2016-06-02 13:24:53 +00:00
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|
static inline bool radeon_is_atpx_hybrid(void) { return false; }
|
2013-01-21 12:58:46 +00:00
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|
#endif
|
2005-04-16 22:20:36 +00:00
|
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|
2005-09-30 07:09:07 +00:00
|
|
|
int radeon_no_wb;
|
2013-05-15 01:23:36 +00:00
|
|
|
int radeon_modeset = -1;
|
2009-06-05 12:42:42 +00:00
|
|
|
int radeon_dynclks = -1;
|
|
|
|
|
int radeon_r4xx_atom = 0;
|
2018-04-24 19:55:11 +00:00
|
|
|
#ifdef __powerpc__
|
|
|
|
|
/* Default to PCI on PowerPC (fdo #95017) */
|
|
|
|
|
int radeon_agpmode = -1;
|
|
|
|
|
#else
|
2009-06-05 12:42:42 +00:00
|
|
|
int radeon_agpmode = 0;
|
2018-04-24 19:55:11 +00:00
|
|
|
#endif
|
2009-06-05 12:42:42 +00:00
|
|
|
int radeon_vram_limit = 0;
|
2013-07-05 21:16:51 +00:00
|
|
|
int radeon_gart_size = -1; /* auto */
|
2009-06-05 12:42:42 +00:00
|
|
|
int radeon_benchmarking = 0;
|
2009-07-21 09:23:57 +00:00
|
|
|
int radeon_testing = 0;
|
2009-06-05 12:42:42 +00:00
|
|
|
int radeon_connector_table = 0;
|
2009-08-13 06:32:14 +00:00
|
|
|
int radeon_tv = 1;
|
2013-10-14 17:17:50 +00:00
|
|
|
int radeon_audio = -1;
|
2010-03-31 04:33:27 +00:00
|
|
|
int radeon_disp_priority = 0;
|
2010-03-17 06:07:37 +00:00
|
|
|
int radeon_hw_i2c = 0;
|
2012-06-27 07:35:54 +00:00
|
|
|
int radeon_pcie_gen2 = -1;
|
2011-11-01 18:20:30 +00:00
|
|
|
int radeon_msi = -1;
|
2012-05-02 13:11:21 +00:00
|
|
|
int radeon_lockup_timeout = 10000;
|
2013-04-08 21:25:47 +00:00
|
|
|
int radeon_fastfb = 0;
|
2013-04-12 17:55:22 +00:00
|
|
|
int radeon_dpm = -1;
|
2013-07-16 19:58:50 +00:00
|
|
|
int radeon_aspm = -1;
|
2012-09-17 04:40:31 +00:00
|
|
|
int radeon_runtime_pm = -1;
|
2014-01-08 22:55:08 +00:00
|
|
|
int radeon_hard_reset = 0;
|
2014-07-19 11:55:58 +00:00
|
|
|
int radeon_vm_size = 8;
|
|
|
|
|
int radeon_vm_block_size = -1;
|
2014-07-01 15:23:03 +00:00
|
|
|
int radeon_deep_color = 0;
|
2014-07-29 04:21:44 +00:00
|
|
|
int radeon_use_pflipirq = 2;
|
2014-08-07 13:28:31 +00:00
|
|
|
int radeon_bapm = -1;
|
2014-09-17 00:57:26 +00:00
|
|
|
int radeon_backlight = -1;
|
2015-02-19 23:21:36 +00:00
|
|
|
int radeon_auxch = -1;
|
2015-02-23 23:24:04 +00:00
|
|
|
int radeon_mst = 0;
|
2016-03-18 15:58:36 +00:00
|
|
|
int radeon_uvd = 1;
|
2016-03-18 15:58:37 +00:00
|
|
|
int radeon_vce = 1;
|
2005-09-30 07:09:07 +00:00
|
|
|
|
2008-07-31 07:07:23 +00:00
|
|
|
MODULE_PARM_DESC(no_wb, "Disable AGP writeback for scratch registers");
|
2005-09-30 07:09:07 +00:00
|
|
|
module_param_named(no_wb, radeon_no_wb, int, 0444);
|
|
|
|
|
|
2009-06-05 12:42:42 +00:00
|
|
|
MODULE_PARM_DESC(modeset, "Disable/Enable modesetting");
|
|
|
|
|
module_param_named(modeset, radeon_modeset, int, 0400);
|
|
|
|
|
|
|
|
|
|
MODULE_PARM_DESC(dynclks, "Disable/Enable dynamic clocks");
|
|
|
|
|
module_param_named(dynclks, radeon_dynclks, int, 0444);
|
|
|
|
|
|
|
|
|
|
MODULE_PARM_DESC(r4xx_atom, "Enable ATOMBIOS modesetting for R4xx");
|
|
|
|
|
module_param_named(r4xx_atom, radeon_r4xx_atom, int, 0444);
|
|
|
|
|
|
2014-04-08 10:39:36 +00:00
|
|
|
MODULE_PARM_DESC(vramlimit, "Restrict VRAM for testing, in megabytes");
|
2009-06-05 12:42:42 +00:00
|
|
|
module_param_named(vramlimit, radeon_vram_limit, int, 0600);
|
|
|
|
|
|
|
|
|
|
MODULE_PARM_DESC(agpmode, "AGP Mode (-1 == PCI)");
|
|
|
|
|
module_param_named(agpmode, radeon_agpmode, int, 0444);
|
|
|
|
|
|
2013-07-05 21:16:51 +00:00
|
|
|
MODULE_PARM_DESC(gartsize, "Size of PCIE/IGP gart to setup in megabytes (32, 64, etc., -1 = auto)");
|
2009-06-05 12:42:42 +00:00
|
|
|
module_param_named(gartsize, radeon_gart_size, int, 0600);
|
|
|
|
|
|
|
|
|
|
MODULE_PARM_DESC(benchmark, "Run benchmark");
|
|
|
|
|
module_param_named(benchmark, radeon_benchmarking, int, 0444);
|
|
|
|
|
|
2009-07-21 09:23:57 +00:00
|
|
|
MODULE_PARM_DESC(test, "Run tests");
|
|
|
|
|
module_param_named(test, radeon_testing, int, 0444);
|
|
|
|
|
|
2009-06-05 12:42:42 +00:00
|
|
|
MODULE_PARM_DESC(connector_table, "Force connector table");
|
|
|
|
|
module_param_named(connector_table, radeon_connector_table, int, 0444);
|
2009-08-13 06:32:14 +00:00
|
|
|
|
|
|
|
|
MODULE_PARM_DESC(tv, "TV enable (0 = disable)");
|
|
|
|
|
module_param_named(tv, radeon_tv, int, 0444);
|
2009-06-05 12:42:42 +00:00
|
|
|
|
2013-10-14 17:17:50 +00:00
|
|
|
MODULE_PARM_DESC(audio, "Audio enable (-1 = auto, 0 = disable, 1 = enable)");
|
2009-10-11 21:49:13 +00:00
|
|
|
module_param_named(audio, radeon_audio, int, 0444);
|
|
|
|
|
|
2010-03-31 04:33:27 +00:00
|
|
|
MODULE_PARM_DESC(disp_priority, "Display Priority (0 = auto, 1 = normal, 2 = high)");
|
|
|
|
|
module_param_named(disp_priority, radeon_disp_priority, int, 0444);
|
|
|
|
|
|
2010-03-17 06:07:37 +00:00
|
|
|
MODULE_PARM_DESC(hw_i2c, "hw i2c engine enable (0 = disable)");
|
|
|
|
|
module_param_named(hw_i2c, radeon_hw_i2c, int, 0444);
|
|
|
|
|
|
2012-06-27 07:35:54 +00:00
|
|
|
MODULE_PARM_DESC(pcie_gen2, "PCIE Gen2 mode (-1 = auto, 0 = disable, 1 = enable)");
|
2011-01-13 01:05:11 +00:00
|
|
|
module_param_named(pcie_gen2, radeon_pcie_gen2, int, 0444);
|
|
|
|
|
|
2011-11-01 18:20:30 +00:00
|
|
|
MODULE_PARM_DESC(msi, "MSI support (1 = enable, 0 = disable, -1 = auto)");
|
|
|
|
|
module_param_named(msi, radeon_msi, int, 0444);
|
|
|
|
|
|
2015-03-06 21:07:05 +00:00
|
|
|
MODULE_PARM_DESC(lockup_timeout, "GPU lockup timeout in ms (default 10000 = 10 seconds, 0 = disable)");
|
2012-05-02 13:11:21 +00:00
|
|
|
module_param_named(lockup_timeout, radeon_lockup_timeout, int, 0444);
|
|
|
|
|
|
2013-04-08 21:25:47 +00:00
|
|
|
MODULE_PARM_DESC(fastfb, "Direct FB access for IGP chips (0 = disable, 1 = enable)");
|
|
|
|
|
module_param_named(fastfb, radeon_fastfb, int, 0444);
|
|
|
|
|
|
2013-04-12 17:55:22 +00:00
|
|
|
MODULE_PARM_DESC(dpm, "DPM support (1 = enable, 0 = disable, -1 = auto)");
|
|
|
|
|
module_param_named(dpm, radeon_dpm, int, 0444);
|
|
|
|
|
|
2013-07-16 19:58:50 +00:00
|
|
|
MODULE_PARM_DESC(aspm, "ASPM support (1 = enable, 0 = disable, -1 = auto)");
|
|
|
|
|
module_param_named(aspm, radeon_aspm, int, 0444);
|
|
|
|
|
|
2012-09-17 04:40:31 +00:00
|
|
|
MODULE_PARM_DESC(runpm, "PX runtime pm (1 = force enable, 0 = disable, -1 = PX only default)");
|
|
|
|
|
module_param_named(runpm, radeon_runtime_pm, int, 0444);
|
|
|
|
|
|
2014-01-08 22:55:08 +00:00
|
|
|
MODULE_PARM_DESC(hard_reset, "PCI config reset (1 = force enable, 0 = disable (default))");
|
|
|
|
|
module_param_named(hard_reset, radeon_hard_reset, int, 0444);
|
|
|
|
|
|
2014-07-18 11:56:56 +00:00
|
|
|
MODULE_PARM_DESC(vm_size, "VM address space size in gigabytes (default 4GB)");
|
2014-06-06 03:47:32 +00:00
|
|
|
module_param_named(vm_size, radeon_vm_size, int, 0444);
|
|
|
|
|
|
2014-07-19 11:55:58 +00:00
|
|
|
MODULE_PARM_DESC(vm_block_size, "VM page table size in bits (default depending on vm_size)");
|
2014-06-06 03:56:50 +00:00
|
|
|
module_param_named(vm_block_size, radeon_vm_block_size, int, 0444);
|
|
|
|
|
|
2014-07-01 15:23:03 +00:00
|
|
|
MODULE_PARM_DESC(deep_color, "Deep Color support (1 = enable, 0 = disable (default))");
|
|
|
|
|
module_param_named(deep_color, radeon_deep_color, int, 0444);
|
|
|
|
|
|
2014-07-29 04:21:44 +00:00
|
|
|
MODULE_PARM_DESC(use_pflipirq, "Pflip irqs for pageflip completion (0 = disable, 1 = as fallback, 2 = exclusive (default))");
|
|
|
|
|
module_param_named(use_pflipirq, radeon_use_pflipirq, int, 0444);
|
|
|
|
|
|
2014-08-07 13:28:31 +00:00
|
|
|
MODULE_PARM_DESC(bapm, "BAPM support (1 = enable, 0 = disable, -1 = auto)");
|
|
|
|
|
module_param_named(bapm, radeon_bapm, int, 0444);
|
|
|
|
|
|
2014-09-17 00:57:26 +00:00
|
|
|
MODULE_PARM_DESC(backlight, "backlight support (1 = enable, 0 = disable, -1 = auto)");
|
|
|
|
|
module_param_named(backlight, radeon_backlight, int, 0444);
|
|
|
|
|
|
2015-02-19 23:21:36 +00:00
|
|
|
MODULE_PARM_DESC(auxch, "Use native auxch experimental support (1 = enable, 0 = disable, -1 = auto)");
|
|
|
|
|
module_param_named(auxch, radeon_auxch, int, 0444);
|
|
|
|
|
|
2015-02-23 23:24:04 +00:00
|
|
|
MODULE_PARM_DESC(mst, "DisplayPort MST experimental support (1 = enable, 0 = disable)");
|
|
|
|
|
module_param_named(mst, radeon_mst, int, 0444);
|
|
|
|
|
|
2016-03-18 15:58:36 +00:00
|
|
|
MODULE_PARM_DESC(uvd, "uvd enable/disable uvd support (1 = enable, 0 = disable)");
|
|
|
|
|
module_param_named(uvd, radeon_uvd, int, 0444);
|
|
|
|
|
|
2016-03-18 15:58:37 +00:00
|
|
|
MODULE_PARM_DESC(vce, "vce enable/disable vce support (1 = enable, 0 = disable)");
|
|
|
|
|
module_param_named(vce, radeon_vce, int, 0444);
|
|
|
|
|
|
2017-06-05 09:52:51 +00:00
|
|
|
int radeon_si_support = 1;
|
|
|
|
|
MODULE_PARM_DESC(si_support, "SI support (1 = enabled (default), 0 = disabled)");
|
|
|
|
|
module_param_named(si_support, radeon_si_support, int, 0444);
|
|
|
|
|
|
2017-05-29 09:05:20 +00:00
|
|
|
int radeon_cik_support = 1;
|
|
|
|
|
MODULE_PARM_DESC(cik_support, "CIK support (1 = enabled (default), 0 = disabled)");
|
2017-04-20 18:41:34 +00:00
|
|
|
module_param_named(cik_support, radeon_cik_support, int, 0444);
|
|
|
|
|
|
2013-01-21 12:58:46 +00:00
|
|
|
static struct pci_device_id pciidlist[] = {
|
|
|
|
|
radeon_PCI_IDS
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
MODULE_DEVICE_TABLE(pci, pciidlist);
|
|
|
|
|
|
2009-06-05 12:42:42 +00:00
|
|
|
static struct drm_driver kms_driver;
|
|
|
|
|
|
2016-08-22 18:29:44 +00:00
|
|
|
bool radeon_device_is_virtual(void);
|
|
|
|
|
|
2012-11-09 09:19:39 +00:00
|
|
|
static int radeon_kick_out_firmware_fb(struct pci_dev *pdev)
|
2010-10-06 16:39:07 +00:00
|
|
|
{
|
|
|
|
|
struct apertures_struct *ap;
|
|
|
|
|
bool primary = false;
|
|
|
|
|
|
|
|
|
|
ap = alloc_apertures(1);
|
2012-11-09 09:19:39 +00:00
|
|
|
if (!ap)
|
|
|
|
|
return -ENOMEM;
|
|
|
|
|
|
2010-10-06 16:39:07 +00:00
|
|
|
ap->ranges[0].base = pci_resource_start(pdev, 0);
|
|
|
|
|
ap->ranges[0].size = pci_resource_len(pdev, 0);
|
|
|
|
|
|
|
|
|
|
#ifdef CONFIG_X86
|
|
|
|
|
primary = pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW;
|
|
|
|
|
#endif
|
2016-08-10 16:52:34 +00:00
|
|
|
drm_fb_helper_remove_conflicting_framebuffers(ap, "radeondrmfb", primary);
|
2010-10-06 16:39:07 +00:00
|
|
|
kfree(ap);
|
2012-11-09 09:19:39 +00:00
|
|
|
|
|
|
|
|
return 0;
|
2010-10-06 16:39:07 +00:00
|
|
|
}
|
|
|
|
|
|
2012-12-21 23:09:25 +00:00
|
|
|
static int radeon_pci_probe(struct pci_dev *pdev,
|
|
|
|
|
const struct pci_device_id *ent)
|
2009-06-05 12:42:42 +00:00
|
|
|
{
|
2012-11-09 09:19:39 +00:00
|
|
|
int ret;
|
|
|
|
|
|
2016-05-31 09:13:27 +00:00
|
|
|
if (vga_switcheroo_client_probe_defer(pdev))
|
2016-01-11 19:09:20 +00:00
|
|
|
return -EPROBE_DEFER;
|
|
|
|
|
|
2010-10-06 16:39:07 +00:00
|
|
|
/* Get rid of things like offb */
|
2012-11-09 09:19:39 +00:00
|
|
|
ret = radeon_kick_out_firmware_fb(pdev);
|
|
|
|
|
if (ret)
|
|
|
|
|
return ret;
|
2010-10-06 16:39:07 +00:00
|
|
|
|
2010-05-27 19:40:25 +00:00
|
|
|
return drm_get_pci_dev(pdev, ent, &kms_driver);
|
2009-06-05 12:42:42 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static void
|
|
|
|
|
radeon_pci_remove(struct pci_dev *pdev)
|
|
|
|
|
{
|
|
|
|
|
struct drm_device *dev = pci_get_drvdata(pdev);
|
|
|
|
|
|
|
|
|
|
drm_put_dev(dev);
|
|
|
|
|
}
|
|
|
|
|
|
2016-08-22 18:29:44 +00:00
|
|
|
static void
|
|
|
|
|
radeon_pci_shutdown(struct pci_dev *pdev)
|
|
|
|
|
{
|
|
|
|
|
/* if we are running in a VM, make sure the device
|
2017-01-25 17:00:29 +00:00
|
|
|
* torn down properly on reboot/shutdown
|
2016-08-22 18:29:44 +00:00
|
|
|
*/
|
2017-01-25 17:00:29 +00:00
|
|
|
if (radeon_device_is_virtual())
|
|
|
|
|
radeon_pci_remove(pdev);
|
2016-08-22 18:29:44 +00:00
|
|
|
}
|
|
|
|
|
|
2012-09-13 02:02:30 +00:00
|
|
|
static int radeon_pmops_suspend(struct device *dev)
|
2009-06-05 12:42:42 +00:00
|
|
|
{
|
2012-09-13 02:02:30 +00:00
|
|
|
struct pci_dev *pdev = to_pci_dev(dev);
|
|
|
|
|
struct drm_device *drm_dev = pci_get_drvdata(pdev);
|
2016-03-18 15:58:39 +00:00
|
|
|
return radeon_suspend_kms(drm_dev, true, true, false);
|
2009-06-05 12:42:42 +00:00
|
|
|
}
|
|
|
|
|
|
2012-09-13 02:02:30 +00:00
|
|
|
static int radeon_pmops_resume(struct device *dev)
|
2009-06-05 12:42:42 +00:00
|
|
|
{
|
2012-09-13 02:02:30 +00:00
|
|
|
struct pci_dev *pdev = to_pci_dev(dev);
|
|
|
|
|
struct drm_device *drm_dev = pci_get_drvdata(pdev);
|
2016-08-31 21:34:23 +00:00
|
|
|
|
|
|
|
|
/* GPU comes up enabled by the bios on resume */
|
|
|
|
|
if (radeon_is_px(drm_dev)) {
|
|
|
|
|
pm_runtime_disable(dev);
|
|
|
|
|
pm_runtime_set_active(dev);
|
|
|
|
|
pm_runtime_enable(dev);
|
|
|
|
|
}
|
|
|
|
|
|
2012-09-17 04:40:31 +00:00
|
|
|
return radeon_resume_kms(drm_dev, true, true);
|
2012-09-13 02:02:30 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static int radeon_pmops_freeze(struct device *dev)
|
|
|
|
|
{
|
|
|
|
|
struct pci_dev *pdev = to_pci_dev(dev);
|
|
|
|
|
struct drm_device *drm_dev = pci_get_drvdata(pdev);
|
2016-03-18 15:58:39 +00:00
|
|
|
return radeon_suspend_kms(drm_dev, false, true, true);
|
2009-06-05 12:42:42 +00:00
|
|
|
}
|
|
|
|
|
|
2012-09-13 02:02:30 +00:00
|
|
|
static int radeon_pmops_thaw(struct device *dev)
|
|
|
|
|
{
|
|
|
|
|
struct pci_dev *pdev = to_pci_dev(dev);
|
|
|
|
|
struct drm_device *drm_dev = pci_get_drvdata(pdev);
|
2012-09-17 04:40:31 +00:00
|
|
|
return radeon_resume_kms(drm_dev, false, true);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static int radeon_pmops_runtime_suspend(struct device *dev)
|
|
|
|
|
{
|
|
|
|
|
struct pci_dev *pdev = to_pci_dev(dev);
|
|
|
|
|
struct drm_device *drm_dev = pci_get_drvdata(pdev);
|
|
|
|
|
int ret;
|
|
|
|
|
|
2014-04-11 02:29:01 +00:00
|
|
|
if (!radeon_is_px(drm_dev)) {
|
2014-03-27 04:09:18 +00:00
|
|
|
pm_runtime_forbid(dev);
|
|
|
|
|
return -EBUSY;
|
|
|
|
|
}
|
2014-01-24 19:59:42 +00:00
|
|
|
|
2012-09-17 04:40:31 +00:00
|
|
|
drm_dev->switch_power_state = DRM_SWITCH_POWER_CHANGING;
|
|
|
|
|
drm_kms_helper_poll_disable(drm_dev);
|
|
|
|
|
|
2016-03-18 15:58:39 +00:00
|
|
|
ret = radeon_suspend_kms(drm_dev, false, false, false);
|
2012-09-17 04:40:31 +00:00
|
|
|
pci_save_state(pdev);
|
|
|
|
|
pci_disable_device(pdev);
|
PCI: Add pci_ignore_hotplug() to ignore hotplug events for a device
Powering off a hot-pluggable device, e.g., with pci_set_power_state(D3cold),
normally generates a hot-remove event that unbinds the driver.
Some drivers expect to remain bound to a device even while they power it
off and back on again. This can be dangerous, because if the device is
removed or replaced while it is powered off, the driver doesn't know that
anything changed. But some drivers accept that risk.
Add pci_ignore_hotplug() for use by drivers that know their device cannot
be removed. Using pci_ignore_hotplug() tells the PCI core that hot-plug
events for the device should be ignored.
The radeon and nouveau drivers use this to switch between a low-power,
integrated GPU and a higher-power, higher-performance discrete GPU. They
power off the unused GPU, but they want to remain bound to it.
This is a reimplementation of f244d8b623da ("ACPIPHP / radeon / nouveau:
Fix VGA switcheroo problem related to hotplug") but extends it to work with
both acpiphp and pciehp.
This fixes a problem where systems with dual GPUs using the radeon drivers
become unusable, freezing every few seconds (see bugzillas below). The
resume of the radeon device may also fail, e.g.,
This fixes problems on dual GPU systems where the radeon driver becomes
unusable because of problems while suspending the device, as in bug 79701:
[drm] radeon: finishing device.
radeon 0000:01:00.0: Userspace still has active objects !
radeon 0000:01:00.0: ffff8800cb4ec288 ffff8800cb4ec000 16384 4294967297 force free
...
WARNING: CPU: 0 PID: 67 at /home/apw/COD/linux/drivers/gpu/drm/radeon/radeon_gart.c:234 radeon_gart_unbind+0xd2/0xe0 [radeon]()
trying to unbind memory from uninitialized GART !
or while resuming it, as in bug 77261:
radeon 0000:01:00.0: ring 0 stalled for more than 10158msec
radeon 0000:01:00.0: GPU lockup ...
radeon 0000:01:00.0: GPU pci config reset
pciehp 0000:00:01.0:pcie04: Card not present on Slot(1-1)
radeon 0000:01:00.0: GPU reset succeeded, trying to resume
*ERROR* radeon: dpm resume failed
radeon 0000:01:00.0: Wait for MC idle timedout !
Link: https://bugzilla.kernel.org/show_bug.cgi?id=77261
Link: https://bugzilla.kernel.org/show_bug.cgi?id=79701
Reported-by: Shawn Starr <shawn.starr@rogers.com>
Reported-by: Jose P. <lbdkmjdf@sharklasers.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Rajat Jain <rajatxjain@gmail.com>
Acked-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Acked-by: Dave Airlie <airlied@redhat.com>
CC: stable@vger.kernel.org # v3.15+
2014-09-10 19:45:01 +00:00
|
|
|
pci_ignore_hotplug(pdev);
|
2016-06-02 13:27:03 +00:00
|
|
|
if (radeon_is_atpx_hybrid())
|
|
|
|
|
pci_set_power_state(pdev, PCI_D3cold);
|
2016-06-02 13:31:59 +00:00
|
|
|
else if (!radeon_has_atpx_dgpu_power_cntl())
|
2016-06-01 19:07:44 +00:00
|
|
|
pci_set_power_state(pdev, PCI_D3hot);
|
2012-09-17 04:40:31 +00:00
|
|
|
drm_dev->switch_power_state = DRM_SWITCH_POWER_DYNAMIC_OFF;
|
|
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static int radeon_pmops_runtime_resume(struct device *dev)
|
|
|
|
|
{
|
|
|
|
|
struct pci_dev *pdev = to_pci_dev(dev);
|
|
|
|
|
struct drm_device *drm_dev = pci_get_drvdata(pdev);
|
|
|
|
|
int ret;
|
|
|
|
|
|
2014-04-11 02:29:01 +00:00
|
|
|
if (!radeon_is_px(drm_dev))
|
2014-01-24 19:59:42 +00:00
|
|
|
return -EINVAL;
|
|
|
|
|
|
2012-09-17 04:40:31 +00:00
|
|
|
drm_dev->switch_power_state = DRM_SWITCH_POWER_CHANGING;
|
|
|
|
|
|
2016-06-02 13:31:59 +00:00
|
|
|
if (radeon_is_atpx_hybrid() ||
|
|
|
|
|
!radeon_has_atpx_dgpu_power_cntl())
|
|
|
|
|
pci_set_power_state(pdev, PCI_D0);
|
2012-09-17 04:40:31 +00:00
|
|
|
pci_restore_state(pdev);
|
|
|
|
|
ret = pci_enable_device(pdev);
|
|
|
|
|
if (ret)
|
|
|
|
|
return ret;
|
|
|
|
|
pci_set_master(pdev);
|
|
|
|
|
|
|
|
|
|
ret = radeon_resume_kms(drm_dev, false, false);
|
|
|
|
|
drm_kms_helper_poll_enable(drm_dev);
|
|
|
|
|
drm_dev->switch_power_state = DRM_SWITCH_POWER_ON;
|
|
|
|
|
return 0;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static int radeon_pmops_runtime_idle(struct device *dev)
|
|
|
|
|
{
|
|
|
|
|
struct pci_dev *pdev = to_pci_dev(dev);
|
|
|
|
|
struct drm_device *drm_dev = pci_get_drvdata(pdev);
|
|
|
|
|
struct drm_crtc *crtc;
|
|
|
|
|
|
2014-04-11 02:29:01 +00:00
|
|
|
if (!radeon_is_px(drm_dev)) {
|
2014-03-27 04:09:18 +00:00
|
|
|
pm_runtime_forbid(dev);
|
2012-09-17 04:40:31 +00:00
|
|
|
return -EBUSY;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
list_for_each_entry(crtc, &drm_dev->mode_config.crtc_list, head) {
|
|
|
|
|
if (crtc->enabled) {
|
|
|
|
|
DRM_DEBUG_DRIVER("failing to power off - crtc active\n");
|
|
|
|
|
return -EBUSY;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
pm_runtime_mark_last_busy(dev);
|
|
|
|
|
pm_runtime_autosuspend(dev);
|
|
|
|
|
/* we don't want the main rpm_idle to call suspend - we want to autosuspend */
|
|
|
|
|
return 1;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
long radeon_drm_ioctl(struct file *filp,
|
|
|
|
|
unsigned int cmd, unsigned long arg)
|
|
|
|
|
{
|
|
|
|
|
struct drm_file *file_priv = filp->private_data;
|
|
|
|
|
struct drm_device *dev;
|
|
|
|
|
long ret;
|
|
|
|
|
dev = file_priv->minor->dev;
|
|
|
|
|
ret = pm_runtime_get_sync(dev->dev);
|
|
|
|
|
if (ret < 0)
|
|
|
|
|
return ret;
|
|
|
|
|
|
|
|
|
|
ret = drm_ioctl(filp, cmd, arg);
|
|
|
|
|
|
|
|
|
|
pm_runtime_mark_last_busy(dev->dev);
|
|
|
|
|
pm_runtime_put_autosuspend(dev->dev);
|
|
|
|
|
return ret;
|
2012-09-13 02:02:30 +00:00
|
|
|
}
|
|
|
|
|
|
2017-06-03 20:19:18 +00:00
|
|
|
#ifdef CONFIG_COMPAT
|
|
|
|
|
static long radeon_kms_compat_ioctl(struct file *filp, unsigned int cmd, unsigned long arg)
|
|
|
|
|
{
|
|
|
|
|
unsigned int nr = DRM_IOCTL_NR(cmd);
|
|
|
|
|
int ret;
|
|
|
|
|
|
|
|
|
|
if (nr < DRM_COMMAND_BASE)
|
|
|
|
|
return drm_compat_ioctl(filp, cmd, arg);
|
|
|
|
|
|
|
|
|
|
ret = radeon_drm_ioctl(filp, cmd, arg);
|
|
|
|
|
|
|
|
|
|
return ret;
|
|
|
|
|
}
|
|
|
|
|
#endif
|
|
|
|
|
|
2012-09-13 02:02:30 +00:00
|
|
|
static const struct dev_pm_ops radeon_pm_ops = {
|
|
|
|
|
.suspend = radeon_pmops_suspend,
|
|
|
|
|
.resume = radeon_pmops_resume,
|
|
|
|
|
.freeze = radeon_pmops_freeze,
|
|
|
|
|
.thaw = radeon_pmops_thaw,
|
|
|
|
|
.poweroff = radeon_pmops_freeze,
|
|
|
|
|
.restore = radeon_pmops_resume,
|
2012-09-17 04:40:31 +00:00
|
|
|
.runtime_suspend = radeon_pmops_runtime_suspend,
|
|
|
|
|
.runtime_resume = radeon_pmops_runtime_resume,
|
|
|
|
|
.runtime_idle = radeon_pmops_runtime_idle,
|
2012-09-13 02:02:30 +00:00
|
|
|
};
|
|
|
|
|
|
2011-10-31 14:28:57 +00:00
|
|
|
static const struct file_operations radeon_driver_kms_fops = {
|
|
|
|
|
.owner = THIS_MODULE,
|
|
|
|
|
.open = drm_open,
|
|
|
|
|
.release = drm_release,
|
2012-09-17 04:40:31 +00:00
|
|
|
.unlocked_ioctl = radeon_drm_ioctl,
|
2011-10-31 14:28:57 +00:00
|
|
|
.mmap = radeon_mmap,
|
|
|
|
|
.poll = drm_poll,
|
|
|
|
|
.read = drm_read,
|
|
|
|
|
#ifdef CONFIG_COMPAT
|
|
|
|
|
.compat_ioctl = radeon_kms_compat_ioctl,
|
|
|
|
|
#endif
|
|
|
|
|
};
|
|
|
|
|
|
drm/vblank: drop the mode argument from drm_calc_vbltimestamp_from_scanoutpos
If we restrict this helper to only kms drivers (which is the case) we
can look up the correct mode easily ourselves. But it's a bit tricky:
- All legacy drivers look at crtc->hwmode. But that is updated already
at the beginning of the modeset helper, which means when we disable
a pipe. Hence the final timestamps might be a bit off. But since
this is an existing bug I'm not going to change it, but just try to
be bug-for-bug compatible with the current code. This only applies
to radeon&amdgpu.
- i915 tries to get it perfect by updating crtc->hwmode when the pipe
is off (i.e. vblank->enabled = false).
- All other atomic drivers look at crtc->state->adjusted_mode. Those
that look at state->requested_mode simply don't adjust their mode,
so it's the same. That has two problems: Accessing crtc->state from
interrupt handling code is unsafe, and it's updated before we shut
down the pipe. For nonblocking modesets it's even worse.
For atomic drivers try to implement what i915 does. To do that we add
a new hwmode field to the vblank structure, and update it from
drm_calc_timestamping_constants(). For atomic drivers that's called
from the right spot by the helper library already, so all fine. But
for safety let's enforce that.
For legacy driver this function is only called at the end (oh the
fun), which is broken, so again let's not bother and just stay
bug-for-bug compatible.
The benefit is that we can use drm_calc_vbltimestamp_from_scanoutpos
directly to implement ->get_vblank_timestamp in every driver, deleting
a lot of code.
v2: Completely new approach, trying to mimick the i915 solution.
v3: Fixup kerneldoc.
v4: Drop the WARN_ON to check that the vblank is off, atomic helpers
currently unconditionally call this. Recomputing the same stuff should
be harmless.
v5: Fix typos and move misplaced hunks to the right patches (Neil).
v6: Undo hunk movement (kbuild).
Cc: Mario Kleiner <mario.kleiner@tuebingen.mpg.de>
Cc: Eric Anholt <eric@anholt.net>
Cc: Rob Clark <robdclark@gmail.com>
Cc: linux-arm-msm@vger.kernel.org
Cc: freedreno@lists.freedesktop.org
Cc: Alex Deucher <alexander.deucher@amd.com>
Cc: Christian König <christian.koenig@amd.com>
Cc: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Acked-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/20170509140329.24114-4-daniel.vetter@ffwll.ch
2017-05-09 14:03:28 +00:00
|
|
|
static bool
|
|
|
|
|
radeon_get_crtc_scanout_position(struct drm_device *dev, unsigned int pipe,
|
|
|
|
|
bool in_vblank_irq, int *vpos, int *hpos,
|
|
|
|
|
ktime_t *stime, ktime_t *etime,
|
|
|
|
|
const struct drm_display_mode *mode)
|
|
|
|
|
{
|
|
|
|
|
return radeon_get_crtc_scanoutpos(dev, pipe, 0, vpos, hpos,
|
|
|
|
|
stime, etime, mode);
|
|
|
|
|
}
|
|
|
|
|
|
2009-06-05 12:42:42 +00:00
|
|
|
static struct drm_driver kms_driver = {
|
|
|
|
|
.driver_features =
|
drm: rip out drm_core_has_MTRR checks
The new arch_phys_wc_add/del functions do the right thing both with
and without MTRR support in the kernel. So we can drop these
additional checks.
David Herrmann suggest to also kill the DRIVER_USE_MTRR flag since
it's now unused, which spurred me to do a bit a better audit of the
affected drivers. David helped a lot in that. Quoting our mail
discussion:
On Wed, Jul 10, 2013 at 5:41 PM, David Herrmann <dh.herrmann@gmail.com> wrote:
> On Wed, Jul 10, 2013 at 5:22 PM, Daniel Vetter <daniel.vetter@ffwll.ch> wrote:
>> On Wed, Jul 10, 2013 at 3:51 PM, David Herrmann <dh.herrmann@gmail.com> wrote:
>>>> -#if __OS_HAS_MTRR
>>>> -static inline int drm_core_has_MTRR(struct drm_device *dev)
>>>> -{
>>>> - return drm_core_check_feature(dev, DRIVER_USE_MTRR);
>>>> -}
>>>> -#else
>>>> -#define drm_core_has_MTRR(dev) (0)
>>>> -#endif
>>>> -
>>>
>>> That was the last user of DRIVER_USE_MTRR (apart from drivers setting
>>> it in .driver_features). Any reason to keep it around?
>>
>> Yeah, I guess we could rip things out. Which will also force me to
>> properly audit drivers for the eventual behaviour change this could
>> entail (in case there's an x86 driver which did not ask for an mtrr,
>> but iirc there isn't).
>
> david@david-mb ~/dev/kernel/linux $ for i in drivers/gpu/drm/* ; do if
> test -d "$i" ; then if ! grep -q USE_MTRR -r $i ; then echo $i ; fi ;
> fi ; done
> drivers/gpu/drm/exynos
> drivers/gpu/drm/gma500
> drivers/gpu/drm/i2c
> drivers/gpu/drm/nouveau
> drivers/gpu/drm/omapdrm
> drivers/gpu/drm/qxl
> drivers/gpu/drm/rcar-du
> drivers/gpu/drm/shmobile
> drivers/gpu/drm/tilcdc
> drivers/gpu/drm/ttm
> drivers/gpu/drm/udl
> drivers/gpu/drm/vmwgfx
> david@david-mb ~/dev/kernel/linux $
>
> So for x86 gma500,nouveau,qxl,udl,vmwgfx don't set DRIVER_USE_MTRR.
> But I cannot tell whether they break if we call arch_phys_wc_add/del,
> anyway. At least nouveau seemed to work here, but it doesn't use AGP
> or drm_bufs, I guess.
Cool, thanks a lot for stitching together the list of drivers to look
at. So for real KMS drivers it's the drives responsibility to add an
mtrr if it needs one. nouvea, radeon, mgag200, i915 and vmwgfx do that
already. Somehow the savage driver also ends up doing that, I have no
idea why.
Note that gma500 as a pure KMS driver doesn't need MTRR setup since
the platforms that it supports all support PAT. So no MTRRs needed to
get wc iomappings.
The mtrr support in the drm core is all for legacy mappings of garts,
framebuffers and registers. All legacy drivers set the USE_MTRR flag,
so we're good there.
All in all I think we can really just ditch this
/endquote
v2: Also kill DRIVER_USE_MTRR as suggested by David Herrmann
v3: Rebase on top of David Herrmann's agp setup/cleanup changes.
Cc: David Herrmann <dh.herrmann@gmail.com>
Cc: Andy Lutomirski <luto@amacapital.net>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Acked-by: Andy Lutomirski <luto@amacapital.net>
Reviewed-by: David Herrmann <dh.herrmann@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2013-08-08 13:41:27 +00:00
|
|
|
DRIVER_USE_AGP |
|
2013-07-10 12:11:49 +00:00
|
|
|
DRIVER_HAVE_IRQ | DRIVER_IRQ_SHARED | DRIVER_GEM |
|
2013-08-25 16:29:03 +00:00
|
|
|
DRIVER_PRIME | DRIVER_RENDER,
|
2009-06-05 12:42:42 +00:00
|
|
|
.load = radeon_driver_load_kms,
|
|
|
|
|
.open = radeon_driver_open_kms,
|
|
|
|
|
.postclose = radeon_driver_postclose_kms,
|
|
|
|
|
.lastclose = radeon_driver_lastclose_kms,
|
|
|
|
|
.unload = radeon_driver_unload_kms,
|
|
|
|
|
.get_vblank_counter = radeon_get_vblank_counter_kms,
|
|
|
|
|
.enable_vblank = radeon_enable_vblank_kms,
|
|
|
|
|
.disable_vblank = radeon_disable_vblank_kms,
|
drm/vblank: drop the mode argument from drm_calc_vbltimestamp_from_scanoutpos
If we restrict this helper to only kms drivers (which is the case) we
can look up the correct mode easily ourselves. But it's a bit tricky:
- All legacy drivers look at crtc->hwmode. But that is updated already
at the beginning of the modeset helper, which means when we disable
a pipe. Hence the final timestamps might be a bit off. But since
this is an existing bug I'm not going to change it, but just try to
be bug-for-bug compatible with the current code. This only applies
to radeon&amdgpu.
- i915 tries to get it perfect by updating crtc->hwmode when the pipe
is off (i.e. vblank->enabled = false).
- All other atomic drivers look at crtc->state->adjusted_mode. Those
that look at state->requested_mode simply don't adjust their mode,
so it's the same. That has two problems: Accessing crtc->state from
interrupt handling code is unsafe, and it's updated before we shut
down the pipe. For nonblocking modesets it's even worse.
For atomic drivers try to implement what i915 does. To do that we add
a new hwmode field to the vblank structure, and update it from
drm_calc_timestamping_constants(). For atomic drivers that's called
from the right spot by the helper library already, so all fine. But
for safety let's enforce that.
For legacy driver this function is only called at the end (oh the
fun), which is broken, so again let's not bother and just stay
bug-for-bug compatible.
The benefit is that we can use drm_calc_vbltimestamp_from_scanoutpos
directly to implement ->get_vblank_timestamp in every driver, deleting
a lot of code.
v2: Completely new approach, trying to mimick the i915 solution.
v3: Fixup kerneldoc.
v4: Drop the WARN_ON to check that the vblank is off, atomic helpers
currently unconditionally call this. Recomputing the same stuff should
be harmless.
v5: Fix typos and move misplaced hunks to the right patches (Neil).
v6: Undo hunk movement (kbuild).
Cc: Mario Kleiner <mario.kleiner@tuebingen.mpg.de>
Cc: Eric Anholt <eric@anholt.net>
Cc: Rob Clark <robdclark@gmail.com>
Cc: linux-arm-msm@vger.kernel.org
Cc: freedreno@lists.freedesktop.org
Cc: Alex Deucher <alexander.deucher@amd.com>
Cc: Christian König <christian.koenig@amd.com>
Cc: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Acked-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/20170509140329.24114-4-daniel.vetter@ffwll.ch
2017-05-09 14:03:28 +00:00
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.get_vblank_timestamp = drm_calc_vbltimestamp_from_scanoutpos,
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.get_scanout_position = radeon_get_crtc_scanout_position,
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2009-06-05 12:42:42 +00:00
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.irq_preinstall = radeon_driver_irq_preinstall_kms,
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.irq_postinstall = radeon_driver_irq_postinstall_kms,
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.irq_uninstall = radeon_driver_irq_uninstall_kms,
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.irq_handler = radeon_driver_irq_handler_kms,
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.ioctls = radeon_ioctls_kms,
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2016-04-26 17:29:56 +00:00
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.gem_free_object_unlocked = radeon_gem_object_free,
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drm/radeon: GPU virtual memory support v22
Virtual address space are per drm client (opener of /dev/drm).
Client are in charge of virtual address space, they need to
map bo into it by calling DRM_RADEON_GEM_VA ioctl.
First 16M of virtual address space is reserved by the kernel.
Once using 2 level page table we should be able to have a small
vram memory footprint for each pt (there would be one pt for all
gart, one for all vram and then one first level for each virtual
address space).
Plan include using the sub allocator for a common vm page table
area and using memcpy to copy vm page table in & out. Or use
a gart object and copy things in & out using dma.
v2: agd5f fixes:
- Add vram base offset for vram pages. The GPU physical address of a
vram page is FB_OFFSET + page offset. FB_OFFSET is 0 on discrete
cards and the physical bus address of the stolen memory on
integrated chips.
- VM_CONTEXT1_PROTECTION_FAULT_DEFAULT_ADDR covers all vmid's >= 1
v3: agd5f:
- integrate with the semaphore/multi-ring stuff
v4:
- rebase on top ttm dma & multi-ring stuff
- userspace is now in charge of the address space
- no more specific cs vm ioctl, instead cs ioctl has a new
chunk
v5:
- properly handle mem == NULL case from move_notify callback
- fix the vm cleanup path
v6:
- fix update of page table to only happen on valid mem placement
v7:
- add tlb flush for each vm context
- add flags to define mapping property (readable, writeable, snooped)
- make ring id implicit from ib->fence->ring, up to each asic callback
to then do ring specific scheduling if vm ib scheduling function
v8:
- add query for ib limit and kernel reserved virtual space
- rename vm->size to max_pfn (maximum number of page)
- update gem_va ioctl to also allow unmap operation
- bump kernel version to allow userspace to query for vm support
v9:
- rebuild page table only when bind and incrementaly depending
on bo referenced by cs and that have been moved
- allow virtual address space to grow
- use sa allocator for vram page table
- return invalid when querying vm limit on non cayman GPU
- dump vm fault register on lockup
v10: agd5f:
- Move the vm schedule_ib callback to a standalone function, remove
the callback and use the existing ib_execute callback for VM IBs.
v11:
- rebase on top of lastest Linus
v12: agd5f:
- remove spurious backslash
- set IB vm_id to 0 in radeon_ib_get()
v13: agd5f:
- fix handling of RADEON_CHUNK_ID_FLAGS
v14:
- fix va destruction
- fix suspend resume
- forbid bo to have several different va in same vm
v15:
- rebase
v16:
- cleanup left over of vm init/fini
v17: agd5f:
- cs checker
v18: agd5f:
- reworks the CS ioctl to better support multiple rings and
VM. Rather than adding a new chunk id for VM, just re-use the
IB chunk id and add a new flags for VM mode. Also define additional
dwords for the flags chunk id to define the what ring we want to use
(gfx, compute, uvd, etc.) and the priority.
v19:
- fix cs fini in weird case of no ib
- semi working flush fix for ni
- rebase on top of sa allocator changes
v20: agd5f:
- further CS ioctl cleanups from Christian's comments
v21: agd5f:
- integrate CS checker improvements
v22: agd5f:
- final cleanups for release, only allow VM CS on cayman
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-01-06 03:11:05 +00:00
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.gem_open_object = radeon_gem_object_open,
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.gem_close_object = radeon_gem_object_close,
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2011-02-07 02:16:14 +00:00
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.dumb_create = radeon_mode_dumb_create,
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.dumb_map_offset = radeon_mode_dumb_mmap,
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2011-10-31 14:28:57 +00:00
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.fops = &radeon_driver_kms_fops,
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2012-05-10 22:33:13 +00:00
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.prime_handle_to_fd = drm_gem_prime_handle_to_fd,
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.prime_fd_to_handle = drm_gem_prime_fd_to_handle,
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drm/radeon: add userptr support v8
This patch adds an IOCTL for turning a pointer supplied by
userspace into a buffer object.
It imposes several restrictions upon the memory being mapped:
1. It must be page aligned (both start/end addresses, i.e ptr and size).
2. It must be normal system memory, not a pointer into another map of IO
space (e.g. it must not be a GTT mmapping of another object).
3. The BO is mapped into GTT, so the maximum amount of memory mapped at
all times is still the GTT limit.
4. The BO is only mapped readonly for now, so no write support.
5. List of backing pages is only acquired once, so they represent a
snapshot of the first use.
Exporting and sharing as well as mapping of buffer objects created by
this function is forbidden and results in an -EPERM.
v2: squash all previous changes into first public version
v3: fix tabs, map readonly, don't use MM callback any more
v4: set TTM_PAGE_FLAG_SG so that TTM never messes with the pages,
pin/unpin pages on bind/unbind instead of populate/unpopulate
v5: rebased on 3.17-wip, IOCTL renamed to userptr, reject any unknown
flags, better handle READONLY flag, improve permission check
v6: fix ptr cast warning, use set_page_dirty/mark_page_accessed on unpin
v7: add warning about it's availability in the API definition
v8: drop access_ok check, fix VM mapping bits
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com> (v4)
Reviewed-by: Jérôme Glisse <jglisse@redhat.com> (v4)
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2014-08-07 07:36:00 +00:00
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.gem_prime_export = radeon_gem_prime_export,
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2013-01-15 20:47:44 +00:00
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.gem_prime_import = drm_gem_prime_import,
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.gem_prime_pin = radeon_gem_prime_pin,
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2013-06-27 11:38:18 +00:00
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.gem_prime_unpin = radeon_gem_prime_unpin,
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2014-07-01 10:57:26 +00:00
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.gem_prime_res_obj = radeon_gem_prime_res_obj,
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2013-01-15 20:47:44 +00:00
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.gem_prime_get_sg_table = radeon_gem_prime_get_sg_table,
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.gem_prime_import_sg_table = radeon_gem_prime_import_sg_table,
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.gem_prime_vmap = radeon_gem_prime_vmap,
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.gem_prime_vunmap = radeon_gem_prime_vunmap,
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2012-05-10 22:33:13 +00:00
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2009-06-05 12:42:42 +00:00
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.name = DRIVER_NAME,
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.desc = DRIVER_DESC,
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.date = DRIVER_DATE,
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.major = KMS_DRIVER_MAJOR,
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.minor = KMS_DRIVER_MINOR,
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.patchlevel = KMS_DRIVER_PATCHLEVEL,
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};
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static struct drm_driver *driver;
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2010-12-14 17:16:38 +00:00
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static struct pci_driver *pdriver;
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static struct pci_driver radeon_kms_pci_driver = {
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.name = DRIVER_NAME,
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.id_table = pciidlist,
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.probe = radeon_pci_probe,
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.remove = radeon_pci_remove,
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2016-08-22 18:29:44 +00:00
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.shutdown = radeon_pci_shutdown,
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2012-09-13 02:02:30 +00:00
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.driver.pm = &radeon_pm_ops,
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2010-12-14 17:16:38 +00:00
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};
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2009-06-05 12:42:42 +00:00
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2005-04-16 22:20:36 +00:00
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static int __init radeon_init(void)
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{
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2013-05-15 01:23:36 +00:00
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if (vgacon_text_force() && radeon_modeset == -1) {
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DRM_INFO("VGACON disable radeon kernel modesetting.\n");
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radeon_modeset = 0;
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}
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/* set to modesetting by default if not nomodeset */
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if (radeon_modeset == -1)
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radeon_modeset = 1;
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2009-06-05 12:42:42 +00:00
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if (radeon_modeset == 1) {
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DRM_INFO("radeon kernel modesetting enabled.\n");
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driver = &kms_driver;
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2010-12-14 17:16:38 +00:00
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pdriver = &radeon_kms_pci_driver;
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2009-06-05 12:42:42 +00:00
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driver->driver_features |= DRIVER_MODESET;
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driver->num_ioctls = radeon_max_kms_ioctl;
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2010-02-01 05:38:10 +00:00
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radeon_register_atpx_handler();
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2013-01-21 12:58:46 +00:00
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} else {
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DRM_ERROR("No UMS support in radeon module!\n");
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return -EINVAL;
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2009-06-05 12:42:42 +00:00
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}
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2013-01-21 12:58:46 +00:00
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2017-05-24 14:51:40 +00:00
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return pci_register_driver(pdriver);
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2005-04-16 22:20:36 +00:00
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}
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static void __exit radeon_exit(void)
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{
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2017-05-24 14:51:40 +00:00
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pci_unregister_driver(pdriver);
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2010-02-01 05:38:10 +00:00
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radeon_unregister_atpx_handler();
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2005-04-16 22:20:36 +00:00
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}
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2009-06-22 16:16:13 +00:00
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module_init(radeon_init);
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2005-04-16 22:20:36 +00:00
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module_exit(radeon_exit);
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2005-09-25 04:28:13 +00:00
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MODULE_AUTHOR(DRIVER_AUTHOR);
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MODULE_DESCRIPTION(DRIVER_DESC);
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2005-04-16 22:20:36 +00:00
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MODULE_LICENSE("GPL and additional rights");
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