2009-06-15 07:38:18 +00:00
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/*
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2011-03-11 07:02:44 +00:00
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* Copyright 2008-2011 DENX Software Engineering GmbH
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2009-06-15 07:38:18 +00:00
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* Author: Heiko Schocher <hs@denx.de>
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*
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* Description:
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2012-05-08 13:57:20 +00:00
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* Keymile 83xx platform specific routines.
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2009-06-15 07:38:18 +00:00
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*/
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#include <linux/stddef.h>
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/errno.h>
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#include <linux/reboot.h>
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#include <linux/pci.h>
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#include <linux/kdev_t.h>
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#include <linux/major.h>
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#include <linux/console.h>
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#include <linux/delay.h>
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#include <linux/seq_file.h>
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#include <linux/root_dev.h>
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#include <linux/initrd.h>
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#include <linux/of_platform.h>
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#include <linux/of_device.h>
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2011-07-26 23:09:06 +00:00
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#include <linux/atomic.h>
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2012-12-07 15:09:13 +00:00
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#include <linux/time.h>
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#include <linux/io.h>
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2009-06-15 07:38:18 +00:00
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#include <asm/machdep.h>
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#include <asm/ipic.h>
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#include <asm/irq.h>
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#include <asm/prom.h>
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#include <asm/udbg.h>
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#include <sysdev/fsl_soc.h>
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#include <sysdev/fsl_pci.h>
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2015-11-30 02:48:57 +00:00
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#include <soc/fsl/qe/qe.h>
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#include <soc/fsl/qe/qe_ic.h>
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2009-06-15 07:38:18 +00:00
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#include "mpc83xx.h"
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#define SVR_REV(svr) (((svr) >> 0) & 0xFFFF) /* Revision field */
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2012-12-07 15:09:14 +00:00
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static void quirk_mpc8360e_qe_enet10(void)
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{
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/*
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* handle mpc8360E Erratum QE_ENET10:
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* RGMII AC values do not meet the specification
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*/
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uint svid = mfspr(SPRN_SVR);
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struct device_node *np_par;
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struct resource res;
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void __iomem *base;
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int ret;
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np_par = of_find_node_by_name(NULL, "par_io");
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if (np_par == NULL) {
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pr_warn("%s couldn;t find par_io node\n", __func__);
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return;
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}
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/* Map Parallel I/O ports registers */
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ret = of_address_to_resource(np_par, 0, &res);
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if (ret) {
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pr_warn("%s couldn;t map par_io registers\n", __func__);
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return;
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}
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base = ioremap(res.start, res.end - res.start + 1);
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/*
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* set output delay adjustments to default values according
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* table 5 in Errata Rev. 5, 9/2011:
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*
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* write 0b01 to UCC1 bits 18:19
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* write 0b01 to UCC2 option 1 bits 4:5
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* write 0b01 to UCC2 option 2 bits 16:17
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*/
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clrsetbits_be32((base + 0xa8), 0x0c00f000, 0x04005000);
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/*
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* set output delay adjustments to default values according
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* table 3-13 in Reference Manual Rev.3 05/2010:
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*
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* write 0b01 to UCC2 option 2 bits 16:17
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* write 0b0101 to UCC1 bits 20:23
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* write 0b0101 to UCC2 option 1 bits 24:27
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*/
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clrsetbits_be32((base + 0xac), 0x0000cff0, 0x00004550);
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if (SVR_REV(svid) == 0x0021) {
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/*
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* UCC2 option 1: write 0b1010 to bits 24:27
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* at address IMMRBAR+0x14AC
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*/
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clrsetbits_be32((base + 0xac), 0x000000f0, 0x000000a0);
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} else if (SVR_REV(svid) == 0x0020) {
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/*
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* UCC1: write 0b11 to bits 18:19
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* at address IMMRBAR+0x14A8
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*/
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setbits32((base + 0xa8), 0x00003000);
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/*
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* UCC2 option 1: write 0b11 to bits 4:5
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* at address IMMRBAR+0x14A8
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*/
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setbits32((base + 0xa8), 0x0c000000);
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/*
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* UCC2 option 2: write 0b11 to bits 16:17
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* at address IMMRBAR+0x14AC
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*/
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setbits32((base + 0xac), 0x0000c000);
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}
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iounmap(base);
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of_node_put(np_par);
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}
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2009-06-15 07:38:18 +00:00
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/* ************************************************************************
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*
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* Setup the architecture
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*
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*/
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2011-03-11 07:02:44 +00:00
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static void __init mpc83xx_km_setup_arch(void)
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2009-06-15 07:38:18 +00:00
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{
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2011-11-17 14:48:48 +00:00
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#ifdef CONFIG_QUICC_ENGINE
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2009-06-15 07:38:18 +00:00
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struct device_node *np;
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2011-11-17 14:48:48 +00:00
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#endif
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2009-06-15 07:38:18 +00:00
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2016-08-23 02:06:58 +00:00
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mpc83xx_setup_arch();
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2009-06-15 07:38:18 +00:00
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#ifdef CONFIG_QUICC_ENGINE
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np = of_find_node_by_name(NULL, "par_io");
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if (np != NULL) {
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par_io_init(np);
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of_node_put(np);
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2011-03-11 07:02:44 +00:00
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for_each_node_by_name(np, "spi")
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par_io_of_config(np);
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2012-05-08 13:57:19 +00:00
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for_each_node_by_name(np, "ucc")
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2009-06-15 07:38:18 +00:00
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par_io_of_config(np);
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2012-12-07 15:09:15 +00:00
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/* Only apply this quirk when par_io is available */
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np = of_find_compatible_node(NULL, "network", "ucc_geth");
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if (np != NULL) {
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quirk_mpc8360e_qe_enet10();
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of_node_put(np);
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}
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2009-06-15 07:38:18 +00:00
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}
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2012-05-08 13:57:20 +00:00
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#endif /* CONFIG_QUICC_ENGINE */
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2009-06-15 07:38:18 +00:00
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}
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2011-11-17 14:48:47 +00:00
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machine_device_initcall(mpc83xx_km, mpc83xx_declare_of_platform_devices);
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2009-06-15 07:38:18 +00:00
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2011-03-11 07:02:44 +00:00
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/* list of the supported boards */
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static char *board[] __initdata = {
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"Keymile,KMETER1",
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"Keymile,kmpbec8321",
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NULL
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};
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2009-06-15 07:38:18 +00:00
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/*
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* Called very early, MMU is off, device-tree isn't unflattened
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*/
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2011-03-11 07:02:44 +00:00
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static int __init mpc83xx_km_probe(void)
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2009-06-15 07:38:18 +00:00
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{
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2011-03-11 07:02:44 +00:00
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int i = 0;
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2009-06-15 07:38:18 +00:00
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2011-03-11 07:02:44 +00:00
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while (board[i]) {
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2016-07-05 05:04:05 +00:00
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if (of_machine_is_compatible(board[i]))
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2011-03-11 07:02:44 +00:00
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break;
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i++;
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}
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return (board[i] != NULL);
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2009-06-15 07:38:18 +00:00
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}
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2011-03-11 07:02:44 +00:00
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define_machine(mpc83xx_km) {
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.name = "mpc83xx-km-platform",
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.probe = mpc83xx_km_probe,
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.setup_arch = mpc83xx_km_setup_arch,
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2011-07-22 19:55:42 +00:00
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.init_IRQ = mpc83xx_ipic_and_qe_init_IRQ,
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2009-06-15 07:38:18 +00:00
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.get_irq = ipic_get_irq,
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.restart = mpc83xx_restart,
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.time_init = mpc83xx_time_init,
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.calibrate_decr = generic_calibrate_decr,
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.progress = udbg_progress,
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};
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