leandrof/linux
1
0
Fork 0
forked from Minki/linux
Code Issues Pull Requests Packages Projects Releases Wiki Activity
85d2913614
linux/arch/arm/boot/dts/sun5i.dtsi

731 lines
17 KiB
Plaintext
Raw Normal View History

ARM: sun5i: Add a DTSI common to A10s and A13 The A10s and the A13 are very similar SoCs, the only difference being the number of pins and the number of devices available (number of UARTs, EMAC only in the A10s, etc.), and the clocks and pinctrl functions obviously. Create a common DTSI that will be included by the A10s and A13 DTSI, that will add their SoC differences in there. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2015-01-30 15:30:48 +00:00
/*
* Copyright 2012-2015 Maxime Ripard
*
* Maxime Ripard <maxime.ripard@free-electrons.com>
*
* This file is dual-licensed: you can use it either under the terms
* of the GPL or the X11 license, at your option. Note that this dual
* licensing only applies to this file, and not this project as a
* whole.
*
* a) This library is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of the
* License, or (at your option) any later version.
*
* This library is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* Or, alternatively,
*
* b) Permission is hereby granted, free of charge, to any person
* obtaining a copy of this software and associated documentation
* files (the "Software"), to deal in the Software without
* restriction, including without limitation the rights to use,
* copy, modify, merge, publish, distribute, sublicense, and/or
* sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following
* conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*/
#include "skeleton.dtsi"
ARM: sun5i: Convert to CCU Now that we have drivers for all of them, convert all the SoCs that share the sun5i DTSI to the new CCU driver. Acked-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2016-10-15 20:36:19 +00:00
#include <dt-bindings/clock/sun5i-ccu.h>
ARM: sun5i: Add a DTSI common to A10s and A13 The A10s and the A13 are very similar SoCs, the only difference being the number of pins and the number of devices available (number of UARTs, EMAC only in the A10s, etc.), and the clocks and pinctrl functions obviously. Create a common DTSI that will be included by the A10s and A13 DTSI, that will add their SoC differences in there. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2015-01-30 15:30:48 +00:00
#include <dt-bindings/dma/sun4i-a10.h>
ARM: sun5i: Convert to CCU Now that we have drivers for all of them, convert all the SoCs that share the sun5i DTSI to the new CCU driver. Acked-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2016-10-15 20:36:19 +00:00
#include <dt-bindings/reset/sun5i-ccu.h>
ARM: sun5i: Add a DTSI common to A10s and A13 The A10s and the A13 are very similar SoCs, the only difference being the number of pins and the number of devices available (number of UARTs, EMAC only in the A10s, etc.), and the clocks and pinctrl functions obviously. Create a common DTSI that will be included by the A10s and A13 DTSI, that will add their SoC differences in there. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2015-01-30 15:30:48 +00:00
/ {
interrupt-parent = <&intc>;
cpus {
#address-cells = <1>;
#size-cells = <0>;
cpu0: cpu@0 {
device_type = "cpu";
compatible = "arm,cortex-a8";
reg = <0x0>;
ARM: sun5i: Convert to CCU Now that we have drivers for all of them, convert all the SoCs that share the sun5i DTSI to the new CCU driver. Acked-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2016-10-15 20:36:19 +00:00
clocks = <&ccu CLK_CPU>;
ARM: sun5i: Add a DTSI common to A10s and A13 The A10s and the A13 are very similar SoCs, the only difference being the number of pins and the number of devices available (number of UARTs, EMAC only in the A10s, etc.), and the clocks and pinctrl functions obviously. Create a common DTSI that will be included by the A10s and A13 DTSI, that will add their SoC differences in there. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2015-01-30 15:30:48 +00:00
};
};
ARM: sun5i: a13: Merge common controllers into the common DTSI Some controllers found in the A13 DTSI actually apply to all of the sun5i family. Move those into the common DTSI so that all SoCs can benefit from it. Acked-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-02-03 15:01:27 +00:00
chosen {
#address-cells = <1>;
#size-cells = <1>;
ranges;
framebuffer@0 {
compatible = "allwinner,simple-framebuffer",
"simple-framebuffer";
allwinner,pipeline = "de_be0-lcd0";
clocks = <&ccu CLK_AHB_LCD>, <&ccu CLK_AHB_DE_BE>, <&ccu CLK_DE_BE>,
<&ccu CLK_TCON_CH0>, <&ccu CLK_DRAM_DE_BE>;
status = "disabled";
};
ARM: sun5i: a10s: Merge common controllers into the common DTSI Some controllers found in the A10s DTSI actually apply to all of the sun5i family. Move those into the common DTSI so that all SoCs can benefit from it. Acked-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-02-03 15:01:27 +00:00
framebuffer@1 {
compatible = "allwinner,simple-framebuffer",
"simple-framebuffer";
allwinner,pipeline = "de_be0-lcd0-tve0";
clocks = <&ccu CLK_AHB_TVE>, <&ccu CLK_AHB_LCD>,
<&ccu CLK_AHB_DE_BE>, <&ccu CLK_DE_BE>,
<&ccu CLK_TCON_CH1>, <&ccu CLK_DRAM_DE_BE>;
status = "disabled";
};
ARM: sun5i: a13: Merge common controllers into the common DTSI Some controllers found in the A13 DTSI actually apply to all of the sun5i family. Move those into the common DTSI so that all SoCs can benefit from it. Acked-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-02-03 15:01:27 +00:00
};
ARM: sun5i: Add a DTSI common to A10s and A13 The A10s and the A13 are very similar SoCs, the only difference being the number of pins and the number of devices available (number of UARTs, EMAC only in the A10s, etc.), and the clocks and pinctrl functions obviously. Create a common DTSI that will be included by the A10s and A13 DTSI, that will add their SoC differences in there. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2015-01-30 15:30:48 +00:00
clocks {
#address-cells = <1>;
#size-cells = <1>;
ranges;
osc24M: clk@01c20050 {
#clock-cells = <0>;
ARM: sun5i: Convert to CCU Now that we have drivers for all of them, convert all the SoCs that share the sun5i DTSI to the new CCU driver. Acked-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2016-10-15 20:36:19 +00:00
compatible = "fixed-clock";
ARM: sun5i: Add a DTSI common to A10s and A13 The A10s and the A13 are very similar SoCs, the only difference being the number of pins and the number of devices available (number of UARTs, EMAC only in the A10s, etc.), and the clocks and pinctrl functions obviously. Create a common DTSI that will be included by the A10s and A13 DTSI, that will add their SoC differences in there. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2015-01-30 15:30:48 +00:00
clock-frequency = <24000000>;
clock-output-names = "osc24M";
};
osc32k: clk@0 {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <32768>;
clock-output-names = "osc32k";
};
};
soc@01c00000 {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
ranges;
ARM: dts: sun5i: Add A10s and A13 SRAM and SRAM controller The A10s and A13 have a few SRAM that can be mapped either to a device or to the CPU, with the mapping being controlled by a SRAM controller. Add the SRAM controller, the SRAM that it drives and the section that can be used by the various devices. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Hans de Goede <hdegoede@redhat.com> Tested-by: Hans de Goede <hdegoede@redhat.com>
2015-03-26 14:53:44 +00:00
sram-controller@01c00000 {
compatible = "allwinner,sun4i-a10-sram-controller";
reg = <0x01c00000 0x30>;
#address-cells = <1>;
#size-cells = <1>;
ranges;
sram_a: sram@00000000 {
compatible = "mmio-sram";
reg = <0x00000000 0xc000>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 0x00000000 0xc000>;
};
ARM: sun5i: a10s: Merge common controllers into the common DTSI Some controllers found in the A10s DTSI actually apply to all of the sun5i family. Move those into the common DTSI so that all SoCs can benefit from it. Acked-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-02-03 15:01:27 +00:00
emac_sram: sram-section@8000 {
compatible = "allwinner,sun4i-a10-sram-a3-a4";
reg = <0x8000 0x4000>;
status = "disabled";
};
ARM: dts: sun5i: Add A10s and A13 SRAM and SRAM controller The A10s and A13 have a few SRAM that can be mapped either to a device or to the CPU, with the mapping being controlled by a SRAM controller. Add the SRAM controller, the SRAM that it drives and the section that can be used by the various devices. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Hans de Goede <hdegoede@redhat.com> Tested-by: Hans de Goede <hdegoede@redhat.com>
2015-03-26 14:53:44 +00:00
sram_d: sram@00010000 {
compatible = "mmio-sram";
reg = <0x00010000 0x1000>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 0x00010000 0x1000>;
otg_sram: sram-section@0000 {
compatible = "allwinner,sun4i-a10-sram-d";
reg = <0x0000 0x1000>;
status = "disabled";
};
};
};
ARM: sun5i: Add a DTSI common to A10s and A13 The A10s and the A13 are very similar SoCs, the only difference being the number of pins and the number of devices available (number of UARTs, EMAC only in the A10s, etc.), and the clocks and pinctrl functions obviously. Create a common DTSI that will be included by the A10s and A13 DTSI, that will add their SoC differences in there. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2015-01-30 15:30:48 +00:00
dma: dma-controller@01c02000 {
compatible = "allwinner,sun4i-a10-dma";
reg = <0x01c02000 0x1000>;
interrupts = <27>;
ARM: sun5i: Convert to CCU Now that we have drivers for all of them, convert all the SoCs that share the sun5i DTSI to the new CCU driver. Acked-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2016-10-15 20:36:19 +00:00
clocks = <&ccu CLK_AHB_DMA>;
ARM: sun5i: Add a DTSI common to A10s and A13 The A10s and the A13 are very similar SoCs, the only difference being the number of pins and the number of devices available (number of UARTs, EMAC only in the A10s, etc.), and the clocks and pinctrl functions obviously. Create a common DTSI that will be included by the A10s and A13 DTSI, that will add their SoC differences in there. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2015-01-30 15:30:48 +00:00
#dma-cells = <2>;
};
ARM: sun5i: gr8: Use common sun5i DTSI Most of the GR8 DTSI is duplicated with the common sun5i DTSI, and some of the extra nodes defined there actually apply to all of the sun5i family. Move those into the common DTSI so that all SoCs can benefit from it, and include the sun5i DTSI. Acked-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-02-03 15:01:27 +00:00
nfc: nand@01c03000 {
compatible = "allwinner,sun4i-a10-nand";
reg = <0x01c03000 0x1000>;
interrupts = <37>;
clocks = <&ccu CLK_AHB_NAND>, <&ccu CLK_NAND>;
clock-names = "ahb", "mod";
dmas = <&dma SUN4I_DMA_DEDICATED 3>;
dma-names = "rxtx";
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
};
ARM: sun5i: Add a DTSI common to A10s and A13 The A10s and the A13 are very similar SoCs, the only difference being the number of pins and the number of devices available (number of UARTs, EMAC only in the A10s, etc.), and the clocks and pinctrl functions obviously. Create a common DTSI that will be included by the A10s and A13 DTSI, that will add their SoC differences in there. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2015-01-30 15:30:48 +00:00
spi0: spi@01c05000 {
compatible = "allwinner,sun4i-a10-spi";
reg = <0x01c05000 0x1000>;
interrupts = <10>;
ARM: sun5i: Convert to CCU Now that we have drivers for all of them, convert all the SoCs that share the sun5i DTSI to the new CCU driver. Acked-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2016-10-15 20:36:19 +00:00
clocks = <&ccu CLK_AHB_SPI0>, <&ccu CLK_SPI0>;
ARM: sun5i: Add a DTSI common to A10s and A13 The A10s and the A13 are very similar SoCs, the only difference being the number of pins and the number of devices available (number of UARTs, EMAC only in the A10s, etc.), and the clocks and pinctrl functions obviously. Create a common DTSI that will be included by the A10s and A13 DTSI, that will add their SoC differences in there. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2015-01-30 15:30:48 +00:00
clock-names = "ahb", "mod";
dmas = <&dma SUN4I_DMA_DEDICATED 27>,
<&dma SUN4I_DMA_DEDICATED 26>;
dma-names = "rx", "tx";
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
};
spi1: spi@01c06000 {
compatible = "allwinner,sun4i-a10-spi";
reg = <0x01c06000 0x1000>;
interrupts = <11>;
ARM: sun5i: Convert to CCU Now that we have drivers for all of them, convert all the SoCs that share the sun5i DTSI to the new CCU driver. Acked-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2016-10-15 20:36:19 +00:00
clocks = <&ccu CLK_AHB_SPI1>, <&ccu CLK_SPI1>;
ARM: sun5i: Add a DTSI common to A10s and A13 The A10s and the A13 are very similar SoCs, the only difference being the number of pins and the number of devices available (number of UARTs, EMAC only in the A10s, etc.), and the clocks and pinctrl functions obviously. Create a common DTSI that will be included by the A10s and A13 DTSI, that will add their SoC differences in there. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2015-01-30 15:30:48 +00:00
clock-names = "ahb", "mod";
dmas = <&dma SUN4I_DMA_DEDICATED 9>,
<&dma SUN4I_DMA_DEDICATED 8>;
dma-names = "rx", "tx";
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
};
ARM: sun5i: r8: Merge common controllers into the common DTSI Some controllers found in the R8 DTSI actually apply to all of the sun5i family. Move those into the common DTSI so that all SoCs can benefit from it. Acked-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-02-03 15:01:27 +00:00
tve0: tv-encoder@01c0a000 {
compatible = "allwinner,sun4i-a10-tv-encoder";
reg = <0x01c0a000 0x1000>;
clocks = <&ccu CLK_AHB_TVE>;
resets = <&ccu RST_TVE>;
status = "disabled";
port {
#address-cells = <1>;
#size-cells = <0>;
tve0_in_tcon0: endpoint@0 {
reg = <0>;
remote-endpoint = <&tcon0_out_tve0>;
};
};
};
ARM: sun5i: a10s: Merge common controllers into the common DTSI Some controllers found in the A10s DTSI actually apply to all of the sun5i family. Move those into the common DTSI so that all SoCs can benefit from it. Acked-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-02-03 15:01:27 +00:00
emac: ethernet@01c0b000 {
compatible = "allwinner,sun4i-a10-emac";
reg = <0x01c0b000 0x1000>;
interrupts = <55>;
clocks = <&ccu CLK_AHB_EMAC>;
allwinner,sram = <&emac_sram 1>;
status = "disabled";
};
mdio: mdio@01c0b080 {
compatible = "allwinner,sun4i-a10-mdio";
reg = <0x01c0b080 0x14>;
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
};
ARM: sun5i: a13: Merge common controllers into the common DTSI Some controllers found in the A13 DTSI actually apply to all of the sun5i family. Move those into the common DTSI so that all SoCs can benefit from it. Acked-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-02-03 15:01:27 +00:00
tcon0: lcd-controller@01c0c000 {
compatible = "allwinner,sun5i-a13-tcon";
reg = <0x01c0c000 0x1000>;
interrupts = <44>;
resets = <&ccu RST_LCD>;
reset-names = "lcd";
clocks = <&ccu CLK_AHB_LCD>,
<&ccu CLK_TCON_CH0>,
<&ccu CLK_TCON_CH1>;
clock-names = "ahb",
"tcon-ch0",
"tcon-ch1";
clock-output-names = "tcon-pixel-clock";
status = "disabled";
ports {
#address-cells = <1>;
#size-cells = <0>;
tcon0_in: port@0 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
tcon0_in_be0: endpoint@0 {
reg = <0>;
remote-endpoint = <&be0_out_tcon0>;
};
};
tcon0_out: port@1 {
#address-cells = <1>;
#size-cells = <0>;
reg = <1>;
ARM: sun5i: r8: Merge common controllers into the common DTSI Some controllers found in the R8 DTSI actually apply to all of the sun5i family. Move those into the common DTSI so that all SoCs can benefit from it. Acked-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-02-03 15:01:27 +00:00
tcon0_out_tve0: endpoint@1 {
reg = <1>;
remote-endpoint = <&tve0_in_tcon0>;
};
ARM: sun5i: a13: Merge common controllers into the common DTSI Some controllers found in the A13 DTSI actually apply to all of the sun5i family. Move those into the common DTSI so that all SoCs can benefit from it. Acked-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-02-03 15:01:27 +00:00
};
};
};
ARM: sun5i: Add a DTSI common to A10s and A13 The A10s and the A13 are very similar SoCs, the only difference being the number of pins and the number of devices available (number of UARTs, EMAC only in the A10s, etc.), and the clocks and pinctrl functions obviously. Create a common DTSI that will be included by the A10s and A13 DTSI, that will add their SoC differences in there. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2015-01-30 15:30:48 +00:00
mmc0: mmc@01c0f000 {
compatible = "allwinner,sun5i-a13-mmc";
reg = <0x01c0f000 0x1000>;
ARM: sun5i: Convert to CCU Now that we have drivers for all of them, convert all the SoCs that share the sun5i DTSI to the new CCU driver. Acked-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2016-10-15 20:36:19 +00:00
clocks = <&ccu CLK_AHB_MMC0>, <&ccu CLK_MMC0>;
clock-names = "ahb", "mmc";
ARM: sun5i: Add a DTSI common to A10s and A13 The A10s and the A13 are very similar SoCs, the only difference being the number of pins and the number of devices available (number of UARTs, EMAC only in the A10s, etc.), and the clocks and pinctrl functions obviously. Create a common DTSI that will be included by the A10s and A13 DTSI, that will add their SoC differences in there. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2015-01-30 15:30:48 +00:00
interrupts = <32>;
status = "disabled";
ARM: dts: sunxi: Add address- and size-cells properties to the mmc ctrl nodes Sometimes we need to specify non-probably information for sdio devices in the devicetree, this is done through child nodes addressed by the reg property, whereby the reg property refers to the sdio function number, see; Documentation/devicetree/bindings/mmc/mmc.txt This commit adds the necessary address- and size-cells properties to the mmc controller nodes in the dtsi files, so that dts files needing such a child node do not need to specify these themselves. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2015-03-10 15:27:09 +00:00
#address-cells = <1>;
#size-cells = <0>;
ARM: sun5i: Add a DTSI common to A10s and A13 The A10s and the A13 are very similar SoCs, the only difference being the number of pins and the number of devices available (number of UARTs, EMAC only in the A10s, etc.), and the clocks and pinctrl functions obviously. Create a common DTSI that will be included by the A10s and A13 DTSI, that will add their SoC differences in there. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2015-01-30 15:30:48 +00:00
};
mmc1: mmc@01c10000 {
compatible = "allwinner,sun5i-a13-mmc";
reg = <0x01c10000 0x1000>;
ARM: sun5i: Convert to CCU Now that we have drivers for all of them, convert all the SoCs that share the sun5i DTSI to the new CCU driver. Acked-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2016-10-15 20:36:19 +00:00
clocks = <&ccu CLK_AHB_MMC1>, <&ccu CLK_MMC1>;
clock-names = "ahb", "mmc";
ARM: sun5i: Add a DTSI common to A10s and A13 The A10s and the A13 are very similar SoCs, the only difference being the number of pins and the number of devices available (number of UARTs, EMAC only in the A10s, etc.), and the clocks and pinctrl functions obviously. Create a common DTSI that will be included by the A10s and A13 DTSI, that will add their SoC differences in there. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2015-01-30 15:30:48 +00:00
interrupts = <33>;
status = "disabled";
ARM: dts: sunxi: Add address- and size-cells properties to the mmc ctrl nodes Sometimes we need to specify non-probably information for sdio devices in the devicetree, this is done through child nodes addressed by the reg property, whereby the reg property refers to the sdio function number, see; Documentation/devicetree/bindings/mmc/mmc.txt This commit adds the necessary address- and size-cells properties to the mmc controller nodes in the dtsi files, so that dts files needing such a child node do not need to specify these themselves. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2015-03-10 15:27:09 +00:00
#address-cells = <1>;
#size-cells = <0>;
ARM: sun5i: Add a DTSI common to A10s and A13 The A10s and the A13 are very similar SoCs, the only difference being the number of pins and the number of devices available (number of UARTs, EMAC only in the A10s, etc.), and the clocks and pinctrl functions obviously. Create a common DTSI that will be included by the A10s and A13 DTSI, that will add their SoC differences in there. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2015-01-30 15:30:48 +00:00
};
mmc2: mmc@01c11000 {
compatible = "allwinner,sun5i-a13-mmc";
reg = <0x01c11000 0x1000>;
ARM: sun5i: Convert to CCU Now that we have drivers for all of them, convert all the SoCs that share the sun5i DTSI to the new CCU driver. Acked-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2016-10-15 20:36:19 +00:00
clocks = <&ccu CLK_AHB_MMC2>, <&ccu CLK_MMC2>;
clock-names = "ahb", "mmc";
ARM: sun5i: Add a DTSI common to A10s and A13 The A10s and the A13 are very similar SoCs, the only difference being the number of pins and the number of devices available (number of UARTs, EMAC only in the A10s, etc.), and the clocks and pinctrl functions obviously. Create a common DTSI that will be included by the A10s and A13 DTSI, that will add their SoC differences in there. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2015-01-30 15:30:48 +00:00
interrupts = <34>;
status = "disabled";
ARM: dts: sunxi: Add address- and size-cells properties to the mmc ctrl nodes Sometimes we need to specify non-probably information for sdio devices in the devicetree, this is done through child nodes addressed by the reg property, whereby the reg property refers to the sdio function number, see; Documentation/devicetree/bindings/mmc/mmc.txt This commit adds the necessary address- and size-cells properties to the mmc controller nodes in the dtsi files, so that dts files needing such a child node do not need to specify these themselves. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2015-03-10 15:27:09 +00:00
#address-cells = <1>;
#size-cells = <0>;
ARM: sun5i: Add a DTSI common to A10s and A13 The A10s and the A13 are very similar SoCs, the only difference being the number of pins and the number of devices available (number of UARTs, EMAC only in the A10s, etc.), and the clocks and pinctrl functions obviously. Create a common DTSI that will be included by the A10s and A13 DTSI, that will add their SoC differences in there. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2015-01-30 15:30:48 +00:00
};
ARM: dts: sun5i: Add USB Dual Role Controller Add a node for the otg/drc usb controller to sun5i-a1*.dtsi. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2015-02-16 18:35:36 +00:00
usb_otg: usb@01c13000 {
compatible = "allwinner,sun4i-a10-musb";
reg = <0x01c13000 0x0400>;
ARM: sun5i: Convert to CCU Now that we have drivers for all of them, convert all the SoCs that share the sun5i DTSI to the new CCU driver. Acked-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2016-10-15 20:36:19 +00:00
clocks = <&ccu CLK_AHB_OTG>;
ARM: dts: sun5i: Add USB Dual Role Controller Add a node for the otg/drc usb controller to sun5i-a1*.dtsi. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2015-02-16 18:35:36 +00:00
interrupts = <38>;
interrupt-names = "mc";
phys = <&usbphy 0>;
phy-names = "usb";
extcon = <&usbphy 0>;
allwinner,sram = <&otg_sram 1>;
status = "disabled";
};
ARM: sun5i: Add a DTSI common to A10s and A13 The A10s and the A13 are very similar SoCs, the only difference being the number of pins and the number of devices available (number of UARTs, EMAC only in the A10s, etc.), and the clocks and pinctrl functions obviously. Create a common DTSI that will be included by the A10s and A13 DTSI, that will add their SoC differences in there. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2015-01-30 15:30:48 +00:00
usbphy: phy@01c13400 {
#phy-cells = <1>;
compatible = "allwinner,sun5i-a13-usb-phy";
reg = <0x01c13400 0x10 0x01c14800 0x4>;
reg-names = "phy_ctrl", "pmu1";
ARM: sun5i: Convert to CCU Now that we have drivers for all of them, convert all the SoCs that share the sun5i DTSI to the new CCU driver. Acked-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2016-10-15 20:36:19 +00:00
clocks = <&ccu CLK_USB_PHY0>;
ARM: sun5i: Add a DTSI common to A10s and A13 The A10s and the A13 are very similar SoCs, the only difference being the number of pins and the number of devices available (number of UARTs, EMAC only in the A10s, etc.), and the clocks and pinctrl functions obviously. Create a common DTSI that will be included by the A10s and A13 DTSI, that will add their SoC differences in there. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2015-01-30 15:30:48 +00:00
clock-names = "usb_phy";
ARM: sun5i: Convert to CCU Now that we have drivers for all of them, convert all the SoCs that share the sun5i DTSI to the new CCU driver. Acked-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2016-10-15 20:36:19 +00:00
resets = <&ccu RST_USB_PHY0>, <&ccu RST_USB_PHY1>;
ARM: sun5i: Add a DTSI common to A10s and A13 The A10s and the A13 are very similar SoCs, the only difference being the number of pins and the number of devices available (number of UARTs, EMAC only in the A10s, etc.), and the clocks and pinctrl functions obviously. Create a common DTSI that will be included by the A10s and A13 DTSI, that will add their SoC differences in there. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2015-01-30 15:30:48 +00:00
reset-names = "usb0_reset", "usb1_reset";
status = "disabled";
};
ehci0: usb@01c14000 {
ARM: dts: sun5i: Stop using different compatibles for ehci/ohci on a13 vs a10s The A13 and the A10s use the same die (this has been confirmed by Allwinner), as such there is no need to differentiate between the ehci/ohci parts of both, the only reasons there were different allwinner,sun5i-a*-foo compatible between these 2 parts is costemetically and because we could when we still had 2 completely different dtsi files. The allwinner,sun5i-a*-foo compatible strings are not used for binding at all, the actual driver binds to the generic-?hci compatible, so we can safely remove this cosmetical difference and simplify the dtsi files. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2015-03-07 19:01:19 +00:00
compatible = "allwinner,sun5i-a13-ehci", "generic-ehci";
ARM: sun5i: Add a DTSI common to A10s and A13 The A10s and the A13 are very similar SoCs, the only difference being the number of pins and the number of devices available (number of UARTs, EMAC only in the A10s, etc.), and the clocks and pinctrl functions obviously. Create a common DTSI that will be included by the A10s and A13 DTSI, that will add their SoC differences in there. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2015-01-30 15:30:48 +00:00
reg = <0x01c14000 0x100>;
interrupts = <39>;
ARM: sun5i: Convert to CCU Now that we have drivers for all of them, convert all the SoCs that share the sun5i DTSI to the new CCU driver. Acked-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2016-10-15 20:36:19 +00:00
clocks = <&ccu CLK_AHB_EHCI>;
ARM: sun5i: Add a DTSI common to A10s and A13 The A10s and the A13 are very similar SoCs, the only difference being the number of pins and the number of devices available (number of UARTs, EMAC only in the A10s, etc.), and the clocks and pinctrl functions obviously. Create a common DTSI that will be included by the A10s and A13 DTSI, that will add their SoC differences in there. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2015-01-30 15:30:48 +00:00
phys = <&usbphy 1>;
phy-names = "usb";
status = "disabled";
};
ohci0: usb@01c14400 {
ARM: dts: sun5i: Stop using different compatibles for ehci/ohci on a13 vs a10s The A13 and the A10s use the same die (this has been confirmed by Allwinner), as such there is no need to differentiate between the ehci/ohci parts of both, the only reasons there were different allwinner,sun5i-a*-foo compatible between these 2 parts is costemetically and because we could when we still had 2 completely different dtsi files. The allwinner,sun5i-a*-foo compatible strings are not used for binding at all, the actual driver binds to the generic-?hci compatible, so we can safely remove this cosmetical difference and simplify the dtsi files. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2015-03-07 19:01:19 +00:00
compatible = "allwinner,sun5i-a13-ohci", "generic-ohci";
ARM: sun5i: Add a DTSI common to A10s and A13 The A10s and the A13 are very similar SoCs, the only difference being the number of pins and the number of devices available (number of UARTs, EMAC only in the A10s, etc.), and the clocks and pinctrl functions obviously. Create a common DTSI that will be included by the A10s and A13 DTSI, that will add their SoC differences in there. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2015-01-30 15:30:48 +00:00
reg = <0x01c14400 0x100>;
interrupts = <40>;
ARM: sun5i: Convert to CCU Now that we have drivers for all of them, convert all the SoCs that share the sun5i DTSI to the new CCU driver. Acked-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2016-10-15 20:36:19 +00:00
clocks = <&ccu CLK_USB_OHCI>, <&ccu CLK_AHB_OHCI>;
ARM: sun5i: Add a DTSI common to A10s and A13 The A10s and the A13 are very similar SoCs, the only difference being the number of pins and the number of devices available (number of UARTs, EMAC only in the A10s, etc.), and the clocks and pinctrl functions obviously. Create a common DTSI that will be included by the A10s and A13 DTSI, that will add their SoC differences in there. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2015-01-30 15:30:48 +00:00
phys = <&usbphy 1>;
phy-names = "usb";
status = "disabled";
};
spi2: spi@01c17000 {
compatible = "allwinner,sun4i-a10-spi";
reg = <0x01c17000 0x1000>;
interrupts = <12>;
ARM: sun5i: Convert to CCU Now that we have drivers for all of them, convert all the SoCs that share the sun5i DTSI to the new CCU driver. Acked-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2016-10-15 20:36:19 +00:00
clocks = <&ccu CLK_AHB_SPI2>, <&ccu CLK_SPI2>;
ARM: sun5i: Add a DTSI common to A10s and A13 The A10s and the A13 are very similar SoCs, the only difference being the number of pins and the number of devices available (number of UARTs, EMAC only in the A10s, etc.), and the clocks and pinctrl functions obviously. Create a common DTSI that will be included by the A10s and A13 DTSI, that will add their SoC differences in there. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2015-01-30 15:30:48 +00:00
clock-names = "ahb", "mod";
dmas = <&dma SUN4I_DMA_DEDICATED 29>,
<&dma SUN4I_DMA_DEDICATED 28>;
dma-names = "rx", "tx";
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
};
ARM: sun5i: Convert to CCU Now that we have drivers for all of them, convert all the SoCs that share the sun5i DTSI to the new CCU driver. Acked-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2016-10-15 20:36:19 +00:00
ccu: clock@01c20000 {
reg = <0x01c20000 0x400>;
clocks = <&osc24M>, <&osc32k>;
clock-names = "hosc", "losc";
#clock-cells = <1>;
#reset-cells = <1>;
};
ARM: sun5i: Add a DTSI common to A10s and A13 The A10s and the A13 are very similar SoCs, the only difference being the number of pins and the number of devices available (number of UARTs, EMAC only in the A10s, etc.), and the clocks and pinctrl functions obviously. Create a common DTSI that will be included by the A10s and A13 DTSI, that will add their SoC differences in there. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2015-01-30 15:30:48 +00:00
intc: interrupt-controller@01c20400 {
compatible = "allwinner,sun4i-a10-ic";
reg = <0x01c20400 0x400>;
interrupt-controller;
#interrupt-cells = <1>;
};
pio: pinctrl@01c20800 {
reg = <0x01c20800 0x400>;
interrupts = <28>;
ARM: sun5i: Convert to CCU Now that we have drivers for all of them, convert all the SoCs that share the sun5i DTSI to the new CCU driver. Acked-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2016-10-15 20:36:19 +00:00
clocks = <&ccu CLK_APB0_PIO>, <&osc24M>, <&osc32k>;
ARM: sunxi: Add the missing clocks to the pinctrl nodes The pin controllers also use the two oscillators for debouncing. Add them to the DTs. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Chen-Yu Tsai <wens@csie.org>
2016-10-19 09:15:27 +00:00
clock-names = "apb", "hosc", "losc";
ARM: sun5i: Add a DTSI common to A10s and A13 The A10s and the A13 are very similar SoCs, the only difference being the number of pins and the number of devices available (number of UARTs, EMAC only in the A10s, etc.), and the clocks and pinctrl functions obviously. Create a common DTSI that will be included by the A10s and A13 DTSI, that will add their SoC differences in there. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2015-01-30 15:30:48 +00:00
gpio-controller;
interrupt-controller;
ARM: sunxi: dt: Convert users to the PIO interrupts binding The current DTs were setting the cell size to 2, but used the default xlate function that was assuming an interrupt cell size of 1, leading to the second part of the cell (the flags) being ignored, while we were having an inconsistent binding between the interrupts and gpio (that could also be used as interrupts). That "binding" doesn't work either with newer SoCs that have multiple irq banks. Now that we fixed the pinctrl driver to handle this like it should always have been handled, convert the DT users, and while we're at it, remove the size-cells property of PIO that is completely useless. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Linus Walleij <linus.walleij@linaro.org>
2015-06-17 09:44:24 +00:00
#interrupt-cells = <3>;
ARM: sun5i: Add a DTSI common to A10s and A13 The A10s and the A13 are very similar SoCs, the only difference being the number of pins and the number of devices available (number of UARTs, EMAC only in the A10s, etc.), and the clocks and pinctrl functions obviously. Create a common DTSI that will be included by the A10s and A13 DTSI, that will add their SoC differences in there. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2015-01-30 15:30:48 +00:00
#gpio-cells = <3>;
ARM: sun5i: a13: Move to the common sun5i DTSI Now that we have a common DTSI for the sun5i family, move the A13 to use it. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2015-01-30 15:31:19 +00:00
ARM: sun5i: a10s: Merge common controllers into the common DTSI Some controllers found in the A10s DTSI actually apply to all of the sun5i family. Move those into the common DTSI so that all SoCs can benefit from it. Acked-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-02-03 15:01:27 +00:00
emac_pins_a: emac0@0 {
pins = "PD6", "PD7", "PD10",
"PD11", "PD12", "PD13", "PD14",
"PD15", "PD18", "PD19", "PD20",
"PD21", "PD22", "PD23", "PD24",
"PD25", "PD26", "PD27";
function = "emac";
};
ARM: sun5i: a13: Move to the common sun5i DTSI Now that we have a common DTSI for the sun5i family, move the A13 to use it. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2015-01-30 15:31:19 +00:00
i2c0_pins_a: i2c0@0 {
ARM: sunxi: Convert pinctrl nodes to generic bindings Now that we can handle the generic pinctrl bindings, convert our DT to it. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Chen-Yu Tsai <wens@csie.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
2016-09-23 11:28:10 +00:00
pins = "PB0", "PB1";
function = "i2c0";
ARM: sun5i: a13: Move to the common sun5i DTSI Now that we have a common DTSI for the sun5i family, move the A13 to use it. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2015-01-30 15:31:19 +00:00
};
i2c1_pins_a: i2c1@0 {
ARM: sunxi: Convert pinctrl nodes to generic bindings Now that we can handle the generic pinctrl bindings, convert our DT to it. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Chen-Yu Tsai <wens@csie.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
2016-09-23 11:28:10 +00:00
pins = "PB15", "PB16";
function = "i2c1";
ARM: sun5i: a13: Move to the common sun5i DTSI Now that we have a common DTSI for the sun5i family, move the A13 to use it. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2015-01-30 15:31:19 +00:00
};
i2c2_pins_a: i2c2@0 {
ARM: sunxi: Convert pinctrl nodes to generic bindings Now that we can handle the generic pinctrl bindings, convert our DT to it. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Chen-Yu Tsai <wens@csie.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
2016-09-23 11:28:10 +00:00
pins = "PB17", "PB18";
function = "i2c2";
ARM: sun5i: a13: Move to the common sun5i DTSI Now that we have a common DTSI for the sun5i family, move the A13 to use it. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2015-01-30 15:31:19 +00:00
};
ARM: sun5i: gr8: Use common sun5i DTSI Most of the GR8 DTSI is duplicated with the common sun5i DTSI, and some of the extra nodes defined there actually apply to all of the sun5i family. Move those into the common DTSI so that all SoCs can benefit from it, and include the sun5i DTSI. Acked-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-02-03 15:01:27 +00:00
ir0_rx_pins_a: ir0@0 {
pins = "PB4";
function = "ir0";
};
ARM: sun5i: Add RGB 565 LCD pins Some boards use the LCD in RGB565. Enable the pin muxing option. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Chen-Yu Tsai <wens@csie.org>
2016-02-26 01:15:30 +00:00
lcd_rgb565_pins: lcd_rgb565@0 {
ARM: sunxi: Convert pinctrl nodes to generic bindings Now that we can handle the generic pinctrl bindings, convert our DT to it. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Chen-Yu Tsai <wens@csie.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
2016-09-23 11:28:10 +00:00
pins = "PD3", "PD4", "PD5", "PD6", "PD7",
ARM: sun5i: Add RGB 565 LCD pins Some boards use the LCD in RGB565. Enable the pin muxing option. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Chen-Yu Tsai <wens@csie.org>
2016-02-26 01:15:30 +00:00
"PD10", "PD11", "PD12", "PD13", "PD14", "PD15",
"PD19", "PD20", "PD21", "PD22", "PD23",
"PD24", "PD25", "PD26", "PD27";
ARM: sunxi: Convert pinctrl nodes to generic bindings Now that we can handle the generic pinctrl bindings, convert our DT to it. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Chen-Yu Tsai <wens@csie.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
2016-09-23 11:28:10 +00:00
function = "lcd0";
ARM: sun5i: Add RGB 565 LCD pins Some boards use the LCD in RGB565. Enable the pin muxing option. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Chen-Yu Tsai <wens@csie.org>
2016-02-26 01:15:30 +00:00
};
ARM: sun5i: a13: Merge common controllers into the common DTSI Some controllers found in the A13 DTSI actually apply to all of the sun5i family. Move those into the common DTSI so that all SoCs can benefit from it. Acked-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-02-03 15:01:27 +00:00
lcd_rgb666_pins: lcd_rgb666@0 {
pins = "PD2", "PD3", "PD4", "PD5", "PD6", "PD7",
"PD10", "PD11", "PD12", "PD13", "PD14", "PD15",
"PD18", "PD19", "PD20", "PD21", "PD22", "PD23",
"PD24", "PD25", "PD26", "PD27";
function = "lcd0";
};
ARM: sun5i: a13: Move to the common sun5i DTSI Now that we have a common DTSI for the sun5i family, move the A13 to use it. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2015-01-30 15:31:19 +00:00
mmc0_pins_a: mmc0@0 {
ARM: sunxi: Convert pinctrl nodes to generic bindings Now that we can handle the generic pinctrl bindings, convert our DT to it. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Chen-Yu Tsai <wens@csie.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
2016-09-23 11:28:10 +00:00
pins = "PF0", "PF1", "PF2", "PF3",
"PF4", "PF5";
function = "mmc0";
drive-strength = <30>;
ARM: dts: sunxi: Explicitly enable pull-ups for MMC pins In the past, all the MMC pins had allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; which was actually a no-op. We were relying on U-boot to set the bias pull up for us. These properties were removed as part of the fix up to actually support no bias on the pins. During the transition some boards experienced regular MMC time-outs during normal operation, while others completely failed to initialize the SD card. Given that MMC starts in open-drain mode and the pull-ups are required, it's best to enable it for all the pin settings. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2016-11-17 09:34:38 +00:00
bias-pull-up;
ARM: sun5i: a13: Move to the common sun5i DTSI Now that we have a common DTSI for the sun5i family, move the A13 to use it. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2015-01-30 15:31:19 +00:00
};
ARM: dts: sun5i: Add mmc2 pinmux settings Add A13 mmc2 pinmux settings, note these are for a 8bit bus. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2015-03-07 19:01:20 +00:00
mmc2_pins_a: mmc2@0 {
ARM: sunxi: Convert pinctrl nodes to generic bindings Now that we can handle the generic pinctrl bindings, convert our DT to it. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Chen-Yu Tsai <wens@csie.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
2016-09-23 11:28:10 +00:00
pins = "PC6", "PC7", "PC8", "PC9",
"PC10", "PC11", "PC12", "PC13",
"PC14", "PC15";
function = "mmc2";
drive-strength = <30>;
bias-pull-up;
ARM: dts: sun5i: Add mmc2 pinmux settings Add A13 mmc2 pinmux settings, note these are for a 8bit bus. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2015-03-07 19:01:20 +00:00
};
ARM: sun5i: dt: Move uart3 pinctrl node to common DTSI The uart3 pins are shared between the A10s and A13, move the pinctrl node to the common DTSI to avoid duplication. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org>
2015-06-22 09:56:09 +00:00
ARM: dts: sun5i: add a pinctrl node for 4bit mmc2 Some board only use 4bit mode of mmc2. Add a pinctrl node for it. Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2016-12-21 20:02:34 +00:00
mmc2_4bit_pins_a: mmc2-4bit@0 {
pins = "PC6", "PC7", "PC8", "PC9",
"PC10", "PC11";
function = "mmc2";
drive-strength = <30>;
bias-pull-up;
};
ARM: sun5i: gr8: Use common sun5i DTSI Most of the GR8 DTSI is duplicated with the common sun5i DTSI, and some of the extra nodes defined there actually apply to all of the sun5i family. Move those into the common DTSI so that all SoCs can benefit from it, and include the sun5i DTSI. Acked-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-02-03 15:01:27 +00:00
nand_pins_a: nand-base0@0 {
pins = "PC0", "PC1", "PC2",
"PC5", "PC8", "PC9", "PC10",
"PC11", "PC12", "PC13", "PC14",
"PC15";
function = "nand0";
};
nand_cs0_pins_a: nand-cs@0 {
pins = "PC4";
function = "nand0";
};
nand_rb0_pins_a: nand-rb@0 {
pins = "PC6";
function = "nand0";
};
ARM: sun5i: Add SPI2 pins All the sun5i have the SPI2 pins exposed on the PE bank. Add them to the DT. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Chen-Yu Tsai <wens@csie.org>
2016-07-18 18:51:30 +00:00
spi2_pins_a: spi2@0 {
ARM: sunxi: Convert pinctrl nodes to generic bindings Now that we can handle the generic pinctrl bindings, convert our DT to it. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Chen-Yu Tsai <wens@csie.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
2016-09-23 11:28:10 +00:00
pins = "PE1", "PE2", "PE3";
function = "spi2";
ARM: sun5i: Add SPI2 pins All the sun5i have the SPI2 pins exposed on the PE bank. Add them to the DT. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Chen-Yu Tsai <wens@csie.org>
2016-07-18 18:51:30 +00:00
};
spi2_cs0_pins_a: spi2-cs0@0 {
ARM: sunxi: Convert pinctrl nodes to generic bindings Now that we can handle the generic pinctrl bindings, convert our DT to it. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Chen-Yu Tsai <wens@csie.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
2016-09-23 11:28:10 +00:00
pins = "PE0";
function = "spi2";
ARM: sun5i: Add SPI2 pins All the sun5i have the SPI2 pins exposed on the PE bank. Add them to the DT. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Chen-Yu Tsai <wens@csie.org>
2016-07-18 18:51:30 +00:00
};
ARM: sun5i: a13: Merge common controllers into the common DTSI Some controllers found in the A13 DTSI actually apply to all of the sun5i family. Move those into the common DTSI so that all SoCs can benefit from it. Acked-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-02-03 15:01:27 +00:00
uart1_pins_a: uart1@0 {
pins = "PE10", "PE11";
function = "uart1";
};
uart1_pins_b: uart1@1 {
pins = "PG3", "PG4";
function = "uart1";
};
ARM: sun5i: Add UART2 pin group There's one UART2 pin group that can be used across all sun5i SoCs. However, the A10s already has one pin group for that controller. Change the index of the one in the A10s DTSI, and add the common one to sun5i.dtsi Acked-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-02-05 16:55:01 +00:00
uart2_pins_a: uart2@0 {
pins = "PD2", "PD3";
function = "uart2";
};
uart2_cts_rts_pins_a: uart2-cts-rts@0 {
pins = "PD4", "PD5";
function = "uart2";
};
ARM: sun5i: dt: Move uart3 pinctrl node to common DTSI The uart3 pins are shared between the A10s and A13, move the pinctrl node to the common DTSI to avoid duplication. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org>
2015-06-22 09:56:09 +00:00
uart3_pins_a: uart3@0 {
ARM: sunxi: Convert pinctrl nodes to generic bindings Now that we can handle the generic pinctrl bindings, convert our DT to it. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Chen-Yu Tsai <wens@csie.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
2016-09-23 11:28:10 +00:00
pins = "PG9", "PG10";
function = "uart3";
ARM: sun5i: dt: Add UART3 CTS and RTS pins Add a separate pinctrl node for the UART3 CTS and RTS pins shared between the A10s and A13. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org>
2015-06-22 10:00:30 +00:00
};
ARM: sun5i: Rename UART3 flow control pins The UART3 pin group for the CTS and RTS signals doesn't follow our usual pattern. Rename it so that it matches. Acked-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-02-05 16:56:40 +00:00
uart3_cts_rts_pins_a: uart3-cts-rts@0 {
ARM: sunxi: Convert pinctrl nodes to generic bindings Now that we can handle the generic pinctrl bindings, convert our DT to it. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Chen-Yu Tsai <wens@csie.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
2016-09-23 11:28:10 +00:00
pins = "PG11", "PG12";
function = "uart3";
ARM: sun5i: dt: Move uart3 pinctrl node to common DTSI The uart3 pins are shared between the A10s and A13, move the pinctrl node to the common DTSI to avoid duplication. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org>
2015-06-22 09:56:09 +00:00
};
ARM: dts: sun5i: Add PWM channel 0 pinmux setting for A13/A10s Add a pinmux setting for the first pwm channel. This is often used for backlight dimming on tablets. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2015-10-11 09:55:06 +00:00
pwm0_pins: pwm0 {
ARM: sunxi: Convert pinctrl nodes to generic bindings Now that we can handle the generic pinctrl bindings, convert our DT to it. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Chen-Yu Tsai <wens@csie.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
2016-09-23 11:28:10 +00:00
pins = "PB2";
function = "pwm";
ARM: dts: sun5i: Add PWM channel 0 pinmux setting for A13/A10s Add a pinmux setting for the first pwm channel. This is often used for backlight dimming on tablets. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2015-10-11 09:55:06 +00:00
};
ARM: sun5i: Add a DTSI common to A10s and A13 The A10s and the A13 are very similar SoCs, the only difference being the number of pins and the number of devices available (number of UARTs, EMAC only in the A10s, etc.), and the clocks and pinctrl functions obviously. Create a common DTSI that will be included by the A10s and A13 DTSI, that will add their SoC differences in there. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2015-01-30 15:30:48 +00:00
};
timer@01c20c00 {
compatible = "allwinner,sun4i-a10-timer";
reg = <0x01c20c00 0x90>;
interrupts = <22>;
ARM: sun5i: Convert to CCU Now that we have drivers for all of them, convert all the SoCs that share the sun5i DTSI to the new CCU driver. Acked-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2016-10-15 20:36:19 +00:00
clocks = <&ccu CLK_HOSC>;
ARM: sun5i: Add a DTSI common to A10s and A13 The A10s and the A13 are very similar SoCs, the only difference being the number of pins and the number of devices available (number of UARTs, EMAC only in the A10s, etc.), and the clocks and pinctrl functions obviously. Create a common DTSI that will be included by the A10s and A13 DTSI, that will add their SoC differences in there. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2015-01-30 15:30:48 +00:00
};
wdt: watchdog@01c20c90 {
compatible = "allwinner,sun4i-a10-wdt";
reg = <0x01c20c90 0x10>;
};
ARM: sun5i: gr8: Use common sun5i DTSI Most of the GR8 DTSI is duplicated with the common sun5i DTSI, and some of the extra nodes defined there actually apply to all of the sun5i family. Move those into the common DTSI so that all SoCs can benefit from it, and include the sun5i DTSI. Acked-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-02-03 15:01:27 +00:00
ir0: ir@01c21800 {
compatible = "allwinner,sun4i-a10-ir";
clocks = <&ccu CLK_APB0_IR>, <&ccu CLK_IR>;
clock-names = "apb", "ir";
interrupts = <5>;
reg = <0x01c21800 0x40>;
status = "disabled";
};
ARM: sun5i: Add a DTSI common to A10s and A13 The A10s and the A13 are very similar SoCs, the only difference being the number of pins and the number of devices available (number of UARTs, EMAC only in the A10s, etc.), and the clocks and pinctrl functions obviously. Create a common DTSI that will be included by the A10s and A13 DTSI, that will add their SoC differences in there. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2015-01-30 15:30:48 +00:00
lradc: lradc@01c22800 {
compatible = "allwinner,sun4i-a10-lradc-keys";
reg = <0x01c22800 0x100>;
interrupts = <31>;
status = "disabled";
};
ARM: sun5i: Add the Audio codec DT node The A13 and A10s also have the audio codec present. List it in the device tree. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Chen-Yu Tsai <wens@csie.org>
2015-07-27 14:50:21 +00:00
codec: codec@01c22c00 {
#sound-dai-cells = <0>;
compatible = "allwinner,sun4i-a10-codec";
reg = <0x01c22c00 0x40>;
interrupts = <30>;
ARM: sun5i: Convert to CCU Now that we have drivers for all of them, convert all the SoCs that share the sun5i DTSI to the new CCU driver. Acked-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2016-10-15 20:36:19 +00:00
clocks = <&ccu CLK_APB0_CODEC>, <&ccu CLK_CODEC>;
ARM: sun5i: Add the Audio codec DT node The A13 and A10s also have the audio codec present. List it in the device tree. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Chen-Yu Tsai <wens@csie.org>
2015-07-27 14:50:21 +00:00
clock-names = "apb", "codec";
dmas = <&dma SUN4I_DMA_NORMAL 19>,
<&dma SUN4I_DMA_NORMAL 19>;
dma-names = "rx", "tx";
status = "disabled";
};
ARM: sun5i: Add a DTSI common to A10s and A13 The A10s and the A13 are very similar SoCs, the only difference being the number of pins and the number of devices available (number of UARTs, EMAC only in the A10s, etc.), and the clocks and pinctrl functions obviously. Create a common DTSI that will be included by the A10s and A13 DTSI, that will add their SoC differences in there. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2015-01-30 15:30:48 +00:00
sid: eeprom@01c23800 {
compatible = "allwinner,sun4i-a10-sid";
reg = <0x01c23800 0x10>;
};
rtp: rtp@01c25000 {
ARM: dts: sunxi: Adjust touchscreen compatible for sun5i and later The touchscreen controller in the A13 and later has a different temperature curve than the one in the original A10, change the compatible for the A13 and later so that the kernel will use the correct curve. Reported-by: Tong Zhang <lovewilliam@gmail.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2015-03-08 20:53:42 +00:00
compatible = "allwinner,sun5i-a13-ts";
ARM: sun5i: Add a DTSI common to A10s and A13 The A10s and the A13 are very similar SoCs, the only difference being the number of pins and the number of devices available (number of UARTs, EMAC only in the A10s, etc.), and the clocks and pinctrl functions obviously. Create a common DTSI that will be included by the A10s and A13 DTSI, that will add their SoC differences in there. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2015-01-30 15:30:48 +00:00
reg = <0x01c25000 0x100>;
interrupts = <29>;
#thermal-sensor-cells = <0>;
};
ARM: sun5i: a10s: Merge common controllers into the common DTSI Some controllers found in the A10s DTSI actually apply to all of the sun5i family. Move those into the common DTSI so that all SoCs can benefit from it. Acked-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-02-03 15:01:27 +00:00
uart0: serial@01c28000 {
compatible = "snps,dw-apb-uart";
reg = <0x01c28000 0x400>;
interrupts = <1>;
reg-shift = <2>;
reg-io-width = <4>;
clocks = <&ccu CLK_APB1_UART0>;
status = "disabled";
};
ARM: sun5i: Add a DTSI common to A10s and A13 The A10s and the A13 are very similar SoCs, the only difference being the number of pins and the number of devices available (number of UARTs, EMAC only in the A10s, etc.), and the clocks and pinctrl functions obviously. Create a common DTSI that will be included by the A10s and A13 DTSI, that will add their SoC differences in there. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2015-01-30 15:30:48 +00:00
uart1: serial@01c28400 {
compatible = "snps,dw-apb-uart";
reg = <0x01c28400 0x400>;
interrupts = <2>;
reg-shift = <2>;
reg-io-width = <4>;
ARM: sun5i: Convert to CCU Now that we have drivers for all of them, convert all the SoCs that share the sun5i DTSI to the new CCU driver. Acked-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2016-10-15 20:36:19 +00:00
clocks = <&ccu CLK_APB1_UART1>;
ARM: sun5i: Add a DTSI common to A10s and A13 The A10s and the A13 are very similar SoCs, the only difference being the number of pins and the number of devices available (number of UARTs, EMAC only in the A10s, etc.), and the clocks and pinctrl functions obviously. Create a common DTSI that will be included by the A10s and A13 DTSI, that will add their SoC differences in there. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2015-01-30 15:30:48 +00:00
status = "disabled";
};
ARM: sun5i: a10s: Merge common controllers into the common DTSI Some controllers found in the A10s DTSI actually apply to all of the sun5i family. Move those into the common DTSI so that all SoCs can benefit from it. Acked-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-02-03 15:01:27 +00:00
uart2: serial@01c28800 {
compatible = "snps,dw-apb-uart";
reg = <0x01c28800 0x400>;
interrupts = <3>;
reg-shift = <2>;
reg-io-width = <4>;
clocks = <&ccu CLK_APB1_UART2>;
status = "disabled";
};
ARM: sun5i: Add a DTSI common to A10s and A13 The A10s and the A13 are very similar SoCs, the only difference being the number of pins and the number of devices available (number of UARTs, EMAC only in the A10s, etc.), and the clocks and pinctrl functions obviously. Create a common DTSI that will be included by the A10s and A13 DTSI, that will add their SoC differences in there. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2015-01-30 15:30:48 +00:00
uart3: serial@01c28c00 {
compatible = "snps,dw-apb-uart";
reg = <0x01c28c00 0x400>;
interrupts = <4>;
reg-shift = <2>;
reg-io-width = <4>;
ARM: sun5i: Convert to CCU Now that we have drivers for all of them, convert all the SoCs that share the sun5i DTSI to the new CCU driver. Acked-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2016-10-15 20:36:19 +00:00
clocks = <&ccu CLK_APB1_UART3>;
ARM: sun5i: Add a DTSI common to A10s and A13 The A10s and the A13 are very similar SoCs, the only difference being the number of pins and the number of devices available (number of UARTs, EMAC only in the A10s, etc.), and the clocks and pinctrl functions obviously. Create a common DTSI that will be included by the A10s and A13 DTSI, that will add their SoC differences in there. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2015-01-30 15:30:48 +00:00
status = "disabled";
};
i2c0: i2c@01c2ac00 {
compatible = "allwinner,sun4i-a10-i2c";
reg = <0x01c2ac00 0x400>;
interrupts = <7>;
ARM: sun5i: Convert to CCU Now that we have drivers for all of them, convert all the SoCs that share the sun5i DTSI to the new CCU driver. Acked-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2016-10-15 20:36:19 +00:00
clocks = <&ccu CLK_APB1_I2C0>;
ARM: sun5i: Add a DTSI common to A10s and A13 The A10s and the A13 are very similar SoCs, the only difference being the number of pins and the number of devices available (number of UARTs, EMAC only in the A10s, etc.), and the clocks and pinctrl functions obviously. Create a common DTSI that will be included by the A10s and A13 DTSI, that will add their SoC differences in there. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2015-01-30 15:30:48 +00:00
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
};
i2c1: i2c@01c2b000 {
compatible = "allwinner,sun4i-a10-i2c";
reg = <0x01c2b000 0x400>;
interrupts = <8>;
ARM: sun5i: Convert to CCU Now that we have drivers for all of them, convert all the SoCs that share the sun5i DTSI to the new CCU driver. Acked-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2016-10-15 20:36:19 +00:00
clocks = <&ccu CLK_APB1_I2C1>;
ARM: sun5i: Add a DTSI common to A10s and A13 The A10s and the A13 are very similar SoCs, the only difference being the number of pins and the number of devices available (number of UARTs, EMAC only in the A10s, etc.), and the clocks and pinctrl functions obviously. Create a common DTSI that will be included by the A10s and A13 DTSI, that will add their SoC differences in there. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2015-01-30 15:30:48 +00:00
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
};
i2c2: i2c@01c2b400 {
compatible = "allwinner,sun4i-a10-i2c";
reg = <0x01c2b400 0x400>;
interrupts = <9>;
ARM: sun5i: Convert to CCU Now that we have drivers for all of them, convert all the SoCs that share the sun5i DTSI to the new CCU driver. Acked-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2016-10-15 20:36:19 +00:00
clocks = <&ccu CLK_APB1_I2C2>;
ARM: sun5i: Add a DTSI common to A10s and A13 The A10s and the A13 are very similar SoCs, the only difference being the number of pins and the number of devices available (number of UARTs, EMAC only in the A10s, etc.), and the clocks and pinctrl functions obviously. Create a common DTSI that will be included by the A10s and A13 DTSI, that will add their SoC differences in there. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2015-01-30 15:30:48 +00:00
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
};
timer@01c60000 {
compatible = "allwinner,sun5i-a13-hstimer";
reg = <0x01c60000 0x1000>;
interrupts = <82>, <83>;
ARM: sun5i: Convert to CCU Now that we have drivers for all of them, convert all the SoCs that share the sun5i DTSI to the new CCU driver. Acked-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2016-10-15 20:36:19 +00:00
clocks = <&ccu CLK_AHB_HSTIMER>;
ARM: sun5i: Add a DTSI common to A10s and A13 The A10s and the A13 are very similar SoCs, the only difference being the number of pins and the number of devices available (number of UARTs, EMAC only in the A10s, etc.), and the clocks and pinctrl functions obviously. Create a common DTSI that will be included by the A10s and A13 DTSI, that will add their SoC differences in there. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2015-01-30 15:30:48 +00:00
};
ARM: sun5i: a13: Merge common controllers into the common DTSI Some controllers found in the A13 DTSI actually apply to all of the sun5i family. Move those into the common DTSI so that all SoCs can benefit from it. Acked-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-02-03 15:01:27 +00:00
fe0: display-frontend@01e00000 {
compatible = "allwinner,sun5i-a13-display-frontend";
reg = <0x01e00000 0x20000>;
interrupts = <47>;
clocks = <&ccu CLK_DE_FE>, <&ccu CLK_DE_FE>,
<&ccu CLK_DRAM_DE_FE>;
clock-names = "ahb", "mod",
"ram";
resets = <&ccu RST_DE_FE>;
status = "disabled";
ports {
#address-cells = <1>;
#size-cells = <0>;
fe0_out: port@1 {
#address-cells = <1>;
#size-cells = <0>;
reg = <1>;
fe0_out_be0: endpoint@0 {
reg = <0>;
remote-endpoint = <&be0_in_fe0>;
};
};
};
};
be0: display-backend@01e60000 {
compatible = "allwinner,sun5i-a13-display-backend";
reg = <0x01e60000 0x10000>;
clocks = <&ccu CLK_AHB_DE_BE>, <&ccu CLK_DE_BE>,
<&ccu CLK_DRAM_DE_BE>;
clock-names = "ahb", "mod",
"ram";
resets = <&ccu RST_DE_BE>;
status = "disabled";
assigned-clocks = <&ccu CLK_DE_BE>;
assigned-clock-rates = <300000000>;
ports {
#address-cells = <1>;
#size-cells = <0>;
be0_in: port@0 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
be0_in_fe0: endpoint@0 {
reg = <0>;
remote-endpoint = <&fe0_out_be0>;
};
};
be0_out: port@1 {
#address-cells = <1>;
#size-cells = <0>;
reg = <1>;
be0_out_tcon0: endpoint@0 {
reg = <0>;
remote-endpoint = <&tcon0_in_be0>;
};
};
};
};
ARM: sun5i: Add a DTSI common to A10s and A13 The A10s and the A13 are very similar SoCs, the only difference being the number of pins and the number of devices available (number of UARTs, EMAC only in the A10s, etc.), and the clocks and pinctrl functions obviously. Create a common DTSI that will be included by the A10s and A13 DTSI, that will add their SoC differences in there. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2015-01-30 15:30:48 +00:00
};
};
Reference in New Issue Copy Permalink