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linux/arch/arm/boot/dts/imx6qdl-sabresd.dtsi

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ARM: dts: imx: make sabreauto and sabresd common The sabreauto and sabresd boards are common for imx6q and imx6dl. Create imx6qdl-sabreauto.dtsi and imx6qdl-sabresd.dtsi for those common parts. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-04-02 05:15:16 +00:00
/*
* Copyright 2012 Freescale Semiconductor, Inc.
* Copyright 2011 Linaro Ltd.
*
* The code contained herein is licensed under the GNU General Public
* License. You may obtain a copy of the GNU General Public License
* Version 2 or later at the following locations:
*
* http://www.opensource.org/licenses/gpl-license.html
* http://www.gnu.org/copyleft/gpl.html
*/
/ {
memory {
reg = <0x10000000 0x40000000>;
};
regulators {
compatible = "simple-bus";
reg_usb_otg_vbus: usb_otg_vbus {
compatible = "regulator-fixed";
regulator-name = "usb_otg_vbus";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
gpio = <&gpio3 22 0>;
enable-active-high;
};
ARM: dtsi: imx6qdl-sabresd: add a fixed regulator for WM8962 On Sabre SD, system controls WM8962 power by pulling up/down GPIO_4_10, so add a regulator controled by GPIO_4_10 for WM8962. Signed-off-by: Nicolin Chen <b42378@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-06-13 11:51:00 +00:00
ARM: dtsi: imx6qdl-sabresd: Add USB host 1 VBUS regulator We enabled USB host 1, so host 1's vbus should be on to let host 1 work. Signed-off-by: Peter Chen <peter.chen@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-12 08:46:24 +00:00
reg_usb_h1_vbus: usb_h1_vbus {
compatible = "regulator-fixed";
regulator-name = "usb_h1_vbus";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
gpio = <&gpio1 29 0>;
enable-active-high;
};
ARM: dtsi: imx6qdl-sabresd: add a fixed regulator for WM8962 On Sabre SD, system controls WM8962 power by pulling up/down GPIO_4_10, so add a regulator controled by GPIO_4_10 for WM8962. Signed-off-by: Nicolin Chen <b42378@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-06-13 11:51:00 +00:00
reg_audio: wm8962_supply {
compatible = "regulator-fixed";
regulator-name = "wm8962-supply";
gpio = <&gpio4 10 0>;
enable-active-high;
};
ARM: dts: imx: make sabreauto and sabresd common The sabreauto and sabresd boards are common for imx6q and imx6dl. Create imx6qdl-sabreauto.dtsi and imx6qdl-sabresd.dtsi for those common parts. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-04-02 05:15:16 +00:00
};
gpio-keys {
compatible = "gpio-keys";
volume-up {
label = "Volume Up";
gpios = <&gpio1 4 0>;
ARM: dts: imx6qdl-sabresd: Allow buttons to wake-up the system This is useful for testing suspend/resume sequence. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-07-19 13:40:23 +00:00
gpio-key,wakeup;
ARM: dts: imx: make sabreauto and sabresd common The sabreauto and sabresd boards are common for imx6q and imx6dl. Create imx6qdl-sabreauto.dtsi and imx6qdl-sabresd.dtsi for those common parts. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-04-02 05:15:16 +00:00
linux,code = <115>; /* KEY_VOLUMEUP */
};
volume-down {
label = "Volume Down";
gpios = <&gpio1 5 0>;
ARM: dts: imx6qdl-sabresd: Allow buttons to wake-up the system This is useful for testing suspend/resume sequence. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-07-19 13:40:23 +00:00
gpio-key,wakeup;
ARM: dts: imx: make sabreauto and sabresd common The sabreauto and sabresd boards are common for imx6q and imx6dl. Create imx6qdl-sabreauto.dtsi and imx6qdl-sabresd.dtsi for those common parts. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-04-02 05:15:16 +00:00
linux,code = <114>; /* KEY_VOLUMEDOWN */
};
};
ARM: dtsi: imx6qdl-sabresd: Enable WM8962 audio support Enable WM8962 ALSA machine driver via devicetree. Signed-off-by: Nicolin Chen <b42378@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-06-14 05:22:46 +00:00
sound {
compatible = "fsl,imx6q-sabresd-wm8962",
"fsl,imx-audio-wm8962";
model = "wm8962-audio";
ssi-controller = <&ssi2>;
audio-codec = <&codec>;
audio-routing =
"Headphone Jack", "HPOUTL",
"Headphone Jack", "HPOUTR",
"Ext Spk", "SPKOUTL",
"Ext Spk", "SPKOUTR",
"MICBIAS", "AMIC",
"IN3R", "MICBIAS",
"DMIC", "MICBIAS",
"DMICDAT", "DMIC";
mux-int-port = <2>;
mux-ext-port = <3>;
};
ARM: dts: imx6qdl-sabresd: Add backlight support for lvds This patch adds support for lvds backlight on boards i.MX6q-SabreSD and i.MX6dl-SabreSD Signed-off-by: Rogerio Pimentel <rogerio.pimentel@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-10-11 19:48:16 +00:00
backlight {
compatible = "pwm-backlight";
pwms = <&pwm1 0 5000000>;
brightness-levels = <0 4 8 16 32 64 128 255>;
default-brightness-level = <7>;
status = "okay";
};
ARM: dts: imx: make sabreauto and sabresd common The sabreauto and sabresd boards are common for imx6q and imx6dl. Create imx6qdl-sabreauto.dtsi and imx6qdl-sabresd.dtsi for those common parts. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-04-02 05:15:16 +00:00
};
ARM: dtsi: imx6qdl-sabresd: Enable SSI2 and AUDMUX Enable SSI2 and its pin configuration in AUDMUX. Signed-off-by: Nicolin Chen <b42378@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-06-14 05:19:57 +00:00
&audmux {
pinctrl-names = "default";
ARM: dts: imx6qdl: make pinctrl nodes board specific Currently, all pinctrl setting nodes are defined in <soc>.dtsi, so that boards that share the same pinctrl setting do not have to define it time and time again in <board>.dts. However, along with the devices and use cases being added continuously, the pinctrl setting nodes under iomuxc becomes more than expected. This bloats device tree blob for particular board unnecessarily since only a small subset of those pinctrl setting nodes will be used by the board. It impacts not only the DTB file size but also the run-time device tree lookup efficiency. The patch moves all the pinctrl data into individual boards as needed. With the changes, the pinctrl setting nodes becomes local to particular board, and it makes no sense to continue numbering the setting for given peripheral. Thus, all the pinctrl phandler name gets updated to have only peripheral name in there. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-10-23 07:36:09 +00:00
pinctrl-0 = <&pinctrl_audmux>;
ARM: dtsi: imx6qdl-sabresd: Enable SSI2 and AUDMUX Enable SSI2 and its pin configuration in AUDMUX. Signed-off-by: Nicolin Chen <b42378@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-06-14 05:19:57 +00:00
status = "okay";
};
ARM: dts: imx6qdl-sabresd: enable the SPI NOR enable the spi nor for imx6q{dl}-sabresd boards. Signed-off-by: Huang Shijie <b32955@freescale.com>
2013-06-21 02:19:11 +00:00
&ecspi1 {
fsl,spi-num-chipselects = <1>;
cs-gpios = <&gpio4 9 0>;
pinctrl-names = "default";
ARM: dts: imx6qdl: make pinctrl nodes board specific Currently, all pinctrl setting nodes are defined in <soc>.dtsi, so that boards that share the same pinctrl setting do not have to define it time and time again in <board>.dts. However, along with the devices and use cases being added continuously, the pinctrl setting nodes under iomuxc becomes more than expected. This bloats device tree blob for particular board unnecessarily since only a small subset of those pinctrl setting nodes will be used by the board. It impacts not only the DTB file size but also the run-time device tree lookup efficiency. The patch moves all the pinctrl data into individual boards as needed. With the changes, the pinctrl setting nodes becomes local to particular board, and it makes no sense to continue numbering the setting for given peripheral. Thus, all the pinctrl phandler name gets updated to have only peripheral name in there. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-10-23 07:36:09 +00:00
pinctrl-0 = <&pinctrl_ecspi1>;
ARM: dts: imx6qdl-sabresd: enable the SPI NOR enable the spi nor for imx6q{dl}-sabresd boards. Signed-off-by: Huang Shijie <b32955@freescale.com>
2013-06-21 02:19:11 +00:00
status = "okay";
flash: m25p80@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "st,m25p32";
spi-max-frequency = <20000000>;
reg = <0>;
};
};
ARM: dts: imx: make sabreauto and sabresd common The sabreauto and sabresd boards are common for imx6q and imx6dl. Create imx6qdl-sabreauto.dtsi and imx6qdl-sabresd.dtsi for those common parts. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-04-02 05:15:16 +00:00
&fec {
pinctrl-names = "default";
ARM: dts: imx6qdl: make pinctrl nodes board specific Currently, all pinctrl setting nodes are defined in <soc>.dtsi, so that boards that share the same pinctrl setting do not have to define it time and time again in <board>.dts. However, along with the devices and use cases being added continuously, the pinctrl setting nodes under iomuxc becomes more than expected. This bloats device tree blob for particular board unnecessarily since only a small subset of those pinctrl setting nodes will be used by the board. It impacts not only the DTB file size but also the run-time device tree lookup efficiency. The patch moves all the pinctrl data into individual boards as needed. With the changes, the pinctrl setting nodes becomes local to particular board, and it makes no sense to continue numbering the setting for given peripheral. Thus, all the pinctrl phandler name gets updated to have only peripheral name in there. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-10-23 07:36:09 +00:00
pinctrl-0 = <&pinctrl_enet>;
ARM: dts: imx: make sabreauto and sabresd common The sabreauto and sabresd boards are common for imx6q and imx6dl. Create imx6qdl-sabreauto.dtsi and imx6qdl-sabresd.dtsi for those common parts. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-04-02 05:15:16 +00:00
phy-mode = "rgmii";
ARM: dts: imx6qdl-sabresd: Provide phy-reset-gpios GPIO1_25 is used to reset the ethernet phy. Add support for it. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-09-27 14:12:41 +00:00
phy-reset-gpios = <&gpio1 25 0>;
ARM: dts: imx: make sabreauto and sabresd common The sabreauto and sabresd boards are common for imx6q and imx6dl. Create imx6qdl-sabreauto.dtsi and imx6qdl-sabresd.dtsi for those common parts. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-04-02 05:15:16 +00:00
status = "okay";
};
ARM: dtsi: imx6qdl-sabresd: Add WM8962 CODEC support Add WM8962 CODEC support and enable its parent I2C bus. Signed-off-by: Nicolin Chen <b42378@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-06-13 11:51:01 +00:00
&i2c1 {
clock-frequency = <100000>;
pinctrl-names = "default";
ARM: dts: imx6qdl: make pinctrl nodes board specific Currently, all pinctrl setting nodes are defined in <soc>.dtsi, so that boards that share the same pinctrl setting do not have to define it time and time again in <board>.dts. However, along with the devices and use cases being added continuously, the pinctrl setting nodes under iomuxc becomes more than expected. This bloats device tree blob for particular board unnecessarily since only a small subset of those pinctrl setting nodes will be used by the board. It impacts not only the DTB file size but also the run-time device tree lookup efficiency. The patch moves all the pinctrl data into individual boards as needed. With the changes, the pinctrl setting nodes becomes local to particular board, and it makes no sense to continue numbering the setting for given peripheral. Thus, all the pinctrl phandler name gets updated to have only peripheral name in there. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-10-23 07:36:09 +00:00
pinctrl-0 = <&pinctrl_i2c1>;
ARM: dtsi: imx6qdl-sabresd: Add WM8962 CODEC support Add WM8962 CODEC support and enable its parent I2C bus. Signed-off-by: Nicolin Chen <b42378@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-06-13 11:51:01 +00:00
status = "okay";
codec: wm8962@1a {
compatible = "wlf,wm8962";
reg = <0x1a>;
ARM: imx6q: remove board specific CLKO setup The CLKO is widely used by imx6q board designs to clock audio codec. Since most codecs accept 24 MHz frequency, let's initially set up CLKO with OSC24M (cko <-- cko2 <-- osc). Then those board specific CLKO setup for audio codec can be removed. The board dts files also need an update on cko reference in codec node. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-07-18 06:42:28 +00:00
clocks = <&clks 201>;
ARM: dtsi: imx6qdl-sabresd: Add WM8962 CODEC support Add WM8962 CODEC support and enable its parent I2C bus. Signed-off-by: Nicolin Chen <b42378@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-06-13 11:51:01 +00:00
DCVDD-supply = <&reg_audio>;
DBVDD-supply = <&reg_audio>;
AVDD-supply = <&reg_audio>;
CPVDD-supply = <&reg_audio>;
MICVDD-supply = <&reg_audio>;
PLLVDD-supply = <&reg_audio>;
SPKVDD1-supply = <&reg_audio>;
SPKVDD2-supply = <&reg_audio>;
gpio-cfg = <
0x0000 /* 0:Default */
0x0000 /* 1:Default */
0x0013 /* 2:FN_DMICCLK */
0x0000 /* 3:Default */
0x8014 /* 4:FN_DMICCDAT */
0x0000 /* 5:Default */
>;
};
};
ARM: dts: imx6qdl-sabresd: Add touchscreen support mx6 sabresd boards have a egalax touchscreen controller connected via I2C3. Add support for it. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-07-24 20:20:03 +00:00
&i2c3 {
clock-frequency = <100000>;
pinctrl-names = "default";
ARM: dts: imx6qdl: make pinctrl nodes board specific Currently, all pinctrl setting nodes are defined in <soc>.dtsi, so that boards that share the same pinctrl setting do not have to define it time and time again in <board>.dts. However, along with the devices and use cases being added continuously, the pinctrl setting nodes under iomuxc becomes more than expected. This bloats device tree blob for particular board unnecessarily since only a small subset of those pinctrl setting nodes will be used by the board. It impacts not only the DTB file size but also the run-time device tree lookup efficiency. The patch moves all the pinctrl data into individual boards as needed. With the changes, the pinctrl setting nodes becomes local to particular board, and it makes no sense to continue numbering the setting for given peripheral. Thus, all the pinctrl phandler name gets updated to have only peripheral name in there. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-10-23 07:36:09 +00:00
pinctrl-0 = <&pinctrl_i2c3>;
ARM: dts: imx6qdl-sabresd: Add touchscreen support mx6 sabresd boards have a egalax touchscreen controller connected via I2C3. Add support for it. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-07-24 20:20:03 +00:00
status = "okay";
egalax_ts@04 {
compatible = "eeti,egalax_ts";
reg = <0x04>;
interrupt-parent = <&gpio6>;
interrupts = <7 2>;
wakeup-gpios = <&gpio6 7 0>;
};
};
ARM: dts: imx: share pad macro names between imx6q and imx6dl The imx6q and imx6dl are two pin-to-pin compatible SoCs. The same board design can work with either chip plugged into the socket, e.g. sabresd and sabreauto boards. We currently define pin groups in imx6q.dtsi and imx6dl.dtsi respectively because the pad macro names are different between two chips. This brings a maintenance burden on having the same label point to the same pin group defined in two places. The patch replaces prefix MX6Q_ and MX6DL_ with MX6QDL_ for both SoCs pad macro names. Then the pin groups becomes completely common between imx6q and imx6dl and can just be moved into imx6qdl.dtsi, so that the long term maintenance of imx6q/dt pin settings becomes easier. Unfortunately, the change brings some dramatic diff stat, but it's all about DTS file, and the ultimate net diff stat is good. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-07-11 05:58:36 +00:00
&iomuxc {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_hog>;
ARM: dts: imx6qdl: make pinctrl nodes board specific Currently, all pinctrl setting nodes are defined in <soc>.dtsi, so that boards that share the same pinctrl setting do not have to define it time and time again in <board>.dts. However, along with the devices and use cases being added continuously, the pinctrl setting nodes under iomuxc becomes more than expected. This bloats device tree blob for particular board unnecessarily since only a small subset of those pinctrl setting nodes will be used by the board. It impacts not only the DTB file size but also the run-time device tree lookup efficiency. The patch moves all the pinctrl data into individual boards as needed. With the changes, the pinctrl setting nodes becomes local to particular board, and it makes no sense to continue numbering the setting for given peripheral. Thus, all the pinctrl phandler name gets updated to have only peripheral name in there. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-10-23 07:36:09 +00:00
imx6qdl-sabresd {
ARM: dts: imx: share pad macro names between imx6q and imx6dl The imx6q and imx6dl are two pin-to-pin compatible SoCs. The same board design can work with either chip plugged into the socket, e.g. sabresd and sabreauto boards. We currently define pin groups in imx6q.dtsi and imx6dl.dtsi respectively because the pad macro names are different between two chips. This brings a maintenance burden on having the same label point to the same pin group defined in two places. The patch replaces prefix MX6Q_ and MX6DL_ with MX6QDL_ for both SoCs pad macro names. Then the pin groups becomes completely common between imx6q and imx6dl and can just be moved into imx6qdl.dtsi, so that the long term maintenance of imx6q/dt pin settings becomes easier. Unfortunately, the change brings some dramatic diff stat, but it's all about DTS file, and the ultimate net diff stat is good. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-07-11 05:58:36 +00:00
pinctrl_hog: hoggrp {
fsl,pins = <
MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x80000000
MX6QDL_PAD_GPIO_5__GPIO1_IO05 0x80000000
MX6QDL_PAD_NANDF_D0__GPIO2_IO00 0x80000000
MX6QDL_PAD_NANDF_D1__GPIO2_IO01 0x80000000
MX6QDL_PAD_NANDF_D2__GPIO2_IO02 0x80000000
MX6QDL_PAD_NANDF_D3__GPIO2_IO03 0x80000000
MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x130b0
ARM: dts: imx6qdl-sabresd: Add touchscreen support mx6 sabresd boards have a egalax touchscreen controller connected via I2C3. Add support for it. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-07-24 20:20:03 +00:00
MX6QDL_PAD_NANDF_CLE__GPIO6_IO07 0x80000000
ARM: dtsi: imx6qdl-sabresd: Add USB host 1 VBUS regulator We enabled USB host 1, so host 1's vbus should be on to let host 1 work. Signed-off-by: Peter Chen <peter.chen@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-12 08:46:24 +00:00
MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x80000000
ARM: dtsi: imx6qdl-sabresd: Add USB OTG vbus pin to pinctrl_hog USB OTG vbus pin needs to be configured as gpio function at sabresd board. Signed-off-by: Peter Chen <peter.chen@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-12 08:51:39 +00:00
MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x80000000
ARM: dts: imx6qdl-sabresd: Provide phy-reset-gpios GPIO1_25 is used to reset the ethernet phy. Add support for it. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-09-27 14:12:41 +00:00
MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25 0x80000000
ARM: dts: imx: share pad macro names between imx6q and imx6dl The imx6q and imx6dl are two pin-to-pin compatible SoCs. The same board design can work with either chip plugged into the socket, e.g. sabresd and sabreauto boards. We currently define pin groups in imx6q.dtsi and imx6dl.dtsi respectively because the pad macro names are different between two chips. This brings a maintenance burden on having the same label point to the same pin group defined in two places. The patch replaces prefix MX6Q_ and MX6DL_ with MX6QDL_ for both SoCs pad macro names. Then the pin groups becomes completely common between imx6q and imx6dl and can just be moved into imx6qdl.dtsi, so that the long term maintenance of imx6q/dt pin settings becomes easier. Unfortunately, the change brings some dramatic diff stat, but it's all about DTS file, and the ultimate net diff stat is good. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-07-11 05:58:36 +00:00
>;
};
ARM: dts: imx6qdl: make pinctrl nodes board specific Currently, all pinctrl setting nodes are defined in <soc>.dtsi, so that boards that share the same pinctrl setting do not have to define it time and time again in <board>.dts. However, along with the devices and use cases being added continuously, the pinctrl setting nodes under iomuxc becomes more than expected. This bloats device tree blob for particular board unnecessarily since only a small subset of those pinctrl setting nodes will be used by the board. It impacts not only the DTB file size but also the run-time device tree lookup efficiency. The patch moves all the pinctrl data into individual boards as needed. With the changes, the pinctrl setting nodes becomes local to particular board, and it makes no sense to continue numbering the setting for given peripheral. Thus, all the pinctrl phandler name gets updated to have only peripheral name in there. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-10-23 07:36:09 +00:00
pinctrl_audmux: audmuxgrp {
fsl,pins = <
MX6QDL_PAD_CSI0_DAT7__AUD3_RXD 0x80000000
MX6QDL_PAD_CSI0_DAT4__AUD3_TXC 0x80000000
MX6QDL_PAD_CSI0_DAT5__AUD3_TXD 0x80000000
MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS 0x80000000
>;
};
pinctrl_ecspi1: ecspi1grp {
fsl,pins = <
MX6QDL_PAD_KEY_COL1__ECSPI1_MISO 0x100b1
MX6QDL_PAD_KEY_ROW0__ECSPI1_MOSI 0x100b1
MX6QDL_PAD_KEY_COL0__ECSPI1_SCLK 0x100b1
>;
};
pinctrl_enet: enetgrp {
fsl,pins = <
MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0
MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0
MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0
MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0
MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0
MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0
MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0
MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0
MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8
>;
};
pinctrl_i2c1: i2c1grp {
fsl,pins = <
MX6QDL_PAD_CSI0_DAT8__I2C1_SDA 0x4001b8b1
MX6QDL_PAD_CSI0_DAT9__I2C1_SCL 0x4001b8b1
>;
};
pinctrl_i2c3: i2c3grp {
fsl,pins = <
MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1
MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
>;
};
pinctrl_pwm1: pwm1grp {
fsl,pins = <
MX6QDL_PAD_SD1_DAT3__PWM1_OUT 0x1b0b1
>;
};
pinctrl_uart1: uart1grp {
fsl,pins = <
MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x1b0b1
MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b1
>;
};
pinctrl_usbotg: usbotggrp {
fsl,pins = <
MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059
>;
};
pinctrl_usdhc2: usdhc2grp {
fsl,pins = <
MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059
MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10059
MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059
MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059
MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059
MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17059
MX6QDL_PAD_NANDF_D4__SD2_DATA4 0x17059
MX6QDL_PAD_NANDF_D5__SD2_DATA5 0x17059
MX6QDL_PAD_NANDF_D6__SD2_DATA6 0x17059
MX6QDL_PAD_NANDF_D7__SD2_DATA7 0x17059
>;
};
pinctrl_usdhc3: usdhc3grp {
fsl,pins = <
MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x17059
MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x17059
MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x17059
MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x17059
>;
};
ARM: dts: imx: share pad macro names between imx6q and imx6dl The imx6q and imx6dl are two pin-to-pin compatible SoCs. The same board design can work with either chip plugged into the socket, e.g. sabresd and sabreauto boards. We currently define pin groups in imx6q.dtsi and imx6dl.dtsi respectively because the pad macro names are different between two chips. This brings a maintenance burden on having the same label point to the same pin group defined in two places. The patch replaces prefix MX6Q_ and MX6DL_ with MX6QDL_ for both SoCs pad macro names. Then the pin groups becomes completely common between imx6q and imx6dl and can just be moved into imx6qdl.dtsi, so that the long term maintenance of imx6q/dt pin settings becomes easier. Unfortunately, the change brings some dramatic diff stat, but it's all about DTS file, and the ultimate net diff stat is good. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-07-11 05:58:36 +00:00
};
};
ARM: dts: imx: add LVDS panel for imx6qdl-sabresd Add HannStar HSD100PXN1 XGA panel support on LVDS1 port of imx6qdl-sabresd board. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-07-16 14:15:18 +00:00
&ldb {
status = "okay";
lvds-channel@1 {
fsl,data-mapping = "spwg";
fsl,data-width = <18>;
status = "okay";
display-timings {
native-mode = <&timing0>;
timing0: hsd100pxn1 {
clock-frequency = <65000000>;
hactive = <1024>;
vactive = <768>;
hback-porch = <220>;
hfront-porch = <40>;
vback-porch = <21>;
vfront-porch = <7>;
hsync-len = <60>;
vsync-len = <10>;
};
};
};
};
ARM: dts: imx6qdl-sabresd: Add backlight support for lvds This patch adds support for lvds backlight on boards i.MX6q-SabreSD and i.MX6dl-SabreSD Signed-off-by: Rogerio Pimentel <rogerio.pimentel@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-10-11 19:48:16 +00:00
&pwm1 {
pinctrl-names = "default";
ARM: dts: imx6qdl: make pinctrl nodes board specific Currently, all pinctrl setting nodes are defined in <soc>.dtsi, so that boards that share the same pinctrl setting do not have to define it time and time again in <board>.dts. However, along with the devices and use cases being added continuously, the pinctrl setting nodes under iomuxc becomes more than expected. This bloats device tree blob for particular board unnecessarily since only a small subset of those pinctrl setting nodes will be used by the board. It impacts not only the DTB file size but also the run-time device tree lookup efficiency. The patch moves all the pinctrl data into individual boards as needed. With the changes, the pinctrl setting nodes becomes local to particular board, and it makes no sense to continue numbering the setting for given peripheral. Thus, all the pinctrl phandler name gets updated to have only peripheral name in there. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-10-23 07:36:09 +00:00
pinctrl-0 = <&pinctrl_pwm1>;
ARM: dts: imx6qdl-sabresd: Add backlight support for lvds This patch adds support for lvds backlight on boards i.MX6q-SabreSD and i.MX6dl-SabreSD Signed-off-by: Rogerio Pimentel <rogerio.pimentel@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-10-11 19:48:16 +00:00
status = "okay";
};
ARM: dtsi: imx6qdl-sabresd: Enable SSI2 and AUDMUX Enable SSI2 and its pin configuration in AUDMUX. Signed-off-by: Nicolin Chen <b42378@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-06-14 05:19:57 +00:00
&ssi2 {
fsl,mode = "i2s-slave";
status = "okay";
};
ARM: dts: imx: make sabreauto and sabresd common The sabreauto and sabresd boards are common for imx6q and imx6dl. Create imx6qdl-sabreauto.dtsi and imx6qdl-sabresd.dtsi for those common parts. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-04-02 05:15:16 +00:00
&uart1 {
pinctrl-names = "default";
ARM: dts: imx6qdl: make pinctrl nodes board specific Currently, all pinctrl setting nodes are defined in <soc>.dtsi, so that boards that share the same pinctrl setting do not have to define it time and time again in <board>.dts. However, along with the devices and use cases being added continuously, the pinctrl setting nodes under iomuxc becomes more than expected. This bloats device tree blob for particular board unnecessarily since only a small subset of those pinctrl setting nodes will be used by the board. It impacts not only the DTB file size but also the run-time device tree lookup efficiency. The patch moves all the pinctrl data into individual boards as needed. With the changes, the pinctrl setting nodes becomes local to particular board, and it makes no sense to continue numbering the setting for given peripheral. Thus, all the pinctrl phandler name gets updated to have only peripheral name in there. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-10-23 07:36:09 +00:00
pinctrl-0 = <&pinctrl_uart1>;
ARM: dts: imx: make sabreauto and sabresd common The sabreauto and sabresd boards are common for imx6q and imx6dl. Create imx6qdl-sabreauto.dtsi and imx6qdl-sabresd.dtsi for those common parts. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-04-02 05:15:16 +00:00
status = "okay";
};
&usbh1 {
ARM: dtsi: imx6qdl-sabresd: Add USB host 1 VBUS regulator We enabled USB host 1, so host 1's vbus should be on to let host 1 work. Signed-off-by: Peter Chen <peter.chen@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-12 08:46:24 +00:00
vbus-supply = <&reg_usb_h1_vbus>;
ARM: dts: imx: make sabreauto and sabresd common The sabreauto and sabresd boards are common for imx6q and imx6dl. Create imx6qdl-sabreauto.dtsi and imx6qdl-sabresd.dtsi for those common parts. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-04-02 05:15:16 +00:00
status = "okay";
};
&usbotg {
vbus-supply = <&reg_usb_otg_vbus>;
pinctrl-names = "default";
ARM: dts: imx6qdl: make pinctrl nodes board specific Currently, all pinctrl setting nodes are defined in <soc>.dtsi, so that boards that share the same pinctrl setting do not have to define it time and time again in <board>.dts. However, along with the devices and use cases being added continuously, the pinctrl setting nodes under iomuxc becomes more than expected. This bloats device tree blob for particular board unnecessarily since only a small subset of those pinctrl setting nodes will be used by the board. It impacts not only the DTB file size but also the run-time device tree lookup efficiency. The patch moves all the pinctrl data into individual boards as needed. With the changes, the pinctrl setting nodes becomes local to particular board, and it makes no sense to continue numbering the setting for given peripheral. Thus, all the pinctrl phandler name gets updated to have only peripheral name in there. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-10-23 07:36:09 +00:00
pinctrl-0 = <&pinctrl_usbotg>;
ARM: dts: imx: make sabreauto and sabresd common The sabreauto and sabresd boards are common for imx6q and imx6dl. Create imx6qdl-sabreauto.dtsi and imx6qdl-sabresd.dtsi for those common parts. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-04-02 05:15:16 +00:00
disable-over-current;
status = "okay";
};
&usdhc2 {
pinctrl-names = "default";
ARM: dts: imx6qdl: make pinctrl nodes board specific Currently, all pinctrl setting nodes are defined in <soc>.dtsi, so that boards that share the same pinctrl setting do not have to define it time and time again in <board>.dts. However, along with the devices and use cases being added continuously, the pinctrl setting nodes under iomuxc becomes more than expected. This bloats device tree blob for particular board unnecessarily since only a small subset of those pinctrl setting nodes will be used by the board. It impacts not only the DTB file size but also the run-time device tree lookup efficiency. The patch moves all the pinctrl data into individual boards as needed. With the changes, the pinctrl setting nodes becomes local to particular board, and it makes no sense to continue numbering the setting for given peripheral. Thus, all the pinctrl phandler name gets updated to have only peripheral name in there. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-10-23 07:36:09 +00:00
pinctrl-0 = <&pinctrl_usdhc2>;
ARM: dts: imx6qdl-sabresd: SDHC ports are 8 bit-wide On imx6qdl-sabresd the SDHC2 and SDHC3 are 8 bit-wide, so pass the bus-width property to reflect that. Otherwise the mmc driver will operate with the default bus-width value of 4. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-09-17 16:46:23 +00:00
bus-width = <8>;
ARM: dts: imx: make sabreauto and sabresd common The sabreauto and sabresd boards are common for imx6q and imx6dl. Create imx6qdl-sabreauto.dtsi and imx6qdl-sabresd.dtsi for those common parts. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-04-02 05:15:16 +00:00
cd-gpios = <&gpio2 2 0>;
wp-gpios = <&gpio2 3 0>;
status = "okay";
};
&usdhc3 {
pinctrl-names = "default";
ARM: dts: imx6qdl: make pinctrl nodes board specific Currently, all pinctrl setting nodes are defined in <soc>.dtsi, so that boards that share the same pinctrl setting do not have to define it time and time again in <board>.dts. However, along with the devices and use cases being added continuously, the pinctrl setting nodes under iomuxc becomes more than expected. This bloats device tree blob for particular board unnecessarily since only a small subset of those pinctrl setting nodes will be used by the board. It impacts not only the DTB file size but also the run-time device tree lookup efficiency. The patch moves all the pinctrl data into individual boards as needed. With the changes, the pinctrl setting nodes becomes local to particular board, and it makes no sense to continue numbering the setting for given peripheral. Thus, all the pinctrl phandler name gets updated to have only peripheral name in there. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-10-23 07:36:09 +00:00
pinctrl-0 = <&pinctrl_usdhc3>;
ARM: dts: imx6qdl-sabresd: SDHC ports are 8 bit-wide On imx6qdl-sabresd the SDHC2 and SDHC3 are 8 bit-wide, so pass the bus-width property to reflect that. Otherwise the mmc driver will operate with the default bus-width value of 4. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-09-17 16:46:23 +00:00
bus-width = <8>;
ARM: dts: imx: make sabreauto and sabresd common The sabreauto and sabresd boards are common for imx6q and imx6dl. Create imx6qdl-sabreauto.dtsi and imx6qdl-sabresd.dtsi for those common parts. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-04-02 05:15:16 +00:00
cd-gpios = <&gpio2 0 0>;
wp-gpios = <&gpio2 1 0>;
status = "okay";
};
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