2012-03-22 18:47:43 +00:00
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/*
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* DTS file for SPEAr320 SoC
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*
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2012-06-20 19:53:02 +00:00
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* Copyright 2012 Viresh Kumar <viresh.linux@gmail.com>
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2012-03-22 18:47:43 +00:00
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*
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* The code contained herein is licensed under the GNU General Public
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* License. You may obtain a copy of the GNU General Public License
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* Version 2 or later at the following locations:
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*
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* http://www.opensource.org/licenses/gpl-license.html
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* http://www.gnu.org/copyleft/gpl.html
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*/
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/include/ "spear3xx.dtsi"
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/ {
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ahb {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "simple-bus";
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2012-03-29 03:00:19 +00:00
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ranges = <0x40000000 0x40000000 0x80000000
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2012-03-22 18:47:43 +00:00
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0xd0000000 0xd0000000 0x30000000>;
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2012-03-29 03:00:19 +00:00
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pinmux@b3000000 {
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compatible = "st,spear320-pinmux";
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reg = <0xb3000000 0x1000>;
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};
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2012-03-22 18:47:43 +00:00
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clcd@90000000 {
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compatible = "arm,clcd-pl110", "arm,primecell";
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reg = <0x90000000 0x1000>;
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interrupts = <33>;
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status = "disabled";
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};
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fsmc: flash@4c000000 {
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compatible = "st,spear600-fsmc-nand";
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#address-cells = <1>;
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#size-cells = <1>;
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reg = <0x4c000000 0x1000 /* FSMC Register */
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0x50000000 0x0010>; /* NAND Base */
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reg-names = "fsmc_regs", "nand_data";
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st,ale-off = <0x20000>;
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st,cle-off = <0x10000>;
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status = "disabled";
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};
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sdhci@70000000 {
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compatible = "st,sdhci-spear";
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reg = <0x70000000 0x100>;
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interrupts = <29>;
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status = "disabled";
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};
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spi1: spi@a5000000 {
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compatible = "arm,pl022", "arm,primecell";
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reg = <0xa5000000 0x1000>;
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status = "disabled";
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};
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spi2: spi@a6000000 {
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compatible = "arm,pl022", "arm,primecell";
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reg = <0xa6000000 0x1000>;
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status = "disabled";
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};
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apb {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "simple-bus";
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ranges = <0xa0000000 0xa0000000 0x10000000
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0xd0000000 0xd0000000 0x30000000>;
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i2c1: i2c@a7000000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "snps,designware-i2c";
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reg = <0xa7000000 0x1000>;
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status = "disabled";
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};
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serial@a3000000 {
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compatible = "arm,pl011", "arm,primecell";
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reg = <0xa3000000 0x1000>;
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status = "disabled";
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};
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serial@a4000000 {
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compatible = "arm,pl011", "arm,primecell";
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reg = <0xa4000000 0x1000>;
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status = "disabled";
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};
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};
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};
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};
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