[PATCH] avr32 architecture
This adds support for the Atmel AVR32 architecture as well as the AT32AP7000
CPU and the AT32STK1000 development board.
AVR32 is a new high-performance 32-bit RISC microprocessor core, designed for
cost-sensitive embedded applications, with particular emphasis on low power
consumption and high code density. The AVR32 architecture is not binary
compatible with earlier 8-bit AVR architectures.
The AVR32 architecture, including the instruction set, is described by the
AVR32 Architecture Manual, available from
http://www.atmel.com/dyn/resources/prod_documents/doc32000.pdf
The Atmel AT32AP7000 is the first CPU implementing the AVR32 architecture. It
features a 7-stage pipeline, 16KB instruction and data caches and a full
Memory Management Unit. It also comes with a large set of integrated
peripherals, many of which are shared with the AT91 ARM-based controllers from
Atmel.
Full data sheet is available from
http://www.atmel.com/dyn/resources/prod_documents/doc32003.pdf
while the CPU core implementation including caches and MMU is documented by
the AVR32 AP Technical Reference, available from
http://www.atmel.com/dyn/resources/prod_documents/doc32001.pdf
Information about the AT32STK1000 development board can be found at
http://www.atmel.com/dyn/products/tools_card.asp?tool_id=3918
including a BSP CD image with an earlier version of this patch, development
tools (binaries and source/patches) and a root filesystem image suitable for
booting from SD card.
Alternatively, there's a preliminary "getting started" guide available at
http://avr32linux.org/twiki/bin/view/Main/GettingStarted which provides links
to the sources and patches you will need in order to set up a cross-compiling
environment for avr32-linux.
This patch, as well as the other patches included with the BSP and the
toolchain patches, is actively supported by Atmel Corporation.
[dmccr@us.ibm.com: Fix more pxx_page macro locations]
[bunk@stusta.de: fix `make defconfig']
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Signed-off-by: Adrian Bunk <bunk@stusta.de>
Signed-off-by: Dave McCracken <dmccr@us.ibm.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-09-26 06:32:13 +00:00
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/*
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* Automatically generated by gen-header.xsl
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*/
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#ifndef __ASM_AVR32_PERIHP_INTC_H__
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#define __ASM_AVR32_PERIHP_INTC_H__
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#define INTC_NUM_INT_GRPS 33
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#define INTC_INTPR0 0x0
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# define INTC_INTPR0_INTLEV_OFFSET 30
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# define INTC_INTPR0_INTLEV_SIZE 2
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# define INTC_INTPR0_OFFSET_OFFSET 0
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# define INTC_INTPR0_OFFSET_SIZE 24
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#define INTC_INTREQ0 0x100
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# define INTC_INTREQ0_IREQUEST0_OFFSET 0
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# define INTC_INTREQ0_IREQUEST0_SIZE 1
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# define INTC_INTREQ0_IREQUEST1_OFFSET 1
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# define INTC_INTREQ0_IREQUEST1_SIZE 1
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#define INTC_INTPR1 0x4
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# define INTC_INTPR1_INTLEV_OFFSET 30
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# define INTC_INTPR1_INTLEV_SIZE 2
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# define INTC_INTPR1_OFFSET_OFFSET 0
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# define INTC_INTPR1_OFFSET_SIZE 24
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#define INTC_INTREQ1 0x104
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# define INTC_INTREQ1_IREQUEST32_OFFSET 0
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# define INTC_INTREQ1_IREQUEST32_SIZE 1
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# define INTC_INTREQ1_IREQUEST33_OFFSET 1
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# define INTC_INTREQ1_IREQUEST33_SIZE 1
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# define INTC_INTREQ1_IREQUEST34_OFFSET 2
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# define INTC_INTREQ1_IREQUEST34_SIZE 1
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# define INTC_INTREQ1_IREQUEST35_OFFSET 3
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# define INTC_INTREQ1_IREQUEST35_SIZE 1
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# define INTC_INTREQ1_IREQUEST36_OFFSET 4
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# define INTC_INTREQ1_IREQUEST36_SIZE 1
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# define INTC_INTREQ1_IREQUEST37_OFFSET 5
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# define INTC_INTREQ1_IREQUEST37_SIZE 1
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#define INTC_INTPR2 0x8
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# define INTC_INTPR2_INTLEV_OFFSET 30
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# define INTC_INTPR2_INTLEV_SIZE 2
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# define INTC_INTPR2_OFFSET_OFFSET 0
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# define INTC_INTPR2_OFFSET_SIZE 24
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#define INTC_INTREQ2 0x108
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# define INTC_INTREQ2_IREQUEST64_OFFSET 0
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# define INTC_INTREQ2_IREQUEST64_SIZE 1
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# define INTC_INTREQ2_IREQUEST65_OFFSET 1
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# define INTC_INTREQ2_IREQUEST65_SIZE 1
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# define INTC_INTREQ2_IREQUEST66_OFFSET 2
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# define INTC_INTREQ2_IREQUEST66_SIZE 1
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# define INTC_INTREQ2_IREQUEST67_OFFSET 3
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# define INTC_INTREQ2_IREQUEST67_SIZE 1
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# define INTC_INTREQ2_IREQUEST68_OFFSET 4
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# define INTC_INTREQ2_IREQUEST68_SIZE 1
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#define INTC_INTPR3 0xc
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# define INTC_INTPR3_INTLEV_OFFSET 30
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# define INTC_INTPR3_INTLEV_SIZE 2
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# define INTC_INTPR3_OFFSET_OFFSET 0
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# define INTC_INTPR3_OFFSET_SIZE 24
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#define INTC_INTREQ3 0x10c
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# define INTC_INTREQ3_IREQUEST96_OFFSET 0
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# define INTC_INTREQ3_IREQUEST96_SIZE 1
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#define INTC_INTPR4 0x10
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# define INTC_INTPR4_INTLEV_OFFSET 30
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# define INTC_INTPR4_INTLEV_SIZE 2
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# define INTC_INTPR4_OFFSET_OFFSET 0
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# define INTC_INTPR4_OFFSET_SIZE 24
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#define INTC_INTREQ4 0x110
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# define INTC_INTREQ4_IREQUEST128_OFFSET 0
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# define INTC_INTREQ4_IREQUEST128_SIZE 1
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#define INTC_INTPR5 0x14
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# define INTC_INTPR5_INTLEV_OFFSET 30
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# define INTC_INTPR5_INTLEV_SIZE 2
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# define INTC_INTPR5_OFFSET_OFFSET 0
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# define INTC_INTPR5_OFFSET_SIZE 24
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#define INTC_INTREQ5 0x114
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# define INTC_INTREQ5_IREQUEST160_OFFSET 0
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# define INTC_INTREQ5_IREQUEST160_SIZE 1
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#define INTC_INTPR6 0x18
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# define INTC_INTPR6_INTLEV_OFFSET 30
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# define INTC_INTPR6_INTLEV_SIZE 2
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# define INTC_INTPR6_OFFSET_OFFSET 0
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# define INTC_INTPR6_OFFSET_SIZE 24
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#define INTC_INTREQ6 0x118
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# define INTC_INTREQ6_IREQUEST192_OFFSET 0
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# define INTC_INTREQ6_IREQUEST192_SIZE 1
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#define INTC_INTPR7 0x1c
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# define INTC_INTPR7_INTLEV_OFFSET 30
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# define INTC_INTPR7_INTLEV_SIZE 2
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# define INTC_INTPR7_OFFSET_OFFSET 0
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# define INTC_INTPR7_OFFSET_SIZE 24
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#define INTC_INTREQ7 0x11c
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# define INTC_INTREQ7_IREQUEST224_OFFSET 0
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# define INTC_INTREQ7_IREQUEST224_SIZE 1
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#define INTC_INTPR8 0x20
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# define INTC_INTPR8_INTLEV_OFFSET 30
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# define INTC_INTPR8_INTLEV_SIZE 2
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# define INTC_INTPR8_OFFSET_OFFSET 0
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# define INTC_INTPR8_OFFSET_SIZE 24
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#define INTC_INTREQ8 0x120
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# define INTC_INTREQ8_IREQUEST256_OFFSET 0
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# define INTC_INTREQ8_IREQUEST256_SIZE 1
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#define INTC_INTPR9 0x24
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# define INTC_INTPR9_INTLEV_OFFSET 30
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# define INTC_INTPR9_INTLEV_SIZE 2
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# define INTC_INTPR9_OFFSET_OFFSET 0
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# define INTC_INTPR9_OFFSET_SIZE 24
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#define INTC_INTREQ9 0x124
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# define INTC_INTREQ9_IREQUEST288_OFFSET 0
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# define INTC_INTREQ9_IREQUEST288_SIZE 1
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#define INTC_INTPR10 0x28
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# define INTC_INTPR10_INTLEV_OFFSET 30
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# define INTC_INTPR10_INTLEV_SIZE 2
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# define INTC_INTPR10_OFFSET_OFFSET 0
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# define INTC_INTPR10_OFFSET_SIZE 24
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#define INTC_INTREQ10 0x128
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# define INTC_INTREQ10_IREQUEST320_OFFSET 0
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# define INTC_INTREQ10_IREQUEST320_SIZE 1
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#define INTC_INTPR11 0x2c
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# define INTC_INTPR11_INTLEV_OFFSET 30
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# define INTC_INTPR11_INTLEV_SIZE 2
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# define INTC_INTPR11_OFFSET_OFFSET 0
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# define INTC_INTPR11_OFFSET_SIZE 24
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#define INTC_INTREQ11 0x12c
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# define INTC_INTREQ11_IREQUEST352_OFFSET 0
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# define INTC_INTREQ11_IREQUEST352_SIZE 1
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#define INTC_INTPR12 0x30
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# define INTC_INTPR12_INTLEV_OFFSET 30
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# define INTC_INTPR12_INTLEV_SIZE 2
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# define INTC_INTPR12_OFFSET_OFFSET 0
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# define INTC_INTPR12_OFFSET_SIZE 24
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#define INTC_INTREQ12 0x130
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# define INTC_INTREQ12_IREQUEST384_OFFSET 0
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# define INTC_INTREQ12_IREQUEST384_SIZE 1
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#define INTC_INTPR13 0x34
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# define INTC_INTPR13_INTLEV_OFFSET 30
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# define INTC_INTPR13_INTLEV_SIZE 2
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# define INTC_INTPR13_OFFSET_OFFSET 0
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# define INTC_INTPR13_OFFSET_SIZE 24
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#define INTC_INTREQ13 0x134
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# define INTC_INTREQ13_IREQUEST416_OFFSET 0
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# define INTC_INTREQ13_IREQUEST416_SIZE 1
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#define INTC_INTPR14 0x38
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# define INTC_INTPR14_INTLEV_OFFSET 30
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# define INTC_INTPR14_INTLEV_SIZE 2
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# define INTC_INTPR14_OFFSET_OFFSET 0
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# define INTC_INTPR14_OFFSET_SIZE 24
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#define INTC_INTREQ14 0x138
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# define INTC_INTREQ14_IREQUEST448_OFFSET 0
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# define INTC_INTREQ14_IREQUEST448_SIZE 1
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#define INTC_INTPR15 0x3c
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# define INTC_INTPR15_INTLEV_OFFSET 30
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# define INTC_INTPR15_INTLEV_SIZE 2
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# define INTC_INTPR15_OFFSET_OFFSET 0
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# define INTC_INTPR15_OFFSET_SIZE 24
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#define INTC_INTREQ15 0x13c
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# define INTC_INTREQ15_IREQUEST480_OFFSET 0
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# define INTC_INTREQ15_IREQUEST480_SIZE 1
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#define INTC_INTPR16 0x40
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# define INTC_INTPR16_INTLEV_OFFSET 30
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# define INTC_INTPR16_INTLEV_SIZE 2
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# define INTC_INTPR16_OFFSET_OFFSET 0
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# define INTC_INTPR16_OFFSET_SIZE 24
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#define INTC_INTREQ16 0x140
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# define INTC_INTREQ16_IREQUEST512_OFFSET 0
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# define INTC_INTREQ16_IREQUEST512_SIZE 1
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#define INTC_INTPR17 0x44
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# define INTC_INTPR17_INTLEV_OFFSET 30
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# define INTC_INTPR17_INTLEV_SIZE 2
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# define INTC_INTPR17_OFFSET_OFFSET 0
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# define INTC_INTPR17_OFFSET_SIZE 24
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#define INTC_INTREQ17 0x144
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# define INTC_INTREQ17_IREQUEST544_OFFSET 0
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# define INTC_INTREQ17_IREQUEST544_SIZE 1
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#define INTC_INTPR18 0x48
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# define INTC_INTPR18_INTLEV_OFFSET 30
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# define INTC_INTPR18_INTLEV_SIZE 2
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# define INTC_INTPR18_OFFSET_OFFSET 0
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# define INTC_INTPR18_OFFSET_SIZE 24
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#define INTC_INTREQ18 0x148
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# define INTC_INTREQ18_IREQUEST576_OFFSET 0
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# define INTC_INTREQ18_IREQUEST576_SIZE 1
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#define INTC_INTPR19 0x4c
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# define INTC_INTPR19_INTLEV_OFFSET 30
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# define INTC_INTPR19_INTLEV_SIZE 2
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# define INTC_INTPR19_OFFSET_OFFSET 0
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# define INTC_INTPR19_OFFSET_SIZE 24
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#define INTC_INTREQ19 0x14c
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# define INTC_INTREQ19_IREQUEST608_OFFSET 0
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# define INTC_INTREQ19_IREQUEST608_SIZE 1
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# define INTC_INTREQ19_IREQUEST609_OFFSET 1
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# define INTC_INTREQ19_IREQUEST609_SIZE 1
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# define INTC_INTREQ19_IREQUEST610_OFFSET 2
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# define INTC_INTREQ19_IREQUEST610_SIZE 1
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# define INTC_INTREQ19_IREQUEST611_OFFSET 3
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# define INTC_INTREQ19_IREQUEST611_SIZE 1
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#define INTC_INTPR20 0x50
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# define INTC_INTPR20_INTLEV_OFFSET 30
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# define INTC_INTPR20_INTLEV_SIZE 2
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# define INTC_INTPR20_OFFSET_OFFSET 0
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# define INTC_INTPR20_OFFSET_SIZE 24
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#define INTC_INTREQ20 0x150
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# define INTC_INTREQ20_IREQUEST640_OFFSET 0
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# define INTC_INTREQ20_IREQUEST640_SIZE 1
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#define INTC_INTPR21 0x54
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# define INTC_INTPR21_INTLEV_OFFSET 30
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# define INTC_INTPR21_INTLEV_SIZE 2
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# define INTC_INTPR21_OFFSET_OFFSET 0
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# define INTC_INTPR21_OFFSET_SIZE 24
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#define INTC_INTREQ21 0x154
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# define INTC_INTREQ21_IREQUEST672_OFFSET 0
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# define INTC_INTREQ21_IREQUEST672_SIZE 1
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#define INTC_INTPR22 0x58
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# define INTC_INTPR22_INTLEV_OFFSET 30
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# define INTC_INTPR22_INTLEV_SIZE 2
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# define INTC_INTPR22_OFFSET_OFFSET 0
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# define INTC_INTPR22_OFFSET_SIZE 24
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#define INTC_INTREQ22 0x158
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# define INTC_INTREQ22_IREQUEST704_OFFSET 0
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# define INTC_INTREQ22_IREQUEST704_SIZE 1
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# define INTC_INTREQ22_IREQUEST705_OFFSET 1
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# define INTC_INTREQ22_IREQUEST705_SIZE 1
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# define INTC_INTREQ22_IREQUEST706_OFFSET 2
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# define INTC_INTREQ22_IREQUEST706_SIZE 1
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#define INTC_INTPR23 0x5c
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# define INTC_INTPR23_INTLEV_OFFSET 30
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# define INTC_INTPR23_INTLEV_SIZE 2
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# define INTC_INTPR23_OFFSET_OFFSET 0
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# define INTC_INTPR23_OFFSET_SIZE 24
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#define INTC_INTREQ23 0x15c
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# define INTC_INTREQ23_IREQUEST736_OFFSET 0
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# define INTC_INTREQ23_IREQUEST736_SIZE 1
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# define INTC_INTREQ23_IREQUEST737_OFFSET 1
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# define INTC_INTREQ23_IREQUEST737_SIZE 1
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# define INTC_INTREQ23_IREQUEST738_OFFSET 2
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# define INTC_INTREQ23_IREQUEST738_SIZE 1
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#define INTC_INTPR24 0x60
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# define INTC_INTPR24_INTLEV_OFFSET 30
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# define INTC_INTPR24_INTLEV_SIZE 2
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# define INTC_INTPR24_OFFSET_OFFSET 0
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# define INTC_INTPR24_OFFSET_SIZE 24
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#define INTC_INTREQ24 0x160
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# define INTC_INTREQ24_IREQUEST768_OFFSET 0
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# define INTC_INTREQ24_IREQUEST768_SIZE 1
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#define INTC_INTPR25 0x64
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# define INTC_INTPR25_INTLEV_OFFSET 30
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# define INTC_INTPR25_INTLEV_SIZE 2
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# define INTC_INTPR25_OFFSET_OFFSET 0
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# define INTC_INTPR25_OFFSET_SIZE 24
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#define INTC_INTREQ25 0x164
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# define INTC_INTREQ25_IREQUEST800_OFFSET 0
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# define INTC_INTREQ25_IREQUEST800_SIZE 1
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#define INTC_INTPR26 0x68
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# define INTC_INTPR26_INTLEV_OFFSET 30
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# define INTC_INTPR26_INTLEV_SIZE 2
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# define INTC_INTPR26_OFFSET_OFFSET 0
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# define INTC_INTPR26_OFFSET_SIZE 24
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#define INTC_INTREQ26 0x168
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# define INTC_INTREQ26_IREQUEST832_OFFSET 0
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# define INTC_INTREQ26_IREQUEST832_SIZE 1
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#define INTC_INTPR27 0x6c
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# define INTC_INTPR27_INTLEV_OFFSET 30
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# define INTC_INTPR27_INTLEV_SIZE 2
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# define INTC_INTPR27_OFFSET_OFFSET 0
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# define INTC_INTPR27_OFFSET_SIZE 24
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#define INTC_INTREQ27 0x16c
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# define INTC_INTREQ27_IREQUEST864_OFFSET 0
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# define INTC_INTREQ27_IREQUEST864_SIZE 1
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#define INTC_INTPR28 0x70
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# define INTC_INTPR28_INTLEV_OFFSET 30
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# define INTC_INTPR28_INTLEV_SIZE 2
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# define INTC_INTPR28_OFFSET_OFFSET 0
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# define INTC_INTPR28_OFFSET_SIZE 24
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#define INTC_INTREQ28 0x170
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# define INTC_INTREQ28_IREQUEST896_OFFSET 0
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# define INTC_INTREQ28_IREQUEST896_SIZE 1
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#define INTC_INTPR29 0x74
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# define INTC_INTPR29_INTLEV_OFFSET 30
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# define INTC_INTPR29_INTLEV_SIZE 2
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# define INTC_INTPR29_OFFSET_OFFSET 0
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# define INTC_INTPR29_OFFSET_SIZE 24
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#define INTC_INTREQ29 0x174
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# define INTC_INTREQ29_IREQUEST928_OFFSET 0
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# define INTC_INTREQ29_IREQUEST928_SIZE 1
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#define INTC_INTPR30 0x78
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# define INTC_INTPR30_INTLEV_OFFSET 30
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# define INTC_INTPR30_INTLEV_SIZE 2
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# define INTC_INTPR30_OFFSET_OFFSET 0
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# define INTC_INTPR30_OFFSET_SIZE 24
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#define INTC_INTREQ30 0x178
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# define INTC_INTREQ30_IREQUEST960_OFFSET 0
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# define INTC_INTREQ30_IREQUEST960_SIZE 1
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#define INTC_INTPR31 0x7c
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# define INTC_INTPR31_INTLEV_OFFSET 30
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# define INTC_INTPR31_INTLEV_SIZE 2
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# define INTC_INTPR31_OFFSET_OFFSET 0
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# define INTC_INTPR31_OFFSET_SIZE 24
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#define INTC_INTREQ31 0x17c
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# define INTC_INTREQ31_IREQUEST992_OFFSET 0
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# define INTC_INTREQ31_IREQUEST992_SIZE 1
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#define INTC_INTPR32 0x80
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# define INTC_INTPR32_INTLEV_OFFSET 30
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# define INTC_INTPR32_INTLEV_SIZE 2
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# define INTC_INTPR32_OFFSET_OFFSET 0
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# define INTC_INTPR32_OFFSET_SIZE 24
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#define INTC_INTREQ32 0x180
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# define INTC_INTREQ32_IREQUEST1024_OFFSET 0
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# define INTC_INTREQ32_IREQUEST1024_SIZE 1
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#define INTC_INTCAUSE0 0x20c
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# define INTC_INTCAUSE0_CAUSEGRP_OFFSET 0
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# define INTC_INTCAUSE0_CAUSEGRP_SIZE 6
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#define INTC_INTCAUSE1 0x208
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# define INTC_INTCAUSE1_CAUSEGRP_OFFSET 0
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# define INTC_INTCAUSE1_CAUSEGRP_SIZE 6
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#define INTC_INTCAUSE2 0x204
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# define INTC_INTCAUSE2_CAUSEGRP_OFFSET 0
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# define INTC_INTCAUSE2_CAUSEGRP_SIZE 6
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#define INTC_INTCAUSE3 0x200
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# define INTC_INTCAUSE3_CAUSEGRP_OFFSET 0
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# define INTC_INTCAUSE3_CAUSEGRP_SIZE 6
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#define INTC_BIT(name) (1 << INTC_##name##_OFFSET)
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#define INTC_MKBF(name, value) (((value) & ((1 << INTC_##name##_SIZE) - 1)) << INTC_##name##_OFFSET)
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#define INTC_GETBF(name, value) (((value) >> INTC_##name##_OFFSET) & ((1 << INTC_##name##_SIZE) - 1))
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2006-10-24 08:12:45 +00:00
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#define intc_readl(port,reg) \
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__raw_readl((port)->regs + INTC_##reg)
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#define intc_writel(port,reg,value) \
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__raw_writel((value), (port)->regs + INTC_##reg)
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[PATCH] avr32 architecture
This adds support for the Atmel AVR32 architecture as well as the AT32AP7000
CPU and the AT32STK1000 development board.
AVR32 is a new high-performance 32-bit RISC microprocessor core, designed for
cost-sensitive embedded applications, with particular emphasis on low power
consumption and high code density. The AVR32 architecture is not binary
compatible with earlier 8-bit AVR architectures.
The AVR32 architecture, including the instruction set, is described by the
AVR32 Architecture Manual, available from
http://www.atmel.com/dyn/resources/prod_documents/doc32000.pdf
The Atmel AT32AP7000 is the first CPU implementing the AVR32 architecture. It
features a 7-stage pipeline, 16KB instruction and data caches and a full
Memory Management Unit. It also comes with a large set of integrated
peripherals, many of which are shared with the AT91 ARM-based controllers from
Atmel.
Full data sheet is available from
http://www.atmel.com/dyn/resources/prod_documents/doc32003.pdf
while the CPU core implementation including caches and MMU is documented by
the AVR32 AP Technical Reference, available from
http://www.atmel.com/dyn/resources/prod_documents/doc32001.pdf
Information about the AT32STK1000 development board can be found at
http://www.atmel.com/dyn/products/tools_card.asp?tool_id=3918
including a BSP CD image with an earlier version of this patch, development
tools (binaries and source/patches) and a root filesystem image suitable for
booting from SD card.
Alternatively, there's a preliminary "getting started" guide available at
http://avr32linux.org/twiki/bin/view/Main/GettingStarted which provides links
to the sources and patches you will need in order to set up a cross-compiling
environment for avr32-linux.
This patch, as well as the other patches included with the BSP and the
toolchain patches, is actively supported by Atmel Corporation.
[dmccr@us.ibm.com: Fix more pxx_page macro locations]
[bunk@stusta.de: fix `make defconfig']
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Signed-off-by: Adrian Bunk <bunk@stusta.de>
Signed-off-by: Dave McCracken <dmccr@us.ibm.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-09-26 06:32:13 +00:00
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#endif /* __ASM_AVR32_PERIHP_INTC_H__ */
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