2019-09-06 06:14:51 +00:00
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/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Intel IOMMU trace support
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*
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* Copyright (C) 2019 Intel Corporation
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*
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* Author: Lu Baolu <baolu.lu@linux.intel.com>
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*/
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#undef TRACE_SYSTEM
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#define TRACE_SYSTEM intel_iommu
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#if !defined(_TRACE_INTEL_IOMMU_H) || defined(TRACE_HEADER_MULTI_READ)
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#define _TRACE_INTEL_IOMMU_H
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#include <linux/tracepoint.h>
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#include <linux/intel-iommu.h>
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2021-01-14 09:04:00 +00:00
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TRACE_EVENT(qi_submit,
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TP_PROTO(struct intel_iommu *iommu, u64 qw0, u64 qw1, u64 qw2, u64 qw3),
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TP_ARGS(iommu, qw0, qw1, qw2, qw3),
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TP_STRUCT__entry(
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__field(u64, qw0)
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__field(u64, qw1)
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__field(u64, qw2)
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__field(u64, qw3)
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__string(iommu, iommu->name)
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),
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TP_fast_assign(
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__assign_str(iommu, iommu->name);
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__entry->qw0 = qw0;
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__entry->qw1 = qw1;
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__entry->qw2 = qw2;
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__entry->qw3 = qw3;
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),
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TP_printk("%s %s: 0x%llx 0x%llx 0x%llx 0x%llx",
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__print_symbolic(__entry->qw0 & 0xf,
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{ QI_CC_TYPE, "cc_inv" },
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{ QI_IOTLB_TYPE, "iotlb_inv" },
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{ QI_DIOTLB_TYPE, "dev_tlb_inv" },
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{ QI_IEC_TYPE, "iec_inv" },
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{ QI_IWD_TYPE, "inv_wait" },
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{ QI_EIOTLB_TYPE, "p_iotlb_inv" },
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{ QI_PC_TYPE, "pc_inv" },
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{ QI_DEIOTLB_TYPE, "p_dev_tlb_inv" },
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{ QI_PGRP_RESP_TYPE, "page_grp_resp" }),
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__get_str(iommu),
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__entry->qw0, __entry->qw1, __entry->qw2, __entry->qw3
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)
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);
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2019-09-06 06:14:51 +00:00
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#endif /* _TRACE_INTEL_IOMMU_H */
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/* This part must be outside protection */
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#include <trace/define_trace.h>
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