leandrof/linux
1
0
Fork 0
forked from Minki/linux
Code Issues Pull Requests Packages Projects Releases Wiki Activity
6a0137101f
linux/sound/soc/meson/axg-toddr.c

349 lines
11 KiB
C
Raw Normal View History

ASoC: meson: add axg toddr driver Add the capture memory interface of Amlogic's axg SoCs. TDM, SPDIF or PDM input devices place audio samples inside this FIFO. The FIFO content is then pushed to DDR Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2018-07-17 15:42:53 +00:00
// SPDX-License-Identifier: (GPL-2.0 OR MIT)
//
// Copyright (c) 2018 BayLibre, SAS.
// Author: Jerome Brunet <jbrunet@baylibre.com>
/* This driver implements the frontend capture DAI of AXG based SoCs */
#include <linux/clk.h>
#include <linux/regmap.h>
#include <linux/module.h>
#include <linux/of_platform.h>
#include <sound/pcm_params.h>
#include <sound/soc.h>
#include <sound/soc-dai.h>
#include "axg-fifo.h"
#define CTRL0_TODDR_SEL_RESAMPLE BIT(30)
#define CTRL0_TODDR_EXT_SIGNED BIT(29)
#define CTRL0_TODDR_PP_MODE BIT(28)
ASoC: meson: axg-toddr: fix channel order on g12 platforms On g12 and following platforms, The first channel of record with more than 2 channels ends being placed randomly on an even channel of the output. On these SoCs, a bit was added to force the first channel to be placed at the beginning of the output. Apparently the behavior if the bit is not set is not easily predictable. According to the documentation, this bit is not present on the axg series. Set the bit on g12 and fix the problem. Fixes: a3c23a8ad4dc ("ASoC: meson: axg-toddr: add g12a support") Reported-by: Nicolas Belin <nbelin@baylibre.com> Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Link: https://lore.kernel.org/r/20200828151438.350974-1-jbrunet@baylibre.com Signed-off-by: Mark Brown <broonie@kernel.org>
2020-08-28 15:14:38 +00:00
#define CTRL0_TODDR_SYNC_CH BIT(27)
ASoC: meson: add axg toddr driver Add the capture memory interface of Amlogic's axg SoCs. TDM, SPDIF or PDM input devices place audio samples inside this FIFO. The FIFO content is then pushed to DDR Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2018-07-17 15:42:53 +00:00
#define CTRL0_TODDR_TYPE_MASK GENMASK(15, 13)
#define CTRL0_TODDR_TYPE(x) ((x) << 13)
#define CTRL0_TODDR_MSB_POS_MASK GENMASK(12, 8)
#define CTRL0_TODDR_MSB_POS(x) ((x) << 8)
#define CTRL0_TODDR_LSB_POS_MASK GENMASK(7, 3)
#define CTRL0_TODDR_LSB_POS(x) ((x) << 3)
ASoC: meson: axg-toddr: add g12a support Since the g12a SoC fifo can set the fifo initial start address, we must make sure to actually reset the write pointer to this address when starting a capture. Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2019-04-04 11:17:30 +00:00
#define CTRL1_TODDR_FORCE_FINISH BIT(25)
ASoC: meson: axg-toddr: add sm1 support On sm1, the maximum number TODDR inputs is extended to 16. Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Link: https://lore.kernel.org/r/20190905120120.31752-8-jbrunet@baylibre.com Signed-off-by: Mark Brown <broonie@kernel.org>
2019-09-05 12:01:19 +00:00
#define CTRL1_SEL_SHIFT 28
ASoC: meson: add axg toddr driver Add the capture memory interface of Amlogic's axg SoCs. TDM, SPDIF or PDM input devices place audio samples inside this FIFO. The FIFO content is then pushed to DDR Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2018-07-17 15:42:53 +00:00
ASoC: meson: axg-toddr: add support for spdifin backend add IEC958_SUBFRAME_LE to the list of format accepted by the fifo frontend. As opposed to what was initially noted in the toddr dai driver, the spdifin does not place the msb at bit 28, it just output a whole spdif subframe. Placing the msb at bit 28 in the toddr driver just filters out the parity, user, channel status and validity bits. It is better to just provide the whole spdif subframe to the userspace and let the iec958 plugin deal with it. Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2018-12-11 13:47:10 +00:00
#define TODDR_MSB_POS 31
ASoC: meson: add axg toddr driver Add the capture memory interface of Amlogic's axg SoCs. TDM, SPDIF or PDM input devices place audio samples inside this FIFO. The FIFO content is then pushed to DDR Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2018-07-17 15:42:53 +00:00
static int axg_toddr_pcm_new(struct snd_soc_pcm_runtime *rtd,
struct snd_soc_dai *dai)
{
return axg_fifo_pcm_new(rtd, SNDRV_PCM_STREAM_CAPTURE);
}
ASoC: meson: axg-toddr: add g12a support Since the g12a SoC fifo can set the fifo initial start address, we must make sure to actually reset the write pointer to this address when starting a capture. Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2019-04-04 11:17:30 +00:00
static int g12a_toddr_dai_prepare(struct snd_pcm_substream *substream,
struct snd_soc_dai *dai)
{
struct axg_fifo *fifo = snd_soc_dai_get_drvdata(dai);
/* Reset the write pointer to the FIFO_INIT_ADDR */
regmap_update_bits(fifo->map, FIFO_CTRL1,
CTRL1_TODDR_FORCE_FINISH, 0);
regmap_update_bits(fifo->map, FIFO_CTRL1,
CTRL1_TODDR_FORCE_FINISH, CTRL1_TODDR_FORCE_FINISH);
regmap_update_bits(fifo->map, FIFO_CTRL1,
CTRL1_TODDR_FORCE_FINISH, 0);
return 0;
}
ASoC: meson: add axg toddr driver Add the capture memory interface of Amlogic's axg SoCs. TDM, SPDIF or PDM input devices place audio samples inside this FIFO. The FIFO content is then pushed to DDR Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2018-07-17 15:42:53 +00:00
static int axg_toddr_dai_hw_params(struct snd_pcm_substream *substream,
struct snd_pcm_hw_params *params,
struct snd_soc_dai *dai)
{
struct axg_fifo *fifo = snd_soc_dai_get_drvdata(dai);
ASoC: meson: axg-toddr: add support for spdifin backend add IEC958_SUBFRAME_LE to the list of format accepted by the fifo frontend. As opposed to what was initially noted in the toddr dai driver, the spdifin does not place the msb at bit 28, it just output a whole spdif subframe. Placing the msb at bit 28 in the toddr driver just filters out the parity, user, channel status and validity bits. It is better to just provide the whole spdif subframe to the userspace and let the iec958 plugin deal with it. Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2018-12-11 13:47:10 +00:00
unsigned int type, width;
ASoC: meson: add axg toddr driver Add the capture memory interface of Amlogic's axg SoCs. TDM, SPDIF or PDM input devices place audio samples inside this FIFO. The FIFO content is then pushed to DDR Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2018-07-17 15:42:53 +00:00
switch (params_physical_width(params)) {
case 8:
type = 0; /* 8 samples of 8 bits */
break;
case 16:
type = 2; /* 4 samples of 16 bits - right justified */
break;
case 32:
type = 4; /* 2 samples of 32 bits - right justified */
break;
default:
return -EINVAL;
}
width = params_width(params);
regmap_update_bits(fifo->map, FIFO_CTRL0,
CTRL0_TODDR_TYPE_MASK |
CTRL0_TODDR_MSB_POS_MASK |
CTRL0_TODDR_LSB_POS_MASK,
CTRL0_TODDR_TYPE(type) |
ASoC: meson: axg-toddr: add support for spdifin backend add IEC958_SUBFRAME_LE to the list of format accepted by the fifo frontend. As opposed to what was initially noted in the toddr dai driver, the spdifin does not place the msb at bit 28, it just output a whole spdif subframe. Placing the msb at bit 28 in the toddr driver just filters out the parity, user, channel status and validity bits. It is better to just provide the whole spdif subframe to the userspace and let the iec958 plugin deal with it. Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2018-12-11 13:47:10 +00:00
CTRL0_TODDR_MSB_POS(TODDR_MSB_POS) |
CTRL0_TODDR_LSB_POS(TODDR_MSB_POS - (width - 1)));
ASoC: meson: add axg toddr driver Add the capture memory interface of Amlogic's axg SoCs. TDM, SPDIF or PDM input devices place audio samples inside this FIFO. The FIFO content is then pushed to DDR Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2018-07-17 15:42:53 +00:00
return 0;
}
static int axg_toddr_dai_startup(struct snd_pcm_substream *substream,
struct snd_soc_dai *dai)
{
struct axg_fifo *fifo = snd_soc_dai_get_drvdata(dai);
int ret;
/* Enable pclk to access registers and clock the fifo ip */
ret = clk_prepare_enable(fifo->pclk);
if (ret)
return ret;
/* Select orginal data - resampling not supported ATM */
regmap_update_bits(fifo->map, FIFO_CTRL0, CTRL0_TODDR_SEL_RESAMPLE, 0);
/* Only signed format are supported ATM */
regmap_update_bits(fifo->map, FIFO_CTRL0, CTRL0_TODDR_EXT_SIGNED,
CTRL0_TODDR_EXT_SIGNED);
/* Apply single buffer mode to the interface */
regmap_update_bits(fifo->map, FIFO_CTRL0, CTRL0_TODDR_PP_MODE, 0);
return 0;
}
static void axg_toddr_dai_shutdown(struct snd_pcm_substream *substream,
struct snd_soc_dai *dai)
{
struct axg_fifo *fifo = snd_soc_dai_get_drvdata(dai);
clk_disable_unprepare(fifo->pclk);
}
static const struct snd_soc_dai_ops axg_toddr_ops = {
.hw_params = axg_toddr_dai_hw_params,
.startup = axg_toddr_dai_startup,
.shutdown = axg_toddr_dai_shutdown,
};
static struct snd_soc_dai_driver axg_toddr_dai_drv = {
.name = "TODDR",
.capture = {
.stream_name = "Capture",
.channels_min = 1,
.channels_max = AXG_FIFO_CH_MAX,
.rates = AXG_FIFO_RATES,
.formats = AXG_FIFO_FORMATS,
},
.ops = &axg_toddr_ops,
.pcm_new = axg_toddr_pcm_new,
};
static const char * const axg_toddr_sel_texts[] = {
ASoC: meson: axg-toddr: expose all 8 inputs The TODDR component, as it, has a maximum of 8 input. Depending on the SoC, these may not all be connected or some input components may not be supported Instead of decribing only the connected inputs, describe them all and let ASoC routing do the rest. Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Link: https://lore.kernel.org/r/20190905120120.31752-5-jbrunet@baylibre.com Signed-off-by: Mark Brown <broonie@kernel.org>
2019-09-05 12:01:16 +00:00
"IN 0", "IN 1", "IN 2", "IN 3", "IN 4", "IN 5", "IN 6", "IN 7"
ASoC: meson: add axg toddr driver Add the capture memory interface of Amlogic's axg SoCs. TDM, SPDIF or PDM input devices place audio samples inside this FIFO. The FIFO content is then pushed to DDR Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2018-07-17 15:42:53 +00:00
};
ASoC: meson: axg-toddr: expose all 8 inputs The TODDR component, as it, has a maximum of 8 input. Depending on the SoC, these may not all be connected or some input components may not be supported Instead of decribing only the connected inputs, describe them all and let ASoC routing do the rest. Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Link: https://lore.kernel.org/r/20190905120120.31752-5-jbrunet@baylibre.com Signed-off-by: Mark Brown <broonie@kernel.org>
2019-09-05 12:01:16 +00:00
static SOC_ENUM_SINGLE_DECL(axg_toddr_sel_enum, FIFO_CTRL0, CTRL0_SEL_SHIFT,
axg_toddr_sel_texts);
ASoC: meson: add axg toddr driver Add the capture memory interface of Amlogic's axg SoCs. TDM, SPDIF or PDM input devices place audio samples inside this FIFO. The FIFO content is then pushed to DDR Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2018-07-17 15:42:53 +00:00
static const struct snd_kcontrol_new axg_toddr_in_mux =
SOC_DAPM_ENUM("Input Source", axg_toddr_sel_enum);
static const struct snd_soc_dapm_widget axg_toddr_dapm_widgets[] = {
SND_SOC_DAPM_MUX("SRC SEL", SND_SOC_NOPM, 0, 0, &axg_toddr_in_mux),
SND_SOC_DAPM_AIF_IN("IN 0", NULL, 0, SND_SOC_NOPM, 0, 0),
SND_SOC_DAPM_AIF_IN("IN 1", NULL, 0, SND_SOC_NOPM, 0, 0),
SND_SOC_DAPM_AIF_IN("IN 2", NULL, 0, SND_SOC_NOPM, 0, 0),
SND_SOC_DAPM_AIF_IN("IN 3", NULL, 0, SND_SOC_NOPM, 0, 0),
SND_SOC_DAPM_AIF_IN("IN 4", NULL, 0, SND_SOC_NOPM, 0, 0),
ASoC: meson: axg-toddr: expose all 8 inputs The TODDR component, as it, has a maximum of 8 input. Depending on the SoC, these may not all be connected or some input components may not be supported Instead of decribing only the connected inputs, describe them all and let ASoC routing do the rest. Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Link: https://lore.kernel.org/r/20190905120120.31752-5-jbrunet@baylibre.com Signed-off-by: Mark Brown <broonie@kernel.org>
2019-09-05 12:01:16 +00:00
SND_SOC_DAPM_AIF_IN("IN 5", NULL, 0, SND_SOC_NOPM, 0, 0),
ASoC: meson: add axg toddr driver Add the capture memory interface of Amlogic's axg SoCs. TDM, SPDIF or PDM input devices place audio samples inside this FIFO. The FIFO content is then pushed to DDR Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2018-07-17 15:42:53 +00:00
SND_SOC_DAPM_AIF_IN("IN 6", NULL, 0, SND_SOC_NOPM, 0, 0),
ASoC: meson: axg-toddr: expose all 8 inputs The TODDR component, as it, has a maximum of 8 input. Depending on the SoC, these may not all be connected or some input components may not be supported Instead of decribing only the connected inputs, describe them all and let ASoC routing do the rest. Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Link: https://lore.kernel.org/r/20190905120120.31752-5-jbrunet@baylibre.com Signed-off-by: Mark Brown <broonie@kernel.org>
2019-09-05 12:01:16 +00:00
SND_SOC_DAPM_AIF_IN("IN 7", NULL, 0, SND_SOC_NOPM, 0, 0),
ASoC: meson: add axg toddr driver Add the capture memory interface of Amlogic's axg SoCs. TDM, SPDIF or PDM input devices place audio samples inside this FIFO. The FIFO content is then pushed to DDR Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2018-07-17 15:42:53 +00:00
};
static const struct snd_soc_dapm_route axg_toddr_dapm_routes[] = {
{ "Capture", NULL, "SRC SEL" },
{ "SRC SEL", "IN 0", "IN 0" },
{ "SRC SEL", "IN 1", "IN 1" },
{ "SRC SEL", "IN 2", "IN 2" },
{ "SRC SEL", "IN 3", "IN 3" },
{ "SRC SEL", "IN 4", "IN 4" },
ASoC: meson: axg-toddr: expose all 8 inputs The TODDR component, as it, has a maximum of 8 input. Depending on the SoC, these may not all be connected or some input components may not be supported Instead of decribing only the connected inputs, describe them all and let ASoC routing do the rest. Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Link: https://lore.kernel.org/r/20190905120120.31752-5-jbrunet@baylibre.com Signed-off-by: Mark Brown <broonie@kernel.org>
2019-09-05 12:01:16 +00:00
{ "SRC SEL", "IN 5", "IN 5" },
ASoC: meson: add axg toddr driver Add the capture memory interface of Amlogic's axg SoCs. TDM, SPDIF or PDM input devices place audio samples inside this FIFO. The FIFO content is then pushed to DDR Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2018-07-17 15:42:53 +00:00
{ "SRC SEL", "IN 6", "IN 6" },
ASoC: meson: axg-toddr: expose all 8 inputs The TODDR component, as it, has a maximum of 8 input. Depending on the SoC, these may not all be connected or some input components may not be supported Instead of decribing only the connected inputs, describe them all and let ASoC routing do the rest. Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Link: https://lore.kernel.org/r/20190905120120.31752-5-jbrunet@baylibre.com Signed-off-by: Mark Brown <broonie@kernel.org>
2019-09-05 12:01:16 +00:00
{ "SRC SEL", "IN 7", "IN 7" },
ASoC: meson: add axg toddr driver Add the capture memory interface of Amlogic's axg SoCs. TDM, SPDIF or PDM input devices place audio samples inside this FIFO. The FIFO content is then pushed to DDR Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2018-07-17 15:42:53 +00:00
};
static const struct snd_soc_component_driver axg_toddr_component_drv = {
.dapm_widgets = axg_toddr_dapm_widgets,
.num_dapm_widgets = ARRAY_SIZE(axg_toddr_dapm_widgets),
.dapm_routes = axg_toddr_dapm_routes,
.num_dapm_routes = ARRAY_SIZE(axg_toddr_dapm_routes),
ASoC: meson: remove snd_pcm_ops snd_pcm_ops is no longer needed. Let's use component driver callback. Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Link: https://lore.kernel.org/r/87muej90e4.wl-kuninori.morimoto.gx@renesas.com Signed-off-by: Mark Brown <broonie@kernel.org>
2019-10-02 05:33:55 +00:00
.open = axg_fifo_pcm_open,
.close = axg_fifo_pcm_close,
.hw_params = axg_fifo_pcm_hw_params,
.hw_free = axg_fifo_pcm_hw_free,
.pointer = axg_fifo_pcm_pointer,
.trigger = axg_fifo_pcm_trigger,
ASoC: meson: add axg toddr driver Add the capture memory interface of Amlogic's axg SoCs. TDM, SPDIF or PDM input devices place audio samples inside this FIFO. The FIFO content is then pushed to DDR Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2018-07-17 15:42:53 +00:00
};
static const struct axg_fifo_match_data axg_toddr_match_data = {
ASoC: meson: axg-fifo: fix fifo threshold setup On TODDR sm1, the fifo threshold register field is slightly different compared to the other SoCs. This leads to the fifo A being flushed to memory every 8kB. If the period is smaller than that, several periods are pushed to memory and notified at once. This is not ideal. Fix the register field update. With this, the fifos are flushed every 128B. We could still do better, like adapt the threshold depending on the period size, but at least it consistent across the different SoC/fifos Fixes: 5ac825c3d85e ("ASoC: meson: axg-toddr: add sm1 support") Reported-by: Alden DSouza <aldend@google.com> Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Link: https://lore.kernel.org/r/20191218172420.1199117-2-jbrunet@baylibre.com Signed-off-by: Mark Brown <broonie@kernel.org>
2019-12-18 17:24:17 +00:00
.field_threshold = REG_FIELD(FIFO_CTRL1, 16, 23),
.component_drv = &axg_toddr_component_drv,
.dai_drv = &axg_toddr_dai_drv
ASoC: meson: add axg toddr driver Add the capture memory interface of Amlogic's axg SoCs. TDM, SPDIF or PDM input devices place audio samples inside this FIFO. The FIFO content is then pushed to DDR Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2018-07-17 15:42:53 +00:00
};
ASoC: meson: axg-toddr: fix channel order on g12 platforms On g12 and following platforms, The first channel of record with more than 2 channels ends being placed randomly on an even channel of the output. On these SoCs, a bit was added to force the first channel to be placed at the beginning of the output. Apparently the behavior if the bit is not set is not easily predictable. According to the documentation, this bit is not present on the axg series. Set the bit on g12 and fix the problem. Fixes: a3c23a8ad4dc ("ASoC: meson: axg-toddr: add g12a support") Reported-by: Nicolas Belin <nbelin@baylibre.com> Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Link: https://lore.kernel.org/r/20200828151438.350974-1-jbrunet@baylibre.com Signed-off-by: Mark Brown <broonie@kernel.org>
2020-08-28 15:14:38 +00:00
static int g12a_toddr_dai_startup(struct snd_pcm_substream *substream,
struct snd_soc_dai *dai)
{
struct axg_fifo *fifo = snd_soc_dai_get_drvdata(dai);
int ret;
ret = axg_toddr_dai_startup(substream, dai);
if (ret)
return ret;
/*
* Make sure the first channel ends up in the at beginning of the output
* As weird as it looks, without this the first channel may be misplaced
* in memory, with a random shift of 2 channels.
*/
regmap_update_bits(fifo->map, FIFO_CTRL0, CTRL0_TODDR_SYNC_CH,
CTRL0_TODDR_SYNC_CH);
return 0;
}
ASoC: meson: axg-toddr: add g12a support Since the g12a SoC fifo can set the fifo initial start address, we must make sure to actually reset the write pointer to this address when starting a capture. Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2019-04-04 11:17:30 +00:00
static const struct snd_soc_dai_ops g12a_toddr_ops = {
.prepare = g12a_toddr_dai_prepare,
.hw_params = axg_toddr_dai_hw_params,
ASoC: meson: axg-toddr: fix channel order on g12 platforms On g12 and following platforms, The first channel of record with more than 2 channels ends being placed randomly on an even channel of the output. On these SoCs, a bit was added to force the first channel to be placed at the beginning of the output. Apparently the behavior if the bit is not set is not easily predictable. According to the documentation, this bit is not present on the axg series. Set the bit on g12 and fix the problem. Fixes: a3c23a8ad4dc ("ASoC: meson: axg-toddr: add g12a support") Reported-by: Nicolas Belin <nbelin@baylibre.com> Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Link: https://lore.kernel.org/r/20200828151438.350974-1-jbrunet@baylibre.com Signed-off-by: Mark Brown <broonie@kernel.org>
2020-08-28 15:14:38 +00:00
.startup = g12a_toddr_dai_startup,
ASoC: meson: axg-toddr: add g12a support Since the g12a SoC fifo can set the fifo initial start address, we must make sure to actually reset the write pointer to this address when starting a capture. Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2019-04-04 11:17:30 +00:00
.shutdown = axg_toddr_dai_shutdown,
};
static struct snd_soc_dai_driver g12a_toddr_dai_drv = {
.name = "TODDR",
.capture = {
.stream_name = "Capture",
.channels_min = 1,
.channels_max = AXG_FIFO_CH_MAX,
.rates = AXG_FIFO_RATES,
.formats = AXG_FIFO_FORMATS,
},
.ops = &g12a_toddr_ops,
.pcm_new = axg_toddr_pcm_new,
};
static const struct snd_soc_component_driver g12a_toddr_component_drv = {
.dapm_widgets = axg_toddr_dapm_widgets,
.num_dapm_widgets = ARRAY_SIZE(axg_toddr_dapm_widgets),
.dapm_routes = axg_toddr_dapm_routes,
.num_dapm_routes = ARRAY_SIZE(axg_toddr_dapm_routes),
ASoC: meson: remove snd_pcm_ops snd_pcm_ops is no longer needed. Let's use component driver callback. Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Link: https://lore.kernel.org/r/87muej90e4.wl-kuninori.morimoto.gx@renesas.com Signed-off-by: Mark Brown <broonie@kernel.org>
2019-10-02 05:33:55 +00:00
.open = axg_fifo_pcm_open,
.close = axg_fifo_pcm_close,
.hw_params = g12a_fifo_pcm_hw_params,
.hw_free = axg_fifo_pcm_hw_free,
.pointer = axg_fifo_pcm_pointer,
.trigger = axg_fifo_pcm_trigger,
ASoC: meson: axg-toddr: add g12a support Since the g12a SoC fifo can set the fifo initial start address, we must make sure to actually reset the write pointer to this address when starting a capture. Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2019-04-04 11:17:30 +00:00
};
static const struct axg_fifo_match_data g12a_toddr_match_data = {
ASoC: meson: axg-fifo: fix fifo threshold setup On TODDR sm1, the fifo threshold register field is slightly different compared to the other SoCs. This leads to the fifo A being flushed to memory every 8kB. If the period is smaller than that, several periods are pushed to memory and notified at once. This is not ideal. Fix the register field update. With this, the fifos are flushed every 128B. We could still do better, like adapt the threshold depending on the period size, but at least it consistent across the different SoC/fifos Fixes: 5ac825c3d85e ("ASoC: meson: axg-toddr: add sm1 support") Reported-by: Alden DSouza <aldend@google.com> Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Link: https://lore.kernel.org/r/20191218172420.1199117-2-jbrunet@baylibre.com Signed-off-by: Mark Brown <broonie@kernel.org>
2019-12-18 17:24:17 +00:00
.field_threshold = REG_FIELD(FIFO_CTRL1, 16, 23),
.component_drv = &g12a_toddr_component_drv,
.dai_drv = &g12a_toddr_dai_drv
ASoC: meson: axg-toddr: add g12a support Since the g12a SoC fifo can set the fifo initial start address, we must make sure to actually reset the write pointer to this address when starting a capture. Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2019-04-04 11:17:30 +00:00
};
ASoC: meson: axg-toddr: add sm1 support On sm1, the maximum number TODDR inputs is extended to 16. Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Link: https://lore.kernel.org/r/20190905120120.31752-8-jbrunet@baylibre.com Signed-off-by: Mark Brown <broonie@kernel.org>
2019-09-05 12:01:19 +00:00
static const char * const sm1_toddr_sel_texts[] = {
"IN 0", "IN 1", "IN 2", "IN 3", "IN 4", "IN 5", "IN 6", "IN 7",
"IN 8", "IN 9", "IN 10", "IN 11", "IN 12", "IN 13", "IN 14", "IN 15"
};
static SOC_ENUM_SINGLE_DECL(sm1_toddr_sel_enum, FIFO_CTRL1, CTRL1_SEL_SHIFT,
sm1_toddr_sel_texts);
static const struct snd_kcontrol_new sm1_toddr_in_mux =
SOC_DAPM_ENUM("Input Source", sm1_toddr_sel_enum);
static const struct snd_soc_dapm_widget sm1_toddr_dapm_widgets[] = {
SND_SOC_DAPM_MUX("SRC SEL", SND_SOC_NOPM, 0, 0, &sm1_toddr_in_mux),
SND_SOC_DAPM_AIF_IN("IN 0", NULL, 0, SND_SOC_NOPM, 0, 0),
SND_SOC_DAPM_AIF_IN("IN 1", NULL, 0, SND_SOC_NOPM, 0, 0),
SND_SOC_DAPM_AIF_IN("IN 2", NULL, 0, SND_SOC_NOPM, 0, 0),
SND_SOC_DAPM_AIF_IN("IN 3", NULL, 0, SND_SOC_NOPM, 0, 0),
SND_SOC_DAPM_AIF_IN("IN 4", NULL, 0, SND_SOC_NOPM, 0, 0),
SND_SOC_DAPM_AIF_IN("IN 5", NULL, 0, SND_SOC_NOPM, 0, 0),
SND_SOC_DAPM_AIF_IN("IN 6", NULL, 0, SND_SOC_NOPM, 0, 0),
SND_SOC_DAPM_AIF_IN("IN 7", NULL, 0, SND_SOC_NOPM, 0, 0),
SND_SOC_DAPM_AIF_IN("IN 8", NULL, 0, SND_SOC_NOPM, 0, 0),
SND_SOC_DAPM_AIF_IN("IN 9", NULL, 0, SND_SOC_NOPM, 0, 0),
SND_SOC_DAPM_AIF_IN("IN 10", NULL, 0, SND_SOC_NOPM, 0, 0),
SND_SOC_DAPM_AIF_IN("IN 11", NULL, 0, SND_SOC_NOPM, 0, 0),
SND_SOC_DAPM_AIF_IN("IN 12", NULL, 0, SND_SOC_NOPM, 0, 0),
SND_SOC_DAPM_AIF_IN("IN 13", NULL, 0, SND_SOC_NOPM, 0, 0),
SND_SOC_DAPM_AIF_IN("IN 14", NULL, 0, SND_SOC_NOPM, 0, 0),
SND_SOC_DAPM_AIF_IN("IN 15", NULL, 0, SND_SOC_NOPM, 0, 0),
};
static const struct snd_soc_dapm_route sm1_toddr_dapm_routes[] = {
{ "Capture", NULL, "SRC SEL" },
{ "SRC SEL", "IN 0", "IN 0" },
{ "SRC SEL", "IN 1", "IN 1" },
{ "SRC SEL", "IN 2", "IN 2" },
{ "SRC SEL", "IN 3", "IN 3" },
{ "SRC SEL", "IN 4", "IN 4" },
{ "SRC SEL", "IN 5", "IN 5" },
{ "SRC SEL", "IN 6", "IN 6" },
{ "SRC SEL", "IN 7", "IN 7" },
{ "SRC SEL", "IN 8", "IN 8" },
{ "SRC SEL", "IN 9", "IN 9" },
{ "SRC SEL", "IN 10", "IN 10" },
{ "SRC SEL", "IN 11", "IN 11" },
{ "SRC SEL", "IN 12", "IN 12" },
{ "SRC SEL", "IN 13", "IN 13" },
{ "SRC SEL", "IN 14", "IN 14" },
{ "SRC SEL", "IN 15", "IN 15" },
};
static const struct snd_soc_component_driver sm1_toddr_component_drv = {
.dapm_widgets = sm1_toddr_dapm_widgets,
.num_dapm_widgets = ARRAY_SIZE(sm1_toddr_dapm_widgets),
.dapm_routes = sm1_toddr_dapm_routes,
.num_dapm_routes = ARRAY_SIZE(sm1_toddr_dapm_routes),
ASoC: meson: remove snd_pcm_ops snd_pcm_ops is no longer needed. Let's use component driver callback. Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Link: https://lore.kernel.org/r/87muej90e4.wl-kuninori.morimoto.gx@renesas.com Signed-off-by: Mark Brown <broonie@kernel.org>
2019-10-02 05:33:55 +00:00
.open = axg_fifo_pcm_open,
.close = axg_fifo_pcm_close,
.hw_params = g12a_fifo_pcm_hw_params,
.hw_free = axg_fifo_pcm_hw_free,
.pointer = axg_fifo_pcm_pointer,
.trigger = axg_fifo_pcm_trigger,
ASoC: meson: axg-toddr: add sm1 support On sm1, the maximum number TODDR inputs is extended to 16. Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Link: https://lore.kernel.org/r/20190905120120.31752-8-jbrunet@baylibre.com Signed-off-by: Mark Brown <broonie@kernel.org>
2019-09-05 12:01:19 +00:00
};
static const struct axg_fifo_match_data sm1_toddr_match_data = {
ASoC: meson: axg-fifo: fix fifo threshold setup On TODDR sm1, the fifo threshold register field is slightly different compared to the other SoCs. This leads to the fifo A being flushed to memory every 8kB. If the period is smaller than that, several periods are pushed to memory and notified at once. This is not ideal. Fix the register field update. With this, the fifos are flushed every 128B. We could still do better, like adapt the threshold depending on the period size, but at least it consistent across the different SoC/fifos Fixes: 5ac825c3d85e ("ASoC: meson: axg-toddr: add sm1 support") Reported-by: Alden DSouza <aldend@google.com> Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Link: https://lore.kernel.org/r/20191218172420.1199117-2-jbrunet@baylibre.com Signed-off-by: Mark Brown <broonie@kernel.org>
2019-12-18 17:24:17 +00:00
.field_threshold = REG_FIELD(FIFO_CTRL1, 12, 23),
.component_drv = &sm1_toddr_component_drv,
.dai_drv = &g12a_toddr_dai_drv
ASoC: meson: axg-toddr: add sm1 support On sm1, the maximum number TODDR inputs is extended to 16. Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Link: https://lore.kernel.org/r/20190905120120.31752-8-jbrunet@baylibre.com Signed-off-by: Mark Brown <broonie@kernel.org>
2019-09-05 12:01:19 +00:00
};
ASoC: meson: add axg toddr driver Add the capture memory interface of Amlogic's axg SoCs. TDM, SPDIF or PDM input devices place audio samples inside this FIFO. The FIFO content is then pushed to DDR Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2018-07-17 15:42:53 +00:00
static const struct of_device_id axg_toddr_of_match[] = {
{
.compatible = "amlogic,axg-toddr",
.data = &axg_toddr_match_data,
ASoC: meson: axg-toddr: add g12a support Since the g12a SoC fifo can set the fifo initial start address, we must make sure to actually reset the write pointer to this address when starting a capture. Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2019-04-04 11:17:30 +00:00
}, {
.compatible = "amlogic,g12a-toddr",
.data = &g12a_toddr_match_data,
ASoC: meson: axg-toddr: add sm1 support On sm1, the maximum number TODDR inputs is extended to 16. Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Link: https://lore.kernel.org/r/20190905120120.31752-8-jbrunet@baylibre.com Signed-off-by: Mark Brown <broonie@kernel.org>
2019-09-05 12:01:19 +00:00
}, {
.compatible = "amlogic,sm1-toddr",
.data = &sm1_toddr_match_data,
ASoC: meson: add axg toddr driver Add the capture memory interface of Amlogic's axg SoCs. TDM, SPDIF or PDM input devices place audio samples inside this FIFO. The FIFO content is then pushed to DDR Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2018-07-17 15:42:53 +00:00
}, {}
};
MODULE_DEVICE_TABLE(of, axg_toddr_of_match);
static struct platform_driver axg_toddr_pdrv = {
.probe = axg_fifo_probe,
.driver = {
.name = "axg-toddr",
.of_match_table = axg_toddr_of_match,
},
};
module_platform_driver(axg_toddr_pdrv);
MODULE_DESCRIPTION("Amlogic AXG capture fifo driver");
MODULE_AUTHOR("Jerome Brunet <jbrunet@baylibre.com>");
MODULE_LICENSE("GPL v2");
Reference in New Issue Copy Permalink