2018-05-06 23:16:26 +00:00
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// SPDX-License-Identifier: GPL-2.0 OR MIT
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2011-10-04 18:13:22 +00:00
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/**************************************************************************
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*
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2018-05-06 23:16:26 +00:00
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* Copyright 2011-2015 VMware, Inc., Palo Alto, CA., USA
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2011-10-04 18:13:22 +00:00
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the
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* "Software"), to deal in the Software without restriction, including
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* without limitation the rights to use, copy, modify, merge, publish,
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* distribute, sub license, and/or sell copies of the Software, and to
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* permit persons to whom the Software is furnished to do so, subject to
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* the following conditions:
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*
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* The above copyright notice and this permission notice (including the
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* next paragraph) shall be included in all copies or substantial portions
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* of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
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* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
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* OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
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* USE OR OTHER DEALINGS IN THE SOFTWARE.
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*
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**************************************************************************/
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2017-03-23 18:48:44 +00:00
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#include <drm/drm_atomic.h>
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#include <drm/drm_atomic_helper.h>
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2018-08-08 22:41:56 +00:00
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#include <drm/drm_damage_helper.h>
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2019-06-23 10:23:33 +00:00
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#include <drm/drm_fourcc.h>
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#include <drm/drm_plane_helper.h>
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#include <drm/drm_vblank.h>
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2011-10-04 18:13:22 +00:00
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2019-06-23 10:23:33 +00:00
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#include "vmwgfx_kms.h"
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2011-10-04 18:13:22 +00:00
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#define vmw_crtc_to_sou(x) \
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container_of(x, struct vmw_screen_object_unit, base.crtc)
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#define vmw_encoder_to_sou(x) \
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container_of(x, struct vmw_screen_object_unit, base.encoder)
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#define vmw_connector_to_sou(x) \
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container_of(x, struct vmw_screen_object_unit, base.connector)
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2015-06-26 09:14:27 +00:00
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/**
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* struct vmw_kms_sou_surface_dirty - Closure structure for
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* blit surface to screen command.
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* @base: The base type we derive from. Used by vmw_kms_helper_dirty().
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* @left: Left side of bounding box.
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* @right: Right side of bounding box.
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* @top: Top side of bounding box.
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* @bottom: Bottom side of bounding box.
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* @dst_x: Difference between source clip rects and framebuffer coordinates.
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* @dst_y: Difference between source clip rects and framebuffer coordinates.
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* @sid: Surface id of surface to copy from.
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*/
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struct vmw_kms_sou_surface_dirty {
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struct vmw_kms_dirty base;
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s32 left, right, top, bottom;
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s32 dst_x, dst_y;
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u32 sid;
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};
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/*
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* SVGA commands that are used by this code. Please see the device headers
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* for explanation.
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*/
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struct vmw_kms_sou_readback_blit {
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uint32 header;
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SVGAFifoCmdBlitScreenToGMRFB body;
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};
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2018-06-19 13:02:16 +00:00
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struct vmw_kms_sou_bo_blit {
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2015-06-26 09:14:27 +00:00
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uint32 header;
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SVGAFifoCmdBlitGMRFBToScreen body;
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};
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struct vmw_kms_sou_dirty_cmd {
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SVGA3dCmdHeader header;
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SVGA3dCmdBlitSurfaceToScreen body;
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};
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2018-08-08 22:02:48 +00:00
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struct vmw_kms_sou_define_gmrfb {
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uint32_t header;
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SVGAFifoCmdDefineGMRFB body;
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};
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2011-10-04 18:13:22 +00:00
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/**
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* Display unit using screen objects.
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*/
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struct vmw_screen_object_unit {
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struct vmw_display_unit base;
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unsigned long buffer_size; /**< Size of allocated buffer */
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2018-06-19 13:02:16 +00:00
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struct vmw_buffer_object *buffer; /**< Backing store buffer */
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2011-10-04 18:13:22 +00:00
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bool defined;
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};
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static void vmw_sou_destroy(struct vmw_screen_object_unit *sou)
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{
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2015-06-26 08:23:42 +00:00
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vmw_du_cleanup(&sou->base);
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2011-10-04 18:13:22 +00:00
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kfree(sou);
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}
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/*
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* Screen Object Display Unit CRTC functions
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*/
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static void vmw_sou_crtc_destroy(struct drm_crtc *crtc)
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{
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vmw_sou_destroy(vmw_crtc_to_sou(crtc));
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}
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/**
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* Send the fifo command to create a screen.
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*/
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static int vmw_sou_fifo_create(struct vmw_private *dev_priv,
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struct vmw_screen_object_unit *sou,
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2018-06-20 09:34:26 +00:00
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int x, int y,
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2011-10-04 18:13:22 +00:00
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struct drm_display_mode *mode)
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{
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size_t fifo_size;
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struct {
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struct {
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uint32_t cmdType;
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} header;
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SVGAScreenObject obj;
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} *cmd;
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BUG_ON(!sou->buffer);
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fifo_size = sizeof(*cmd);
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2019-02-15 00:15:39 +00:00
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cmd = VMW_FIFO_RESERVE(dev_priv, fifo_size);
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if (unlikely(cmd == NULL))
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2011-10-04 18:13:22 +00:00
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return -ENOMEM;
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memset(cmd, 0, fifo_size);
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cmd->header.cmdType = SVGA_CMD_DEFINE_SCREEN;
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cmd->obj.structSize = sizeof(SVGAScreenObject);
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cmd->obj.id = sou->base.unit;
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cmd->obj.flags = SVGA_SCREEN_HAS_ROOT |
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(sou->base.unit == 0 ? SVGA_SCREEN_IS_PRIMARY : 0);
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cmd->obj.size.width = mode->hdisplay;
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cmd->obj.size.height = mode->vdisplay;
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2018-06-20 09:34:26 +00:00
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cmd->obj.root.x = x;
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cmd->obj.root.y = y;
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2016-02-12 08:57:15 +00:00
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sou->base.set_gui_x = cmd->obj.root.x;
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sou->base.set_gui_y = cmd->obj.root.y;
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2011-10-04 18:13:22 +00:00
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/* Ok to assume that buffer is pinned in vram */
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2011-10-04 18:13:28 +00:00
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vmw_bo_get_guest_ptr(&sou->buffer->base, &cmd->obj.backingStore.ptr);
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2011-10-04 18:13:22 +00:00
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cmd->obj.backingStore.pitch = mode->hdisplay * 4;
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vmw_fifo_commit(dev_priv, fifo_size);
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sou->defined = true;
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return 0;
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}
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/**
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* Send the fifo command to destroy a screen.
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*/
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static int vmw_sou_fifo_destroy(struct vmw_private *dev_priv,
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struct vmw_screen_object_unit *sou)
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{
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size_t fifo_size;
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int ret;
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struct {
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struct {
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uint32_t cmdType;
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} header;
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SVGAFifoCmdDestroyScreen body;
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} *cmd;
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/* no need to do anything */
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if (unlikely(!sou->defined))
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return 0;
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fifo_size = sizeof(*cmd);
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2019-02-15 00:15:39 +00:00
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cmd = VMW_FIFO_RESERVE(dev_priv, fifo_size);
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if (unlikely(cmd == NULL))
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2011-10-04 18:13:22 +00:00
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return -ENOMEM;
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memset(cmd, 0, fifo_size);
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cmd->header.cmdType = SVGA_CMD_DESTROY_SCREEN;
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cmd->body.screenId = sou->base.unit;
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vmw_fifo_commit(dev_priv, fifo_size);
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/* Force sync */
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ret = vmw_fallback_wait(dev_priv, false, true, 0, false, 3*HZ);
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if (unlikely(ret != 0))
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DRM_ERROR("Failed to sync with HW");
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else
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sou->defined = false;
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return ret;
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}
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2017-03-23 20:14:54 +00:00
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/**
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* vmw_sou_crtc_mode_set_nofb - Create new screen
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*
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* @crtc: CRTC associated with the new screen
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*
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* This function creates/destroys a screen. This function cannot fail, so if
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* somehow we run into a failure, just do the best we can to get out.
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*/
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static void vmw_sou_crtc_mode_set_nofb(struct drm_crtc *crtc)
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{
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struct vmw_private *dev_priv;
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struct vmw_screen_object_unit *sou;
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struct vmw_framebuffer *vfb;
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struct drm_framebuffer *fb;
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struct drm_plane_state *ps;
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struct vmw_plane_state *vps;
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int ret;
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2018-06-20 09:34:26 +00:00
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sou = vmw_crtc_to_sou(crtc);
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2017-03-23 20:14:54 +00:00
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dev_priv = vmw_priv(crtc->dev);
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2018-06-20 09:34:26 +00:00
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ps = crtc->primary->state;
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fb = ps->fb;
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vps = vmw_plane_state_to_vps(ps);
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2017-03-23 20:14:54 +00:00
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vfb = (fb) ? vmw_framebuffer_to_vfb(fb) : NULL;
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if (sou->defined) {
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ret = vmw_sou_fifo_destroy(dev_priv, sou);
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if (ret) {
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DRM_ERROR("Failed to destroy Screen Object\n");
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return;
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}
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}
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if (vfb) {
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2018-06-20 09:34:26 +00:00
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struct drm_connector_state *conn_state;
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struct vmw_connector_state *vmw_conn_state;
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int x, y;
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2018-06-19 13:02:16 +00:00
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sou->buffer = vps->bo;
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sou->buffer_size = vps->bo_size;
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2017-03-23 20:14:54 +00:00
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2018-10-04 22:38:17 +00:00
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conn_state = sou->base.connector.state;
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vmw_conn_state = vmw_connector_state_to_vcs(conn_state);
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x = vmw_conn_state->gui_x;
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y = vmw_conn_state->gui_y;
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2017-03-23 20:14:54 +00:00
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2018-06-20 09:34:26 +00:00
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ret = vmw_sou_fifo_create(dev_priv, sou, x, y, &crtc->mode);
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2017-03-23 20:14:54 +00:00
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if (ret)
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DRM_ERROR("Failed to define Screen Object %dx%d\n",
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crtc->x, crtc->y);
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} else {
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sou->buffer = NULL;
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sou->buffer_size = 0;
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}
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}
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/**
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* vmw_sou_crtc_helper_prepare - Noop
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*
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* @crtc: CRTC associated with the new screen
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*
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* Prepares the CRTC for a mode set, but we don't need to do anything here.
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*/
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static void vmw_sou_crtc_helper_prepare(struct drm_crtc *crtc)
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{
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}
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/**
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2017-06-30 09:36:44 +00:00
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* vmw_sou_crtc_atomic_enable - Noop
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2017-03-23 20:14:54 +00:00
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*
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* @crtc: CRTC associated with the new screen
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*
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* This is called after a mode set has been completed.
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*/
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2017-06-30 09:36:44 +00:00
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static void vmw_sou_crtc_atomic_enable(struct drm_crtc *crtc,
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struct drm_crtc_state *old_state)
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2017-03-23 20:14:54 +00:00
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{
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}
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/**
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2017-06-30 09:36:45 +00:00
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* vmw_sou_crtc_atomic_disable - Turns off CRTC
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2017-03-23 20:14:54 +00:00
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*
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* @crtc: CRTC to be turned off
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*/
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2017-06-30 09:36:45 +00:00
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static void vmw_sou_crtc_atomic_disable(struct drm_crtc *crtc,
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struct drm_crtc_state *old_state)
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2017-03-23 20:14:54 +00:00
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{
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struct vmw_private *dev_priv;
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struct vmw_screen_object_unit *sou;
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int ret;
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if (!crtc) {
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DRM_ERROR("CRTC is NULL\n");
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return;
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}
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sou = vmw_crtc_to_sou(crtc);
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dev_priv = vmw_priv(crtc->dev);
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if (sou->defined) {
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ret = vmw_sou_fifo_destroy(dev_priv, sou);
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if (ret)
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DRM_ERROR("Failed to destroy Screen Object\n");
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}
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}
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2015-12-15 11:21:15 +00:00
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static const struct drm_crtc_funcs vmw_screen_object_crtc_funcs = {
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2011-10-04 18:13:22 +00:00
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.gamma_set = vmw_du_crtc_gamma_set,
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.destroy = vmw_sou_crtc_destroy,
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2017-03-23 18:33:39 +00:00
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.reset = vmw_du_crtc_reset,
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.atomic_duplicate_state = vmw_du_crtc_duplicate_state,
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.atomic_destroy_state = vmw_du_crtc_destroy_state,
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2018-09-27 00:17:33 +00:00
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.set_config = drm_atomic_helper_set_config,
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2018-11-14 07:11:05 +00:00
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.page_flip = drm_atomic_helper_page_flip,
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2020-01-23 13:59:41 +00:00
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.get_vblank_counter = vmw_get_vblank_counter,
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.enable_vblank = vmw_enable_vblank,
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.disable_vblank = vmw_disable_vblank,
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2011-10-04 18:13:22 +00:00
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};
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/*
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* Screen Object Display Unit encoder functions
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*/
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static void vmw_sou_encoder_destroy(struct drm_encoder *encoder)
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|
|
|
{
|
|
|
|
vmw_sou_destroy(vmw_encoder_to_sou(encoder));
|
|
|
|
}
|
|
|
|
|
2015-12-15 11:21:15 +00:00
|
|
|
static const struct drm_encoder_funcs vmw_screen_object_encoder_funcs = {
|
2011-10-04 18:13:22 +00:00
|
|
|
.destroy = vmw_sou_encoder_destroy,
|
|
|
|
};
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Screen Object Display Unit connector functions
|
|
|
|
*/
|
|
|
|
|
|
|
|
static void vmw_sou_connector_destroy(struct drm_connector *connector)
|
|
|
|
{
|
|
|
|
vmw_sou_destroy(vmw_connector_to_sou(connector));
|
|
|
|
}
|
|
|
|
|
2015-12-15 11:21:15 +00:00
|
|
|
static const struct drm_connector_funcs vmw_sou_connector_funcs = {
|
2011-10-04 18:13:22 +00:00
|
|
|
.dpms = vmw_du_connector_dpms,
|
2016-03-07 17:06:01 +00:00
|
|
|
.detect = vmw_du_connector_detect,
|
|
|
|
.fill_modes = vmw_du_connector_fill_modes,
|
2011-10-04 18:13:22 +00:00
|
|
|
.destroy = vmw_sou_connector_destroy,
|
2017-03-23 18:48:44 +00:00
|
|
|
.reset = vmw_du_connector_reset,
|
2018-01-17 15:16:20 +00:00
|
|
|
.atomic_duplicate_state = vmw_du_connector_duplicate_state,
|
|
|
|
.atomic_destroy_state = vmw_du_connector_destroy_state,
|
2011-10-04 18:13:22 +00:00
|
|
|
};
|
|
|
|
|
2017-03-23 21:23:20 +00:00
|
|
|
|
|
|
|
static const struct
|
|
|
|
drm_connector_helper_funcs vmw_sou_connector_helper_funcs = {
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
|
|
|
2017-03-23 18:28:11 +00:00
|
|
|
/*
|
|
|
|
* Screen Object Display Plane Functions
|
|
|
|
*/
|
|
|
|
|
2017-03-23 21:18:32 +00:00
|
|
|
/**
|
|
|
|
* vmw_sou_primary_plane_cleanup_fb - Frees sou backing buffer
|
|
|
|
*
|
|
|
|
* @plane: display plane
|
|
|
|
* @old_state: Contains the FB to clean up
|
|
|
|
*
|
|
|
|
* Unpins the display surface
|
|
|
|
*
|
|
|
|
* Returns 0 on success
|
|
|
|
*/
|
|
|
|
static void
|
|
|
|
vmw_sou_primary_plane_cleanup_fb(struct drm_plane *plane,
|
|
|
|
struct drm_plane_state *old_state)
|
|
|
|
{
|
|
|
|
struct vmw_plane_state *vps = vmw_plane_state_to_vps(old_state);
|
2018-03-22 09:35:18 +00:00
|
|
|
struct drm_crtc *crtc = plane->state->crtc ?
|
|
|
|
plane->state->crtc : old_state->crtc;
|
2017-03-23 21:18:32 +00:00
|
|
|
|
2018-06-19 13:02:16 +00:00
|
|
|
if (vps->bo)
|
|
|
|
vmw_bo_unpin(vmw_priv(crtc->dev), vps->bo, false);
|
|
|
|
vmw_bo_unreference(&vps->bo);
|
|
|
|
vps->bo_size = 0;
|
2017-03-23 21:18:32 +00:00
|
|
|
|
|
|
|
vmw_du_plane_cleanup_fb(plane, old_state);
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
/**
|
|
|
|
* vmw_sou_primary_plane_prepare_fb - allocate backing buffer
|
|
|
|
*
|
|
|
|
* @plane: display plane
|
|
|
|
* @new_state: info on the new plane state, including the FB
|
|
|
|
*
|
|
|
|
* The SOU backing buffer is our equivalent of the display plane.
|
|
|
|
*
|
|
|
|
* Returns 0 on success
|
|
|
|
*/
|
|
|
|
static int
|
|
|
|
vmw_sou_primary_plane_prepare_fb(struct drm_plane *plane,
|
|
|
|
struct drm_plane_state *new_state)
|
|
|
|
{
|
|
|
|
struct drm_framebuffer *new_fb = new_state->fb;
|
|
|
|
struct drm_crtc *crtc = plane->state->crtc ?: new_state->crtc;
|
|
|
|
struct vmw_plane_state *vps = vmw_plane_state_to_vps(new_state);
|
|
|
|
struct vmw_private *dev_priv;
|
|
|
|
size_t size;
|
|
|
|
int ret;
|
|
|
|
|
|
|
|
|
|
|
|
if (!new_fb) {
|
2018-06-19 13:02:16 +00:00
|
|
|
vmw_bo_unreference(&vps->bo);
|
|
|
|
vps->bo_size = 0;
|
2017-03-23 21:18:32 +00:00
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
size = new_state->crtc_w * new_state->crtc_h * 4;
|
2018-03-22 09:35:18 +00:00
|
|
|
dev_priv = vmw_priv(crtc->dev);
|
2017-03-23 21:18:32 +00:00
|
|
|
|
2018-06-19 13:02:16 +00:00
|
|
|
if (vps->bo) {
|
|
|
|
if (vps->bo_size == size) {
|
2018-03-22 09:35:18 +00:00
|
|
|
/*
|
|
|
|
* Note that this might temporarily up the pin-count
|
|
|
|
* to 2, until cleanup_fb() is called.
|
|
|
|
*/
|
2018-06-19 13:02:16 +00:00
|
|
|
return vmw_bo_pin_in_vram(dev_priv, vps->bo,
|
2018-03-22 09:35:18 +00:00
|
|
|
true);
|
|
|
|
}
|
2017-03-23 21:18:32 +00:00
|
|
|
|
2018-06-19 13:02:16 +00:00
|
|
|
vmw_bo_unreference(&vps->bo);
|
|
|
|
vps->bo_size = 0;
|
2017-03-23 21:18:32 +00:00
|
|
|
}
|
|
|
|
|
2018-06-19 13:02:16 +00:00
|
|
|
vps->bo = kzalloc(sizeof(*vps->bo), GFP_KERNEL);
|
|
|
|
if (!vps->bo)
|
2017-03-23 21:18:32 +00:00
|
|
|
return -ENOMEM;
|
|
|
|
|
|
|
|
vmw_svga_enable(dev_priv);
|
|
|
|
|
|
|
|
/* After we have alloced the backing store might not be able to
|
|
|
|
* resume the overlays, this is preferred to failing to alloc.
|
|
|
|
*/
|
|
|
|
vmw_overlay_pause_all(dev_priv);
|
2018-06-19 13:02:16 +00:00
|
|
|
ret = vmw_bo_init(dev_priv, vps->bo, size,
|
2017-03-23 21:18:32 +00:00
|
|
|
&vmw_vram_ne_placement,
|
2018-06-19 13:02:16 +00:00
|
|
|
false, &vmw_bo_bo_free);
|
2017-03-23 21:18:32 +00:00
|
|
|
vmw_overlay_resume_all(dev_priv);
|
2018-03-22 09:35:18 +00:00
|
|
|
if (ret) {
|
2018-06-19 13:02:16 +00:00
|
|
|
vps->bo = NULL; /* vmw_bo_init frees on error */
|
2018-03-22 09:35:18 +00:00
|
|
|
return ret;
|
|
|
|
}
|
2017-03-23 21:18:32 +00:00
|
|
|
|
2018-06-19 13:02:16 +00:00
|
|
|
vps->bo_size = size;
|
2018-05-15 13:39:09 +00:00
|
|
|
|
2018-03-22 09:35:18 +00:00
|
|
|
/*
|
|
|
|
* TTM already thinks the buffer is pinned, but make sure the
|
|
|
|
* pin_count is upped.
|
|
|
|
*/
|
2018-06-19 13:02:16 +00:00
|
|
|
return vmw_bo_pin_in_vram(dev_priv, vps->bo, true);
|
2017-03-23 21:18:32 +00:00
|
|
|
}
|
|
|
|
|
2018-08-08 22:02:48 +00:00
|
|
|
static uint32_t vmw_sou_bo_fifo_size(struct vmw_du_update_plane *update,
|
|
|
|
uint32_t num_hits)
|
|
|
|
{
|
|
|
|
return sizeof(struct vmw_kms_sou_define_gmrfb) +
|
|
|
|
sizeof(struct vmw_kms_sou_bo_blit) * num_hits;
|
|
|
|
}
|
|
|
|
|
|
|
|
static uint32_t vmw_sou_bo_define_gmrfb(struct vmw_du_update_plane *update,
|
|
|
|
void *cmd)
|
|
|
|
{
|
|
|
|
struct vmw_framebuffer_bo *vfbbo =
|
|
|
|
container_of(update->vfb, typeof(*vfbbo), base);
|
|
|
|
struct vmw_kms_sou_define_gmrfb *gmr = cmd;
|
|
|
|
int depth = update->vfb->base.format->depth;
|
|
|
|
|
|
|
|
/* Emulate RGBA support, contrary to svga_reg.h this is not
|
|
|
|
* supported by hosts. This is only a problem if we are reading
|
|
|
|
* this value later and expecting what we uploaded back.
|
|
|
|
*/
|
|
|
|
if (depth == 32)
|
|
|
|
depth = 24;
|
|
|
|
|
|
|
|
gmr->header = SVGA_CMD_DEFINE_GMRFB;
|
|
|
|
|
|
|
|
gmr->body.format.bitsPerPixel = update->vfb->base.format->cpp[0] * 8;
|
|
|
|
gmr->body.format.colorDepth = depth;
|
|
|
|
gmr->body.format.reserved = 0;
|
|
|
|
gmr->body.bytesPerLine = update->vfb->base.pitches[0];
|
|
|
|
vmw_bo_get_guest_ptr(&vfbbo->buffer->base, &gmr->body.ptr);
|
|
|
|
|
|
|
|
return sizeof(*gmr);
|
|
|
|
}
|
|
|
|
|
|
|
|
static uint32_t vmw_sou_bo_populate_clip(struct vmw_du_update_plane *update,
|
|
|
|
void *cmd, struct drm_rect *clip,
|
|
|
|
uint32_t fb_x, uint32_t fb_y)
|
|
|
|
{
|
|
|
|
struct vmw_kms_sou_bo_blit *blit = cmd;
|
|
|
|
|
|
|
|
blit->header = SVGA_CMD_BLIT_GMRFB_TO_SCREEN;
|
|
|
|
blit->body.destScreenId = update->du->unit;
|
|
|
|
blit->body.srcOrigin.x = fb_x;
|
|
|
|
blit->body.srcOrigin.y = fb_y;
|
|
|
|
blit->body.destRect.left = clip->x1;
|
|
|
|
blit->body.destRect.top = clip->y1;
|
|
|
|
blit->body.destRect.right = clip->x2;
|
|
|
|
blit->body.destRect.bottom = clip->y2;
|
|
|
|
|
|
|
|
return sizeof(*blit);
|
|
|
|
}
|
|
|
|
|
|
|
|
static uint32_t vmw_stud_bo_post_clip(struct vmw_du_update_plane *update,
|
|
|
|
void *cmd, struct drm_rect *bb)
|
|
|
|
{
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* vmw_sou_plane_update_bo - Update display unit for bo backed fb.
|
|
|
|
* @dev_priv: Device private.
|
|
|
|
* @plane: Plane state.
|
|
|
|
* @old_state: Old plane state.
|
|
|
|
* @vfb: Framebuffer which is blitted to display unit.
|
|
|
|
* @out_fence: If non-NULL, will return a ref-counted pointer to vmw_fence_obj.
|
|
|
|
* The returned fence pointer may be NULL in which case the device
|
|
|
|
* has already synchronized.
|
|
|
|
*
|
|
|
|
* Return: 0 on success or a negative error code on failure.
|
|
|
|
*/
|
|
|
|
static int vmw_sou_plane_update_bo(struct vmw_private *dev_priv,
|
|
|
|
struct drm_plane *plane,
|
|
|
|
struct drm_plane_state *old_state,
|
|
|
|
struct vmw_framebuffer *vfb,
|
|
|
|
struct vmw_fence_obj **out_fence)
|
|
|
|
{
|
|
|
|
struct vmw_du_update_plane_buffer bo_update;
|
|
|
|
|
|
|
|
memset(&bo_update, 0, sizeof(struct vmw_du_update_plane_buffer));
|
|
|
|
bo_update.base.plane = plane;
|
|
|
|
bo_update.base.old_state = old_state;
|
|
|
|
bo_update.base.dev_priv = dev_priv;
|
|
|
|
bo_update.base.du = vmw_crtc_to_du(plane->state->crtc);
|
|
|
|
bo_update.base.vfb = vfb;
|
|
|
|
bo_update.base.out_fence = out_fence;
|
|
|
|
bo_update.base.mutex = NULL;
|
|
|
|
bo_update.base.cpu_blit = false;
|
|
|
|
bo_update.base.intr = true;
|
|
|
|
|
|
|
|
bo_update.base.calc_fifo_size = vmw_sou_bo_fifo_size;
|
|
|
|
bo_update.base.post_prepare = vmw_sou_bo_define_gmrfb;
|
|
|
|
bo_update.base.clip = vmw_sou_bo_populate_clip;
|
|
|
|
bo_update.base.post_clip = vmw_stud_bo_post_clip;
|
|
|
|
|
|
|
|
return vmw_du_helper_plane_update(&bo_update.base);
|
|
|
|
}
|
|
|
|
|
2018-08-08 19:39:31 +00:00
|
|
|
static uint32_t vmw_sou_surface_fifo_size(struct vmw_du_update_plane *update,
|
|
|
|
uint32_t num_hits)
|
|
|
|
{
|
|
|
|
return sizeof(struct vmw_kms_sou_dirty_cmd) + sizeof(SVGASignedRect) *
|
|
|
|
num_hits;
|
|
|
|
}
|
|
|
|
|
|
|
|
static uint32_t vmw_sou_surface_post_prepare(struct vmw_du_update_plane *update,
|
|
|
|
void *cmd)
|
|
|
|
{
|
|
|
|
struct vmw_du_update_plane_surface *srf_update;
|
|
|
|
|
|
|
|
srf_update = container_of(update, typeof(*srf_update), base);
|
|
|
|
|
|
|
|
/*
|
|
|
|
* SOU SVGA_3D_CMD_BLIT_SURFACE_TO_SCREEN is special in the sense that
|
|
|
|
* its bounding box is filled before iterating over all the clips. So
|
|
|
|
* store the FIFO start address and revisit to fill the details.
|
|
|
|
*/
|
|
|
|
srf_update->cmd_start = cmd;
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static uint32_t vmw_sou_surface_pre_clip(struct vmw_du_update_plane *update,
|
|
|
|
void *cmd, uint32_t num_hits)
|
|
|
|
{
|
|
|
|
struct vmw_kms_sou_dirty_cmd *blit = cmd;
|
|
|
|
struct vmw_framebuffer_surface *vfbs;
|
|
|
|
|
|
|
|
vfbs = container_of(update->vfb, typeof(*vfbs), base);
|
|
|
|
|
|
|
|
blit->header.id = SVGA_3D_CMD_BLIT_SURFACE_TO_SCREEN;
|
|
|
|
blit->header.size = sizeof(blit->body) + sizeof(SVGASignedRect) *
|
|
|
|
num_hits;
|
|
|
|
|
|
|
|
blit->body.srcImage.sid = vfbs->surface->res.id;
|
|
|
|
blit->body.destScreenId = update->du->unit;
|
|
|
|
|
|
|
|
/* Update the source and destination bounding box later in post_clip */
|
|
|
|
blit->body.srcRect.left = 0;
|
|
|
|
blit->body.srcRect.top = 0;
|
|
|
|
blit->body.srcRect.right = 0;
|
|
|
|
blit->body.srcRect.bottom = 0;
|
|
|
|
|
|
|
|
blit->body.destRect.left = 0;
|
|
|
|
blit->body.destRect.top = 0;
|
|
|
|
blit->body.destRect.right = 0;
|
|
|
|
blit->body.destRect.bottom = 0;
|
|
|
|
|
|
|
|
return sizeof(*blit);
|
|
|
|
}
|
|
|
|
|
|
|
|
static uint32_t vmw_sou_surface_clip_rect(struct vmw_du_update_plane *update,
|
|
|
|
void *cmd, struct drm_rect *clip,
|
|
|
|
uint32_t src_x, uint32_t src_y)
|
|
|
|
{
|
|
|
|
SVGASignedRect *rect = cmd;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* rects are relative to dest bounding box rect on screen object, so
|
|
|
|
* translate to it later in post_clip
|
|
|
|
*/
|
|
|
|
rect->left = clip->x1;
|
|
|
|
rect->top = clip->y1;
|
|
|
|
rect->right = clip->x2;
|
|
|
|
rect->bottom = clip->y2;
|
|
|
|
|
|
|
|
return sizeof(*rect);
|
|
|
|
}
|
|
|
|
|
|
|
|
static uint32_t vmw_sou_surface_post_clip(struct vmw_du_update_plane *update,
|
|
|
|
void *cmd, struct drm_rect *bb)
|
|
|
|
{
|
|
|
|
struct vmw_du_update_plane_surface *srf_update;
|
|
|
|
struct drm_plane_state *state = update->plane->state;
|
|
|
|
struct drm_rect src_bb;
|
|
|
|
struct vmw_kms_sou_dirty_cmd *blit;
|
|
|
|
SVGASignedRect *rect;
|
|
|
|
uint32_t num_hits;
|
|
|
|
int translate_src_x;
|
|
|
|
int translate_src_y;
|
|
|
|
int i;
|
|
|
|
|
|
|
|
srf_update = container_of(update, typeof(*srf_update), base);
|
|
|
|
|
|
|
|
blit = srf_update->cmd_start;
|
|
|
|
rect = (SVGASignedRect *)&blit[1];
|
|
|
|
|
|
|
|
num_hits = (blit->header.size - sizeof(blit->body))/
|
|
|
|
sizeof(SVGASignedRect);
|
|
|
|
|
|
|
|
src_bb = *bb;
|
|
|
|
|
|
|
|
/* To translate bb back to fb src coord */
|
|
|
|
translate_src_x = (state->src_x >> 16) - state->crtc_x;
|
|
|
|
translate_src_y = (state->src_y >> 16) - state->crtc_y;
|
|
|
|
|
|
|
|
drm_rect_translate(&src_bb, translate_src_x, translate_src_y);
|
|
|
|
|
|
|
|
blit->body.srcRect.left = src_bb.x1;
|
|
|
|
blit->body.srcRect.top = src_bb.y1;
|
|
|
|
blit->body.srcRect.right = src_bb.x2;
|
|
|
|
blit->body.srcRect.bottom = src_bb.y2;
|
|
|
|
|
|
|
|
blit->body.destRect.left = bb->x1;
|
|
|
|
blit->body.destRect.top = bb->y1;
|
|
|
|
blit->body.destRect.right = bb->x2;
|
|
|
|
blit->body.destRect.bottom = bb->y2;
|
|
|
|
|
|
|
|
/* rects are relative to dest bb rect */
|
|
|
|
for (i = 0; i < num_hits; i++) {
|
|
|
|
rect->left -= bb->x1;
|
|
|
|
rect->top -= bb->y1;
|
|
|
|
rect->right -= bb->x1;
|
|
|
|
rect->bottom -= bb->y1;
|
|
|
|
rect++;
|
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* vmw_sou_plane_update_surface - Update display unit for surface backed fb.
|
|
|
|
* @dev_priv: Device private.
|
|
|
|
* @plane: Plane state.
|
|
|
|
* @old_state: Old plane state.
|
|
|
|
* @vfb: Framebuffer which is blitted to display unit
|
|
|
|
* @out_fence: If non-NULL, will return a ref-counted pointer to vmw_fence_obj.
|
|
|
|
* The returned fence pointer may be NULL in which case the device
|
|
|
|
* has already synchronized.
|
|
|
|
*
|
|
|
|
* Return: 0 on success or a negative error code on failure.
|
|
|
|
*/
|
|
|
|
static int vmw_sou_plane_update_surface(struct vmw_private *dev_priv,
|
|
|
|
struct drm_plane *plane,
|
|
|
|
struct drm_plane_state *old_state,
|
|
|
|
struct vmw_framebuffer *vfb,
|
|
|
|
struct vmw_fence_obj **out_fence)
|
|
|
|
{
|
|
|
|
struct vmw_du_update_plane_surface srf_update;
|
|
|
|
|
|
|
|
memset(&srf_update, 0, sizeof(struct vmw_du_update_plane_surface));
|
|
|
|
srf_update.base.plane = plane;
|
|
|
|
srf_update.base.old_state = old_state;
|
|
|
|
srf_update.base.dev_priv = dev_priv;
|
|
|
|
srf_update.base.du = vmw_crtc_to_du(plane->state->crtc);
|
|
|
|
srf_update.base.vfb = vfb;
|
|
|
|
srf_update.base.out_fence = out_fence;
|
|
|
|
srf_update.base.mutex = &dev_priv->cmdbuf_mutex;
|
|
|
|
srf_update.base.cpu_blit = false;
|
|
|
|
srf_update.base.intr = true;
|
|
|
|
|
|
|
|
srf_update.base.calc_fifo_size = vmw_sou_surface_fifo_size;
|
|
|
|
srf_update.base.post_prepare = vmw_sou_surface_post_prepare;
|
|
|
|
srf_update.base.pre_clip = vmw_sou_surface_pre_clip;
|
|
|
|
srf_update.base.clip = vmw_sou_surface_clip_rect;
|
|
|
|
srf_update.base.post_clip = vmw_sou_surface_post_clip;
|
|
|
|
|
|
|
|
return vmw_du_helper_plane_update(&srf_update.base);
|
|
|
|
}
|
2017-03-23 21:18:32 +00:00
|
|
|
|
|
|
|
static void
|
|
|
|
vmw_sou_primary_plane_atomic_update(struct drm_plane *plane,
|
|
|
|
struct drm_plane_state *old_state)
|
|
|
|
{
|
2017-03-23 21:38:18 +00:00
|
|
|
struct drm_crtc *crtc = plane->state->crtc;
|
2018-01-16 07:31:04 +00:00
|
|
|
struct drm_pending_vblank_event *event = NULL;
|
|
|
|
struct vmw_fence_obj *fence = NULL;
|
|
|
|
int ret;
|
|
|
|
|
2018-09-21 21:10:35 +00:00
|
|
|
/* In case of device error, maintain consistent atomic state */
|
2018-01-16 07:31:04 +00:00
|
|
|
if (crtc && plane->state->fb) {
|
|
|
|
struct vmw_private *dev_priv = vmw_priv(crtc->dev);
|
|
|
|
struct vmw_framebuffer *vfb =
|
|
|
|
vmw_framebuffer_to_vfb(plane->state->fb);
|
|
|
|
|
2018-06-19 13:02:16 +00:00
|
|
|
if (vfb->bo)
|
2018-09-21 21:07:33 +00:00
|
|
|
ret = vmw_sou_plane_update_bo(dev_priv, plane,
|
|
|
|
old_state, vfb, &fence);
|
2018-01-16 07:31:04 +00:00
|
|
|
else
|
2018-09-21 21:07:33 +00:00
|
|
|
ret = vmw_sou_plane_update_surface(dev_priv, plane,
|
|
|
|
old_state, vfb,
|
|
|
|
&fence);
|
2018-01-16 07:31:04 +00:00
|
|
|
if (ret != 0)
|
|
|
|
DRM_ERROR("Failed to update screen.\n");
|
|
|
|
} else {
|
2018-09-21 21:10:35 +00:00
|
|
|
/* Do nothing when fb and crtc is NULL (blank crtc) */
|
2018-01-16 07:31:04 +00:00
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
2018-09-21 21:10:35 +00:00
|
|
|
/* For error case vblank event is send from vmw_du_crtc_atomic_flush */
|
2018-01-16 07:31:04 +00:00
|
|
|
event = crtc->state->event;
|
|
|
|
if (event && fence) {
|
|
|
|
struct drm_file *file_priv = event->base.file_priv;
|
|
|
|
|
|
|
|
ret = vmw_event_fence_action_queue(file_priv,
|
|
|
|
fence,
|
|
|
|
&event->base,
|
|
|
|
&event->event.vbl.tv_sec,
|
|
|
|
&event->event.vbl.tv_usec,
|
|
|
|
true);
|
|
|
|
|
|
|
|
if (unlikely(ret != 0))
|
|
|
|
DRM_ERROR("Failed to queue event on fence.\n");
|
|
|
|
else
|
|
|
|
crtc->state->event = NULL;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (fence)
|
|
|
|
vmw_fence_obj_unreference(&fence);
|
2017-03-23 21:18:32 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
|
2017-03-23 18:28:11 +00:00
|
|
|
static const struct drm_plane_funcs vmw_sou_plane_funcs = {
|
2017-03-23 21:38:18 +00:00
|
|
|
.update_plane = drm_atomic_helper_update_plane,
|
|
|
|
.disable_plane = drm_atomic_helper_disable_plane,
|
2017-03-23 18:28:11 +00:00
|
|
|
.destroy = vmw_du_primary_plane_destroy,
|
2017-03-23 18:36:05 +00:00
|
|
|
.reset = vmw_du_plane_reset,
|
|
|
|
.atomic_duplicate_state = vmw_du_plane_duplicate_state,
|
|
|
|
.atomic_destroy_state = vmw_du_plane_destroy_state,
|
2017-03-23 18:28:11 +00:00
|
|
|
};
|
|
|
|
|
|
|
|
static const struct drm_plane_funcs vmw_sou_cursor_funcs = {
|
2017-03-23 21:38:18 +00:00
|
|
|
.update_plane = drm_atomic_helper_update_plane,
|
|
|
|
.disable_plane = drm_atomic_helper_disable_plane,
|
2017-03-23 18:28:11 +00:00
|
|
|
.destroy = vmw_du_cursor_plane_destroy,
|
2017-03-23 18:36:05 +00:00
|
|
|
.reset = vmw_du_plane_reset,
|
|
|
|
.atomic_duplicate_state = vmw_du_plane_duplicate_state,
|
|
|
|
.atomic_destroy_state = vmw_du_plane_destroy_state,
|
2017-03-23 18:28:11 +00:00
|
|
|
};
|
|
|
|
|
2017-03-23 20:14:54 +00:00
|
|
|
/*
|
|
|
|
* Atomic Helpers
|
|
|
|
*/
|
2017-03-23 21:18:32 +00:00
|
|
|
static const struct
|
|
|
|
drm_plane_helper_funcs vmw_sou_cursor_plane_helper_funcs = {
|
|
|
|
.atomic_check = vmw_du_cursor_plane_atomic_check,
|
|
|
|
.atomic_update = vmw_du_cursor_plane_atomic_update,
|
|
|
|
.prepare_fb = vmw_du_cursor_plane_prepare_fb,
|
|
|
|
.cleanup_fb = vmw_du_plane_cleanup_fb,
|
|
|
|
};
|
|
|
|
|
|
|
|
static const struct
|
|
|
|
drm_plane_helper_funcs vmw_sou_primary_plane_helper_funcs = {
|
|
|
|
.atomic_check = vmw_du_primary_plane_atomic_check,
|
|
|
|
.atomic_update = vmw_sou_primary_plane_atomic_update,
|
|
|
|
.prepare_fb = vmw_sou_primary_plane_prepare_fb,
|
|
|
|
.cleanup_fb = vmw_sou_primary_plane_cleanup_fb,
|
|
|
|
};
|
|
|
|
|
2017-03-23 20:14:54 +00:00
|
|
|
static const struct drm_crtc_helper_funcs vmw_sou_crtc_helper_funcs = {
|
|
|
|
.prepare = vmw_sou_crtc_helper_prepare,
|
|
|
|
.mode_set_nofb = vmw_sou_crtc_mode_set_nofb,
|
|
|
|
.atomic_check = vmw_du_crtc_atomic_check,
|
|
|
|
.atomic_begin = vmw_du_crtc_atomic_begin,
|
|
|
|
.atomic_flush = vmw_du_crtc_atomic_flush,
|
2017-06-30 09:36:44 +00:00
|
|
|
.atomic_enable = vmw_sou_crtc_atomic_enable,
|
2017-06-30 09:36:45 +00:00
|
|
|
.atomic_disable = vmw_sou_crtc_atomic_disable,
|
2017-03-23 20:14:54 +00:00
|
|
|
};
|
|
|
|
|
2017-03-23 18:28:11 +00:00
|
|
|
|
2011-10-04 18:13:22 +00:00
|
|
|
static int vmw_sou_init(struct vmw_private *dev_priv, unsigned unit)
|
|
|
|
{
|
|
|
|
struct vmw_screen_object_unit *sou;
|
|
|
|
struct drm_device *dev = dev_priv->dev;
|
|
|
|
struct drm_connector *connector;
|
|
|
|
struct drm_encoder *encoder;
|
2017-03-23 18:36:05 +00:00
|
|
|
struct drm_plane *primary, *cursor;
|
2011-10-04 18:13:22 +00:00
|
|
|
struct drm_crtc *crtc;
|
2017-03-23 18:28:11 +00:00
|
|
|
int ret;
|
2011-10-04 18:13:22 +00:00
|
|
|
|
|
|
|
sou = kzalloc(sizeof(*sou), GFP_KERNEL);
|
|
|
|
if (!sou)
|
|
|
|
return -ENOMEM;
|
|
|
|
|
|
|
|
sou->base.unit = unit;
|
|
|
|
crtc = &sou->base.crtc;
|
|
|
|
encoder = &sou->base.encoder;
|
|
|
|
connector = &sou->base.connector;
|
2017-03-23 18:36:05 +00:00
|
|
|
primary = &sou->base.primary;
|
|
|
|
cursor = &sou->base.cursor;
|
2011-10-04 18:13:22 +00:00
|
|
|
|
|
|
|
sou->base.pref_active = (unit == 0);
|
2012-02-09 15:56:46 +00:00
|
|
|
sou->base.pref_width = dev_priv->initial_width;
|
|
|
|
sou->base.pref_height = dev_priv->initial_height;
|
2011-10-04 18:13:22 +00:00
|
|
|
sou->base.pref_mode = NULL;
|
2017-03-23 18:33:39 +00:00
|
|
|
|
|
|
|
/*
|
|
|
|
* Remove this after enabling atomic because property values can
|
|
|
|
* only exist in a state object
|
|
|
|
*/
|
2016-02-12 08:59:50 +00:00
|
|
|
sou->base.is_implicit = false;
|
2011-10-04 18:13:22 +00:00
|
|
|
|
2017-03-23 18:28:11 +00:00
|
|
|
/* Initialize primary plane */
|
2017-03-23 18:36:05 +00:00
|
|
|
vmw_du_plane_reset(primary);
|
|
|
|
|
2017-03-23 18:28:11 +00:00
|
|
|
ret = drm_universal_plane_init(dev, &sou->base.primary,
|
|
|
|
0, &vmw_sou_plane_funcs,
|
|
|
|
vmw_primary_plane_formats,
|
|
|
|
ARRAY_SIZE(vmw_primary_plane_formats),
|
2017-07-24 03:46:38 +00:00
|
|
|
NULL, DRM_PLANE_TYPE_PRIMARY, NULL);
|
2017-03-23 18:28:11 +00:00
|
|
|
if (ret) {
|
|
|
|
DRM_ERROR("Failed to initialize primary plane");
|
|
|
|
goto err_free;
|
|
|
|
}
|
|
|
|
|
2017-03-23 21:18:32 +00:00
|
|
|
drm_plane_helper_add(primary, &vmw_sou_primary_plane_helper_funcs);
|
2018-08-08 22:41:56 +00:00
|
|
|
drm_plane_enable_fb_damage_clips(primary);
|
2017-03-23 21:18:32 +00:00
|
|
|
|
2017-03-23 18:28:11 +00:00
|
|
|
/* Initialize cursor plane */
|
2017-03-23 18:36:05 +00:00
|
|
|
vmw_du_plane_reset(cursor);
|
|
|
|
|
2017-03-23 18:28:11 +00:00
|
|
|
ret = drm_universal_plane_init(dev, &sou->base.cursor,
|
|
|
|
0, &vmw_sou_cursor_funcs,
|
|
|
|
vmw_cursor_plane_formats,
|
|
|
|
ARRAY_SIZE(vmw_cursor_plane_formats),
|
2017-07-24 03:46:38 +00:00
|
|
|
NULL, DRM_PLANE_TYPE_CURSOR, NULL);
|
2017-03-23 18:28:11 +00:00
|
|
|
if (ret) {
|
|
|
|
DRM_ERROR("Failed to initialize cursor plane");
|
|
|
|
drm_plane_cleanup(&sou->base.primary);
|
|
|
|
goto err_free;
|
|
|
|
}
|
|
|
|
|
2017-03-23 21:18:32 +00:00
|
|
|
drm_plane_helper_add(cursor, &vmw_sou_cursor_plane_helper_funcs);
|
|
|
|
|
|
|
|
vmw_du_connector_reset(connector);
|
2017-03-23 18:28:11 +00:00
|
|
|
ret = drm_connector_init(dev, connector, &vmw_sou_connector_funcs,
|
|
|
|
DRM_MODE_CONNECTOR_VIRTUAL);
|
|
|
|
if (ret) {
|
|
|
|
DRM_ERROR("Failed to initialize connector\n");
|
|
|
|
goto err_free;
|
|
|
|
}
|
|
|
|
|
2017-03-23 21:23:20 +00:00
|
|
|
drm_connector_helper_add(connector, &vmw_sou_connector_helper_funcs);
|
2011-10-04 18:13:22 +00:00
|
|
|
connector->status = vmw_du_connector_detect(connector, true);
|
|
|
|
|
2017-03-23 18:28:11 +00:00
|
|
|
ret = drm_encoder_init(dev, encoder, &vmw_screen_object_encoder_funcs,
|
|
|
|
DRM_MODE_ENCODER_VIRTUAL, NULL);
|
|
|
|
if (ret) {
|
|
|
|
DRM_ERROR("Failed to initialize encoder\n");
|
|
|
|
goto err_free_connector;
|
|
|
|
}
|
|
|
|
|
2018-07-09 08:40:07 +00:00
|
|
|
(void) drm_connector_attach_encoder(connector, encoder);
|
2011-10-04 18:13:22 +00:00
|
|
|
encoder->possible_crtcs = (1 << unit);
|
|
|
|
encoder->possible_clones = 0;
|
|
|
|
|
2017-03-23 18:28:11 +00:00
|
|
|
ret = drm_connector_register(connector);
|
|
|
|
if (ret) {
|
|
|
|
DRM_ERROR("Failed to register connector\n");
|
|
|
|
goto err_free_encoder;
|
|
|
|
}
|
2013-12-02 14:04:38 +00:00
|
|
|
|
2017-03-23 18:48:44 +00:00
|
|
|
|
|
|
|
vmw_du_crtc_reset(crtc);
|
2017-03-23 18:28:11 +00:00
|
|
|
ret = drm_crtc_init_with_planes(dev, crtc, &sou->base.primary,
|
|
|
|
&sou->base.cursor,
|
|
|
|
&vmw_screen_object_crtc_funcs, NULL);
|
|
|
|
if (ret) {
|
|
|
|
DRM_ERROR("Failed to initialize CRTC\n");
|
|
|
|
goto err_free_unregister;
|
|
|
|
}
|
2011-10-04 18:13:22 +00:00
|
|
|
|
2017-03-23 20:14:54 +00:00
|
|
|
drm_crtc_helper_add(crtc, &vmw_sou_crtc_helper_funcs);
|
|
|
|
|
2011-10-04 18:13:22 +00:00
|
|
|
drm_mode_crtc_set_gamma_size(crtc, 256);
|
|
|
|
|
2016-02-12 08:45:42 +00:00
|
|
|
drm_object_attach_property(&connector->base,
|
|
|
|
dev_priv->hotplug_mode_update_property, 1);
|
|
|
|
drm_object_attach_property(&connector->base,
|
|
|
|
dev->mode_config.suggested_x_property, 0);
|
|
|
|
drm_object_attach_property(&connector->base,
|
|
|
|
dev->mode_config.suggested_y_property, 0);
|
2011-10-04 18:13:22 +00:00
|
|
|
return 0;
|
2017-03-23 18:28:11 +00:00
|
|
|
|
|
|
|
err_free_unregister:
|
|
|
|
drm_connector_unregister(connector);
|
|
|
|
err_free_encoder:
|
|
|
|
drm_encoder_cleanup(encoder);
|
|
|
|
err_free_connector:
|
|
|
|
drm_connector_cleanup(connector);
|
|
|
|
err_free:
|
|
|
|
kfree(sou);
|
|
|
|
return ret;
|
2011-10-04 18:13:22 +00:00
|
|
|
}
|
|
|
|
|
2015-06-26 08:23:42 +00:00
|
|
|
int vmw_kms_sou_init_display(struct vmw_private *dev_priv)
|
2011-10-04 18:13:22 +00:00
|
|
|
{
|
|
|
|
struct drm_device *dev = dev_priv->dev;
|
2011-10-17 09:59:44 +00:00
|
|
|
int i, ret;
|
2011-10-04 18:13:22 +00:00
|
|
|
|
2012-11-09 12:26:13 +00:00
|
|
|
if (!(dev_priv->capabilities & SVGA_CAP_SCREEN_OBJECT_2)) {
|
2011-10-04 18:13:22 +00:00
|
|
|
DRM_INFO("Not using screen objects,"
|
|
|
|
" missing cap SCREEN_OBJECT_2\n");
|
|
|
|
return -ENOSYS;
|
|
|
|
}
|
|
|
|
|
|
|
|
ret = -ENOMEM;
|
|
|
|
|
|
|
|
ret = drm_vblank_init(dev, VMWGFX_NUM_DISPLAY_UNITS);
|
|
|
|
if (unlikely(ret != 0))
|
2016-02-12 08:00:26 +00:00
|
|
|
return ret;
|
2011-10-04 18:13:22 +00:00
|
|
|
|
|
|
|
for (i = 0; i < VMWGFX_NUM_DISPLAY_UNITS; ++i)
|
|
|
|
vmw_sou_init(dev_priv, i);
|
|
|
|
|
2015-06-26 08:23:42 +00:00
|
|
|
dev_priv->active_display_unit = vmw_du_screen_object;
|
|
|
|
|
|
|
|
DRM_INFO("Screen Objects Display Unit initialized\n");
|
2011-10-04 18:13:22 +00:00
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2018-06-19 13:02:16 +00:00
|
|
|
static int do_bo_define_gmrfb(struct vmw_private *dev_priv,
|
2015-06-26 08:23:42 +00:00
|
|
|
struct vmw_framebuffer *framebuffer)
|
2012-02-09 15:56:45 +00:00
|
|
|
{
|
2018-06-19 13:02:16 +00:00
|
|
|
struct vmw_buffer_object *buf =
|
|
|
|
container_of(framebuffer, struct vmw_framebuffer_bo,
|
2015-06-26 09:14:27 +00:00
|
|
|
base)->buffer;
|
2016-12-14 21:31:35 +00:00
|
|
|
int depth = framebuffer->base.format->depth;
|
2015-06-26 08:23:42 +00:00
|
|
|
struct {
|
|
|
|
uint32_t header;
|
|
|
|
SVGAFifoCmdDefineGMRFB body;
|
|
|
|
} *cmd;
|
2012-02-09 15:56:45 +00:00
|
|
|
|
2015-06-26 08:23:42 +00:00
|
|
|
/* Emulate RGBA support, contrary to svga_reg.h this is not
|
|
|
|
* supported by hosts. This is only a problem if we are reading
|
|
|
|
* this value later and expecting what we uploaded back.
|
|
|
|
*/
|
|
|
|
if (depth == 32)
|
|
|
|
depth = 24;
|
2012-02-09 15:56:45 +00:00
|
|
|
|
2019-02-15 00:15:39 +00:00
|
|
|
cmd = VMW_FIFO_RESERVE(dev_priv, sizeof(*cmd));
|
|
|
|
if (!cmd)
|
2015-06-26 08:23:42 +00:00
|
|
|
return -ENOMEM;
|
|
|
|
|
|
|
|
cmd->header = SVGA_CMD_DEFINE_GMRFB;
|
2016-12-14 21:32:20 +00:00
|
|
|
cmd->body.format.bitsPerPixel = framebuffer->base.format->cpp[0] * 8;
|
2015-06-26 08:23:42 +00:00
|
|
|
cmd->body.format.colorDepth = depth;
|
|
|
|
cmd->body.format.reserved = 0;
|
|
|
|
cmd->body.bytesPerLine = framebuffer->base.pitches[0];
|
2015-06-26 09:14:27 +00:00
|
|
|
/* Buffer is reserved in vram or GMR */
|
|
|
|
vmw_bo_get_guest_ptr(&buf->base, &cmd->body.ptr);
|
|
|
|
vmw_fifo_commit(dev_priv, sizeof(*cmd));
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* vmw_sou_surface_fifo_commit - Callback to fill in and submit a
|
|
|
|
* blit surface to screen command.
|
|
|
|
*
|
|
|
|
* @dirty: The closure structure.
|
|
|
|
*
|
|
|
|
* Fills in the missing fields in the command, and translates the cliprects
|
|
|
|
* to match the destination bounding box encoded.
|
|
|
|
*/
|
|
|
|
static void vmw_sou_surface_fifo_commit(struct vmw_kms_dirty *dirty)
|
|
|
|
{
|
|
|
|
struct vmw_kms_sou_surface_dirty *sdirty =
|
|
|
|
container_of(dirty, typeof(*sdirty), base);
|
|
|
|
struct vmw_kms_sou_dirty_cmd *cmd = dirty->cmd;
|
|
|
|
s32 trans_x = dirty->unit->crtc.x - sdirty->dst_x;
|
|
|
|
s32 trans_y = dirty->unit->crtc.y - sdirty->dst_y;
|
|
|
|
size_t region_size = dirty->num_hits * sizeof(SVGASignedRect);
|
|
|
|
SVGASignedRect *blit = (SVGASignedRect *) &cmd[1];
|
|
|
|
int i;
|
|
|
|
|
2016-02-12 07:26:37 +00:00
|
|
|
if (!dirty->num_hits) {
|
|
|
|
vmw_fifo_commit(dirty->dev_priv, 0);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
2015-06-26 09:14:27 +00:00
|
|
|
cmd->header.id = SVGA_3D_CMD_BLIT_SURFACE_TO_SCREEN;
|
|
|
|
cmd->header.size = sizeof(cmd->body) + region_size;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Use the destination bounding box to specify destination - and
|
|
|
|
* source bounding regions.
|
|
|
|
*/
|
|
|
|
cmd->body.destRect.left = sdirty->left;
|
|
|
|
cmd->body.destRect.right = sdirty->right;
|
|
|
|
cmd->body.destRect.top = sdirty->top;
|
|
|
|
cmd->body.destRect.bottom = sdirty->bottom;
|
|
|
|
|
|
|
|
cmd->body.srcRect.left = sdirty->left + trans_x;
|
|
|
|
cmd->body.srcRect.right = sdirty->right + trans_x;
|
|
|
|
cmd->body.srcRect.top = sdirty->top + trans_y;
|
|
|
|
cmd->body.srcRect.bottom = sdirty->bottom + trans_y;
|
|
|
|
|
|
|
|
cmd->body.srcImage.sid = sdirty->sid;
|
|
|
|
cmd->body.destScreenId = dirty->unit->unit;
|
|
|
|
|
|
|
|
/* Blits are relative to the destination rect. Translate. */
|
|
|
|
for (i = 0; i < dirty->num_hits; ++i, ++blit) {
|
|
|
|
blit->left -= sdirty->left;
|
|
|
|
blit->right -= sdirty->left;
|
|
|
|
blit->top -= sdirty->top;
|
|
|
|
blit->bottom -= sdirty->top;
|
|
|
|
}
|
|
|
|
|
|
|
|
vmw_fifo_commit(dirty->dev_priv, region_size + sizeof(*cmd));
|
|
|
|
|
|
|
|
sdirty->left = sdirty->top = S32_MAX;
|
|
|
|
sdirty->right = sdirty->bottom = S32_MIN;
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* vmw_sou_surface_clip - Callback to encode a blit surface to screen cliprect.
|
|
|
|
*
|
|
|
|
* @dirty: The closure structure
|
|
|
|
*
|
|
|
|
* Encodes a SVGASignedRect cliprect and updates the bounding box of the
|
|
|
|
* BLIT_SURFACE_TO_SCREEN command.
|
|
|
|
*/
|
|
|
|
static void vmw_sou_surface_clip(struct vmw_kms_dirty *dirty)
|
|
|
|
{
|
|
|
|
struct vmw_kms_sou_surface_dirty *sdirty =
|
|
|
|
container_of(dirty, typeof(*sdirty), base);
|
|
|
|
struct vmw_kms_sou_dirty_cmd *cmd = dirty->cmd;
|
|
|
|
SVGASignedRect *blit = (SVGASignedRect *) &cmd[1];
|
|
|
|
|
|
|
|
/* Destination rect. */
|
|
|
|
blit += dirty->num_hits;
|
|
|
|
blit->left = dirty->unit_x1;
|
|
|
|
blit->top = dirty->unit_y1;
|
|
|
|
blit->right = dirty->unit_x2;
|
|
|
|
blit->bottom = dirty->unit_y2;
|
|
|
|
|
|
|
|
/* Destination bounding box */
|
|
|
|
sdirty->left = min_t(s32, sdirty->left, dirty->unit_x1);
|
|
|
|
sdirty->top = min_t(s32, sdirty->top, dirty->unit_y1);
|
|
|
|
sdirty->right = max_t(s32, sdirty->right, dirty->unit_x2);
|
|
|
|
sdirty->bottom = max_t(s32, sdirty->bottom, dirty->unit_y2);
|
|
|
|
|
|
|
|
dirty->num_hits++;
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* vmw_kms_sou_do_surface_dirty - Dirty part of a surface backed framebuffer
|
|
|
|
*
|
|
|
|
* @dev_priv: Pointer to the device private structure.
|
|
|
|
* @framebuffer: Pointer to the surface-buffer backed framebuffer.
|
|
|
|
* @clips: Array of clip rects. Either @clips or @vclips must be NULL.
|
|
|
|
* @vclips: Alternate array of clip rects. Either @clips or @vclips must
|
|
|
|
* be NULL.
|
|
|
|
* @srf: Pointer to surface to blit from. If NULL, the surface attached
|
|
|
|
* to @framebuffer will be used.
|
|
|
|
* @dest_x: X coordinate offset to align @srf with framebuffer coordinates.
|
|
|
|
* @dest_y: Y coordinate offset to align @srf with framebuffer coordinates.
|
|
|
|
* @num_clips: Number of clip rects in @clips.
|
|
|
|
* @inc: Increment to use when looping over @clips.
|
|
|
|
* @out_fence: If non-NULL, will return a ref-counted pointer to a
|
|
|
|
* struct vmw_fence_obj. The returned fence pointer may be NULL in which
|
|
|
|
* case the device has already synchronized.
|
2018-01-16 07:24:17 +00:00
|
|
|
* @crtc: If crtc is passed, perform surface dirty on that crtc only.
|
2015-06-26 09:14:27 +00:00
|
|
|
*
|
|
|
|
* Returns 0 on success, negative error code on failure. -ERESTARTSYS if
|
|
|
|
* interrupted.
|
|
|
|
*/
|
|
|
|
int vmw_kms_sou_do_surface_dirty(struct vmw_private *dev_priv,
|
|
|
|
struct vmw_framebuffer *framebuffer,
|
|
|
|
struct drm_clip_rect *clips,
|
|
|
|
struct drm_vmw_rect *vclips,
|
|
|
|
struct vmw_resource *srf,
|
|
|
|
s32 dest_x,
|
|
|
|
s32 dest_y,
|
|
|
|
unsigned num_clips, int inc,
|
2018-01-16 07:24:17 +00:00
|
|
|
struct vmw_fence_obj **out_fence,
|
|
|
|
struct drm_crtc *crtc)
|
2015-06-26 09:14:27 +00:00
|
|
|
{
|
|
|
|
struct vmw_framebuffer_surface *vfbs =
|
|
|
|
container_of(framebuffer, typeof(*vfbs), base);
|
|
|
|
struct vmw_kms_sou_surface_dirty sdirty;
|
2018-09-26 13:34:50 +00:00
|
|
|
DECLARE_VAL_CONTEXT(val_ctx, NULL, 0);
|
2015-06-26 09:14:27 +00:00
|
|
|
int ret;
|
|
|
|
|
|
|
|
if (!srf)
|
|
|
|
srf = &vfbs->surface->res;
|
|
|
|
|
2019-02-20 07:21:26 +00:00
|
|
|
ret = vmw_validation_add_resource(&val_ctx, srf, 0, VMW_RES_DIRTY_NONE,
|
|
|
|
NULL, NULL);
|
2015-06-26 09:14:27 +00:00
|
|
|
if (ret)
|
|
|
|
return ret;
|
|
|
|
|
2018-09-26 13:34:50 +00:00
|
|
|
ret = vmw_validation_prepare(&val_ctx, &dev_priv->cmdbuf_mutex, true);
|
|
|
|
if (ret)
|
|
|
|
goto out_unref;
|
|
|
|
|
2015-06-26 09:14:27 +00:00
|
|
|
sdirty.base.fifo_commit = vmw_sou_surface_fifo_commit;
|
|
|
|
sdirty.base.clip = vmw_sou_surface_clip;
|
|
|
|
sdirty.base.dev_priv = dev_priv;
|
|
|
|
sdirty.base.fifo_reserve_size = sizeof(struct vmw_kms_sou_dirty_cmd) +
|
|
|
|
sizeof(SVGASignedRect) * num_clips;
|
2018-01-16 07:24:17 +00:00
|
|
|
sdirty.base.crtc = crtc;
|
2015-06-26 08:23:42 +00:00
|
|
|
|
2015-06-26 09:14:27 +00:00
|
|
|
sdirty.sid = srf->id;
|
|
|
|
sdirty.left = sdirty.top = S32_MAX;
|
|
|
|
sdirty.right = sdirty.bottom = S32_MIN;
|
|
|
|
sdirty.dst_x = dest_x;
|
|
|
|
sdirty.dst_y = dest_y;
|
2015-06-26 08:23:42 +00:00
|
|
|
|
2015-06-26 09:14:27 +00:00
|
|
|
ret = vmw_kms_helper_dirty(dev_priv, framebuffer, clips, vclips,
|
|
|
|
dest_x, dest_y, num_clips, inc,
|
|
|
|
&sdirty.base);
|
2018-09-26 13:34:50 +00:00
|
|
|
vmw_kms_helper_validation_finish(dev_priv, NULL, &val_ctx, out_fence,
|
|
|
|
NULL);
|
2015-06-26 08:23:42 +00:00
|
|
|
|
|
|
|
return ret;
|
2018-09-26 13:34:50 +00:00
|
|
|
|
|
|
|
out_unref:
|
|
|
|
vmw_validation_unref_lists(&val_ctx);
|
|
|
|
return ret;
|
2012-02-09 15:56:45 +00:00
|
|
|
}
|
|
|
|
|
2015-06-26 09:14:27 +00:00
|
|
|
/**
|
2018-06-19 13:02:16 +00:00
|
|
|
* vmw_sou_bo_fifo_commit - Callback to submit a set of readback clips.
|
2015-06-26 09:14:27 +00:00
|
|
|
*
|
|
|
|
* @dirty: The closure structure.
|
|
|
|
*
|
|
|
|
* Commits a previously built command buffer of readback clips.
|
|
|
|
*/
|
2018-06-19 13:02:16 +00:00
|
|
|
static void vmw_sou_bo_fifo_commit(struct vmw_kms_dirty *dirty)
|
2015-06-26 09:14:27 +00:00
|
|
|
{
|
2016-02-12 07:26:37 +00:00
|
|
|
if (!dirty->num_hits) {
|
|
|
|
vmw_fifo_commit(dirty->dev_priv, 0);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
2015-06-26 09:14:27 +00:00
|
|
|
vmw_fifo_commit(dirty->dev_priv,
|
2018-06-19 13:02:16 +00:00
|
|
|
sizeof(struct vmw_kms_sou_bo_blit) *
|
2015-06-26 09:14:27 +00:00
|
|
|
dirty->num_hits);
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
2018-06-19 13:02:16 +00:00
|
|
|
* vmw_sou_bo_clip - Callback to encode a readback cliprect.
|
2015-06-26 09:14:27 +00:00
|
|
|
*
|
|
|
|
* @dirty: The closure structure
|
|
|
|
*
|
|
|
|
* Encodes a BLIT_GMRFB_TO_SCREEN cliprect.
|
|
|
|
*/
|
2018-06-19 13:02:16 +00:00
|
|
|
static void vmw_sou_bo_clip(struct vmw_kms_dirty *dirty)
|
2015-06-26 09:14:27 +00:00
|
|
|
{
|
2018-06-19 13:02:16 +00:00
|
|
|
struct vmw_kms_sou_bo_blit *blit = dirty->cmd;
|
2015-06-26 09:14:27 +00:00
|
|
|
|
|
|
|
blit += dirty->num_hits;
|
|
|
|
blit->header = SVGA_CMD_BLIT_GMRFB_TO_SCREEN;
|
|
|
|
blit->body.destScreenId = dirty->unit->unit;
|
|
|
|
blit->body.srcOrigin.x = dirty->fb_x;
|
|
|
|
blit->body.srcOrigin.y = dirty->fb_y;
|
|
|
|
blit->body.destRect.left = dirty->unit_x1;
|
|
|
|
blit->body.destRect.top = dirty->unit_y1;
|
|
|
|
blit->body.destRect.right = dirty->unit_x2;
|
|
|
|
blit->body.destRect.bottom = dirty->unit_y2;
|
|
|
|
dirty->num_hits++;
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
2018-06-19 13:02:16 +00:00
|
|
|
* vmw_kms_do_bo_dirty - Dirty part of a buffer-object backed framebuffer
|
2015-06-26 09:14:27 +00:00
|
|
|
*
|
|
|
|
* @dev_priv: Pointer to the device private structure.
|
2018-06-19 13:02:16 +00:00
|
|
|
* @framebuffer: Pointer to the buffer-object backed framebuffer.
|
2015-06-26 09:14:27 +00:00
|
|
|
* @clips: Array of clip rects.
|
2016-02-12 07:32:08 +00:00
|
|
|
* @vclips: Alternate array of clip rects. Either @clips or @vclips must
|
|
|
|
* be NULL.
|
2015-06-26 09:14:27 +00:00
|
|
|
* @num_clips: Number of clip rects in @clips.
|
|
|
|
* @increment: Increment to use when looping over @clips.
|
|
|
|
* @interruptible: Whether to perform waits interruptible if possible.
|
|
|
|
* @out_fence: If non-NULL, will return a ref-counted pointer to a
|
|
|
|
* struct vmw_fence_obj. The returned fence pointer may be NULL in which
|
|
|
|
* case the device has already synchronized.
|
2018-06-19 13:02:16 +00:00
|
|
|
* @crtc: If crtc is passed, perform bo dirty on that crtc only.
|
2015-06-26 09:14:27 +00:00
|
|
|
*
|
|
|
|
* Returns 0 on success, negative error code on failure. -ERESTARTSYS if
|
|
|
|
* interrupted.
|
|
|
|
*/
|
2018-06-19 13:02:16 +00:00
|
|
|
int vmw_kms_sou_do_bo_dirty(struct vmw_private *dev_priv,
|
2015-06-26 08:23:42 +00:00
|
|
|
struct vmw_framebuffer *framebuffer,
|
|
|
|
struct drm_clip_rect *clips,
|
2016-02-12 07:32:08 +00:00
|
|
|
struct drm_vmw_rect *vclips,
|
2015-06-26 08:23:42 +00:00
|
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unsigned num_clips, int increment,
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2015-06-26 09:14:27 +00:00
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bool interruptible,
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2018-01-16 07:24:17 +00:00
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struct vmw_fence_obj **out_fence,
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struct drm_crtc *crtc)
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2012-02-09 15:56:45 +00:00
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{
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2018-06-19 13:02:16 +00:00
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struct vmw_buffer_object *buf =
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container_of(framebuffer, struct vmw_framebuffer_bo,
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2015-06-26 09:14:27 +00:00
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base)->buffer;
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struct vmw_kms_dirty dirty;
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2018-09-26 13:34:50 +00:00
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DECLARE_VAL_CONTEXT(val_ctx, NULL, 0);
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2015-06-26 09:14:27 +00:00
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int ret;
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2012-02-09 15:56:45 +00:00
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2018-09-26 13:34:50 +00:00
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ret = vmw_validation_add_bo(&val_ctx, buf, false, false);
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2015-06-26 09:14:27 +00:00
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if (ret)
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return ret;
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2012-02-09 15:56:45 +00:00
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2018-09-26 13:34:50 +00:00
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ret = vmw_validation_prepare(&val_ctx, NULL, interruptible);
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if (ret)
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goto out_unref;
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2018-06-19 13:02:16 +00:00
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ret = do_bo_define_gmrfb(dev_priv, framebuffer);
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2015-06-26 08:23:42 +00:00
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if (unlikely(ret != 0))
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2015-06-26 09:14:27 +00:00
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goto out_revert;
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2015-06-26 08:23:42 +00:00
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2018-01-16 07:24:17 +00:00
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dirty.crtc = crtc;
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2018-06-19 13:02:16 +00:00
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dirty.fifo_commit = vmw_sou_bo_fifo_commit;
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dirty.clip = vmw_sou_bo_clip;
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dirty.fifo_reserve_size = sizeof(struct vmw_kms_sou_bo_blit) *
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2015-06-26 09:14:27 +00:00
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num_clips;
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2016-02-12 07:32:08 +00:00
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ret = vmw_kms_helper_dirty(dev_priv, framebuffer, clips, vclips,
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2015-06-26 09:14:27 +00:00
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0, 0, num_clips, increment, &dirty);
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2018-09-26 13:34:50 +00:00
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vmw_kms_helper_validation_finish(dev_priv, NULL, &val_ctx, out_fence,
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NULL);
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2015-06-26 08:23:42 +00:00
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2015-06-26 09:14:27 +00:00
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return ret;
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2015-06-26 08:23:42 +00:00
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2015-06-26 09:14:27 +00:00
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out_revert:
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2018-09-26 13:34:50 +00:00
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vmw_validation_revert(&val_ctx);
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out_unref:
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vmw_validation_unref_lists(&val_ctx);
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2015-06-26 08:23:42 +00:00
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2015-06-26 09:14:27 +00:00
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return ret;
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}
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2015-06-26 08:23:42 +00:00
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2015-06-26 09:14:27 +00:00
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/**
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* vmw_sou_readback_fifo_commit - Callback to submit a set of readback clips.
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*
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* @dirty: The closure structure.
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*
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* Commits a previously built command buffer of readback clips.
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*/
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static void vmw_sou_readback_fifo_commit(struct vmw_kms_dirty *dirty)
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{
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2016-02-12 07:26:37 +00:00
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if (!dirty->num_hits) {
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vmw_fifo_commit(dirty->dev_priv, 0);
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return;
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}
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2015-06-26 09:14:27 +00:00
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vmw_fifo_commit(dirty->dev_priv,
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sizeof(struct vmw_kms_sou_readback_blit) *
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dirty->num_hits);
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2012-02-09 15:56:45 +00:00
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}
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2015-06-26 08:23:42 +00:00
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2015-06-26 09:14:27 +00:00
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/**
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* vmw_sou_readback_clip - Callback to encode a readback cliprect.
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*
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* @dirty: The closure structure
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*
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* Encodes a BLIT_SCREEN_TO_GMRFB cliprect.
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*/
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static void vmw_sou_readback_clip(struct vmw_kms_dirty *dirty)
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{
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struct vmw_kms_sou_readback_blit *blit = dirty->cmd;
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blit += dirty->num_hits;
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blit->header = SVGA_CMD_BLIT_SCREEN_TO_GMRFB;
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blit->body.srcScreenId = dirty->unit->unit;
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blit->body.destOrigin.x = dirty->fb_x;
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blit->body.destOrigin.y = dirty->fb_y;
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blit->body.srcRect.left = dirty->unit_x1;
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blit->body.srcRect.top = dirty->unit_y1;
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blit->body.srcRect.right = dirty->unit_x2;
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blit->body.srcRect.bottom = dirty->unit_y2;
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dirty->num_hits++;
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}
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/**
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* vmw_kms_sou_readback - Perform a readback from the screen object system to
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2018-06-19 13:02:16 +00:00
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* a buffer-object backed framebuffer.
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2015-06-26 09:14:27 +00:00
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*
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* @dev_priv: Pointer to the device private structure.
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* @file_priv: Pointer to a struct drm_file identifying the caller.
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* Must be set to NULL if @user_fence_rep is NULL.
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2018-06-19 13:02:16 +00:00
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* @vfb: Pointer to the buffer-object backed framebuffer.
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2015-06-26 09:14:27 +00:00
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* @user_fence_rep: User-space provided structure for fence information.
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* Must be set to non-NULL if @file_priv is non-NULL.
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* @vclips: Array of clip rects.
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* @num_clips: Number of clip rects in @vclips.
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2018-01-16 07:24:17 +00:00
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* @crtc: If crtc is passed, readback on that crtc only.
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2015-06-26 09:14:27 +00:00
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*
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* Returns 0 on success, negative error code on failure. -ERESTARTSYS if
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* interrupted.
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*/
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int vmw_kms_sou_readback(struct vmw_private *dev_priv,
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struct drm_file *file_priv,
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struct vmw_framebuffer *vfb,
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struct drm_vmw_fence_rep __user *user_fence_rep,
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struct drm_vmw_rect *vclips,
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2018-01-16 07:24:17 +00:00
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uint32_t num_clips,
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struct drm_crtc *crtc)
|
2015-06-26 09:14:27 +00:00
|
|
|
{
|
2018-06-19 13:02:16 +00:00
|
|
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struct vmw_buffer_object *buf =
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container_of(vfb, struct vmw_framebuffer_bo, base)->buffer;
|
2015-06-26 09:14:27 +00:00
|
|
|
struct vmw_kms_dirty dirty;
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2018-09-26 13:34:50 +00:00
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DECLARE_VAL_CONTEXT(val_ctx, NULL, 0);
|
2015-06-26 09:14:27 +00:00
|
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int ret;
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|
2018-09-26 13:34:50 +00:00
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ret = vmw_validation_add_bo(&val_ctx, buf, false, false);
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2015-06-26 09:14:27 +00:00
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if (ret)
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return ret;
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|
2018-09-26 13:34:50 +00:00
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ret = vmw_validation_prepare(&val_ctx, NULL, true);
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if (ret)
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goto out_unref;
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2018-06-19 13:02:16 +00:00
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ret = do_bo_define_gmrfb(dev_priv, vfb);
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2015-06-26 09:14:27 +00:00
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if (unlikely(ret != 0))
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goto out_revert;
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2018-01-16 07:24:17 +00:00
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dirty.crtc = crtc;
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2015-06-26 09:14:27 +00:00
|
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dirty.fifo_commit = vmw_sou_readback_fifo_commit;
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dirty.clip = vmw_sou_readback_clip;
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dirty.fifo_reserve_size = sizeof(struct vmw_kms_sou_readback_blit) *
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num_clips;
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ret = vmw_kms_helper_dirty(dev_priv, vfb, NULL, vclips,
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0, 0, num_clips, 1, &dirty);
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2018-09-26 13:34:50 +00:00
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vmw_kms_helper_validation_finish(dev_priv, file_priv, &val_ctx, NULL,
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user_fence_rep);
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2015-06-26 09:14:27 +00:00
|
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return ret;
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out_revert:
|
2018-09-26 13:34:50 +00:00
|
|
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vmw_validation_revert(&val_ctx);
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out_unref:
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vmw_validation_unref_lists(&val_ctx);
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2015-06-26 09:14:27 +00:00
|
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return ret;
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|
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}
|