2010-05-01 04:33:38 +00:00
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/*
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2007-11-26 12:11:43 +00:00
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* Copyright (C) 2007 Google, Inc.
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2011-01-07 18:20:49 +00:00
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* Copyright (c) 2008-2011, Code Aurora Forum. All rights reserved.
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2007-11-26 12:11:43 +00:00
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* Author: Brian Swetland <swetland@google.com>
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*
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* This software is licensed under the terms of the GNU General Public
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* License version 2, as published by the Free Software Foundation, and
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* may be copied, distributed, and modified under those terms.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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*
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* The MSM peripherals are spread all over across 768MB of physical
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* space, which makes just having a simple IO_ADDRESS macro to slide
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* them into the right virtual location rough. Instead, we will
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* provide a master phys->virt mapping for peripherals here.
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*
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*/
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#ifndef __ASM_ARCH_MSM_IOMAP_H
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#define __ASM_ARCH_MSM_IOMAP_H
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#include <asm/sizes.h>
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/* Physical base address and size of peripherals.
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* Ordered by the virtual base addresses they will be mapped at.
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*
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* MSM_VIC_BASE must be an value that can be loaded via a "mov"
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* instruction, otherwise entry-macro.S will not compile.
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*
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* If you add or remove entries here, you'll want to edit the
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* msm_io_desc array in arch/arm/mach-msm/io.c to reflect your
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* changes.
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*
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*/
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2008-09-10 21:00:53 +00:00
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#ifdef __ASSEMBLY__
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#define IOMEM(x) x
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#else
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#define IOMEM(x) ((void __force __iomem *)(x))
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#endif
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2010-05-05 14:08:13 +00:00
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#if defined(CONFIG_ARCH_MSM7X30)
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#include "msm_iomap-7x30.h"
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#elif defined(CONFIG_ARCH_QSD8X50)
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2010-05-05 14:03:55 +00:00
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#include "msm_iomap-8x50.h"
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msm: add gpiomux api for gpio multiplex & configuration.
Add the 'gpiomux' api, which addresses the following shortcomings
of existing tlmm api:
- gpio power-collapse, which is managed by a peripheral processor on
other targets, must be managed by the application processor on the 8x60.
- The enable/disable flag of the legacy gpio_tlmm_config api
is not applicable on the 8x60, and causes confusion.
- The gpio 'direction' bits are meaningless for all func_sel
configurations except for generic-gpio mode (func_sel 0), in which
case the gpio_direction_* functions should be used. Having these
bits in the tlmm api leads to confusion and misuse of the gpiolib
api, and they have been removed in gpiomux.
- The functional api of the legacy system ran contrary to the typical
use-case, which is a single massive configuration at boot. Rather
than forcing hundreds of 'config' function calls, the new api
allows data to be configured with a single table.
gpiomux_get and gpiomux_put are meant to be called automatically
when gpio_request and gpio_free are called, giving automatic
gpiomux/tlmm control to those drivers/lines with simple
power profiles - in the simplest cases, an entry in the gpiomux table
and the correct usage of gpiolib is all that is required to get proper
gpio power control.
Signed-off-by: Gregory Bean <gbean@codeaurora.org>
Signed-off-by: Daniel Walker <dwalker@codeaurora.org>
2010-08-28 17:05:44 +00:00
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#elif defined(CONFIG_ARCH_MSM8X60)
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#include "msm_iomap-8x60.h"
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2010-05-05 14:03:55 +00:00
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#else
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2010-05-01 04:33:38 +00:00
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#include "msm_iomap-7x00.h"
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2010-05-05 14:03:55 +00:00
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#endif
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2010-01-29 19:43:42 +00:00
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2010-12-02 03:05:49 +00:00
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#include "msm_iomap-8960.h"
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2011-11-08 18:33:03 +00:00
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#define MSM_DEBUG_UART_SIZE SZ_4K
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#if defined(CONFIG_DEBUG_MSM_UART1)
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#define MSM_DEBUG_UART_BASE 0xE1000000
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#define MSM_DEBUG_UART_PHYS MSM_UART1_PHYS
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#elif defined(CONFIG_DEBUG_MSM_UART2)
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#define MSM_DEBUG_UART_BASE 0xE1000000
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#define MSM_DEBUG_UART_PHYS MSM_UART2_PHYS
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#elif defined(CONFIG_DEBUG_MSM_UART3)
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#define MSM_DEBUG_UART_BASE 0xE1000000
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#define MSM_DEBUG_UART_PHYS MSM_UART3_PHYS
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#endif
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2011-05-10 08:16:21 +00:00
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/* Virtual addresses shared across all MSM targets. */
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2011-01-07 18:20:49 +00:00
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#define MSM_CSR_BASE IOMEM(0xE0001000)
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2011-01-04 19:02:59 +00:00
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#define MSM_QGIC_DIST_BASE IOMEM(0xF0000000)
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#define MSM_QGIC_CPU_BASE IOMEM(0xF0001000)
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2011-01-07 18:20:49 +00:00
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#define MSM_TMR_BASE IOMEM(0xF0200000)
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#define MSM_TMR0_BASE IOMEM(0xF0201000)
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2011-05-12 07:54:36 +00:00
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#define MSM_GPIO1_BASE IOMEM(0xE0003000)
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#define MSM_GPIO2_BASE IOMEM(0xE0004000)
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2010-01-06 22:55:24 +00:00
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2007-11-26 12:11:43 +00:00
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#endif
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