2019-05-31 08:09:55 +00:00
|
|
|
// SPDX-License-Identifier: GPL-2.0-only
|
2005-04-16 22:20:36 +00:00
|
|
|
/* IEEE754 floating point arithmetic
|
|
|
|
* single precision
|
|
|
|
*/
|
|
|
|
/*
|
|
|
|
* MIPS floating point support
|
|
|
|
* Copyright (C) 1994-2000 Algorithmics Ltd.
|
|
|
|
*/
|
|
|
|
|
|
|
|
#include "ieee754sp.h"
|
|
|
|
|
2014-04-15 23:31:11 +00:00
|
|
|
union ieee754sp ieee754sp_flong(s64 x)
|
2005-04-16 22:20:36 +00:00
|
|
|
{
|
2006-05-31 16:00:03 +00:00
|
|
|
u64 xm; /* <--- need 64-bit mantissa temp */
|
|
|
|
int xe;
|
|
|
|
int xs;
|
2005-04-16 22:20:36 +00:00
|
|
|
|
2014-04-18 22:36:32 +00:00
|
|
|
ieee754_clearcx();
|
2005-04-16 22:20:36 +00:00
|
|
|
|
|
|
|
if (x == 0)
|
|
|
|
return ieee754sp_zero(0);
|
|
|
|
if (x == 1 || x == -1)
|
|
|
|
return ieee754sp_one(x < 0);
|
|
|
|
if (x == 10 || x == -10)
|
|
|
|
return ieee754sp_ten(x < 0);
|
|
|
|
|
|
|
|
xs = (x < 0);
|
|
|
|
if (xs) {
|
|
|
|
if (x == (1ULL << 63))
|
|
|
|
xm = (1ULL << 63); /* max neg can't be safely negated */
|
|
|
|
else
|
|
|
|
xm = -x;
|
|
|
|
} else {
|
|
|
|
xm = x;
|
|
|
|
}
|
2014-04-22 13:51:55 +00:00
|
|
|
xe = SP_FBITS + 3;
|
2005-04-16 22:20:36 +00:00
|
|
|
|
2014-04-22 13:51:55 +00:00
|
|
|
if (xm >> (SP_FBITS + 1 + 3)) {
|
2005-04-16 22:20:36 +00:00
|
|
|
/* shunt out overflow bits
|
|
|
|
*/
|
2014-04-22 13:51:55 +00:00
|
|
|
while (xm >> (SP_FBITS + 1 + 3)) {
|
2005-04-16 22:20:36 +00:00
|
|
|
SPXSRSX1();
|
|
|
|
}
|
|
|
|
} else {
|
|
|
|
/* normalize in grs extended single precision */
|
2014-04-22 13:51:55 +00:00
|
|
|
while ((xm >> (SP_FBITS + 3)) == 0) {
|
2005-04-16 22:20:36 +00:00
|
|
|
xm <<= 1;
|
|
|
|
xe--;
|
|
|
|
}
|
|
|
|
}
|
2014-04-25 01:19:57 +00:00
|
|
|
return ieee754sp_format(xs, xe, xm);
|
2005-04-16 22:20:36 +00:00
|
|
|
}
|