2019-05-19 12:08:55 +00:00
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// SPDX-License-Identifier: GPL-2.0-only
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2008-10-16 09:32:24 +00:00
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/*
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* Common interrupt code for 32 and 64 bit
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*/
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#include <linux/cpu.h>
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#include <linux/interrupt.h>
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#include <linux/kernel_stat.h>
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2010-11-12 05:45:26 +00:00
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#include <linux/of.h>
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2008-10-16 09:32:24 +00:00
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#include <linux/seq_file.h>
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2009-01-04 10:52:17 +00:00
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#include <linux/smp.h>
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2009-02-06 22:09:41 +00:00
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#include <linux/ftrace.h>
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2011-03-25 14:20:14 +00:00
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#include <linux/delay.h>
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2011-05-26 16:22:53 +00:00
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#include <linux/export.h>
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2018-07-29 10:15:33 +00:00
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#include <linux/irq.h>
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2008-10-16 09:32:24 +00:00
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2020-05-21 20:05:35 +00:00
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#include <asm/irq_stack.h>
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2009-02-17 12:58:15 +00:00
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#include <asm/apic.h>
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2008-10-16 09:32:24 +00:00
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#include <asm/io_apic.h>
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2008-12-23 14:15:17 +00:00
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#include <asm/irq.h>
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2009-05-27 19:56:52 +00:00
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#include <asm/mce.h>
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2009-04-10 18:33:10 +00:00
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#include <asm/hw_irq.h>
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2014-05-13 15:39:34 +00:00
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#include <asm/desc.h>
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2020-05-21 20:05:37 +00:00
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#include <asm/traps.h>
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2013-06-21 14:29:05 +00:00
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#define CREATE_TRACE_POINTS
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x86, trace: Add irq vector tracepoints
[Purpose of this patch]
As Vaibhav explained in the thread below, tracepoints for irq vectors
are useful.
http://www.spinics.net/lists/mm-commits/msg85707.html
<snip>
The current interrupt traces from irq_handler_entry and irq_handler_exit
provide when an interrupt is handled. They provide good data about when
the system has switched to kernel space and how it affects the currently
running processes.
There are some IRQ vectors which trigger the system into kernel space,
which are not handled in generic IRQ handlers. Tracing such events gives
us the information about IRQ interaction with other system events.
The trace also tells where the system is spending its time. We want to
know which cores are handling interrupts and how they are affecting other
processes in the system. Also, the trace provides information about when
the cores are idle and which interrupts are changing that state.
<snip>
On the other hand, my usecase is tracing just local timer event and
getting a value of instruction pointer.
I suggested to add an argument local timer event to get instruction pointer before.
But there is another way to get it with external module like systemtap.
So, I don't need to add any argument to irq vector tracepoints now.
[Patch Description]
Vaibhav's patch shared a trace point ,irq_vector_entry/irq_vector_exit, in all events.
But there is an above use case to trace specific irq_vector rather than tracing all events.
In this case, we are concerned about overhead due to unwanted events.
So, add following tracepoints instead of introducing irq_vector_entry/exit.
so that we can enable them independently.
- local_timer_vector
- reschedule_vector
- call_function_vector
- call_function_single_vector
- irq_work_entry_vector
- error_apic_vector
- thermal_apic_vector
- threshold_apic_vector
- spurious_apic_vector
- x86_platform_ipi_vector
Also, introduce a logic switching IDT at enabling/disabling time so that a time penalty
makes a zero when tracepoints are disabled. Detailed explanations are as follows.
- Create trace irq handlers with entering_irq()/exiting_irq().
- Create a new IDT, trace_idt_table, at boot time by adding a logic to
_set_gate(). It is just a copy of original idt table.
- Register the new handlers for tracpoints to the new IDT by introducing
macros to alloc_intr_gate() called at registering time of irq_vector handlers.
- Add checking, whether irq vector tracing is on/off, into load_current_idt().
This has to be done below debug checking for these reasons.
- Switching to debug IDT may be kicked while tracing is enabled.
- On the other hands, switching to trace IDT is kicked only when debugging
is disabled.
In addition, the new IDT is created only when CONFIG_TRACING is enabled to avoid being
used for other purposes.
Signed-off-by: Seiji Aguchi <seiji.aguchi@hds.com>
Link: http://lkml.kernel.org/r/51C323ED.5050708@hds.com
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
Cc: Steven Rostedt <rostedt@goodmis.org>
2013-06-20 15:46:53 +00:00
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#include <asm/trace/irq_vectors.h>
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2008-10-16 09:32:24 +00:00
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2015-05-09 15:36:50 +00:00
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DEFINE_PER_CPU_SHARED_ALIGNED(irq_cpustat_t, irq_stat);
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EXPORT_PER_CPU_SYMBOL(irq_stat);
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2008-10-16 09:32:24 +00:00
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atomic_t irq_err_count;
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2008-10-16 10:18:50 +00:00
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/*
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* 'what should we do if we get a hw irq event on an illegal vector'.
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* each architecture has to answer this themselves.
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*/
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void ack_bad_irq(unsigned int irq)
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{
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2009-04-12 16:47:39 +00:00
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if (printk_ratelimit())
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pr_err("unexpected IRQ trap at vector %02x\n", irq);
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2008-10-16 10:18:50 +00:00
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/*
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* Currently unexpected vectors happen only on SMP and APIC.
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* We _must_ ack these because every local APIC has only N
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* irq slots per priority level, and a 'hanging, unacked' IRQ
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* holds up an irq slot - in excessive cases (when multiple
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* unexpected vectors occur) that might lock up the APIC
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* completely.
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* But only ack when the APIC is enabled -AK
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*/
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2009-04-12 16:47:41 +00:00
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ack_APIC_irq();
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2008-10-16 10:18:50 +00:00
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}
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2009-01-18 15:38:57 +00:00
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#define irq_stats(x) (&per_cpu(irq_stat, x))
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2008-10-16 09:32:24 +00:00
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/*
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2010-12-16 16:59:57 +00:00
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* /proc/interrupts printing for arch specific interrupts
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2008-10-16 09:32:24 +00:00
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*/
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2010-12-16 16:59:57 +00:00
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int arch_show_interrupts(struct seq_file *p, int prec)
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2008-10-16 09:32:24 +00:00
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{
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int j;
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2009-03-12 12:45:15 +00:00
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seq_printf(p, "%*s: ", prec, "NMI");
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2008-10-16 09:32:24 +00:00
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for_each_online_cpu(j)
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seq_printf(p, "%10u ", irq_stats(j)->__nmi_count);
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2014-11-28 21:03:41 +00:00
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seq_puts(p, " Non-maskable interrupts\n");
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2008-10-16 09:32:24 +00:00
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#ifdef CONFIG_X86_LOCAL_APIC
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2009-03-12 12:45:15 +00:00
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seq_printf(p, "%*s: ", prec, "LOC");
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2008-10-16 09:32:24 +00:00
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for_each_online_cpu(j)
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seq_printf(p, "%10u ", irq_stats(j)->apic_timer_irqs);
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2014-11-28 21:03:41 +00:00
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seq_puts(p, " Local timer interrupts\n");
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2009-03-22 20:38:34 +00:00
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seq_printf(p, "%*s: ", prec, "SPU");
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for_each_online_cpu(j)
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seq_printf(p, "%10u ", irq_stats(j)->irq_spurious_count);
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2014-11-28 21:03:41 +00:00
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seq_puts(p, " Spurious interrupts\n");
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2009-10-14 10:50:39 +00:00
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seq_printf(p, "%*s: ", prec, "PMI");
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2008-12-03 09:39:53 +00:00
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for_each_online_cpu(j)
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seq_printf(p, "%10u ", irq_stats(j)->apic_perf_irqs);
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2014-11-28 21:03:41 +00:00
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seq_puts(p, " Performance monitoring interrupts\n");
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2010-10-14 06:01:34 +00:00
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seq_printf(p, "%*s: ", prec, "IWI");
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2009-04-06 09:45:03 +00:00
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for_each_online_cpu(j)
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2010-10-14 06:01:34 +00:00
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seq_printf(p, "%10u ", irq_stats(j)->apic_irq_work_irqs);
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2014-11-28 21:03:41 +00:00
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seq_puts(p, " IRQ work interrupts\n");
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2011-12-13 02:51:53 +00:00
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seq_printf(p, "%*s: ", prec, "RTR");
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for_each_online_cpu(j)
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2011-12-15 02:32:24 +00:00
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seq_printf(p, "%10u ", irq_stats(j)->icr_read_retry_count);
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2014-11-28 21:03:41 +00:00
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seq_puts(p, " APIC ICR read retries\n");
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2009-10-14 14:22:57 +00:00
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if (x86_platform_ipi_callback) {
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2009-03-25 01:50:34 +00:00
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seq_printf(p, "%*s: ", prec, "PLT");
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2009-03-04 18:56:05 +00:00
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for_each_online_cpu(j)
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2009-10-14 14:22:57 +00:00
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seq_printf(p, "%10u ", irq_stats(j)->x86_platform_ipis);
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2014-11-28 21:03:41 +00:00
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seq_puts(p, " Platform interrupts\n");
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2009-03-04 18:56:05 +00:00
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}
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2017-08-28 06:47:34 +00:00
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#endif
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2008-10-16 09:32:24 +00:00
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#ifdef CONFIG_SMP
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2009-03-12 12:45:15 +00:00
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seq_printf(p, "%*s: ", prec, "RES");
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2008-10-16 09:32:24 +00:00
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for_each_online_cpu(j)
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seq_printf(p, "%10u ", irq_stats(j)->irq_resched_count);
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2014-11-28 21:03:41 +00:00
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seq_puts(p, " Rescheduling interrupts\n");
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2009-03-12 12:45:15 +00:00
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seq_printf(p, "%*s: ", prec, "CAL");
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2008-10-16 09:32:24 +00:00
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for_each_online_cpu(j)
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2016-08-11 07:44:30 +00:00
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seq_printf(p, "%10u ", irq_stats(j)->irq_call_count);
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2014-11-28 21:03:41 +00:00
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seq_puts(p, " Function call interrupts\n");
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2009-03-12 12:45:15 +00:00
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seq_printf(p, "%*s: ", prec, "TLB");
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2008-10-16 09:32:24 +00:00
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for_each_online_cpu(j)
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seq_printf(p, "%10u ", irq_stats(j)->irq_tlb_count);
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2014-11-28 21:03:41 +00:00
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seq_puts(p, " TLB shootdowns\n");
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2008-10-16 09:32:24 +00:00
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#endif
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2009-11-20 14:03:05 +00:00
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#ifdef CONFIG_X86_THERMAL_VECTOR
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2009-03-12 12:45:15 +00:00
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seq_printf(p, "%*s: ", prec, "TRM");
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2008-10-16 09:32:24 +00:00
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for_each_online_cpu(j)
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seq_printf(p, "%10u ", irq_stats(j)->irq_thermal_count);
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2014-11-28 21:03:41 +00:00
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seq_puts(p, " Thermal event interrupts\n");
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2009-11-20 14:03:05 +00:00
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#endif
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#ifdef CONFIG_X86_MCE_THRESHOLD
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2009-03-12 12:45:15 +00:00
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seq_printf(p, "%*s: ", prec, "THR");
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2008-10-16 09:32:24 +00:00
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for_each_online_cpu(j)
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seq_printf(p, "%10u ", irq_stats(j)->irq_threshold_count);
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2014-11-28 21:03:41 +00:00
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seq_puts(p, " Threshold APIC interrupts\n");
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2009-05-27 19:56:52 +00:00
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#endif
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2015-05-06 11:58:56 +00:00
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#ifdef CONFIG_X86_MCE_AMD
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seq_printf(p, "%*s: ", prec, "DFR");
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for_each_online_cpu(j)
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seq_printf(p, "%10u ", irq_stats(j)->irq_deferred_error_count);
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seq_puts(p, " Deferred Error APIC interrupts\n");
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#endif
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2009-07-08 22:31:41 +00:00
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#ifdef CONFIG_X86_MCE
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2009-05-27 19:56:52 +00:00
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seq_printf(p, "%*s: ", prec, "MCE");
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for_each_online_cpu(j)
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seq_printf(p, "%10u ", per_cpu(mce_exception_count, j));
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2014-11-28 21:03:41 +00:00
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seq_puts(p, " Machine check exceptions\n");
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2009-05-27 19:56:57 +00:00
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seq_printf(p, "%*s: ", prec, "MCP");
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for_each_online_cpu(j)
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seq_printf(p, "%10u ", per_cpu(mce_poll_count, j));
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2014-11-28 21:03:41 +00:00
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seq_puts(p, " Machine check polls\n");
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2008-10-16 09:32:24 +00:00
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#endif
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2019-04-30 03:45:23 +00:00
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#ifdef CONFIG_X86_HV_CALLBACK_VECTOR
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2017-09-13 21:29:26 +00:00
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if (test_bit(HYPERVISOR_CALLBACK_VECTOR, system_vectors)) {
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2015-07-07 16:26:13 +00:00
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seq_printf(p, "%*s: ", prec, "HYP");
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for_each_online_cpu(j)
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seq_printf(p, "%10u ",
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irq_stats(j)->irq_hv_callback_count);
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seq_puts(p, " Hypervisor callback interrupts\n");
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}
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2018-01-24 13:23:35 +00:00
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#endif
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#if IS_ENABLED(CONFIG_HYPERV)
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if (test_bit(HYPERV_REENLIGHTENMENT_VECTOR, system_vectors)) {
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seq_printf(p, "%*s: ", prec, "HRE");
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for_each_online_cpu(j)
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seq_printf(p, "%10u ",
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irq_stats(j)->irq_hv_reenlightenment_count);
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seq_puts(p, " Hyper-V reenlightenment interrupts\n");
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}
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2018-03-05 05:17:18 +00:00
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if (test_bit(HYPERV_STIMER0_VECTOR, system_vectors)) {
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seq_printf(p, "%*s: ", prec, "HVS");
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for_each_online_cpu(j)
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seq_printf(p, "%10u ",
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irq_stats(j)->hyperv_stimer0_count);
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seq_puts(p, " Hyper-V stimer0 interrupts\n");
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}
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2014-02-23 21:40:20 +00:00
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#endif
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2009-03-12 12:45:15 +00:00
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seq_printf(p, "%*s: %10u\n", prec, "ERR", atomic_read(&irq_err_count));
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2008-10-16 09:32:24 +00:00
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#if defined(CONFIG_X86_IO_APIC)
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2009-03-12 12:45:15 +00:00
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seq_printf(p, "%*s: %10u\n", prec, "MIS", atomic_read(&irq_mis_count));
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2015-05-19 09:07:17 +00:00
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#endif
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#ifdef CONFIG_HAVE_KVM
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seq_printf(p, "%*s: ", prec, "PIN");
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for_each_online_cpu(j)
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seq_printf(p, "%10u ", irq_stats(j)->kvm_posted_intr_ipis);
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seq_puts(p, " Posted-interrupt notification event\n");
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2017-04-28 05:13:58 +00:00
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seq_printf(p, "%*s: ", prec, "NPI");
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for_each_online_cpu(j)
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seq_printf(p, "%10u ",
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irq_stats(j)->kvm_posted_intr_nested_ipis);
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seq_puts(p, " Nested posted-interrupt event\n");
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2015-05-19 09:07:17 +00:00
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seq_printf(p, "%*s: ", prec, "PIW");
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for_each_online_cpu(j)
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seq_printf(p, "%10u ",
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irq_stats(j)->kvm_posted_intr_wakeup_ipis);
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seq_puts(p, " Posted-interrupt wakeup event\n");
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2008-10-16 09:32:24 +00:00
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#endif
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return 0;
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}
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/*
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* /proc/stat helpers
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*/
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u64 arch_irq_stat_cpu(unsigned int cpu)
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{
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u64 sum = irq_stats(cpu)->__nmi_count;
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#ifdef CONFIG_X86_LOCAL_APIC
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sum += irq_stats(cpu)->apic_timer_irqs;
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2009-03-22 20:38:34 +00:00
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sum += irq_stats(cpu)->irq_spurious_count;
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2008-12-03 09:39:53 +00:00
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sum += irq_stats(cpu)->apic_perf_irqs;
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2010-10-14 06:01:34 +00:00
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sum += irq_stats(cpu)->apic_irq_work_irqs;
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2011-12-15 02:32:24 +00:00
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sum += irq_stats(cpu)->icr_read_retry_count;
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2009-10-14 14:22:57 +00:00
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if (x86_platform_ipi_callback)
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sum += irq_stats(cpu)->x86_platform_ipis;
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2017-08-28 06:47:34 +00:00
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#endif
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2008-10-16 09:32:24 +00:00
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#ifdef CONFIG_SMP
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sum += irq_stats(cpu)->irq_resched_count;
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sum += irq_stats(cpu)->irq_call_count;
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#endif
|
2009-11-20 14:03:05 +00:00
|
|
|
#ifdef CONFIG_X86_THERMAL_VECTOR
|
2008-10-16 09:32:24 +00:00
|
|
|
sum += irq_stats(cpu)->irq_thermal_count;
|
2009-11-20 14:03:05 +00:00
|
|
|
#endif
|
|
|
|
|
#ifdef CONFIG_X86_MCE_THRESHOLD
|
2008-10-16 09:32:24 +00:00
|
|
|
sum += irq_stats(cpu)->irq_threshold_count;
|
2009-06-02 07:53:23 +00:00
|
|
|
#endif
|
2009-07-08 22:31:41 +00:00
|
|
|
#ifdef CONFIG_X86_MCE
|
2009-06-02 07:53:23 +00:00
|
|
|
sum += per_cpu(mce_exception_count, cpu);
|
|
|
|
|
sum += per_cpu(mce_poll_count, cpu);
|
2008-10-16 09:32:24 +00:00
|
|
|
#endif
|
|
|
|
|
return sum;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
u64 arch_irq_stat(void)
|
|
|
|
|
{
|
|
|
|
|
u64 sum = atomic_read(&irq_err_count);
|
|
|
|
|
return sum;
|
|
|
|
|
}
|
2008-12-23 14:15:17 +00:00
|
|
|
|
2020-05-21 20:05:35 +00:00
|
|
|
static __always_inline void handle_irq(struct irq_desc *desc,
|
|
|
|
|
struct pt_regs *regs)
|
|
|
|
|
{
|
|
|
|
|
if (IS_ENABLED(CONFIG_X86_64))
|
|
|
|
|
run_on_irqstack_cond(desc->handle_irq, desc, regs);
|
|
|
|
|
else
|
|
|
|
|
__handle_irq(desc, regs);
|
|
|
|
|
}
|
2009-02-06 22:09:41 +00:00
|
|
|
|
|
|
|
|
/*
|
2020-05-21 20:05:37 +00:00
|
|
|
* common_interrupt() handles all normal device IRQ's (the special SMP
|
|
|
|
|
* cross-CPU interrupts have their own entry points).
|
2009-02-06 22:09:41 +00:00
|
|
|
*/
|
2020-05-21 20:05:37 +00:00
|
|
|
DEFINE_IDTENTRY_IRQ(common_interrupt)
|
2009-02-06 22:09:41 +00:00
|
|
|
{
|
|
|
|
|
struct pt_regs *old_regs = set_irq_regs(regs);
|
2020-05-21 20:05:34 +00:00
|
|
|
struct irq_desc *desc;
|
2009-02-06 22:09:41 +00:00
|
|
|
|
2020-05-21 20:05:37 +00:00
|
|
|
/* entry code tells RCU that we're not quiescent. Check it. */
|
2015-09-01 15:40:25 +00:00
|
|
|
RCU_LOCKDEP_WARN(!rcu_is_watching(), "IRQ failed to wake up RCU");
|
2015-07-03 19:44:34 +00:00
|
|
|
|
2015-08-02 20:38:27 +00:00
|
|
|
desc = __this_cpu_read(vector_irq[vector]);
|
2019-08-19 19:36:09 +00:00
|
|
|
if (likely(!IS_ERR_OR_NULL(desc))) {
|
2020-05-21 20:05:37 +00:00
|
|
|
handle_irq(desc, regs);
|
2019-08-19 19:36:09 +00:00
|
|
|
} else {
|
2009-04-12 16:47:41 +00:00
|
|
|
ack_APIC_irq();
|
2009-02-06 22:09:41 +00:00
|
|
|
|
2019-08-19 19:36:39 +00:00
|
|
|
if (desc == VECTOR_UNUSED) {
|
2020-05-21 20:05:37 +00:00
|
|
|
pr_emerg_ratelimited("%s: %d.%u No irq handler for vector\n",
|
2014-01-05 16:10:52 +00:00
|
|
|
__func__, smp_processor_id(),
|
2015-08-02 20:38:27 +00:00
|
|
|
vector);
|
2014-01-05 16:10:52 +00:00
|
|
|
} else {
|
2015-08-02 20:38:25 +00:00
|
|
|
__this_cpu_write(vector_irq[vector], VECTOR_UNUSED);
|
2014-01-05 16:10:52 +00:00
|
|
|
}
|
2009-02-06 22:09:41 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
set_irq_regs(old_regs);
|
|
|
|
|
}
|
|
|
|
|
|
2017-08-28 06:47:34 +00:00
|
|
|
#ifdef CONFIG_X86_LOCAL_APIC
|
|
|
|
|
/* Function pointer for generic interrupt vector handling */
|
|
|
|
|
void (*x86_platform_ipi_callback)(void) = NULL;
|
2009-03-04 18:56:05 +00:00
|
|
|
/*
|
2009-10-14 14:22:57 +00:00
|
|
|
* Handler for X86_PLATFORM_IPI_VECTOR.
|
2009-03-04 18:56:05 +00:00
|
|
|
*/
|
2017-01-04 11:20:33 +00:00
|
|
|
__visible void __irq_entry smp_x86_platform_ipi(struct pt_regs *regs)
|
x86, trace: Introduce entering/exiting_irq()
When implementing tracepoints in interrupt handers, if the tracepoints are
simply added in the performance sensitive path of interrupt handers,
it may cause potential performance problem due to the time penalty.
To solve the problem, an idea is to prepare non-trace/trace irq handers and
switch their IDTs at the enabling/disabling time.
So, let's introduce entering_irq()/exiting_irq() for pre/post-
processing of each irq handler.
A way to use them is as follows.
Non-trace irq handler:
smp_irq_handler()
{
entering_irq(); /* pre-processing of this handler */
__smp_irq_handler(); /*
* common logic between non-trace and trace handlers
* in a vector.
*/
exiting_irq(); /* post-processing of this handler */
}
Trace irq_handler:
smp_trace_irq_handler()
{
entering_irq(); /* pre-processing of this handler */
trace_irq_entry(); /* tracepoint for irq entry */
__smp_irq_handler(); /*
* common logic between non-trace and trace handlers
* in a vector.
*/
trace_irq_exit(); /* tracepoint for irq exit */
exiting_irq(); /* post-processing of this handler */
}
If tracepoints can place outside entering_irq()/exiting_irq() as follows,
it looks cleaner.
smp_trace_irq_handler()
{
trace_irq_entry();
smp_irq_handler();
trace_irq_exit();
}
But it doesn't work.
The problem is with irq_enter/exit() being called. They must be called before
trace_irq_enter/exit(), because of the rcu_irq_enter() must be called before
any tracepoints are used, as tracepoints use rcu to synchronize.
As a possible alternative, we may be able to call irq_enter() first as follows
if irq_enter() can nest.
smp_trace_irq_hander()
{
irq_entry();
trace_irq_entry();
smp_irq_handler();
trace_irq_exit();
irq_exit();
}
But it doesn't work, either.
If irq_enter() is nested, it may have a time penalty because it has to check if it
was already called or not. The time penalty is not desired in performance sensitive
paths even if it is tiny.
Signed-off-by: Seiji Aguchi <seiji.aguchi@hds.com>
Link: http://lkml.kernel.org/r/51C3238D.9040706@hds.com
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
Cc: Steven Rostedt <rostedt@goodmis.org>
2013-06-20 15:45:17 +00:00
|
|
|
{
|
|
|
|
|
struct pt_regs *old_regs = set_irq_regs(regs);
|
2009-03-04 18:56:05 +00:00
|
|
|
|
x86, trace: Introduce entering/exiting_irq()
When implementing tracepoints in interrupt handers, if the tracepoints are
simply added in the performance sensitive path of interrupt handers,
it may cause potential performance problem due to the time penalty.
To solve the problem, an idea is to prepare non-trace/trace irq handers and
switch their IDTs at the enabling/disabling time.
So, let's introduce entering_irq()/exiting_irq() for pre/post-
processing of each irq handler.
A way to use them is as follows.
Non-trace irq handler:
smp_irq_handler()
{
entering_irq(); /* pre-processing of this handler */
__smp_irq_handler(); /*
* common logic between non-trace and trace handlers
* in a vector.
*/
exiting_irq(); /* post-processing of this handler */
}
Trace irq_handler:
smp_trace_irq_handler()
{
entering_irq(); /* pre-processing of this handler */
trace_irq_entry(); /* tracepoint for irq entry */
__smp_irq_handler(); /*
* common logic between non-trace and trace handlers
* in a vector.
*/
trace_irq_exit(); /* tracepoint for irq exit */
exiting_irq(); /* post-processing of this handler */
}
If tracepoints can place outside entering_irq()/exiting_irq() as follows,
it looks cleaner.
smp_trace_irq_handler()
{
trace_irq_entry();
smp_irq_handler();
trace_irq_exit();
}
But it doesn't work.
The problem is with irq_enter/exit() being called. They must be called before
trace_irq_enter/exit(), because of the rcu_irq_enter() must be called before
any tracepoints are used, as tracepoints use rcu to synchronize.
As a possible alternative, we may be able to call irq_enter() first as follows
if irq_enter() can nest.
smp_trace_irq_hander()
{
irq_entry();
trace_irq_entry();
smp_irq_handler();
trace_irq_exit();
irq_exit();
}
But it doesn't work, either.
If irq_enter() is nested, it may have a time penalty because it has to check if it
was already called or not. The time penalty is not desired in performance sensitive
paths even if it is tiny.
Signed-off-by: Seiji Aguchi <seiji.aguchi@hds.com>
Link: http://lkml.kernel.org/r/51C3238D.9040706@hds.com
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
Cc: Steven Rostedt <rostedt@goodmis.org>
2013-06-20 15:45:17 +00:00
|
|
|
entering_ack_irq();
|
2017-08-28 06:47:25 +00:00
|
|
|
trace_x86_platform_ipi_entry(X86_PLATFORM_IPI_VECTOR);
|
|
|
|
|
inc_irq_stat(x86_platform_ipis);
|
|
|
|
|
if (x86_platform_ipi_callback)
|
|
|
|
|
x86_platform_ipi_callback();
|
|
|
|
|
trace_x86_platform_ipi_exit(X86_PLATFORM_IPI_VECTOR);
|
x86, trace: Introduce entering/exiting_irq()
When implementing tracepoints in interrupt handers, if the tracepoints are
simply added in the performance sensitive path of interrupt handers,
it may cause potential performance problem due to the time penalty.
To solve the problem, an idea is to prepare non-trace/trace irq handers and
switch their IDTs at the enabling/disabling time.
So, let's introduce entering_irq()/exiting_irq() for pre/post-
processing of each irq handler.
A way to use them is as follows.
Non-trace irq handler:
smp_irq_handler()
{
entering_irq(); /* pre-processing of this handler */
__smp_irq_handler(); /*
* common logic between non-trace and trace handlers
* in a vector.
*/
exiting_irq(); /* post-processing of this handler */
}
Trace irq_handler:
smp_trace_irq_handler()
{
entering_irq(); /* pre-processing of this handler */
trace_irq_entry(); /* tracepoint for irq entry */
__smp_irq_handler(); /*
* common logic between non-trace and trace handlers
* in a vector.
*/
trace_irq_exit(); /* tracepoint for irq exit */
exiting_irq(); /* post-processing of this handler */
}
If tracepoints can place outside entering_irq()/exiting_irq() as follows,
it looks cleaner.
smp_trace_irq_handler()
{
trace_irq_entry();
smp_irq_handler();
trace_irq_exit();
}
But it doesn't work.
The problem is with irq_enter/exit() being called. They must be called before
trace_irq_enter/exit(), because of the rcu_irq_enter() must be called before
any tracepoints are used, as tracepoints use rcu to synchronize.
As a possible alternative, we may be able to call irq_enter() first as follows
if irq_enter() can nest.
smp_trace_irq_hander()
{
irq_entry();
trace_irq_entry();
smp_irq_handler();
trace_irq_exit();
irq_exit();
}
But it doesn't work, either.
If irq_enter() is nested, it may have a time penalty because it has to check if it
was already called or not. The time penalty is not desired in performance sensitive
paths even if it is tiny.
Signed-off-by: Seiji Aguchi <seiji.aguchi@hds.com>
Link: http://lkml.kernel.org/r/51C3238D.9040706@hds.com
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
Cc: Steven Rostedt <rostedt@goodmis.org>
2013-06-20 15:45:17 +00:00
|
|
|
exiting_irq();
|
2009-03-04 18:56:05 +00:00
|
|
|
set_irq_regs(old_regs);
|
|
|
|
|
}
|
2017-08-28 06:47:34 +00:00
|
|
|
#endif
|
2009-03-04 18:56:05 +00:00
|
|
|
|
2013-04-11 11:25:11 +00:00
|
|
|
#ifdef CONFIG_HAVE_KVM
|
2015-05-19 09:07:16 +00:00
|
|
|
static void dummy_handler(void) {}
|
|
|
|
|
static void (*kvm_posted_intr_wakeup_handler)(void) = dummy_handler;
|
|
|
|
|
|
|
|
|
|
void kvm_set_posted_intr_wakeup_handler(void (*handler)(void))
|
|
|
|
|
{
|
|
|
|
|
if (handler)
|
|
|
|
|
kvm_posted_intr_wakeup_handler = handler;
|
|
|
|
|
else
|
|
|
|
|
kvm_posted_intr_wakeup_handler = dummy_handler;
|
|
|
|
|
}
|
|
|
|
|
EXPORT_SYMBOL_GPL(kvm_set_posted_intr_wakeup_handler);
|
|
|
|
|
|
2013-04-11 11:25:11 +00:00
|
|
|
/*
|
|
|
|
|
* Handler for POSTED_INTERRUPT_VECTOR.
|
|
|
|
|
*/
|
2013-08-05 22:02:37 +00:00
|
|
|
__visible void smp_kvm_posted_intr_ipi(struct pt_regs *regs)
|
2013-04-11 11:25:11 +00:00
|
|
|
{
|
|
|
|
|
struct pt_regs *old_regs = set_irq_regs(regs);
|
|
|
|
|
|
2015-05-15 13:48:25 +00:00
|
|
|
entering_ack_irq();
|
2013-04-11 11:25:11 +00:00
|
|
|
inc_irq_stat(kvm_posted_intr_ipis);
|
2015-05-19 09:07:16 +00:00
|
|
|
exiting_irq();
|
|
|
|
|
set_irq_regs(old_regs);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/*
|
|
|
|
|
* Handler for POSTED_INTERRUPT_WAKEUP_VECTOR.
|
|
|
|
|
*/
|
|
|
|
|
__visible void smp_kvm_posted_intr_wakeup_ipi(struct pt_regs *regs)
|
|
|
|
|
{
|
|
|
|
|
struct pt_regs *old_regs = set_irq_regs(regs);
|
|
|
|
|
|
|
|
|
|
entering_ack_irq();
|
|
|
|
|
inc_irq_stat(kvm_posted_intr_wakeup_ipis);
|
|
|
|
|
kvm_posted_intr_wakeup_handler();
|
2015-05-15 13:48:25 +00:00
|
|
|
exiting_irq();
|
2013-04-11 11:25:11 +00:00
|
|
|
set_irq_regs(old_regs);
|
|
|
|
|
}
|
2017-04-28 05:13:58 +00:00
|
|
|
|
|
|
|
|
/*
|
|
|
|
|
* Handler for POSTED_INTERRUPT_NESTED_VECTOR.
|
|
|
|
|
*/
|
|
|
|
|
__visible void smp_kvm_posted_intr_nested_ipi(struct pt_regs *regs)
|
|
|
|
|
{
|
|
|
|
|
struct pt_regs *old_regs = set_irq_regs(regs);
|
|
|
|
|
|
|
|
|
|
entering_ack_irq();
|
|
|
|
|
inc_irq_stat(kvm_posted_intr_nested_ipis);
|
|
|
|
|
exiting_irq();
|
|
|
|
|
set_irq_regs(old_regs);
|
|
|
|
|
}
|
2013-04-11 11:25:11 +00:00
|
|
|
#endif
|
|
|
|
|
|
x86, trace: Add irq vector tracepoints
[Purpose of this patch]
As Vaibhav explained in the thread below, tracepoints for irq vectors
are useful.
http://www.spinics.net/lists/mm-commits/msg85707.html
<snip>
The current interrupt traces from irq_handler_entry and irq_handler_exit
provide when an interrupt is handled. They provide good data about when
the system has switched to kernel space and how it affects the currently
running processes.
There are some IRQ vectors which trigger the system into kernel space,
which are not handled in generic IRQ handlers. Tracing such events gives
us the information about IRQ interaction with other system events.
The trace also tells where the system is spending its time. We want to
know which cores are handling interrupts and how they are affecting other
processes in the system. Also, the trace provides information about when
the cores are idle and which interrupts are changing that state.
<snip>
On the other hand, my usecase is tracing just local timer event and
getting a value of instruction pointer.
I suggested to add an argument local timer event to get instruction pointer before.
But there is another way to get it with external module like systemtap.
So, I don't need to add any argument to irq vector tracepoints now.
[Patch Description]
Vaibhav's patch shared a trace point ,irq_vector_entry/irq_vector_exit, in all events.
But there is an above use case to trace specific irq_vector rather than tracing all events.
In this case, we are concerned about overhead due to unwanted events.
So, add following tracepoints instead of introducing irq_vector_entry/exit.
so that we can enable them independently.
- local_timer_vector
- reschedule_vector
- call_function_vector
- call_function_single_vector
- irq_work_entry_vector
- error_apic_vector
- thermal_apic_vector
- threshold_apic_vector
- spurious_apic_vector
- x86_platform_ipi_vector
Also, introduce a logic switching IDT at enabling/disabling time so that a time penalty
makes a zero when tracepoints are disabled. Detailed explanations are as follows.
- Create trace irq handlers with entering_irq()/exiting_irq().
- Create a new IDT, trace_idt_table, at boot time by adding a logic to
_set_gate(). It is just a copy of original idt table.
- Register the new handlers for tracpoints to the new IDT by introducing
macros to alloc_intr_gate() called at registering time of irq_vector handlers.
- Add checking, whether irq vector tracing is on/off, into load_current_idt().
This has to be done below debug checking for these reasons.
- Switching to debug IDT may be kicked while tracing is enabled.
- On the other hands, switching to trace IDT is kicked only when debugging
is disabled.
In addition, the new IDT is created only when CONFIG_TRACING is enabled to avoid being
used for other purposes.
Signed-off-by: Seiji Aguchi <seiji.aguchi@hds.com>
Link: http://lkml.kernel.org/r/51C323ED.5050708@hds.com
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
Cc: Steven Rostedt <rostedt@goodmis.org>
2013-06-20 15:46:53 +00:00
|
|
|
|
2009-10-26 22:24:31 +00:00
|
|
|
#ifdef CONFIG_HOTPLUG_CPU
|
|
|
|
|
/* A cpu has been removed from cpu_online_mask. Reset irq affinities. */
|
|
|
|
|
void fixup_irqs(void)
|
|
|
|
|
{
|
2017-06-19 23:37:33 +00:00
|
|
|
unsigned int irr, vector;
|
2009-10-26 22:24:31 +00:00
|
|
|
struct irq_desc *desc;
|
2010-10-08 18:24:58 +00:00
|
|
|
struct irq_data *data;
|
2011-02-10 20:40:36 +00:00
|
|
|
struct irq_chip *chip;
|
2009-10-26 22:24:31 +00:00
|
|
|
|
2017-06-19 23:37:33 +00:00
|
|
|
irq_migrate_all_off_this_cpu();
|
2009-10-26 22:24:31 +00:00
|
|
|
|
2009-10-26 22:24:36 +00:00
|
|
|
/*
|
|
|
|
|
* We can remove mdelay() and then send spuriuous interrupts to
|
|
|
|
|
* new cpu targets for all the irqs that were handled previously by
|
|
|
|
|
* this cpu. While it works, I have seen spurious interrupt messages
|
|
|
|
|
* (nothing wrong but still...).
|
|
|
|
|
*
|
|
|
|
|
* So for now, retain mdelay(1) and check the IRR and then send those
|
|
|
|
|
* interrupts to new targets as this cpu is already offlined...
|
|
|
|
|
*/
|
2009-10-26 22:24:31 +00:00
|
|
|
mdelay(1);
|
2009-10-26 22:24:36 +00:00
|
|
|
|
2015-07-05 17:12:35 +00:00
|
|
|
/*
|
|
|
|
|
* We can walk the vector array of this cpu without holding
|
|
|
|
|
* vector_lock because the cpu is already marked !online, so
|
|
|
|
|
* nothing else will touch it.
|
|
|
|
|
*/
|
2009-10-26 22:24:36 +00:00
|
|
|
for (vector = FIRST_EXTERNAL_VECTOR; vector < NR_VECTORS; vector++) {
|
2015-08-02 20:38:27 +00:00
|
|
|
if (IS_ERR_OR_NULL(__this_cpu_read(vector_irq[vector])))
|
2009-10-26 22:24:36 +00:00
|
|
|
continue;
|
|
|
|
|
|
|
|
|
|
irr = apic_read(APIC_IRR + (vector / 32 * 0x10));
|
|
|
|
|
if (irr & (1 << (vector % 32))) {
|
2015-08-02 20:38:27 +00:00
|
|
|
desc = __this_cpu_read(vector_irq[vector]);
|
2009-10-26 22:24:36 +00:00
|
|
|
|
2015-07-05 17:12:35 +00:00
|
|
|
raw_spin_lock(&desc->lock);
|
2011-02-10 20:40:36 +00:00
|
|
|
data = irq_desc_get_irq_data(desc);
|
|
|
|
|
chip = irq_data_get_irq_chip(data);
|
2014-01-05 16:10:52 +00:00
|
|
|
if (chip->irq_retrigger) {
|
2011-02-10 20:40:36 +00:00
|
|
|
chip->irq_retrigger(data);
|
2014-01-05 16:10:52 +00:00
|
|
|
__this_cpu_write(vector_irq[vector], VECTOR_RETRIGGERED);
|
|
|
|
|
}
|
2009-11-17 15:46:45 +00:00
|
|
|
raw_spin_unlock(&desc->lock);
|
2009-10-26 22:24:36 +00:00
|
|
|
}
|
2014-01-05 16:10:52 +00:00
|
|
|
if (__this_cpu_read(vector_irq[vector]) != VECTOR_RETRIGGERED)
|
2015-08-02 20:38:25 +00:00
|
|
|
__this_cpu_write(vector_irq[vector], VECTOR_UNUSED);
|
2009-10-26 22:24:36 +00:00
|
|
|
}
|
2009-10-26 22:24:31 +00:00
|
|
|
}
|
|
|
|
|
#endif
|
