2009-01-09 00:46:40 +00:00
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/*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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2010-07-23 17:57:49 +00:00
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* Copyright (C) 2004-2008, 2009, 2010 Cavium Networks
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2009-01-09 00:46:40 +00:00
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*/
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2009-06-23 09:36:38 +00:00
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#include <linux/cpu.h>
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2009-01-09 00:46:40 +00:00
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#include <linux/delay.h>
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#include <linux/smp.h>
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#include <linux/interrupt.h>
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#include <linux/kernel_stat.h>
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#include <linux/sched.h>
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#include <linux/module.h>
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#include <asm/mmu_context.h>
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#include <asm/time.h>
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2012-03-28 17:30:02 +00:00
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#include <asm/setup.h>
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2009-01-09 00:46:40 +00:00
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#include <asm/octeon/octeon.h>
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2009-06-23 09:36:38 +00:00
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#include "octeon_boot.h"
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2009-01-09 00:46:40 +00:00
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volatile unsigned long octeon_processor_boot = 0xff;
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volatile unsigned long octeon_processor_sp;
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volatile unsigned long octeon_processor_gp;
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2009-06-23 09:36:38 +00:00
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#ifdef CONFIG_HOTPLUG_CPU
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2010-07-23 17:57:51 +00:00
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uint64_t octeon_bootloader_entry_addr;
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EXPORT_SYMBOL(octeon_bootloader_entry_addr);
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2009-06-23 09:36:38 +00:00
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#endif
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2009-01-09 00:46:40 +00:00
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static irqreturn_t mailbox_interrupt(int irq, void *dev_id)
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{
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const int coreid = cvmx_get_core_num();
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uint64_t action;
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/* Load the mailbox register to figure out what we're supposed to do */
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2011-02-17 22:47:52 +00:00
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action = cvmx_read_csr(CVMX_CIU_MBOX_CLRX(coreid)) & 0xffff;
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2009-01-09 00:46:40 +00:00
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/* Clear the mailbox to clear the interrupt */
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cvmx_write_csr(CVMX_CIU_MBOX_CLRX(coreid), action);
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if (action & SMP_CALL_FUNCTION)
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smp_call_function_interrupt();
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2011-04-05 15:23:39 +00:00
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if (action & SMP_RESCHEDULE_YOURSELF)
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scheduler_ipi();
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2009-01-09 00:46:40 +00:00
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/* Check if we've been told to flush the icache */
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if (action & SMP_ICACHE_FLUSH)
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asm volatile ("synci 0($0)\n");
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return IRQ_HANDLED;
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}
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/**
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* Cause the function described by call_data to be executed on the passed
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2013-01-22 11:59:30 +00:00
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* cpu. When the function has finished, increment the finished field of
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2009-01-09 00:46:40 +00:00
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* call_data.
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*/
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void octeon_send_ipi_single(int cpu, unsigned int action)
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{
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int coreid = cpu_logical_map(cpu);
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/*
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pr_info("SMP: Mailbox send cpu=%d, coreid=%d, action=%u\n", cpu,
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coreid, action);
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*/
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cvmx_write_csr(CVMX_CIU_MBOX_SETX(coreid), action);
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}
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2009-10-01 23:47:38 +00:00
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static inline void octeon_send_ipi_mask(const struct cpumask *mask,
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unsigned int action)
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2009-01-09 00:46:40 +00:00
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{
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unsigned int i;
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2009-10-01 23:47:38 +00:00
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for_each_cpu_mask(i, *mask)
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2009-01-09 00:46:40 +00:00
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octeon_send_ipi_single(i, action);
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}
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/**
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2012-03-29 05:08:31 +00:00
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* Detect available CPUs, populate cpu_possible_mask
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2009-01-09 00:46:40 +00:00
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*/
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2009-06-23 09:36:38 +00:00
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static void octeon_smp_hotplug_setup(void)
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{
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#ifdef CONFIG_HOTPLUG_CPU
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2010-07-23 17:57:51 +00:00
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struct linux_app_boot_info *labi;
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labi = (struct linux_app_boot_info *)PHYS_TO_XKSEG_CACHED(LABI_ADDR_IN_BOOTLOADER);
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if (labi->labi_signature != LABI_SIGNATURE)
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panic("The bootloader version on this board is incorrect.");
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octeon_bootloader_entry_addr = labi->InitTLBStart_addr;
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2009-06-23 09:36:38 +00:00
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#endif
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}
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2009-01-09 00:46:40 +00:00
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static void octeon_smp_setup(void)
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{
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const int coreid = cvmx_get_core_num();
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int cpus;
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int id;
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int core_mask = octeon_get_boot_coremask();
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2010-07-23 17:57:49 +00:00
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#ifdef CONFIG_HOTPLUG_CPU
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unsigned int num_cores = cvmx_octeon_num_cores();
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#endif
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/* The present CPUs are initially just the boot cpu (CPU 0). */
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for (id = 0; id < NR_CPUS; id++) {
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set_cpu_possible(id, id == 0);
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set_cpu_present(id, id == 0);
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}
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2009-01-09 00:46:40 +00:00
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__cpu_number_map[coreid] = 0;
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__cpu_logical_map[0] = coreid;
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2010-07-23 17:57:49 +00:00
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/* The present CPUs get the lowest CPU numbers. */
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2009-01-09 00:46:40 +00:00
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cpus = 1;
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2010-07-23 17:57:49 +00:00
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for (id = 0; id < NR_CPUS; id++) {
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2009-01-09 00:46:40 +00:00
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if ((id != coreid) && (core_mask & (1 << id))) {
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2010-07-23 17:57:49 +00:00
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set_cpu_possible(cpus, true);
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set_cpu_present(cpus, true);
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__cpu_number_map[id] = cpus;
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__cpu_logical_map[cpus] = id;
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cpus++;
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}
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}
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#ifdef CONFIG_HOTPLUG_CPU
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/*
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2013-01-22 11:59:30 +00:00
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* The possible CPUs are all those present on the chip. We
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* will assign CPU numbers for possible cores as well. Cores
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2010-07-23 17:57:49 +00:00
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* are always consecutively numberd from 0.
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*/
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for (id = 0; id < num_cores && id < NR_CPUS; id++) {
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if (!(core_mask & (1 << id))) {
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set_cpu_possible(cpus, true);
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2009-01-09 00:46:40 +00:00
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__cpu_number_map[id] = cpus;
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__cpu_logical_map[cpus] = id;
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cpus++;
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}
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}
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2010-07-23 17:57:49 +00:00
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#endif
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2009-06-23 09:36:38 +00:00
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octeon_smp_hotplug_setup();
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2009-01-09 00:46:40 +00:00
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}
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/**
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* Firmware CPU startup hook
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*
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*/
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static void octeon_boot_secondary(int cpu, struct task_struct *idle)
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{
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int count;
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pr_info("SMP: Booting CPU%02d (CoreId %2d)...\n", cpu,
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cpu_logical_map(cpu));
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octeon_processor_sp = __KSTK_TOS(idle);
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octeon_processor_gp = (unsigned long)(task_thread_info(idle));
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octeon_processor_boot = cpu_logical_map(cpu);
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mb();
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count = 10000;
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while (octeon_processor_sp && count) {
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/* Waiting for processor to get the SP and GP */
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udelay(1);
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count--;
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}
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if (count == 0)
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pr_err("Secondary boot timeout\n");
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}
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/**
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* After we've done initial boot, this function is called to allow the
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* board code to clean up state, if needed
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*/
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MIPS: Delete __cpuinit/__CPUINIT usage from MIPS code
commit 3747069b25e419f6b51395f48127e9812abc3596 upstream.
The __cpuinit type of throwaway sections might have made sense
some time ago when RAM was more constrained, but now the savings
do not offset the cost and complications. For example, the fix in
commit 5e427ec2d0 ("x86: Fix bit corruption at CPU resume time")
is a good example of the nasty type of bugs that can be created
with improper use of the various __init prefixes.
After a discussion on LKML[1] it was decided that cpuinit should go
the way of devinit and be phased out. Once all the users are gone,
we can then finally remove the macros themselves from linux/init.h.
Note that some harmless section mismatch warnings may result, since
notify_cpu_starting() and cpu_up() are arch independent (kernel/cpu.c)
and are flagged as __cpuinit -- so if we remove the __cpuinit from
the arch specific callers, we will also get section mismatch warnings.
As an intermediate step, we intend to turn the linux/init.h cpuinit
related content into no-ops as early as possible, since that will get
rid of these warnings. In any case, they are temporary and harmless.
Here, we remove all the MIPS __cpuinit from C code and __CPUINIT
from asm files. MIPS is interesting in this respect, because there
are also uasm users hiding behind their own renamed versions of the
__cpuinit macros.
[1] https://lkml.org/lkml/2013/5/20/589
[ralf@linux-mips.org: Folded in Paul's followup fix.]
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/5494/
Patchwork: https://patchwork.linux-mips.org/patch/5495/
Patchwork: https://patchwork.linux-mips.org/patch/5509/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-06-18 13:38:59 +00:00
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static void octeon_init_secondary(void)
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2009-01-09 00:46:40 +00:00
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{
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2010-07-23 17:57:51 +00:00
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unsigned int sr;
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2009-01-09 00:46:40 +00:00
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2010-07-23 17:57:51 +00:00
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sr = set_c0_status(ST0_BEV);
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write_c0_ebase((u32)ebase);
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write_c0_status(sr);
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2009-01-09 00:46:40 +00:00
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octeon_check_cpu_bist();
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octeon_init_cvmcount();
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2011-03-25 19:38:51 +00:00
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octeon_irq_setup_secondary();
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2009-01-09 00:46:40 +00:00
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}
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/**
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* Callout to firmware before smp_init
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*
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*/
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void octeon_prepare_cpus(unsigned int max_cpus)
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{
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2011-03-25 19:38:51 +00:00
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#ifdef CONFIG_HOTPLUG_CPU
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struct linux_app_boot_info *labi;
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labi = (struct linux_app_boot_info *)PHYS_TO_XKSEG_CACHED(LABI_ADDR_IN_BOOTLOADER);
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if (labi->labi_signature != LABI_SIGNATURE)
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panic("The bootloader version on this board is incorrect.");
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#endif
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2011-02-17 22:47:52 +00:00
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/*
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* Only the low order mailbox bits are used for IPIs, leave
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* the other bits alone.
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*/
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cvmx_write_csr(CVMX_CIU_MBOX_CLRX(cvmx_get_core_num()), 0xffff);
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2011-10-03 20:31:10 +00:00
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if (request_irq(OCTEON_IRQ_MBOX0, mailbox_interrupt,
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IRQF_PERCPU | IRQF_NO_THREAD, "SMP-IPI",
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mailbox_interrupt)) {
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2011-11-17 15:07:31 +00:00
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panic("Cannot request_irq(OCTEON_IRQ_MBOX0)");
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2009-01-09 00:46:40 +00:00
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}
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}
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/**
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* Last chance for the board code to finish SMP initialization before
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* the CPU is "online".
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*/
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static void octeon_smp_finish(void)
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{
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#ifdef CONFIG_CAVIUM_GDB
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unsigned long tmp;
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/* Pulse MCD0 signal on Ctrl-C to stop all the cores. Also set the MCD0
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to be not masked by this core so we know the signal is received by
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someone */
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asm volatile ("dmfc0 %0, $22\n"
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"ori %0, %0, 0x9100\n" "dmtc0 %0, $22\n" : "=r" (tmp));
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#endif
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octeon_user_io_init();
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/* to generate the first CPU timer interrupt */
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write_c0_compare(read_c0_count() + mips_hpt_frequency / HZ);
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2012-07-19 07:13:53 +00:00
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local_irq_enable();
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2009-01-09 00:46:40 +00:00
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}
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/**
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* Hook for after all CPUs are online
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*/
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static void octeon_cpus_done(void)
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{
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#ifdef CONFIG_CAVIUM_GDB
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unsigned long tmp;
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/* Pulse MCD0 signal on Ctrl-C to stop all the cores. Also set the MCD0
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to be not masked by this core so we know the signal is received by
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someone */
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asm volatile ("dmfc0 %0, $22\n"
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"ori %0, %0, 0x9100\n" "dmtc0 %0, $22\n" : "=r" (tmp));
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#endif
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}
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2009-06-23 09:36:38 +00:00
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#ifdef CONFIG_HOTPLUG_CPU
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/* State of each CPU. */
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DEFINE_PER_CPU(int, cpu_state);
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static int octeon_cpu_disable(void)
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{
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unsigned int cpu = smp_processor_id();
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if (cpu == 0)
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return -EBUSY;
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2012-03-29 05:08:30 +00:00
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set_cpu_online(cpu, false);
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2009-06-23 09:36:38 +00:00
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cpu_clear(cpu, cpu_callin_map);
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local_irq_disable();
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2013-09-03 16:19:28 +00:00
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octeon_fixup_irqs();
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2009-06-23 09:36:38 +00:00
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local_irq_enable();
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flush_cache_all();
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local_flush_tlb_all();
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return 0;
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}
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static void octeon_cpu_die(unsigned int cpu)
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{
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int coreid = cpu_logical_map(cpu);
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2010-07-23 17:57:51 +00:00
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uint32_t mask, new_mask;
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const struct cvmx_bootmem_named_block_desc *block_desc;
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2009-06-23 09:36:38 +00:00
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while (per_cpu(cpu_state, cpu) != CPU_DEAD)
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cpu_relax();
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/*
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* This is a bit complicated strategics of getting/settig available
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* cores mask, copied from bootloader
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*/
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2010-07-23 17:57:51 +00:00
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mask = 1 << coreid;
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2009-06-23 09:36:38 +00:00
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/* LINUX_APP_BOOT_BLOCK is initialized in bootoct binary */
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block_desc = cvmx_bootmem_find_named_block(LINUX_APP_BOOT_BLOCK_NAME);
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if (!block_desc) {
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2010-07-23 17:57:51 +00:00
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struct linux_app_boot_info *labi;
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2009-06-23 09:36:38 +00:00
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2010-07-23 17:57:51 +00:00
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labi = (struct linux_app_boot_info *)PHYS_TO_XKSEG_CACHED(LABI_ADDR_IN_BOOTLOADER);
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2009-06-23 09:36:38 +00:00
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2010-07-23 17:57:51 +00:00
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labi->avail_coremask |= mask;
|
|
|
|
new_mask = labi->avail_coremask;
|
|
|
|
} else { /* alternative, already initialized */
|
|
|
|
uint32_t *p = (uint32_t *)PHYS_TO_XKSEG_CACHED(block_desc->base_addr +
|
|
|
|
AVAIL_COREMASK_OFFSET_IN_LINUX_APP_BOOT_BLOCK);
|
|
|
|
*p |= mask;
|
|
|
|
new_mask = *p;
|
2009-06-23 09:36:38 +00:00
|
|
|
}
|
|
|
|
|
2010-07-23 17:57:51 +00:00
|
|
|
pr_info("Reset core %d. Available Coremask = 0x%x \n", coreid, new_mask);
|
|
|
|
mb();
|
2009-06-23 09:36:38 +00:00
|
|
|
cvmx_write_csr(CVMX_CIU_PP_RST, 1 << coreid);
|
|
|
|
cvmx_write_csr(CVMX_CIU_PP_RST, 0);
|
|
|
|
}
|
|
|
|
|
|
|
|
void play_dead(void)
|
|
|
|
{
|
2010-07-23 17:57:51 +00:00
|
|
|
int cpu = cpu_number_map(cvmx_get_core_num());
|
2009-06-23 09:36:38 +00:00
|
|
|
|
|
|
|
idle_task_exit();
|
|
|
|
octeon_processor_boot = 0xff;
|
2010-07-23 17:57:51 +00:00
|
|
|
per_cpu(cpu_state, cpu) = CPU_DEAD;
|
|
|
|
|
|
|
|
mb();
|
2009-06-23 09:36:38 +00:00
|
|
|
|
|
|
|
while (1) /* core will be reset here */
|
|
|
|
;
|
|
|
|
}
|
|
|
|
|
|
|
|
extern void kernel_entry(unsigned long arg1, ...);
|
|
|
|
|
|
|
|
static void start_after_reset(void)
|
|
|
|
{
|
2013-01-22 11:59:30 +00:00
|
|
|
kernel_entry(0, 0, 0); /* set a2 = 0 for secondary core */
|
2009-06-23 09:36:38 +00:00
|
|
|
}
|
|
|
|
|
2010-07-23 17:57:51 +00:00
|
|
|
static int octeon_update_boot_vector(unsigned int cpu)
|
2009-06-23 09:36:38 +00:00
|
|
|
{
|
|
|
|
|
|
|
|
int coreid = cpu_logical_map(cpu);
|
2010-07-23 17:57:51 +00:00
|
|
|
uint32_t avail_coremask;
|
|
|
|
const struct cvmx_bootmem_named_block_desc *block_desc;
|
2009-06-23 09:36:38 +00:00
|
|
|
struct boot_init_vector *boot_vect =
|
2010-07-23 17:57:51 +00:00
|
|
|
(struct boot_init_vector *)PHYS_TO_XKSEG_CACHED(BOOTLOADER_BOOT_VECTOR);
|
2009-06-23 09:36:38 +00:00
|
|
|
|
|
|
|
block_desc = cvmx_bootmem_find_named_block(LINUX_APP_BOOT_BLOCK_NAME);
|
|
|
|
|
|
|
|
if (!block_desc) {
|
2010-07-23 17:57:51 +00:00
|
|
|
struct linux_app_boot_info *labi;
|
|
|
|
|
|
|
|
labi = (struct linux_app_boot_info *)PHYS_TO_XKSEG_CACHED(LABI_ADDR_IN_BOOTLOADER);
|
|
|
|
|
|
|
|
avail_coremask = labi->avail_coremask;
|
|
|
|
labi->avail_coremask &= ~(1 << coreid);
|
2009-06-23 09:36:38 +00:00
|
|
|
} else { /* alternative, already initialized */
|
2010-07-23 17:57:51 +00:00
|
|
|
avail_coremask = *(uint32_t *)PHYS_TO_XKSEG_CACHED(
|
|
|
|
block_desc->base_addr + AVAIL_COREMASK_OFFSET_IN_LINUX_APP_BOOT_BLOCK);
|
2009-06-23 09:36:38 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
if (!(avail_coremask & (1 << coreid))) {
|
|
|
|
/* core not available, assume, that catched by simple-executive */
|
|
|
|
cvmx_write_csr(CVMX_CIU_PP_RST, 1 << coreid);
|
|
|
|
cvmx_write_csr(CVMX_CIU_PP_RST, 0);
|
|
|
|
}
|
|
|
|
|
|
|
|
boot_vect[coreid].app_start_func_addr =
|
|
|
|
(uint32_t) (unsigned long) start_after_reset;
|
2010-07-23 17:57:51 +00:00
|
|
|
boot_vect[coreid].code_addr = octeon_bootloader_entry_addr;
|
2009-06-23 09:36:38 +00:00
|
|
|
|
2010-07-23 17:57:51 +00:00
|
|
|
mb();
|
2009-06-23 09:36:38 +00:00
|
|
|
|
|
|
|
cvmx_write_csr(CVMX_CIU_NMI, (1 << coreid) & avail_coremask);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
MIPS: Delete __cpuinit/__CPUINIT usage from MIPS code
commit 3747069b25e419f6b51395f48127e9812abc3596 upstream.
The __cpuinit type of throwaway sections might have made sense
some time ago when RAM was more constrained, but now the savings
do not offset the cost and complications. For example, the fix in
commit 5e427ec2d0 ("x86: Fix bit corruption at CPU resume time")
is a good example of the nasty type of bugs that can be created
with improper use of the various __init prefixes.
After a discussion on LKML[1] it was decided that cpuinit should go
the way of devinit and be phased out. Once all the users are gone,
we can then finally remove the macros themselves from linux/init.h.
Note that some harmless section mismatch warnings may result, since
notify_cpu_starting() and cpu_up() are arch independent (kernel/cpu.c)
and are flagged as __cpuinit -- so if we remove the __cpuinit from
the arch specific callers, we will also get section mismatch warnings.
As an intermediate step, we intend to turn the linux/init.h cpuinit
related content into no-ops as early as possible, since that will get
rid of these warnings. In any case, they are temporary and harmless.
Here, we remove all the MIPS __cpuinit from C code and __CPUINIT
from asm files. MIPS is interesting in this respect, because there
are also uasm users hiding behind their own renamed versions of the
__cpuinit macros.
[1] https://lkml.org/lkml/2013/5/20/589
[ralf@linux-mips.org: Folded in Paul's followup fix.]
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/5494/
Patchwork: https://patchwork.linux-mips.org/patch/5495/
Patchwork: https://patchwork.linux-mips.org/patch/5509/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-06-18 13:38:59 +00:00
|
|
|
static int octeon_cpu_callback(struct notifier_block *nfb,
|
2009-06-23 09:36:38 +00:00
|
|
|
unsigned long action, void *hcpu)
|
|
|
|
{
|
|
|
|
unsigned int cpu = (unsigned long)hcpu;
|
|
|
|
|
|
|
|
switch (action) {
|
|
|
|
case CPU_UP_PREPARE:
|
|
|
|
octeon_update_boot_vector(cpu);
|
|
|
|
break;
|
|
|
|
case CPU_ONLINE:
|
|
|
|
pr_info("Cpu %d online\n", cpu);
|
|
|
|
break;
|
|
|
|
case CPU_DEAD:
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
return NOTIFY_OK;
|
|
|
|
}
|
|
|
|
|
MIPS: Delete __cpuinit/__CPUINIT usage from MIPS code
commit 3747069b25e419f6b51395f48127e9812abc3596 upstream.
The __cpuinit type of throwaway sections might have made sense
some time ago when RAM was more constrained, but now the savings
do not offset the cost and complications. For example, the fix in
commit 5e427ec2d0 ("x86: Fix bit corruption at CPU resume time")
is a good example of the nasty type of bugs that can be created
with improper use of the various __init prefixes.
After a discussion on LKML[1] it was decided that cpuinit should go
the way of devinit and be phased out. Once all the users are gone,
we can then finally remove the macros themselves from linux/init.h.
Note that some harmless section mismatch warnings may result, since
notify_cpu_starting() and cpu_up() are arch independent (kernel/cpu.c)
and are flagged as __cpuinit -- so if we remove the __cpuinit from
the arch specific callers, we will also get section mismatch warnings.
As an intermediate step, we intend to turn the linux/init.h cpuinit
related content into no-ops as early as possible, since that will get
rid of these warnings. In any case, they are temporary and harmless.
Here, we remove all the MIPS __cpuinit from C code and __CPUINIT
from asm files. MIPS is interesting in this respect, because there
are also uasm users hiding behind their own renamed versions of the
__cpuinit macros.
[1] https://lkml.org/lkml/2013/5/20/589
[ralf@linux-mips.org: Folded in Paul's followup fix.]
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/5494/
Patchwork: https://patchwork.linux-mips.org/patch/5495/
Patchwork: https://patchwork.linux-mips.org/patch/5509/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-06-18 13:38:59 +00:00
|
|
|
static int register_cavium_notifier(void)
|
2009-06-23 09:36:38 +00:00
|
|
|
{
|
2010-07-23 17:57:50 +00:00
|
|
|
hotcpu_notifier(octeon_cpu_callback, 0);
|
2009-06-23 09:36:38 +00:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
late_initcall(register_cavium_notifier);
|
|
|
|
|
2013-01-22 11:59:30 +00:00
|
|
|
#endif /* CONFIG_HOTPLUG_CPU */
|
2009-06-23 09:36:38 +00:00
|
|
|
|
2009-01-09 00:46:40 +00:00
|
|
|
struct plat_smp_ops octeon_smp_ops = {
|
|
|
|
.send_ipi_single = octeon_send_ipi_single,
|
|
|
|
.send_ipi_mask = octeon_send_ipi_mask,
|
|
|
|
.init_secondary = octeon_init_secondary,
|
|
|
|
.smp_finish = octeon_smp_finish,
|
|
|
|
.cpus_done = octeon_cpus_done,
|
|
|
|
.boot_secondary = octeon_boot_secondary,
|
|
|
|
.smp_setup = octeon_smp_setup,
|
|
|
|
.prepare_cpus = octeon_prepare_cpus,
|
2009-06-23 09:36:38 +00:00
|
|
|
#ifdef CONFIG_HOTPLUG_CPU
|
|
|
|
.cpu_disable = octeon_cpu_disable,
|
|
|
|
.cpu_die = octeon_cpu_die,
|
|
|
|
#endif
|
2009-01-09 00:46:40 +00:00
|
|
|
};
|