forked from Minki/linux
127 lines
2.5 KiB
C
127 lines
2.5 KiB
C
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/*
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* Software PHY emulation
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*
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* Code taken from fixed_phy.c by Russell King <rmk+kernel@arm.linux.org.uk>
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*
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* Author: Vitaly Bordug <vbordug@ru.mvista.com>
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* Anton Vorontsov <avorontsov@ru.mvista.com>
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*
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* Copyright (c) 2006-2007 MontaVista Software, Inc.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*/
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#include <linux/export.h>
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#include <linux/mii.h>
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#include <linux/phy.h>
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#include <linux/phy_fixed.h>
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#include "swphy.h"
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/**
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* swphy_update_regs - update MII register array with fixed phy state
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* @regs: array of 32 registers to update
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* @state: fixed phy status
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*
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* Update the array of MII registers with the fixed phy link, speed,
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* duplex and pause mode settings.
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*/
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int swphy_update_regs(u16 *regs, const struct fixed_phy_status *state)
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{
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u16 bmsr = BMSR_ANEGCAPABLE;
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u16 bmcr = 0;
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u16 lpagb = 0;
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u16 lpa = 0;
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if (state->duplex) {
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switch (state->speed) {
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case 1000:
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bmsr |= BMSR_ESTATEN;
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break;
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case 100:
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bmsr |= BMSR_100FULL;
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break;
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case 10:
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bmsr |= BMSR_10FULL;
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break;
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default:
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break;
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}
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} else {
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switch (state->speed) {
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case 1000:
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bmsr |= BMSR_ESTATEN;
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break;
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case 100:
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bmsr |= BMSR_100HALF;
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break;
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case 10:
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bmsr |= BMSR_10HALF;
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break;
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default:
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break;
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}
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}
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if (state->link) {
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bmsr |= BMSR_LSTATUS | BMSR_ANEGCOMPLETE;
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if (state->duplex) {
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bmcr |= BMCR_FULLDPLX;
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switch (state->speed) {
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case 1000:
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bmcr |= BMCR_SPEED1000;
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lpagb |= LPA_1000FULL;
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break;
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case 100:
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bmcr |= BMCR_SPEED100;
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lpa |= LPA_100FULL;
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break;
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case 10:
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lpa |= LPA_10FULL;
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break;
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default:
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pr_warn("swphy: unknown speed\n");
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return -EINVAL;
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}
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} else {
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switch (state->speed) {
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case 1000:
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bmcr |= BMCR_SPEED1000;
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lpagb |= LPA_1000HALF;
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break;
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case 100:
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bmcr |= BMCR_SPEED100;
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lpa |= LPA_100HALF;
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break;
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case 10:
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lpa |= LPA_10HALF;
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break;
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default:
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pr_warn("swphy: unknown speed\n");
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return -EINVAL;
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}
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}
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if (state->pause)
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lpa |= LPA_PAUSE_CAP;
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if (state->asym_pause)
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lpa |= LPA_PAUSE_ASYM;
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}
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regs[MII_PHYSID1] = 0;
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regs[MII_PHYSID2] = 0;
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regs[MII_BMSR] = bmsr;
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regs[MII_BMCR] = bmcr;
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regs[MII_LPA] = lpa;
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regs[MII_STAT1000] = lpagb;
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return 0;
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}
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EXPORT_SYMBOL_GPL(swphy_update_regs);
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