2015-01-21 10:26:00 +00:00
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ROCKCHIP USB2 PHY
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Required properties:
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2015-11-19 21:22:25 +00:00
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- compatible: matching the soc type, one of
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"rockchip,rk3066a-usb-phy"
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"rockchip,rk3188-usb-phy"
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"rockchip,rk3288-usb-phy"
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2015-01-21 10:26:00 +00:00
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- #address-cells: should be 1
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- #size-cells: should be 0
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2016-06-28 22:12:58 +00:00
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Deprecated properties:
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- rockchip,grf : phandle to the syscon managing the "general
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register files" - phy should be a child of the GRF instead
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2015-01-21 10:26:00 +00:00
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Sub-nodes:
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Each PHY should be represented as a sub-node.
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Sub-nodes
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required properties:
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- #phy-cells: should be 0
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- reg: PHY configure reg address offset in GRF
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"0x320" - for PHY attach to OTG controller
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"0x334" - for PHY attach to HOST0 controller
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"0x348" - for PHY attach to HOST1 controller
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Optional Properties:
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- clocks : phandle + clock specifier for the phy clocks
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- clock-names: string, clock name, must be "phyclk"
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2015-11-19 21:22:26 +00:00
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- #clock-cells: for users of the phy-pll, should be 0
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2016-09-09 18:59:38 +00:00
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- reset-names: Only allow the following entries:
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- phy-reset
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- resets: Must contain an entry for each entry in reset-names.
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2015-01-21 10:26:00 +00:00
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Example:
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2016-06-28 22:12:58 +00:00
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grf: syscon@ff770000 {
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compatible = "rockchip,rk3288-grf", "syscon", "simple-mfd";
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...
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usbphy: phy {
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compatible = "rockchip,rk3288-usb-phy";
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#address-cells = <1>;
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#size-cells = <0>;
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2015-01-21 10:26:00 +00:00
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2016-06-28 22:12:58 +00:00
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usbphy0: usb-phy0 {
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#phy-cells = <0>;
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reg = <0x320>;
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};
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2015-01-21 10:26:00 +00:00
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};
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};
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