2005-04-16 22:20:36 +00:00
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/***************************************************************************/
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/*
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* linux/arch/m68knommu/platform/528x/config.c
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*
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2011-03-31 01:57:33 +00:00
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* Sub-architcture dependent initialization code for the Freescale
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2009-04-28 04:24:25 +00:00
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* 5280, 5281 and 5282 CPUs.
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2005-04-16 22:20:36 +00:00
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*
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* Copyright (C) 1999-2003, Greg Ungerer (gerg@snapgear.com)
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* Copyright (C) 2001-2003, SnapGear Inc. (www.snapgear.com)
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*/
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/***************************************************************************/
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#include <linux/kernel.h>
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#include <linux/param.h>
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#include <linux/init.h>
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2008-02-01 07:34:50 +00:00
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#include <linux/platform_device.h>
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#include <linux/io.h>
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2005-04-16 22:20:36 +00:00
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#include <asm/machdep.h>
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#include <asm/coldfire.h>
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#include <asm/mcfsim.h>
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2008-02-01 07:34:50 +00:00
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#include <asm/mcfuart.h>
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2012-07-13 06:04:22 +00:00
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#include <asm/mcfclk.h>
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/***************************************************************************/
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DEFINE_CLK(pll, "pll.0", MCF_CLK);
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DEFINE_CLK(sys, "sys.0", MCF_BUSCLK);
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DEFINE_CLK(mcfpit0, "mcfpit.0", MCF_CLK);
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DEFINE_CLK(mcfpit1, "mcfpit.1", MCF_CLK);
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DEFINE_CLK(mcfpit2, "mcfpit.2", MCF_CLK);
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DEFINE_CLK(mcfpit3, "mcfpit.3", MCF_CLK);
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DEFINE_CLK(mcfuart0, "mcfuart.0", MCF_BUSCLK);
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DEFINE_CLK(mcfuart1, "mcfuart.1", MCF_BUSCLK);
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DEFINE_CLK(mcfuart2, "mcfuart.2", MCF_BUSCLK);
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DEFINE_CLK(fec0, "fec.0", MCF_BUSCLK);
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struct clk *mcf_clks[] = {
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&clk_pll,
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&clk_sys,
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&clk_mcfpit0,
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&clk_mcfpit1,
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&clk_mcfpit2,
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&clk_mcfpit3,
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&clk_mcfuart0,
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&clk_mcfuart1,
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&clk_mcfuart2,
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&clk_fec0,
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NULL
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};
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2005-04-16 22:20:36 +00:00
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/***************************************************************************/
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2012-05-06 19:22:53 +00:00
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#if IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI)
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2010-01-22 20:43:03 +00:00
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static void __init m528x_qspi_init(void)
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{
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/* setup Port QS for QSPI with gpio CS control */
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__raw_writeb(0x07, MCFGPIO_PQSPAR);
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}
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2009-02-27 06:40:38 +00:00
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2012-05-06 19:22:53 +00:00
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#endif /* IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI) */
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2008-02-01 07:34:50 +00:00
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/***************************************************************************/
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2011-12-23 15:00:48 +00:00
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static void __init m528x_uarts_init(void)
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2008-02-01 07:34:50 +00:00
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{
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u8 port;
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/* make sure PUAPAR is set for UART0 and UART1 */
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2013-03-04 01:51:45 +00:00
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port = readb(MCFGPIO_PUAPAR);
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2011-12-23 15:00:48 +00:00
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port |= 0x03 | (0x03 << 2);
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m68knommu: refactor Coldfire GPIO not to require GPIOLIB, eliminate mcf_gpio_chips.
If we're not connecting external GPIO extenders via i2c or spi or whatever, we
probably don't need GPIOLIB. If we provide an alternate implementation of
the GPIOLIB functions to use when only on-chip GPIO is needed, we can change
ARCH_REQUIRE_GPIOLIB to ARCH_WANTS_OPTIONAL_GPIOLIB so that GPIOLIB becomes
optional.
The downside is that in the GPIOLIB=n case, we lose all error checking done by
gpiolib, ie multiply allocating the gpio, free'ing gpio etc., so that the
only checking that can be done is if we reference a gpio on an external part.
Targets that need the extra error checking can still select GPIOLIB=y.
For the case where GPIOLIB=y, we can simplify the table of gpio chips to use a
single chip, eliminating the tables of chips in the 5xxx.c files. The
original motivation for the definition of multiple chips was to match the way
many of the Coldfire variants defined their gpio as a spare array in memory.
However, all this really gains us is some error checking when we request a
gpio, gpiolib can check that it doesn't fall in one of the holes. If thats
important, I think we can still come up with a better way of accomplishing
that.
Also in this patch is some general cleanup and reorganizing of the gpio header
files (I'm sure I must have had a reason why I sometimes used a prefix of
mcf_gpio and other times mcfgpio but for the life of me I can't think of it
now).
Signed-off-by: Steven King <sfking@fdwdc.com>
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
2012-05-21 20:10:19 +00:00
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writeb(port, MCFGPIO_PUAPAR);
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2008-02-01 07:34:50 +00:00
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}
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2005-04-16 22:20:36 +00:00
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/***************************************************************************/
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2009-02-27 06:40:38 +00:00
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static void __init m528x_fec_init(void)
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{
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u16 v16;
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/* Set multi-function pins to ethernet mode for fec0 */
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2012-09-17 02:20:20 +00:00
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v16 = readw(MCFGPIO_PASPAR);
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writew(v16 | 0xf00, MCFGPIO_PASPAR);
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writeb(0xc0, MCFGPIO_PEHLPAR);
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2009-02-27 06:40:38 +00:00
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}
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/***************************************************************************/
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2008-05-01 02:17:08 +00:00
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#ifdef CONFIG_WILDFIRE
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void wildfire_halt(void)
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{
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writeb(0, 0x30000007);
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writeb(0x2, 0x30000007);
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}
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#endif
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#ifdef CONFIG_WILDFIREMOD
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void wildfiremod_halt(void)
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{
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printk(KERN_INFO "WildFireMod hibernating...\n");
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/* Set portE.5 to Digital IO */
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MCF5282_GPIO_PEPAR &= ~(1 << (5 * 2));
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/* Make portE.5 an output */
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MCF5282_GPIO_DDRE |= (1 << 5);
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/* Now toggle portE.5 from low to high */
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MCF5282_GPIO_PORTE &= ~(1 << 5);
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MCF5282_GPIO_PORTE |= (1 << 5);
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printk(KERN_EMERG "Failed to hibernate. Halting!\n");
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}
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#endif
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2008-02-01 07:34:50 +00:00
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void __init config_BSP(char *commandp, int size)
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2005-04-16 22:20:36 +00:00
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{
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2008-05-01 02:17:08 +00:00
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#ifdef CONFIG_WILDFIRE
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mach_halt = wildfire_halt;
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#endif
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#ifdef CONFIG_WILDFIREMOD
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mach_halt = wildfiremod_halt;
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#endif
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2012-01-23 05:34:58 +00:00
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mach_sched_init = hw_timer_init;
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2008-02-01 07:34:50 +00:00
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m528x_uarts_init();
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2009-02-27 06:40:38 +00:00
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m528x_fec_init();
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2012-05-06 19:22:53 +00:00
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#if IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI)
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2010-01-22 20:43:03 +00:00
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m528x_qspi_init();
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#endif
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2008-02-01 07:34:50 +00:00
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}
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/***************************************************************************/
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