2015-07-22 03:29:58 +00:00
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/*
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* Copyright 2015 Advanced Micro Devices, Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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*/
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#ifndef _TONGA_SMUMGR_H_
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#define _TONGA_SMUMGR_H_
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2016-08-11 03:01:01 +00:00
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#include "smu72_discrete.h"
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2016-08-19 12:42:09 +00:00
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#include "smu7_smumgr.h"
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2017-10-09 08:20:49 +00:00
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#include "smu72.h"
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#define ASICID_IS_TONGA_P(wDID, bRID) \
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(((wDID == 0x6930) && ((bRID == 0xF0) || (bRID == 0xF1) || (bRID == 0xFF))) \
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|| ((wDID == 0x6920) && ((bRID == 0) || (bRID == 1))))
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struct tonga_pt_defaults {
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uint8_t svi_load_line_en;
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uint8_t svi_load_line_vddC;
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uint8_t tdc_vddc_throttle_release_limit_perc;
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uint8_t tdc_mawt;
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uint8_t tdc_waterfall_ctl;
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uint8_t dte_ambient_temp_base;
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uint32_t display_cac;
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uint32_t bapm_temp_gradient;
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uint16_t bapmti_r[SMU72_DTE_ITERATIONS * SMU72_DTE_SOURCES * SMU72_DTE_SINKS];
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uint16_t bapmti_rc[SMU72_DTE_ITERATIONS * SMU72_DTE_SOURCES * SMU72_DTE_SINKS];
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};
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2016-08-11 03:01:01 +00:00
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struct tonga_mc_reg_entry {
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uint32_t mclk_max;
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uint32_t mc_data[SMU72_DISCRETE_MC_REGISTER_ARRAY_SIZE];
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};
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struct tonga_mc_reg_table {
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uint8_t last; /* number of registers*/
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uint8_t num_entries; /* number of entries in mc_reg_table_entry used*/
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uint16_t validflag; /* indicate the corresponding register is valid or not. 1: valid, 0: invalid. bit0->address[0], bit1->address[1], etc.*/
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struct tonga_mc_reg_entry mc_reg_table_entry[MAX_AC_TIMING_ENTRIES];
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SMU72_Discrete_MCRegisterAddress mc_reg_address[SMU72_DISCRETE_MC_REGISTER_ARRAY_SIZE];
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};
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2015-07-22 03:29:58 +00:00
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struct tonga_smumgr {
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2016-08-11 03:01:01 +00:00
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2016-08-19 12:42:09 +00:00
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struct smu7_smumgr smu7_data;
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2016-08-11 03:01:01 +00:00
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struct SMU72_Discrete_DpmTable smc_state_table;
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struct SMU72_Discrete_Ulv ulv_setting;
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struct SMU72_Discrete_PmFuses power_tune_table;
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2016-09-22 19:13:49 +00:00
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const struct tonga_pt_defaults *power_tune_defaults;
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2016-08-11 03:01:01 +00:00
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SMU72_Discrete_MCRegisters mc_regs;
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struct tonga_mc_reg_table mc_reg_table;
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uint32_t activity_target[SMU72_MAX_LEVELS_GRAPHICS];
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2015-07-22 03:29:58 +00:00
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};
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#endif
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