2009-12-11 09:24:15 +00:00
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#
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# Makefile for the drm device driver. This driver provides support for the
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# Direct Rendering Infrastructure (DRI) in XFree86 4.1.0 and higher.
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ccflags-y := -Iinclude/drm
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nouveau-y := nouveau_drv.o nouveau_state.o nouveau_channel.o nouveau_mem.o \
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nouveau_object.o nouveau_irq.o nouveau_notifier.o \
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2010-11-03 00:06:43 +00:00
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nouveau_sgdma.o nouveau_dma.o nouveau_util.o \
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2009-12-11 09:24:15 +00:00
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nouveau_bo.o nouveau_fence.o nouveau_gem.o nouveau_ttm.o \
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nouveau_hw.o nouveau_calc.o nouveau_bios.o nouveau_i2c.o \
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drm/nv40: implement ctxprog/state generation
The context programs are *very* simple compared to the ones used by
the binary driver. There's notes in nv40_grctx.c explaining most of
the things we don't implement. If we discover if/why any of it is
required further down the track, we'll handle it then.
The PGRAPH state generated for each chipset should match what NVIDIA
do almost exactly (there's a couple of exceptions). If someone has
a lot of time on their hands, they could figure out the mapping of
object/method to PGRAPH register and demagic the initial state a little,
it's not terribly important however.
At time of commit, confirmed to be working at least well enough for
accelerated X (and where tested, for 3D apps) on NV40, NV43, NV44, NV46,
NV49, NV4A, NV4B and NV4E.
A module option has been added to force the use of external firmware
blobs if it becomes required.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2009-12-15 12:02:47 +00:00
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nouveau_display.o nouveau_connector.o nouveau_fbcon.o \
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2011-10-05 01:05:07 +00:00
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nouveau_hdmi.o nouveau_dp.o nouveau_ramht.o \
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2010-09-27 01:18:14 +00:00
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nouveau_pm.o nouveau_volt.o nouveau_perf.o nouveau_temp.o \
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2011-11-21 06:41:48 +00:00
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nouveau_mm.o nouveau_vm.o nouveau_mxm.o nouveau_gpio.o \
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2009-12-11 09:24:15 +00:00
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nv04_timer.o \
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nv04_mc.o nv40_mc.o nv50_mc.o \
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2011-12-12 12:51:33 +00:00
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nv04_fb.o nv10_fb.o nv20_fb.o nv30_fb.o nv40_fb.o \
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nv50_fb.o nvc0_fb.o \
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2012-05-01 10:48:08 +00:00
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nv04_fifo.o nv10_fifo.o nv17_fifo.o nv40_fifo.o nv50_fifo.o \
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nv84_fifo.o nvc0_fifo.o nve0_fifo.o \
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2012-04-30 03:55:29 +00:00
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nv04_fence.o nv10_fence.o nv84_fence.o nvc0_fence.o \
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2012-04-30 16:33:43 +00:00
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nv04_software.o nv50_software.o nvc0_software.o \
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2009-12-11 09:24:15 +00:00
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nv04_graph.o nv10_graph.o nv20_graph.o \
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2012-03-13 03:05:13 +00:00
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nv40_graph.o nv50_graph.o nvc0_graph.o nve0_graph.o \
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nv40_grctx.o nv50_grctx.o nvc0_grctx.o nve0_grctx.o \
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2011-08-11 04:58:06 +00:00
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nv84_crypt.o nv98_crypt.o \
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2011-04-01 06:10:08 +00:00
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nva3_copy.o nvc0_copy.o \
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2011-06-23 06:21:21 +00:00
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nv31_mpeg.o nv50_mpeg.o \
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2011-08-11 04:58:06 +00:00
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nv84_bsp.o \
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nv84_vp.o \
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nv98_ppp.o \
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2010-08-03 00:00:56 +00:00
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nv04_instmem.o nv50_instmem.o nvc0_instmem.o \
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2009-12-11 09:24:15 +00:00
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nv04_dac.o nv04_dfp.o nv04_tv.o nv17_tv.o nv17_tv_modes.o \
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2010-11-24 00:52:43 +00:00
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nv04_crtc.o nv04_display.o nv04_cursor.o \
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2011-07-08 04:43:19 +00:00
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nv50_evo.o nv50_crtc.o nv50_dac.o nv50_sor.o \
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nv50_cursor.o nv50_display.o \
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2011-07-04 06:25:18 +00:00
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nvd0_display.o \
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2011-07-08 04:43:19 +00:00
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nv04_fbcon.o nv50_fbcon.o nvc0_fbcon.o \
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2010-07-25 23:28:25 +00:00
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nv10_gpio.o nv50_gpio.o \
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2010-09-16 06:17:35 +00:00
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nv50_calc.o \
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2011-07-18 05:15:34 +00:00
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nv04_pm.o nv40_pm.o nv50_pm.o nva3_pm.o nvc0_pm.o \
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2010-11-15 01:48:33 +00:00
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nv50_vram.o nvc0_vram.o \
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2012-04-02 10:53:06 +00:00
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nv50_vm.o nvc0_vm.o nouveau_prime.o
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2009-12-11 09:24:15 +00:00
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nouveau-$(CONFIG_DRM_NOUVEAU_DEBUG) += nouveau_debugfs.o
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nouveau-$(CONFIG_COMPAT) += nouveau_ioc32.o
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nouveau-$(CONFIG_DRM_NOUVEAU_BACKLIGHT) += nouveau_backlight.o
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nouveau-$(CONFIG_ACPI) += nouveau_acpi.o
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obj-$(CONFIG_DRM_NOUVEAU)+= nouveau.o
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