2019-05-29 23:57:47 +00:00
|
|
|
/* SPDX-License-Identifier: GPL-2.0-only */
|
2009-11-20 12:22:21 +00:00
|
|
|
/*
|
2010-10-13 09:13:21 +00:00
|
|
|
* Copyright (C) 2009-2010 Advanced Micro Devices, Inc.
|
2015-02-04 15:12:55 +00:00
|
|
|
* Author: Joerg Roedel <jroedel@suse.de>
|
2009-11-20 12:22:21 +00:00
|
|
|
*/
|
|
|
|
|
|
|
|
#ifndef _ASM_X86_AMD_IOMMU_PROTO_H
|
|
|
|
#define _ASM_X86_AMD_IOMMU_PROTO_H
|
|
|
|
|
2011-06-14 14:44:25 +00:00
|
|
|
#include "amd_iommu_types.h"
|
2009-11-20 12:22:21 +00:00
|
|
|
|
2017-02-24 08:48:17 +00:00
|
|
|
extern int amd_iommu_get_num_iommus(void);
|
2009-11-20 12:22:21 +00:00
|
|
|
extern int amd_iommu_init_dma_ops(void);
|
|
|
|
extern int amd_iommu_init_passthrough(void);
|
2011-05-10 08:50:42 +00:00
|
|
|
extern irqreturn_t amd_iommu_int_thread(int irq, void *data);
|
2009-11-20 12:22:21 +00:00
|
|
|
extern irqreturn_t amd_iommu_int_handler(int irq, void *data);
|
|
|
|
extern void amd_iommu_apply_erratum_63(u16 devid);
|
|
|
|
extern void amd_iommu_reset_cmd_buffer(struct amd_iommu *iommu);
|
2009-12-10 10:03:39 +00:00
|
|
|
extern int amd_iommu_init_devices(void);
|
|
|
|
extern void amd_iommu_uninit_devices(void);
|
2009-12-10 10:12:25 +00:00
|
|
|
extern void amd_iommu_init_notifier(void);
|
2015-05-28 16:41:45 +00:00
|
|
|
extern int amd_iommu_init_api(void);
|
2011-11-28 14:11:02 +00:00
|
|
|
|
2018-06-12 21:41:30 +00:00
|
|
|
#ifdef CONFIG_AMD_IOMMU_DEBUGFS
|
|
|
|
void amd_iommu_debugfs_setup(struct amd_iommu *iommu);
|
|
|
|
#else
|
|
|
|
static inline void amd_iommu_debugfs_setup(struct amd_iommu *iommu) {}
|
|
|
|
#endif
|
|
|
|
|
2012-06-26 14:46:04 +00:00
|
|
|
/* Needed for interrupt remapping */
|
|
|
|
extern int amd_iommu_prepare(void);
|
|
|
|
extern int amd_iommu_enable(void);
|
|
|
|
extern void amd_iommu_disable(void);
|
|
|
|
extern int amd_iommu_reenable(int);
|
|
|
|
extern int amd_iommu_enable_faulting(void);
|
2016-08-23 18:52:32 +00:00
|
|
|
extern int amd_iommu_guest_ir;
|
2012-06-26 14:46:04 +00:00
|
|
|
|
2011-11-10 18:13:51 +00:00
|
|
|
/* IOMMUv2 specific functions */
|
2011-11-17 13:18:46 +00:00
|
|
|
struct iommu_domain;
|
|
|
|
|
2011-11-28 14:11:02 +00:00
|
|
|
extern bool amd_iommu_v2_supported(void);
|
2011-11-10 18:13:51 +00:00
|
|
|
extern int amd_iommu_register_ppr_notifier(struct notifier_block *nb);
|
|
|
|
extern int amd_iommu_unregister_ppr_notifier(struct notifier_block *nb);
|
2011-11-17 13:18:46 +00:00
|
|
|
extern void amd_iommu_domain_direct_map(struct iommu_domain *dom);
|
2011-11-17 16:24:28 +00:00
|
|
|
extern int amd_iommu_domain_enable_v2(struct iommu_domain *dom, int pasids);
|
2011-11-21 14:59:08 +00:00
|
|
|
extern int amd_iommu_flush_page(struct iommu_domain *dom, int pasid,
|
|
|
|
u64 address);
|
|
|
|
extern int amd_iommu_flush_tlb(struct iommu_domain *dom, int pasid);
|
2011-11-21 15:50:23 +00:00
|
|
|
extern int amd_iommu_domain_set_gcr3(struct iommu_domain *dom, int pasid,
|
|
|
|
unsigned long cr3);
|
|
|
|
extern int amd_iommu_domain_clear_gcr3(struct iommu_domain *dom, int pasid);
|
2011-11-23 11:36:25 +00:00
|
|
|
extern struct iommu_domain *amd_iommu_get_v2_domain(struct pci_dev *pdev);
|
2011-11-21 15:50:23 +00:00
|
|
|
|
2015-04-13 06:11:33 +00:00
|
|
|
#ifdef CONFIG_IRQ_REMAP
|
|
|
|
extern int amd_iommu_create_irq_domain(struct amd_iommu *iommu);
|
|
|
|
#else
|
|
|
|
static inline int amd_iommu_create_irq_domain(struct amd_iommu *iommu)
|
|
|
|
{
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
2011-11-21 17:19:25 +00:00
|
|
|
#define PPR_SUCCESS 0x0
|
|
|
|
#define PPR_INVALID 0x1
|
|
|
|
#define PPR_FAILURE 0xf
|
|
|
|
|
|
|
|
extern int amd_iommu_complete_ppr(struct pci_dev *pdev, int pasid,
|
|
|
|
int status, int tag);
|
2011-11-28 14:11:02 +00:00
|
|
|
|
2010-09-23 13:15:19 +00:00
|
|
|
static inline bool is_rd890_iommu(struct pci_dev *pdev)
|
|
|
|
{
|
|
|
|
return (pdev->vendor == PCI_VENDOR_ID_ATI) &&
|
|
|
|
(pdev->device == PCI_DEVICE_ID_RD890_IOMMU);
|
|
|
|
}
|
|
|
|
|
2011-04-11 09:03:18 +00:00
|
|
|
static inline bool iommu_feature(struct amd_iommu *iommu, u64 f)
|
|
|
|
{
|
|
|
|
if (!(iommu->cap & (1 << IOMMU_CAP_EFR)))
|
|
|
|
return false;
|
|
|
|
|
|
|
|
return !!(iommu->features & f);
|
|
|
|
}
|
|
|
|
|
2017-07-17 21:10:24 +00:00
|
|
|
static inline u64 iommu_virt_to_phys(void *vaddr)
|
|
|
|
{
|
|
|
|
return (u64)__sme_set(virt_to_phys(vaddr));
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline void *iommu_phys_to_virt(unsigned long paddr)
|
|
|
|
{
|
|
|
|
return phys_to_virt(__sme_clr(paddr));
|
|
|
|
}
|
|
|
|
|
2017-08-09 08:33:33 +00:00
|
|
|
extern bool translation_pre_enabled(struct amd_iommu *iommu);
|
2017-08-09 08:33:43 +00:00
|
|
|
extern struct iommu_dev_data *get_dev_data(struct device *dev);
|
2009-11-20 12:22:21 +00:00
|
|
|
#endif /* _ASM_X86_AMD_IOMMU_PROTO_H */
|