2005-04-16 22:20:36 +00:00
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/*
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* Copyright (C) 2001 Ben. Herrenschmidt (benh@kernel.crashing.org)
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*
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2005-10-12 05:55:09 +00:00
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* Modifications for ppc64:
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* Copyright (C) 2003 Dave Engebretsen <engebret@us.ibm.com>
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*
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2005-04-16 22:20:36 +00:00
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version
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* 2 of the License, or (at your option) any later version.
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*/
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#include <linux/string.h>
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#include <linux/sched.h>
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#include <linux/threads.h>
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#include <linux/init.h>
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2005-09-27 20:13:12 +00:00
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#include <linux/module.h>
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#include <asm/oprofile_impl.h>
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2005-04-16 22:20:36 +00:00
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#include <asm/cputable.h>
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2006-10-24 06:42:40 +00:00
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#include <asm/prom.h> /* for PTRRELOC on ARCH=ppc */
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2005-04-16 22:20:36 +00:00
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2005-09-27 20:13:12 +00:00
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struct cpu_spec* cur_cpu_spec = NULL;
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2005-10-12 05:55:09 +00:00
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EXPORT_SYMBOL(cur_cpu_spec);
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2005-04-16 22:20:36 +00:00
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2005-10-12 05:55:09 +00:00
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/* NOTE:
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* Unlike ppc32, ppc64 will only call this once for the boot CPU, it's
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* the responsibility of the appropriate CPU save/restore functions to
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* eventually copy these settings over. Those save/restore aren't yet
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* part of the cputable though. That has to be fixed for both ppc32
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* and ppc64
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*/
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2006-05-19 04:24:18 +00:00
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#ifdef CONFIG_PPC32
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2005-09-27 20:13:12 +00:00
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extern void __setup_cpu_603(unsigned long offset, struct cpu_spec* spec);
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extern void __setup_cpu_604(unsigned long offset, struct cpu_spec* spec);
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extern void __setup_cpu_750(unsigned long offset, struct cpu_spec* spec);
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extern void __setup_cpu_750cx(unsigned long offset, struct cpu_spec* spec);
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extern void __setup_cpu_750fx(unsigned long offset, struct cpu_spec* spec);
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extern void __setup_cpu_7400(unsigned long offset, struct cpu_spec* spec);
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extern void __setup_cpu_7410(unsigned long offset, struct cpu_spec* spec);
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extern void __setup_cpu_745x(unsigned long offset, struct cpu_spec* spec);
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2005-10-12 05:55:09 +00:00
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#endif /* CONFIG_PPC32 */
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2006-08-11 05:07:08 +00:00
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#ifdef CONFIG_PPC64
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2005-09-27 20:13:12 +00:00
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extern void __setup_cpu_ppc970(unsigned long offset, struct cpu_spec* spec);
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2006-10-05 04:41:41 +00:00
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extern void __setup_cpu_ppc970MP(unsigned long offset, struct cpu_spec* spec);
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2007-02-04 22:36:51 +00:00
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extern void __setup_cpu_pa6t(unsigned long offset, struct cpu_spec* spec);
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2007-02-12 11:10:48 +00:00
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extern void __restore_cpu_pa6t(void);
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2006-08-11 05:07:08 +00:00
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extern void __restore_cpu_ppc970(void);
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#endif /* CONFIG_PPC64 */
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2005-04-16 22:20:36 +00:00
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/* This table only contains "desktop" CPUs, it need to be filled with embedded
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* ones as well...
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*/
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2005-10-12 05:55:09 +00:00
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#define COMMON_USER (PPC_FEATURE_32 | PPC_FEATURE_HAS_FPU | \
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PPC_FEATURE_HAS_MMU)
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#define COMMON_USER_PPC64 (COMMON_USER | PPC_FEATURE_64)
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2005-11-10 03:29:18 +00:00
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#define COMMON_USER_POWER4 (COMMON_USER_PPC64 | PPC_FEATURE_POWER4)
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2006-03-01 04:07:07 +00:00
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#define COMMON_USER_POWER5 (COMMON_USER_PPC64 | PPC_FEATURE_POWER5 |\
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PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP)
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#define COMMON_USER_POWER5_PLUS (COMMON_USER_PPC64 | PPC_FEATURE_POWER5_PLUS|\
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PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP)
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2006-04-28 23:51:06 +00:00
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#define COMMON_USER_POWER6 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_05 |\
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2006-06-07 06:14:40 +00:00
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PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \
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PPC_FEATURE_TRUE_LE)
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2006-09-06 19:35:57 +00:00
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#define COMMON_USER_PA6T (COMMON_USER_PPC64 | PPC_FEATURE_PA6T |\
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PPC_FEATURE_TRUE_LE | \
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PPC_FEATURE_HAS_ALTIVEC_COMP)
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2006-01-13 23:11:39 +00:00
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#define COMMON_USER_BOOKE (PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU | \
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PPC_FEATURE_BOOKE)
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2005-04-16 22:20:36 +00:00
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/* We only set the spe features if the kernel was compiled with
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* spe support
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*/
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#ifdef CONFIG_SPE
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2005-10-12 05:55:09 +00:00
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#define PPC_FEATURE_SPE_COMP PPC_FEATURE_HAS_SPE
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2005-04-16 22:20:36 +00:00
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#else
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2005-10-12 05:55:09 +00:00
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#define PPC_FEATURE_SPE_COMP 0
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2005-04-16 22:20:36 +00:00
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#endif
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2006-10-24 06:42:40 +00:00
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static struct cpu_spec cpu_specs[] = {
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2005-10-12 05:55:09 +00:00
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#ifdef CONFIG_PPC64
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{ /* Power3 */
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.pvr_mask = 0xffff0000,
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.pvr_value = 0x00400000,
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.cpu_name = "POWER3 (630)",
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.cpu_features = CPU_FTRS_POWER3,
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2006-06-07 06:14:40 +00:00
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.cpu_user_features = COMMON_USER_PPC64|PPC_FEATURE_PPC_LE,
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2005-10-12 05:55:09 +00:00
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.icache_bsize = 128,
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.dcache_bsize = 128,
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.num_pmcs = 8,
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2007-01-29 03:23:54 +00:00
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.pmc_type = PPC_PMC_IBM,
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2005-10-12 05:55:09 +00:00
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.oprofile_cpu_type = "ppc64/power3",
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2006-01-13 12:35:49 +00:00
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.oprofile_type = PPC_OPROFILE_RS64,
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2006-01-13 23:11:39 +00:00
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.platform = "power3",
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2005-10-12 05:55:09 +00:00
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},
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{ /* Power3+ */
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.pvr_mask = 0xffff0000,
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.pvr_value = 0x00410000,
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.cpu_name = "POWER3 (630+)",
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.cpu_features = CPU_FTRS_POWER3,
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2006-06-07 06:14:40 +00:00
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.cpu_user_features = COMMON_USER_PPC64|PPC_FEATURE_PPC_LE,
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2005-10-12 05:55:09 +00:00
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.icache_bsize = 128,
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.dcache_bsize = 128,
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.num_pmcs = 8,
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2007-01-29 03:23:54 +00:00
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.pmc_type = PPC_PMC_IBM,
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2005-10-12 05:55:09 +00:00
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.oprofile_cpu_type = "ppc64/power3",
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2006-01-13 12:35:49 +00:00
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.oprofile_type = PPC_OPROFILE_RS64,
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2006-01-13 23:11:39 +00:00
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.platform = "power3",
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2005-10-12 05:55:09 +00:00
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},
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{ /* Northstar */
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.pvr_mask = 0xffff0000,
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.pvr_value = 0x00330000,
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.cpu_name = "RS64-II (northstar)",
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.cpu_features = CPU_FTRS_RS64,
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.cpu_user_features = COMMON_USER_PPC64,
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.icache_bsize = 128,
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.dcache_bsize = 128,
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.num_pmcs = 8,
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2007-01-29 03:23:54 +00:00
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.pmc_type = PPC_PMC_IBM,
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2005-10-12 05:55:09 +00:00
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.oprofile_cpu_type = "ppc64/rs64",
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2006-01-13 12:35:49 +00:00
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.oprofile_type = PPC_OPROFILE_RS64,
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2006-01-13 23:11:39 +00:00
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.platform = "rs64",
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2005-10-12 05:55:09 +00:00
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},
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{ /* Pulsar */
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.pvr_mask = 0xffff0000,
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.pvr_value = 0x00340000,
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.cpu_name = "RS64-III (pulsar)",
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.cpu_features = CPU_FTRS_RS64,
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.cpu_user_features = COMMON_USER_PPC64,
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.icache_bsize = 128,
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.dcache_bsize = 128,
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.num_pmcs = 8,
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2007-01-29 03:23:54 +00:00
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.pmc_type = PPC_PMC_IBM,
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2005-10-12 05:55:09 +00:00
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.oprofile_cpu_type = "ppc64/rs64",
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2006-01-13 12:35:49 +00:00
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.oprofile_type = PPC_OPROFILE_RS64,
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2006-01-13 23:11:39 +00:00
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.platform = "rs64",
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2005-10-12 05:55:09 +00:00
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},
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{ /* I-star */
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.pvr_mask = 0xffff0000,
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.pvr_value = 0x00360000,
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.cpu_name = "RS64-III (icestar)",
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.cpu_features = CPU_FTRS_RS64,
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.cpu_user_features = COMMON_USER_PPC64,
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.icache_bsize = 128,
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.dcache_bsize = 128,
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.num_pmcs = 8,
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2007-01-29 03:23:54 +00:00
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.pmc_type = PPC_PMC_IBM,
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2005-10-12 05:55:09 +00:00
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.oprofile_cpu_type = "ppc64/rs64",
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2006-01-13 12:35:49 +00:00
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.oprofile_type = PPC_OPROFILE_RS64,
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2006-01-13 23:11:39 +00:00
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.platform = "rs64",
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2005-10-12 05:55:09 +00:00
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},
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{ /* S-star */
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.pvr_mask = 0xffff0000,
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.pvr_value = 0x00370000,
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.cpu_name = "RS64-IV (sstar)",
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.cpu_features = CPU_FTRS_RS64,
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.cpu_user_features = COMMON_USER_PPC64,
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.icache_bsize = 128,
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.dcache_bsize = 128,
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.num_pmcs = 8,
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2007-01-29 03:23:54 +00:00
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.pmc_type = PPC_PMC_IBM,
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2005-10-12 05:55:09 +00:00
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.oprofile_cpu_type = "ppc64/rs64",
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2006-01-13 12:35:49 +00:00
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.oprofile_type = PPC_OPROFILE_RS64,
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2006-01-13 23:11:39 +00:00
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.platform = "rs64",
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2005-10-12 05:55:09 +00:00
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},
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{ /* Power4 */
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.pvr_mask = 0xffff0000,
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.pvr_value = 0x00350000,
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.cpu_name = "POWER4 (gp)",
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.cpu_features = CPU_FTRS_POWER4,
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2005-11-10 03:29:18 +00:00
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.cpu_user_features = COMMON_USER_POWER4,
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2005-10-12 05:55:09 +00:00
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.icache_bsize = 128,
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.dcache_bsize = 128,
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.num_pmcs = 8,
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2007-01-29 03:23:54 +00:00
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.pmc_type = PPC_PMC_IBM,
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2005-10-12 05:55:09 +00:00
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.oprofile_cpu_type = "ppc64/power4",
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2006-01-13 12:35:49 +00:00
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.oprofile_type = PPC_OPROFILE_POWER4,
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2006-01-13 23:11:39 +00:00
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.platform = "power4",
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2005-10-12 05:55:09 +00:00
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},
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{ /* Power4+ */
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.pvr_mask = 0xffff0000,
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.pvr_value = 0x00380000,
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.cpu_name = "POWER4+ (gq)",
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.cpu_features = CPU_FTRS_POWER4,
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2005-11-10 03:29:18 +00:00
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.cpu_user_features = COMMON_USER_POWER4,
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2005-10-12 05:55:09 +00:00
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.icache_bsize = 128,
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.dcache_bsize = 128,
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.num_pmcs = 8,
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2007-01-29 03:23:54 +00:00
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.pmc_type = PPC_PMC_IBM,
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2005-10-12 05:55:09 +00:00
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.oprofile_cpu_type = "ppc64/power4",
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2006-01-13 12:35:49 +00:00
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.oprofile_type = PPC_OPROFILE_POWER4,
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2006-01-13 23:11:39 +00:00
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.platform = "power4",
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2005-10-12 05:55:09 +00:00
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},
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{ /* PPC970 */
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.pvr_mask = 0xffff0000,
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.pvr_value = 0x00390000,
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.cpu_name = "PPC970",
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.cpu_features = CPU_FTRS_PPC970,
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2005-11-10 03:29:18 +00:00
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.cpu_user_features = COMMON_USER_POWER4 |
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2005-10-12 05:55:09 +00:00
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PPC_FEATURE_HAS_ALTIVEC_COMP,
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.icache_bsize = 128,
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.dcache_bsize = 128,
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.num_pmcs = 8,
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2007-01-29 03:23:54 +00:00
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.pmc_type = PPC_PMC_IBM,
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2005-10-12 05:55:09 +00:00
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.cpu_setup = __setup_cpu_ppc970,
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2006-08-11 05:07:08 +00:00
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.cpu_restore = __restore_cpu_ppc970,
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2005-10-12 05:55:09 +00:00
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.oprofile_cpu_type = "ppc64/970",
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2006-01-13 12:35:49 +00:00
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.oprofile_type = PPC_OPROFILE_POWER4,
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2006-01-13 23:11:39 +00:00
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.platform = "ppc970",
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2005-10-12 05:55:09 +00:00
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},
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{ /* PPC970FX */
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.pvr_mask = 0xffff0000,
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.pvr_value = 0x003c0000,
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.cpu_name = "PPC970FX",
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.cpu_features = CPU_FTRS_PPC970,
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2005-11-10 03:29:18 +00:00
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.cpu_user_features = COMMON_USER_POWER4 |
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2005-10-12 05:55:09 +00:00
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PPC_FEATURE_HAS_ALTIVEC_COMP,
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.icache_bsize = 128,
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.dcache_bsize = 128,
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.num_pmcs = 8,
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2007-01-29 03:23:54 +00:00
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.pmc_type = PPC_PMC_IBM,
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2005-10-12 05:55:09 +00:00
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.cpu_setup = __setup_cpu_ppc970,
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2006-08-11 05:07:08 +00:00
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.cpu_restore = __restore_cpu_ppc970,
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2005-10-12 05:55:09 +00:00
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.oprofile_cpu_type = "ppc64/970",
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2006-01-13 12:35:49 +00:00
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.oprofile_type = PPC_OPROFILE_POWER4,
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2006-01-13 23:11:39 +00:00
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.platform = "ppc970",
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2007-02-26 06:35:14 +00:00
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},
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{ /* PPC970MP DD1.0 - no DEEPNAP, use regular 970 init */
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.pvr_mask = 0xffffffff,
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.pvr_value = 0x00440100,
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.cpu_name = "PPC970MP",
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.cpu_features = CPU_FTRS_PPC970,
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.cpu_user_features = COMMON_USER_POWER4 |
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PPC_FEATURE_HAS_ALTIVEC_COMP,
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.icache_bsize = 128,
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.dcache_bsize = 128,
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.num_pmcs = 8,
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2007-05-19 05:22:41 +00:00
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.pmc_type = PPC_PMC_IBM,
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2007-02-26 06:35:14 +00:00
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.cpu_setup = __setup_cpu_ppc970,
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.cpu_restore = __restore_cpu_ppc970,
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.oprofile_cpu_type = "ppc64/970MP",
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.oprofile_type = PPC_OPROFILE_POWER4,
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.platform = "ppc970",
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2005-10-12 05:55:09 +00:00
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},
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{ /* PPC970MP */
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.pvr_mask = 0xffff0000,
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.pvr_value = 0x00440000,
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.cpu_name = "PPC970MP",
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.cpu_features = CPU_FTRS_PPC970,
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2005-11-10 03:29:18 +00:00
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.cpu_user_features = COMMON_USER_POWER4 |
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2005-10-12 05:55:09 +00:00
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PPC_FEATURE_HAS_ALTIVEC_COMP,
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.icache_bsize = 128,
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|
|
|
.dcache_bsize = 128,
|
2006-05-04 19:44:26 +00:00
|
|
|
.num_pmcs = 8,
|
2007-05-19 05:22:41 +00:00
|
|
|
.pmc_type = PPC_PMC_IBM,
|
2006-10-05 04:41:41 +00:00
|
|
|
.cpu_setup = __setup_cpu_ppc970MP,
|
2006-08-11 05:07:08 +00:00
|
|
|
.cpu_restore = __restore_cpu_ppc970,
|
2006-11-21 20:41:54 +00:00
|
|
|
.oprofile_cpu_type = "ppc64/970MP",
|
2006-01-13 12:35:49 +00:00
|
|
|
.oprofile_type = PPC_OPROFILE_POWER4,
|
2006-01-13 23:11:39 +00:00
|
|
|
.platform = "ppc970",
|
2005-10-12 05:55:09 +00:00
|
|
|
},
|
2006-10-18 15:47:22 +00:00
|
|
|
{ /* PPC970GX */
|
|
|
|
.pvr_mask = 0xffff0000,
|
|
|
|
.pvr_value = 0x00450000,
|
|
|
|
.cpu_name = "PPC970GX",
|
|
|
|
.cpu_features = CPU_FTRS_PPC970,
|
|
|
|
.cpu_user_features = COMMON_USER_POWER4 |
|
|
|
|
PPC_FEATURE_HAS_ALTIVEC_COMP,
|
|
|
|
.icache_bsize = 128,
|
|
|
|
.dcache_bsize = 128,
|
|
|
|
.num_pmcs = 8,
|
2007-01-29 03:23:54 +00:00
|
|
|
.pmc_type = PPC_PMC_IBM,
|
2006-10-18 15:47:22 +00:00
|
|
|
.cpu_setup = __setup_cpu_ppc970,
|
|
|
|
.oprofile_cpu_type = "ppc64/970",
|
|
|
|
.oprofile_type = PPC_OPROFILE_POWER4,
|
|
|
|
.platform = "ppc970",
|
|
|
|
},
|
2005-11-07 00:06:55 +00:00
|
|
|
{ /* Power5 GR */
|
2005-10-12 05:55:09 +00:00
|
|
|
.pvr_mask = 0xffff0000,
|
|
|
|
.pvr_value = 0x003a0000,
|
|
|
|
.cpu_name = "POWER5 (gr)",
|
|
|
|
.cpu_features = CPU_FTRS_POWER5,
|
2005-11-10 03:29:18 +00:00
|
|
|
.cpu_user_features = COMMON_USER_POWER5,
|
2005-10-12 05:55:09 +00:00
|
|
|
.icache_bsize = 128,
|
|
|
|
.dcache_bsize = 128,
|
|
|
|
.num_pmcs = 6,
|
2007-01-29 03:23:54 +00:00
|
|
|
.pmc_type = PPC_PMC_IBM,
|
2005-10-12 05:55:09 +00:00
|
|
|
.oprofile_cpu_type = "ppc64/power5",
|
2006-01-13 12:35:49 +00:00
|
|
|
.oprofile_type = PPC_OPROFILE_POWER4,
|
2006-06-08 04:42:34 +00:00
|
|
|
/* SIHV / SIPR bits are implemented on POWER4+ (GQ)
|
|
|
|
* and above but only works on POWER5 and above
|
|
|
|
*/
|
|
|
|
.oprofile_mmcra_sihv = MMCRA_SIHV,
|
|
|
|
.oprofile_mmcra_sipr = MMCRA_SIPR,
|
2006-01-13 23:11:39 +00:00
|
|
|
.platform = "power5",
|
2005-10-12 05:55:09 +00:00
|
|
|
},
|
2007-07-10 18:13:47 +00:00
|
|
|
{ /* Power5++ */
|
|
|
|
.pvr_mask = 0xffffff00,
|
|
|
|
.pvr_value = 0x003b0300,
|
|
|
|
.cpu_name = "POWER5+ (gs)",
|
|
|
|
.cpu_features = CPU_FTRS_POWER5,
|
|
|
|
.cpu_user_features = COMMON_USER_POWER5_PLUS,
|
|
|
|
.icache_bsize = 128,
|
|
|
|
.dcache_bsize = 128,
|
|
|
|
.num_pmcs = 6,
|
|
|
|
.oprofile_cpu_type = "ppc64/power5++",
|
|
|
|
.oprofile_type = PPC_OPROFILE_POWER4,
|
|
|
|
.oprofile_mmcra_sihv = MMCRA_SIHV,
|
|
|
|
.oprofile_mmcra_sipr = MMCRA_SIPR,
|
|
|
|
.platform = "power5+",
|
|
|
|
},
|
2005-11-07 00:06:55 +00:00
|
|
|
{ /* Power5 GS */
|
2005-10-12 05:55:09 +00:00
|
|
|
.pvr_mask = 0xffff0000,
|
|
|
|
.pvr_value = 0x003b0000,
|
2006-01-09 04:42:30 +00:00
|
|
|
.cpu_name = "POWER5+ (gs)",
|
2005-10-12 05:55:09 +00:00
|
|
|
.cpu_features = CPU_FTRS_POWER5,
|
2005-11-10 03:29:18 +00:00
|
|
|
.cpu_user_features = COMMON_USER_POWER5_PLUS,
|
2005-10-12 05:55:09 +00:00
|
|
|
.icache_bsize = 128,
|
|
|
|
.dcache_bsize = 128,
|
|
|
|
.num_pmcs = 6,
|
2007-01-29 03:23:54 +00:00
|
|
|
.pmc_type = PPC_PMC_IBM,
|
2006-01-09 04:42:30 +00:00
|
|
|
.oprofile_cpu_type = "ppc64/power5+",
|
2006-01-13 12:35:49 +00:00
|
|
|
.oprofile_type = PPC_OPROFILE_POWER4,
|
2006-06-08 04:42:34 +00:00
|
|
|
.oprofile_mmcra_sihv = MMCRA_SIHV,
|
|
|
|
.oprofile_mmcra_sipr = MMCRA_SIPR,
|
2006-01-13 23:11:39 +00:00
|
|
|
.platform = "power5+",
|
2005-10-12 05:55:09 +00:00
|
|
|
},
|
2006-11-10 09:38:53 +00:00
|
|
|
{ /* POWER6 in P5+ mode; 2.04-compliant processor */
|
|
|
|
.pvr_mask = 0xffffffff,
|
|
|
|
.pvr_value = 0x0f000001,
|
|
|
|
.cpu_name = "POWER5+",
|
|
|
|
.cpu_features = CPU_FTRS_POWER5,
|
|
|
|
.cpu_user_features = COMMON_USER_POWER5_PLUS,
|
|
|
|
.icache_bsize = 128,
|
|
|
|
.dcache_bsize = 128,
|
|
|
|
.num_pmcs = 6,
|
2007-05-19 05:22:41 +00:00
|
|
|
.pmc_type = PPC_PMC_IBM,
|
2006-11-10 09:38:53 +00:00
|
|
|
.oprofile_cpu_type = "ppc64/power6",
|
|
|
|
.oprofile_type = PPC_OPROFILE_POWER4,
|
|
|
|
.oprofile_mmcra_sihv = POWER6_MMCRA_SIHV,
|
|
|
|
.oprofile_mmcra_sipr = POWER6_MMCRA_SIPR,
|
|
|
|
.oprofile_mmcra_clear = POWER6_MMCRA_THRM |
|
|
|
|
POWER6_MMCRA_OTHER,
|
|
|
|
.platform = "power5+",
|
|
|
|
},
|
2006-04-28 23:51:06 +00:00
|
|
|
{ /* Power6 */
|
|
|
|
.pvr_mask = 0xffff0000,
|
|
|
|
.pvr_value = 0x003e0000,
|
2006-11-10 09:38:53 +00:00
|
|
|
.cpu_name = "POWER6 (raw)",
|
|
|
|
.cpu_features = CPU_FTRS_POWER6,
|
|
|
|
.cpu_user_features = COMMON_USER_POWER6 |
|
|
|
|
PPC_FEATURE_POWER6_EXT,
|
|
|
|
.icache_bsize = 128,
|
|
|
|
.dcache_bsize = 128,
|
|
|
|
.num_pmcs = 6,
|
2007-05-19 05:22:41 +00:00
|
|
|
.pmc_type = PPC_PMC_IBM,
|
2006-11-10 09:38:53 +00:00
|
|
|
.oprofile_cpu_type = "ppc64/power6",
|
|
|
|
.oprofile_type = PPC_OPROFILE_POWER4,
|
|
|
|
.oprofile_mmcra_sihv = POWER6_MMCRA_SIHV,
|
|
|
|
.oprofile_mmcra_sipr = POWER6_MMCRA_SIPR,
|
|
|
|
.oprofile_mmcra_clear = POWER6_MMCRA_THRM |
|
|
|
|
POWER6_MMCRA_OTHER,
|
|
|
|
.platform = "power6x",
|
|
|
|
},
|
|
|
|
{ /* 2.05-compliant processor, i.e. Power6 "architected" mode */
|
|
|
|
.pvr_mask = 0xffffffff,
|
|
|
|
.pvr_value = 0x0f000002,
|
|
|
|
.cpu_name = "POWER6 (architected)",
|
2006-04-28 23:51:06 +00:00
|
|
|
.cpu_features = CPU_FTRS_POWER6,
|
|
|
|
.cpu_user_features = COMMON_USER_POWER6,
|
|
|
|
.icache_bsize = 128,
|
|
|
|
.dcache_bsize = 128,
|
2006-10-13 02:13:12 +00:00
|
|
|
.num_pmcs = 6,
|
2007-01-29 03:23:54 +00:00
|
|
|
.pmc_type = PPC_PMC_IBM,
|
2006-04-28 23:51:06 +00:00
|
|
|
.oprofile_cpu_type = "ppc64/power6",
|
|
|
|
.oprofile_type = PPC_OPROFILE_POWER4,
|
2006-06-08 04:42:34 +00:00
|
|
|
.oprofile_mmcra_sihv = POWER6_MMCRA_SIHV,
|
|
|
|
.oprofile_mmcra_sipr = POWER6_MMCRA_SIPR,
|
|
|
|
.oprofile_mmcra_clear = POWER6_MMCRA_THRM |
|
|
|
|
POWER6_MMCRA_OTHER,
|
2006-04-28 23:51:06 +00:00
|
|
|
.platform = "power6",
|
|
|
|
},
|
2006-01-04 19:55:53 +00:00
|
|
|
{ /* Cell Broadband Engine */
|
2005-10-12 05:55:09 +00:00
|
|
|
.pvr_mask = 0xffff0000,
|
|
|
|
.pvr_value = 0x00700000,
|
|
|
|
.cpu_name = "Cell Broadband Engine",
|
|
|
|
.cpu_features = CPU_FTRS_CELL,
|
|
|
|
.cpu_user_features = COMMON_USER_PPC64 |
|
2006-03-01 04:07:07 +00:00
|
|
|
PPC_FEATURE_CELL | PPC_FEATURE_HAS_ALTIVEC_COMP |
|
|
|
|
PPC_FEATURE_SMT,
|
2005-10-12 05:55:09 +00:00
|
|
|
.icache_bsize = 128,
|
|
|
|
.dcache_bsize = 128,
|
[POWERPC] cell: Add oprofile support
Add PPU event-based and cycle-based profiling support to Oprofile for Cell.
Oprofile is expected to collect data on all CPUs simultaneously.
However, there is one set of performance counters per node. There are
two hardware threads or virtual CPUs on each node. Hence, OProfile must
multiplex in time the performance counter collection on the two virtual
CPUs.
The multiplexing of the performance counters is done by a virtual
counter routine. Initially, the counters are configured to collect data
on the even CPUs in the system, one CPU per node. In order to capture
the PC for the virtual CPU when the performance counter interrupt occurs
(the specified number of events between samples has occurred), the even
processors are configured to handle the performance counter interrupts
for their node. The virtual counter routine is called via a kernel
timer after the virtual sample time. The routine stops the counters,
saves the current counts, loads the last counts for the other virtual
CPU on the node, sets interrupts to be handled by the other virtual CPU
and restarts the counters, the virtual timer routine is scheduled to run
again. The virtual sample time is kept relatively small to make sure
sampling occurs on both CPUs on the node with a relatively small
granularity. Whenever the counters overflow, the performance counter
interrupt is called to collect the PC for the CPU where data is being
collected.
The oprofile driver relies on a firmware RTAS call to setup the debug bus
to route the desired signals to the performance counter hardware to be
counted. The RTAS call must set the routing registers appropriately in
each of the islands to pass the signals down the debug bus as well as
routing the signals from a particular island onto the bus. There is a
second firmware RTAS call to reset the debug bus to the non pass thru
state when the counters are not in use.
Signed-off-by: Carl Love <carll@us.ibm.com>
Signed-off-by: Maynard Johnson <mpjohn@us.ibm.com>
Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-11-20 17:45:16 +00:00
|
|
|
.num_pmcs = 4,
|
2007-01-29 03:23:54 +00:00
|
|
|
.pmc_type = PPC_PMC_IBM,
|
[POWERPC] cell: Add oprofile support
Add PPU event-based and cycle-based profiling support to Oprofile for Cell.
Oprofile is expected to collect data on all CPUs simultaneously.
However, there is one set of performance counters per node. There are
two hardware threads or virtual CPUs on each node. Hence, OProfile must
multiplex in time the performance counter collection on the two virtual
CPUs.
The multiplexing of the performance counters is done by a virtual
counter routine. Initially, the counters are configured to collect data
on the even CPUs in the system, one CPU per node. In order to capture
the PC for the virtual CPU when the performance counter interrupt occurs
(the specified number of events between samples has occurred), the even
processors are configured to handle the performance counter interrupts
for their node. The virtual counter routine is called via a kernel
timer after the virtual sample time. The routine stops the counters,
saves the current counts, loads the last counts for the other virtual
CPU on the node, sets interrupts to be handled by the other virtual CPU
and restarts the counters, the virtual timer routine is scheduled to run
again. The virtual sample time is kept relatively small to make sure
sampling occurs on both CPUs on the node with a relatively small
granularity. Whenever the counters overflow, the performance counter
interrupt is called to collect the PC for the CPU where data is being
collected.
The oprofile driver relies on a firmware RTAS call to setup the debug bus
to route the desired signals to the performance counter hardware to be
counted. The RTAS call must set the routing registers appropriately in
each of the islands to pass the signals down the debug bus as well as
routing the signals from a particular island onto the bus. There is a
second firmware RTAS call to reset the debug bus to the non pass thru
state when the counters are not in use.
Signed-off-by: Carl Love <carll@us.ibm.com>
Signed-off-by: Maynard Johnson <mpjohn@us.ibm.com>
Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-11-20 17:45:16 +00:00
|
|
|
.oprofile_cpu_type = "ppc64/cell-be",
|
|
|
|
.oprofile_type = PPC_OPROFILE_CELL,
|
2006-01-13 23:11:39 +00:00
|
|
|
.platform = "ppc-cell-be",
|
2005-10-12 05:55:09 +00:00
|
|
|
},
|
2006-09-06 19:35:57 +00:00
|
|
|
{ /* PA Semi PA6T */
|
|
|
|
.pvr_mask = 0x7fff0000,
|
|
|
|
.pvr_value = 0x00900000,
|
|
|
|
.cpu_name = "PA6T",
|
|
|
|
.cpu_features = CPU_FTRS_PA6T,
|
|
|
|
.cpu_user_features = COMMON_USER_PA6T,
|
|
|
|
.icache_bsize = 64,
|
|
|
|
.dcache_bsize = 64,
|
|
|
|
.num_pmcs = 6,
|
2007-01-29 03:23:54 +00:00
|
|
|
.pmc_type = PPC_PMC_PA6T,
|
2007-02-04 22:36:51 +00:00
|
|
|
.cpu_setup = __setup_cpu_pa6t,
|
|
|
|
.cpu_restore = __restore_cpu_pa6t,
|
2007-04-18 06:38:21 +00:00
|
|
|
.oprofile_cpu_type = "ppc64/pa6t",
|
|
|
|
.oprofile_type = PPC_OPROFILE_PA6T,
|
2006-09-06 19:35:57 +00:00
|
|
|
.platform = "pa6t",
|
|
|
|
},
|
2005-10-12 05:55:09 +00:00
|
|
|
{ /* default match */
|
|
|
|
.pvr_mask = 0x00000000,
|
|
|
|
.pvr_value = 0x00000000,
|
|
|
|
.cpu_name = "POWER4 (compatible)",
|
|
|
|
.cpu_features = CPU_FTRS_COMPATIBLE,
|
|
|
|
.cpu_user_features = COMMON_USER_PPC64,
|
|
|
|
.icache_bsize = 128,
|
|
|
|
.dcache_bsize = 128,
|
|
|
|
.num_pmcs = 6,
|
2007-01-29 03:23:54 +00:00
|
|
|
.pmc_type = PPC_PMC_IBM,
|
2006-01-13 23:11:39 +00:00
|
|
|
.platform = "power4",
|
2005-10-12 05:55:09 +00:00
|
|
|
}
|
|
|
|
#endif /* CONFIG_PPC64 */
|
|
|
|
#ifdef CONFIG_PPC32
|
2005-04-16 22:20:36 +00:00
|
|
|
#if CLASSIC_PPC
|
2005-10-12 05:55:09 +00:00
|
|
|
{ /* 601 */
|
2005-04-16 22:20:36 +00:00
|
|
|
.pvr_mask = 0xffff0000,
|
|
|
|
.pvr_value = 0x00010000,
|
|
|
|
.cpu_name = "601",
|
2005-09-23 19:08:58 +00:00
|
|
|
.cpu_features = CPU_FTRS_PPC601,
|
2005-10-12 05:55:09 +00:00
|
|
|
.cpu_user_features = COMMON_USER | PPC_FEATURE_601_INSTR |
|
2005-10-12 04:22:50 +00:00
|
|
|
PPC_FEATURE_UNIFIED_CACHE | PPC_FEATURE_NO_TB,
|
2005-04-16 22:20:36 +00:00
|
|
|
.icache_bsize = 32,
|
|
|
|
.dcache_bsize = 32,
|
2006-01-13 23:11:39 +00:00
|
|
|
.platform = "ppc601",
|
2005-04-16 22:20:36 +00:00
|
|
|
},
|
|
|
|
{ /* 603 */
|
|
|
|
.pvr_mask = 0xffff0000,
|
|
|
|
.pvr_value = 0x00030000,
|
|
|
|
.cpu_name = "603",
|
2005-09-23 19:08:58 +00:00
|
|
|
.cpu_features = CPU_FTRS_603,
|
2006-06-07 06:14:40 +00:00
|
|
|
.cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
|
2005-04-16 22:20:36 +00:00
|
|
|
.icache_bsize = 32,
|
|
|
|
.dcache_bsize = 32,
|
2006-01-13 23:11:39 +00:00
|
|
|
.cpu_setup = __setup_cpu_603,
|
|
|
|
.platform = "ppc603",
|
2005-04-16 22:20:36 +00:00
|
|
|
},
|
|
|
|
{ /* 603e */
|
|
|
|
.pvr_mask = 0xffff0000,
|
|
|
|
.pvr_value = 0x00060000,
|
|
|
|
.cpu_name = "603e",
|
2005-09-23 19:08:58 +00:00
|
|
|
.cpu_features = CPU_FTRS_603,
|
2006-06-07 06:14:40 +00:00
|
|
|
.cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
|
2005-04-16 22:20:36 +00:00
|
|
|
.icache_bsize = 32,
|
|
|
|
.dcache_bsize = 32,
|
2006-01-13 23:11:39 +00:00
|
|
|
.cpu_setup = __setup_cpu_603,
|
|
|
|
.platform = "ppc603",
|
2005-04-16 22:20:36 +00:00
|
|
|
},
|
|
|
|
{ /* 603ev */
|
|
|
|
.pvr_mask = 0xffff0000,
|
|
|
|
.pvr_value = 0x00070000,
|
|
|
|
.cpu_name = "603ev",
|
2005-09-23 19:08:58 +00:00
|
|
|
.cpu_features = CPU_FTRS_603,
|
2006-06-07 06:14:40 +00:00
|
|
|
.cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
|
2005-04-16 22:20:36 +00:00
|
|
|
.icache_bsize = 32,
|
|
|
|
.dcache_bsize = 32,
|
2006-01-13 23:11:39 +00:00
|
|
|
.cpu_setup = __setup_cpu_603,
|
|
|
|
.platform = "ppc603",
|
2005-04-16 22:20:36 +00:00
|
|
|
},
|
|
|
|
{ /* 604 */
|
|
|
|
.pvr_mask = 0xffff0000,
|
|
|
|
.pvr_value = 0x00040000,
|
|
|
|
.cpu_name = "604",
|
2005-09-23 19:08:58 +00:00
|
|
|
.cpu_features = CPU_FTRS_604,
|
2006-06-07 06:14:40 +00:00
|
|
|
.cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
|
2005-04-16 22:20:36 +00:00
|
|
|
.icache_bsize = 32,
|
|
|
|
.dcache_bsize = 32,
|
|
|
|
.num_pmcs = 2,
|
2006-01-13 23:11:39 +00:00
|
|
|
.cpu_setup = __setup_cpu_604,
|
|
|
|
.platform = "ppc604",
|
2005-04-16 22:20:36 +00:00
|
|
|
},
|
|
|
|
{ /* 604e */
|
|
|
|
.pvr_mask = 0xfffff000,
|
|
|
|
.pvr_value = 0x00090000,
|
|
|
|
.cpu_name = "604e",
|
2005-09-23 19:08:58 +00:00
|
|
|
.cpu_features = CPU_FTRS_604,
|
2006-06-07 06:14:40 +00:00
|
|
|
.cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
|
2005-04-16 22:20:36 +00:00
|
|
|
.icache_bsize = 32,
|
|
|
|
.dcache_bsize = 32,
|
|
|
|
.num_pmcs = 4,
|
2006-01-13 23:11:39 +00:00
|
|
|
.cpu_setup = __setup_cpu_604,
|
|
|
|
.platform = "ppc604",
|
2005-04-16 22:20:36 +00:00
|
|
|
},
|
|
|
|
{ /* 604r */
|
|
|
|
.pvr_mask = 0xffff0000,
|
|
|
|
.pvr_value = 0x00090000,
|
|
|
|
.cpu_name = "604r",
|
2005-09-23 19:08:58 +00:00
|
|
|
.cpu_features = CPU_FTRS_604,
|
2006-06-07 06:14:40 +00:00
|
|
|
.cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
|
2005-04-16 22:20:36 +00:00
|
|
|
.icache_bsize = 32,
|
|
|
|
.dcache_bsize = 32,
|
|
|
|
.num_pmcs = 4,
|
2006-01-13 23:11:39 +00:00
|
|
|
.cpu_setup = __setup_cpu_604,
|
|
|
|
.platform = "ppc604",
|
2005-04-16 22:20:36 +00:00
|
|
|
},
|
|
|
|
{ /* 604ev */
|
|
|
|
.pvr_mask = 0xffff0000,
|
|
|
|
.pvr_value = 0x000a0000,
|
|
|
|
.cpu_name = "604ev",
|
2005-09-23 19:08:58 +00:00
|
|
|
.cpu_features = CPU_FTRS_604,
|
2006-06-07 06:14:40 +00:00
|
|
|
.cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
|
2005-04-16 22:20:36 +00:00
|
|
|
.icache_bsize = 32,
|
|
|
|
.dcache_bsize = 32,
|
|
|
|
.num_pmcs = 4,
|
2006-01-13 23:11:39 +00:00
|
|
|
.cpu_setup = __setup_cpu_604,
|
|
|
|
.platform = "ppc604",
|
2005-04-16 22:20:36 +00:00
|
|
|
},
|
|
|
|
{ /* 740/750 (0x4202, don't support TAU ?) */
|
|
|
|
.pvr_mask = 0xffffffff,
|
|
|
|
.pvr_value = 0x00084202,
|
|
|
|
.cpu_name = "740/750",
|
2005-09-23 19:08:58 +00:00
|
|
|
.cpu_features = CPU_FTRS_740_NOTAU,
|
2006-06-07 06:14:40 +00:00
|
|
|
.cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
|
2005-04-16 22:20:36 +00:00
|
|
|
.icache_bsize = 32,
|
|
|
|
.dcache_bsize = 32,
|
|
|
|
.num_pmcs = 4,
|
2006-01-13 23:11:39 +00:00
|
|
|
.cpu_setup = __setup_cpu_750,
|
|
|
|
.platform = "ppc750",
|
2005-04-16 22:20:36 +00:00
|
|
|
},
|
|
|
|
{ /* 750CX (80100 and 8010x?) */
|
|
|
|
.pvr_mask = 0xfffffff0,
|
|
|
|
.pvr_value = 0x00080100,
|
|
|
|
.cpu_name = "750CX",
|
2005-09-23 19:08:58 +00:00
|
|
|
.cpu_features = CPU_FTRS_750,
|
2006-06-07 06:14:40 +00:00
|
|
|
.cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
|
2005-04-16 22:20:36 +00:00
|
|
|
.icache_bsize = 32,
|
|
|
|
.dcache_bsize = 32,
|
|
|
|
.num_pmcs = 4,
|
2006-01-13 23:11:39 +00:00
|
|
|
.cpu_setup = __setup_cpu_750cx,
|
|
|
|
.platform = "ppc750",
|
2005-04-16 22:20:36 +00:00
|
|
|
},
|
|
|
|
{ /* 750CX (82201 and 82202) */
|
|
|
|
.pvr_mask = 0xfffffff0,
|
|
|
|
.pvr_value = 0x00082200,
|
|
|
|
.cpu_name = "750CX",
|
2005-09-23 19:08:58 +00:00
|
|
|
.cpu_features = CPU_FTRS_750,
|
2006-06-07 06:14:40 +00:00
|
|
|
.cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
|
2005-04-16 22:20:36 +00:00
|
|
|
.icache_bsize = 32,
|
|
|
|
.dcache_bsize = 32,
|
|
|
|
.num_pmcs = 4,
|
2006-01-13 23:11:39 +00:00
|
|
|
.cpu_setup = __setup_cpu_750cx,
|
|
|
|
.platform = "ppc750",
|
2005-04-16 22:20:36 +00:00
|
|
|
},
|
|
|
|
{ /* 750CXe (82214) */
|
|
|
|
.pvr_mask = 0xfffffff0,
|
|
|
|
.pvr_value = 0x00082210,
|
|
|
|
.cpu_name = "750CXe",
|
2005-09-23 19:08:58 +00:00
|
|
|
.cpu_features = CPU_FTRS_750,
|
2006-06-07 06:14:40 +00:00
|
|
|
.cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
|
2005-04-16 22:20:36 +00:00
|
|
|
.icache_bsize = 32,
|
|
|
|
.dcache_bsize = 32,
|
|
|
|
.num_pmcs = 4,
|
2006-01-13 23:11:39 +00:00
|
|
|
.cpu_setup = __setup_cpu_750cx,
|
|
|
|
.platform = "ppc750",
|
2005-04-16 22:20:36 +00:00
|
|
|
},
|
2005-09-03 22:55:52 +00:00
|
|
|
{ /* 750CXe "Gekko" (83214) */
|
|
|
|
.pvr_mask = 0xffffffff,
|
|
|
|
.pvr_value = 0x00083214,
|
|
|
|
.cpu_name = "750CXe",
|
2005-09-23 19:08:58 +00:00
|
|
|
.cpu_features = CPU_FTRS_750,
|
2006-06-07 06:14:40 +00:00
|
|
|
.cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
|
2005-09-03 22:55:52 +00:00
|
|
|
.icache_bsize = 32,
|
|
|
|
.dcache_bsize = 32,
|
|
|
|
.num_pmcs = 4,
|
2006-01-13 23:11:39 +00:00
|
|
|
.cpu_setup = __setup_cpu_750cx,
|
|
|
|
.platform = "ppc750",
|
2005-09-03 22:55:52 +00:00
|
|
|
},
|
2006-10-03 19:29:34 +00:00
|
|
|
{ /* 750CL */
|
|
|
|
.pvr_mask = 0xfffff0f0,
|
|
|
|
.pvr_value = 0x00087010,
|
|
|
|
.cpu_name = "750CL",
|
2007-04-12 18:33:25 +00:00
|
|
|
.cpu_features = CPU_FTRS_750CL,
|
2006-10-03 19:29:34 +00:00
|
|
|
.cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
|
|
|
|
.icache_bsize = 32,
|
|
|
|
.dcache_bsize = 32,
|
|
|
|
.num_pmcs = 4,
|
2007-04-12 18:33:25 +00:00
|
|
|
.cpu_setup = __setup_cpu_750,
|
2006-10-03 19:29:34 +00:00
|
|
|
.platform = "ppc750",
|
|
|
|
},
|
2005-09-03 22:55:51 +00:00
|
|
|
{ /* 745/755 */
|
|
|
|
.pvr_mask = 0xfffff000,
|
|
|
|
.pvr_value = 0x00083000,
|
|
|
|
.cpu_name = "745/755",
|
2005-09-23 19:08:58 +00:00
|
|
|
.cpu_features = CPU_FTRS_750,
|
2006-06-07 06:14:40 +00:00
|
|
|
.cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
|
2005-09-03 22:55:51 +00:00
|
|
|
.icache_bsize = 32,
|
|
|
|
.dcache_bsize = 32,
|
|
|
|
.num_pmcs = 4,
|
2006-01-13 23:11:39 +00:00
|
|
|
.cpu_setup = __setup_cpu_750,
|
|
|
|
.platform = "ppc750",
|
2005-09-03 22:55:51 +00:00
|
|
|
},
|
2005-04-16 22:20:36 +00:00
|
|
|
{ /* 750FX rev 1.x */
|
|
|
|
.pvr_mask = 0xffffff00,
|
|
|
|
.pvr_value = 0x70000100,
|
|
|
|
.cpu_name = "750FX",
|
2005-09-23 19:08:58 +00:00
|
|
|
.cpu_features = CPU_FTRS_750FX1,
|
2006-06-07 06:14:40 +00:00
|
|
|
.cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
|
2005-04-16 22:20:36 +00:00
|
|
|
.icache_bsize = 32,
|
|
|
|
.dcache_bsize = 32,
|
|
|
|
.num_pmcs = 4,
|
2006-01-13 23:11:39 +00:00
|
|
|
.cpu_setup = __setup_cpu_750,
|
|
|
|
.platform = "ppc750",
|
2005-04-16 22:20:36 +00:00
|
|
|
},
|
|
|
|
{ /* 750FX rev 2.0 must disable HID0[DPM] */
|
|
|
|
.pvr_mask = 0xffffffff,
|
|
|
|
.pvr_value = 0x70000200,
|
|
|
|
.cpu_name = "750FX",
|
2005-09-23 19:08:58 +00:00
|
|
|
.cpu_features = CPU_FTRS_750FX2,
|
2006-06-07 06:14:40 +00:00
|
|
|
.cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
|
2005-04-16 22:20:36 +00:00
|
|
|
.icache_bsize = 32,
|
|
|
|
.dcache_bsize = 32,
|
|
|
|
.num_pmcs = 4,
|
2006-01-13 23:11:39 +00:00
|
|
|
.cpu_setup = __setup_cpu_750,
|
|
|
|
.platform = "ppc750",
|
2005-04-16 22:20:36 +00:00
|
|
|
},
|
|
|
|
{ /* 750FX (All revs except 2.0) */
|
|
|
|
.pvr_mask = 0xffff0000,
|
|
|
|
.pvr_value = 0x70000000,
|
|
|
|
.cpu_name = "750FX",
|
2005-09-23 19:08:58 +00:00
|
|
|
.cpu_features = CPU_FTRS_750FX,
|
2006-06-07 06:14:40 +00:00
|
|
|
.cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
|
2005-04-16 22:20:36 +00:00
|
|
|
.icache_bsize = 32,
|
|
|
|
.dcache_bsize = 32,
|
|
|
|
.num_pmcs = 4,
|
2006-01-13 23:11:39 +00:00
|
|
|
.cpu_setup = __setup_cpu_750fx,
|
|
|
|
.platform = "ppc750",
|
2005-04-16 22:20:36 +00:00
|
|
|
},
|
|
|
|
{ /* 750GX */
|
|
|
|
.pvr_mask = 0xffff0000,
|
|
|
|
.pvr_value = 0x70020000,
|
|
|
|
.cpu_name = "750GX",
|
2005-09-23 19:08:58 +00:00
|
|
|
.cpu_features = CPU_FTRS_750GX,
|
2006-06-07 06:14:40 +00:00
|
|
|
.cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
|
2005-04-16 22:20:36 +00:00
|
|
|
.icache_bsize = 32,
|
|
|
|
.dcache_bsize = 32,
|
|
|
|
.num_pmcs = 4,
|
2006-01-13 23:11:39 +00:00
|
|
|
.cpu_setup = __setup_cpu_750fx,
|
|
|
|
.platform = "ppc750",
|
2005-04-16 22:20:36 +00:00
|
|
|
},
|
|
|
|
{ /* 740/750 (L2CR bit need fixup for 740) */
|
|
|
|
.pvr_mask = 0xffff0000,
|
|
|
|
.pvr_value = 0x00080000,
|
|
|
|
.cpu_name = "740/750",
|
2005-09-23 19:08:58 +00:00
|
|
|
.cpu_features = CPU_FTRS_740,
|
2006-06-07 06:14:40 +00:00
|
|
|
.cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
|
2005-04-16 22:20:36 +00:00
|
|
|
.icache_bsize = 32,
|
|
|
|
.dcache_bsize = 32,
|
|
|
|
.num_pmcs = 4,
|
2006-01-13 23:11:39 +00:00
|
|
|
.cpu_setup = __setup_cpu_750,
|
|
|
|
.platform = "ppc750",
|
2005-04-16 22:20:36 +00:00
|
|
|
},
|
|
|
|
{ /* 7400 rev 1.1 ? (no TAU) */
|
|
|
|
.pvr_mask = 0xffffffff,
|
|
|
|
.pvr_value = 0x000c1101,
|
|
|
|
.cpu_name = "7400 (1.1)",
|
2005-09-23 19:08:58 +00:00
|
|
|
.cpu_features = CPU_FTRS_7400_NOTAU,
|
2006-06-07 06:14:40 +00:00
|
|
|
.cpu_user_features = COMMON_USER |
|
|
|
|
PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
|
2005-04-16 22:20:36 +00:00
|
|
|
.icache_bsize = 32,
|
|
|
|
.dcache_bsize = 32,
|
|
|
|
.num_pmcs = 4,
|
2006-01-13 23:11:39 +00:00
|
|
|
.cpu_setup = __setup_cpu_7400,
|
|
|
|
.platform = "ppc7400",
|
2005-04-16 22:20:36 +00:00
|
|
|
},
|
|
|
|
{ /* 7400 */
|
|
|
|
.pvr_mask = 0xffff0000,
|
|
|
|
.pvr_value = 0x000c0000,
|
|
|
|
.cpu_name = "7400",
|
2005-09-23 19:08:58 +00:00
|
|
|
.cpu_features = CPU_FTRS_7400,
|
2006-06-07 06:14:40 +00:00
|
|
|
.cpu_user_features = COMMON_USER |
|
|
|
|
PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
|
2005-04-16 22:20:36 +00:00
|
|
|
.icache_bsize = 32,
|
|
|
|
.dcache_bsize = 32,
|
|
|
|
.num_pmcs = 4,
|
2006-01-13 23:11:39 +00:00
|
|
|
.cpu_setup = __setup_cpu_7400,
|
|
|
|
.platform = "ppc7400",
|
2005-04-16 22:20:36 +00:00
|
|
|
},
|
|
|
|
{ /* 7410 */
|
|
|
|
.pvr_mask = 0xffff0000,
|
|
|
|
.pvr_value = 0x800c0000,
|
|
|
|
.cpu_name = "7410",
|
2005-09-23 19:08:58 +00:00
|
|
|
.cpu_features = CPU_FTRS_7400,
|
2006-06-07 06:14:40 +00:00
|
|
|
.cpu_user_features = COMMON_USER |
|
|
|
|
PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
|
2005-04-16 22:20:36 +00:00
|
|
|
.icache_bsize = 32,
|
|
|
|
.dcache_bsize = 32,
|
|
|
|
.num_pmcs = 4,
|
2006-01-13 23:11:39 +00:00
|
|
|
.cpu_setup = __setup_cpu_7410,
|
|
|
|
.platform = "ppc7400",
|
2005-04-16 22:20:36 +00:00
|
|
|
},
|
|
|
|
{ /* 7450 2.0 - no doze/nap */
|
|
|
|
.pvr_mask = 0xffffffff,
|
|
|
|
.pvr_value = 0x80000200,
|
|
|
|
.cpu_name = "7450",
|
2005-09-23 19:08:58 +00:00
|
|
|
.cpu_features = CPU_FTRS_7450_20,
|
2006-06-07 06:14:40 +00:00
|
|
|
.cpu_user_features = COMMON_USER |
|
|
|
|
PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
|
2005-04-16 22:20:36 +00:00
|
|
|
.icache_bsize = 32,
|
|
|
|
.dcache_bsize = 32,
|
|
|
|
.num_pmcs = 6,
|
2005-12-16 02:02:04 +00:00
|
|
|
.cpu_setup = __setup_cpu_745x,
|
|
|
|
.oprofile_cpu_type = "ppc/7450",
|
2006-01-13 12:35:49 +00:00
|
|
|
.oprofile_type = PPC_OPROFILE_G4,
|
2006-01-13 23:11:39 +00:00
|
|
|
.platform = "ppc7450",
|
2005-04-16 22:20:36 +00:00
|
|
|
},
|
|
|
|
{ /* 7450 2.1 */
|
|
|
|
.pvr_mask = 0xffffffff,
|
|
|
|
.pvr_value = 0x80000201,
|
|
|
|
.cpu_name = "7450",
|
2005-09-23 19:08:58 +00:00
|
|
|
.cpu_features = CPU_FTRS_7450_21,
|
2006-06-07 06:14:40 +00:00
|
|
|
.cpu_user_features = COMMON_USER |
|
|
|
|
PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
|
2005-04-16 22:20:36 +00:00
|
|
|
.icache_bsize = 32,
|
|
|
|
.dcache_bsize = 32,
|
|
|
|
.num_pmcs = 6,
|
2005-12-16 02:02:04 +00:00
|
|
|
.cpu_setup = __setup_cpu_745x,
|
|
|
|
.oprofile_cpu_type = "ppc/7450",
|
2006-01-13 12:35:49 +00:00
|
|
|
.oprofile_type = PPC_OPROFILE_G4,
|
2006-01-13 23:11:39 +00:00
|
|
|
.platform = "ppc7450",
|
2005-04-16 22:20:36 +00:00
|
|
|
},
|
|
|
|
{ /* 7450 2.3 and newer */
|
|
|
|
.pvr_mask = 0xffff0000,
|
|
|
|
.pvr_value = 0x80000000,
|
|
|
|
.cpu_name = "7450",
|
2005-09-23 19:08:58 +00:00
|
|
|
.cpu_features = CPU_FTRS_7450_23,
|
2006-06-07 06:14:40 +00:00
|
|
|
.cpu_user_features = COMMON_USER |
|
|
|
|
PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
|
2005-04-16 22:20:36 +00:00
|
|
|
.icache_bsize = 32,
|
|
|
|
.dcache_bsize = 32,
|
|
|
|
.num_pmcs = 6,
|
2005-12-16 02:02:04 +00:00
|
|
|
.cpu_setup = __setup_cpu_745x,
|
|
|
|
.oprofile_cpu_type = "ppc/7450",
|
2006-01-13 12:35:49 +00:00
|
|
|
.oprofile_type = PPC_OPROFILE_G4,
|
2006-01-13 23:11:39 +00:00
|
|
|
.platform = "ppc7450",
|
2005-04-16 22:20:36 +00:00
|
|
|
},
|
|
|
|
{ /* 7455 rev 1.x */
|
|
|
|
.pvr_mask = 0xffffff00,
|
|
|
|
.pvr_value = 0x80010100,
|
|
|
|
.cpu_name = "7455",
|
2005-09-23 19:08:58 +00:00
|
|
|
.cpu_features = CPU_FTRS_7455_1,
|
2006-06-07 06:14:40 +00:00
|
|
|
.cpu_user_features = COMMON_USER |
|
|
|
|
PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
|
2005-04-16 22:20:36 +00:00
|
|
|
.icache_bsize = 32,
|
|
|
|
.dcache_bsize = 32,
|
|
|
|
.num_pmcs = 6,
|
2005-12-16 02:02:04 +00:00
|
|
|
.cpu_setup = __setup_cpu_745x,
|
|
|
|
.oprofile_cpu_type = "ppc/7450",
|
2006-01-13 12:35:49 +00:00
|
|
|
.oprofile_type = PPC_OPROFILE_G4,
|
2006-01-13 23:11:39 +00:00
|
|
|
.platform = "ppc7450",
|
2005-04-16 22:20:36 +00:00
|
|
|
},
|
|
|
|
{ /* 7455 rev 2.0 */
|
|
|
|
.pvr_mask = 0xffffffff,
|
|
|
|
.pvr_value = 0x80010200,
|
|
|
|
.cpu_name = "7455",
|
2005-09-23 19:08:58 +00:00
|
|
|
.cpu_features = CPU_FTRS_7455_20,
|
2006-06-07 06:14:40 +00:00
|
|
|
.cpu_user_features = COMMON_USER |
|
|
|
|
PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
|
2005-04-16 22:20:36 +00:00
|
|
|
.icache_bsize = 32,
|
|
|
|
.dcache_bsize = 32,
|
|
|
|
.num_pmcs = 6,
|
2005-12-16 02:02:04 +00:00
|
|
|
.cpu_setup = __setup_cpu_745x,
|
|
|
|
.oprofile_cpu_type = "ppc/7450",
|
2006-01-13 12:35:49 +00:00
|
|
|
.oprofile_type = PPC_OPROFILE_G4,
|
2006-01-13 23:11:39 +00:00
|
|
|
.platform = "ppc7450",
|
2005-04-16 22:20:36 +00:00
|
|
|
},
|
|
|
|
{ /* 7455 others */
|
|
|
|
.pvr_mask = 0xffff0000,
|
|
|
|
.pvr_value = 0x80010000,
|
|
|
|
.cpu_name = "7455",
|
2005-09-23 19:08:58 +00:00
|
|
|
.cpu_features = CPU_FTRS_7455,
|
2006-06-07 06:14:40 +00:00
|
|
|
.cpu_user_features = COMMON_USER |
|
|
|
|
PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
|
2005-04-16 22:20:36 +00:00
|
|
|
.icache_bsize = 32,
|
|
|
|
.dcache_bsize = 32,
|
|
|
|
.num_pmcs = 6,
|
2005-12-16 02:02:04 +00:00
|
|
|
.cpu_setup = __setup_cpu_745x,
|
|
|
|
.oprofile_cpu_type = "ppc/7450",
|
2006-01-13 12:35:49 +00:00
|
|
|
.oprofile_type = PPC_OPROFILE_G4,
|
2006-01-13 23:11:39 +00:00
|
|
|
.platform = "ppc7450",
|
2005-04-16 22:20:36 +00:00
|
|
|
},
|
|
|
|
{ /* 7447/7457 Rev 1.0 */
|
|
|
|
.pvr_mask = 0xffffffff,
|
|
|
|
.pvr_value = 0x80020100,
|
|
|
|
.cpu_name = "7447/7457",
|
2005-09-23 19:08:58 +00:00
|
|
|
.cpu_features = CPU_FTRS_7447_10,
|
2006-06-07 06:14:40 +00:00
|
|
|
.cpu_user_features = COMMON_USER |
|
|
|
|
PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
|
2005-04-16 22:20:36 +00:00
|
|
|
.icache_bsize = 32,
|
|
|
|
.dcache_bsize = 32,
|
|
|
|
.num_pmcs = 6,
|
2005-12-16 02:02:04 +00:00
|
|
|
.cpu_setup = __setup_cpu_745x,
|
|
|
|
.oprofile_cpu_type = "ppc/7450",
|
2006-01-13 12:35:49 +00:00
|
|
|
.oprofile_type = PPC_OPROFILE_G4,
|
2006-01-13 23:11:39 +00:00
|
|
|
.platform = "ppc7450",
|
2005-04-16 22:20:36 +00:00
|
|
|
},
|
|
|
|
{ /* 7447/7457 Rev 1.1 */
|
|
|
|
.pvr_mask = 0xffffffff,
|
|
|
|
.pvr_value = 0x80020101,
|
|
|
|
.cpu_name = "7447/7457",
|
2005-09-23 19:08:58 +00:00
|
|
|
.cpu_features = CPU_FTRS_7447_10,
|
2006-06-07 06:14:40 +00:00
|
|
|
.cpu_user_features = COMMON_USER |
|
|
|
|
PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
|
2005-04-16 22:20:36 +00:00
|
|
|
.icache_bsize = 32,
|
|
|
|
.dcache_bsize = 32,
|
|
|
|
.num_pmcs = 6,
|
2005-12-16 02:02:04 +00:00
|
|
|
.cpu_setup = __setup_cpu_745x,
|
|
|
|
.oprofile_cpu_type = "ppc/7450",
|
2006-01-13 12:35:49 +00:00
|
|
|
.oprofile_type = PPC_OPROFILE_G4,
|
2006-01-13 23:11:39 +00:00
|
|
|
.platform = "ppc7450",
|
2005-04-16 22:20:36 +00:00
|
|
|
},
|
|
|
|
{ /* 7447/7457 Rev 1.2 and later */
|
|
|
|
.pvr_mask = 0xffff0000,
|
|
|
|
.pvr_value = 0x80020000,
|
|
|
|
.cpu_name = "7447/7457",
|
2005-09-23 19:08:58 +00:00
|
|
|
.cpu_features = CPU_FTRS_7447,
|
2006-06-07 06:14:40 +00:00
|
|
|
.cpu_user_features = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
|
2005-04-16 22:20:36 +00:00
|
|
|
.icache_bsize = 32,
|
|
|
|
.dcache_bsize = 32,
|
|
|
|
.num_pmcs = 6,
|
2005-12-16 02:02:04 +00:00
|
|
|
.cpu_setup = __setup_cpu_745x,
|
|
|
|
.oprofile_cpu_type = "ppc/7450",
|
2006-01-13 12:35:49 +00:00
|
|
|
.oprofile_type = PPC_OPROFILE_G4,
|
2006-01-13 23:11:39 +00:00
|
|
|
.platform = "ppc7450",
|
2005-04-16 22:20:36 +00:00
|
|
|
},
|
|
|
|
{ /* 7447A */
|
|
|
|
.pvr_mask = 0xffff0000,
|
|
|
|
.pvr_value = 0x80030000,
|
|
|
|
.cpu_name = "7447A",
|
2005-09-23 19:08:58 +00:00
|
|
|
.cpu_features = CPU_FTRS_7447A,
|
2006-06-07 06:14:40 +00:00
|
|
|
.cpu_user_features = COMMON_USER |
|
|
|
|
PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
|
2005-09-03 22:55:55 +00:00
|
|
|
.icache_bsize = 32,
|
|
|
|
.dcache_bsize = 32,
|
|
|
|
.num_pmcs = 6,
|
2005-12-16 02:02:04 +00:00
|
|
|
.cpu_setup = __setup_cpu_745x,
|
|
|
|
.oprofile_cpu_type = "ppc/7450",
|
2006-01-13 12:35:49 +00:00
|
|
|
.oprofile_type = PPC_OPROFILE_G4,
|
2006-01-13 23:11:39 +00:00
|
|
|
.platform = "ppc7450",
|
2005-09-03 22:55:55 +00:00
|
|
|
},
|
|
|
|
{ /* 7448 */
|
|
|
|
.pvr_mask = 0xffff0000,
|
|
|
|
.pvr_value = 0x80040000,
|
|
|
|
.cpu_name = "7448",
|
2007-05-02 21:34:43 +00:00
|
|
|
.cpu_features = CPU_FTRS_7448,
|
2006-06-07 06:14:40 +00:00
|
|
|
.cpu_user_features = COMMON_USER |
|
|
|
|
PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
|
2005-04-16 22:20:36 +00:00
|
|
|
.icache_bsize = 32,
|
|
|
|
.dcache_bsize = 32,
|
|
|
|
.num_pmcs = 6,
|
2005-12-16 02:02:04 +00:00
|
|
|
.cpu_setup = __setup_cpu_745x,
|
|
|
|
.oprofile_cpu_type = "ppc/7450",
|
2006-01-13 12:35:49 +00:00
|
|
|
.oprofile_type = PPC_OPROFILE_G4,
|
2006-01-13 23:11:39 +00:00
|
|
|
.platform = "ppc7450",
|
2005-04-16 22:20:36 +00:00
|
|
|
},
|
|
|
|
{ /* 82xx (8240, 8245, 8260 are all 603e cores) */
|
|
|
|
.pvr_mask = 0x7fff0000,
|
|
|
|
.pvr_value = 0x00810000,
|
|
|
|
.cpu_name = "82xx",
|
2005-09-23 19:08:58 +00:00
|
|
|
.cpu_features = CPU_FTRS_82XX,
|
2005-10-12 05:55:09 +00:00
|
|
|
.cpu_user_features = COMMON_USER,
|
2005-04-16 22:20:36 +00:00
|
|
|
.icache_bsize = 32,
|
|
|
|
.dcache_bsize = 32,
|
2006-01-13 23:11:39 +00:00
|
|
|
.cpu_setup = __setup_cpu_603,
|
|
|
|
.platform = "ppc603",
|
2005-04-16 22:20:36 +00:00
|
|
|
},
|
|
|
|
{ /* All G2_LE (603e core, plus some) have the same pvr */
|
|
|
|
.pvr_mask = 0x7fff0000,
|
|
|
|
.pvr_value = 0x00820000,
|
|
|
|
.cpu_name = "G2_LE",
|
2005-09-23 19:08:58 +00:00
|
|
|
.cpu_features = CPU_FTRS_G2_LE,
|
2005-10-12 05:55:09 +00:00
|
|
|
.cpu_user_features = COMMON_USER,
|
2005-04-16 22:20:36 +00:00
|
|
|
.icache_bsize = 32,
|
|
|
|
.dcache_bsize = 32,
|
2006-01-13 23:11:39 +00:00
|
|
|
.cpu_setup = __setup_cpu_603,
|
|
|
|
.platform = "ppc603",
|
2005-04-16 22:20:36 +00:00
|
|
|
},
|
2006-10-03 01:10:24 +00:00
|
|
|
{ /* e300c1 (a 603e core, plus some) on 83xx */
|
2005-04-16 22:20:36 +00:00
|
|
|
.pvr_mask = 0x7fff0000,
|
|
|
|
.pvr_value = 0x00830000,
|
2006-10-03 01:10:24 +00:00
|
|
|
.cpu_name = "e300c1",
|
2005-09-23 19:08:58 +00:00
|
|
|
.cpu_features = CPU_FTRS_E300,
|
2005-10-12 05:55:09 +00:00
|
|
|
.cpu_user_features = COMMON_USER,
|
2005-04-16 22:20:36 +00:00
|
|
|
.icache_bsize = 32,
|
|
|
|
.dcache_bsize = 32,
|
2006-01-13 23:11:39 +00:00
|
|
|
.cpu_setup = __setup_cpu_603,
|
|
|
|
.platform = "ppc603",
|
2005-04-16 22:20:36 +00:00
|
|
|
},
|
2006-10-03 01:10:24 +00:00
|
|
|
{ /* e300c2 (an e300c1 core, plus some, minus FPU) on 83xx */
|
|
|
|
.pvr_mask = 0x7fff0000,
|
|
|
|
.pvr_value = 0x00840000,
|
|
|
|
.cpu_name = "e300c2",
|
2006-12-08 08:43:30 +00:00
|
|
|
.cpu_features = CPU_FTRS_E300C2,
|
2006-10-03 01:10:24 +00:00
|
|
|
.cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
|
|
|
|
.icache_bsize = 32,
|
|
|
|
.dcache_bsize = 32,
|
|
|
|
.cpu_setup = __setup_cpu_603,
|
|
|
|
.platform = "ppc603",
|
|
|
|
},
|
2006-12-01 18:57:05 +00:00
|
|
|
{ /* e300c3 on 83xx */
|
|
|
|
.pvr_mask = 0x7fff0000,
|
|
|
|
.pvr_value = 0x00850000,
|
|
|
|
.cpu_name = "e300c3",
|
|
|
|
.cpu_features = CPU_FTRS_E300,
|
|
|
|
.cpu_user_features = COMMON_USER,
|
|
|
|
.icache_bsize = 32,
|
|
|
|
.dcache_bsize = 32,
|
|
|
|
.cpu_setup = __setup_cpu_603,
|
|
|
|
.platform = "ppc603",
|
|
|
|
},
|
2005-04-16 22:20:36 +00:00
|
|
|
{ /* default match, we assume split I/D cache & TB (non-601)... */
|
|
|
|
.pvr_mask = 0x00000000,
|
|
|
|
.pvr_value = 0x00000000,
|
|
|
|
.cpu_name = "(generic PPC)",
|
2005-09-23 19:08:58 +00:00
|
|
|
.cpu_features = CPU_FTRS_CLASSIC32,
|
2005-10-12 05:55:09 +00:00
|
|
|
.cpu_user_features = COMMON_USER,
|
2005-04-16 22:20:36 +00:00
|
|
|
.icache_bsize = 32,
|
|
|
|
.dcache_bsize = 32,
|
2006-01-13 23:11:39 +00:00
|
|
|
.platform = "ppc603",
|
2005-04-16 22:20:36 +00:00
|
|
|
},
|
|
|
|
#endif /* CLASSIC_PPC */
|
|
|
|
#ifdef CONFIG_8xx
|
|
|
|
{ /* 8xx */
|
|
|
|
.pvr_mask = 0xffff0000,
|
|
|
|
.pvr_value = 0x00500000,
|
|
|
|
.cpu_name = "8xx",
|
|
|
|
/* CPU_FTR_MAYBE_CAN_DOZE is possible,
|
|
|
|
* if the 8xx code is there.... */
|
2005-09-23 19:08:58 +00:00
|
|
|
.cpu_features = CPU_FTRS_8XX,
|
2005-04-16 22:20:36 +00:00
|
|
|
.cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
|
|
|
|
.icache_bsize = 16,
|
|
|
|
.dcache_bsize = 16,
|
2006-01-13 23:11:39 +00:00
|
|
|
.platform = "ppc823",
|
2005-04-16 22:20:36 +00:00
|
|
|
},
|
|
|
|
#endif /* CONFIG_8xx */
|
|
|
|
#ifdef CONFIG_40x
|
|
|
|
{ /* 403GC */
|
|
|
|
.pvr_mask = 0xffffff00,
|
|
|
|
.pvr_value = 0x00200200,
|
|
|
|
.cpu_name = "403GC",
|
2005-09-23 19:08:58 +00:00
|
|
|
.cpu_features = CPU_FTRS_40X,
|
2005-04-16 22:20:36 +00:00
|
|
|
.cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
|
|
|
|
.icache_bsize = 16,
|
|
|
|
.dcache_bsize = 16,
|
2006-01-13 23:11:39 +00:00
|
|
|
.platform = "ppc403",
|
2005-04-16 22:20:36 +00:00
|
|
|
},
|
|
|
|
{ /* 403GCX */
|
|
|
|
.pvr_mask = 0xffffff00,
|
|
|
|
.pvr_value = 0x00201400,
|
|
|
|
.cpu_name = "403GCX",
|
2005-09-23 19:08:58 +00:00
|
|
|
.cpu_features = CPU_FTRS_40X,
|
2005-10-12 04:22:50 +00:00
|
|
|
.cpu_user_features = PPC_FEATURE_32 |
|
|
|
|
PPC_FEATURE_HAS_MMU | PPC_FEATURE_NO_TB,
|
2005-04-16 22:20:36 +00:00
|
|
|
.icache_bsize = 16,
|
|
|
|
.dcache_bsize = 16,
|
2006-01-13 23:11:39 +00:00
|
|
|
.platform = "ppc403",
|
2005-04-16 22:20:36 +00:00
|
|
|
},
|
|
|
|
{ /* 403G ?? */
|
|
|
|
.pvr_mask = 0xffff0000,
|
|
|
|
.pvr_value = 0x00200000,
|
|
|
|
.cpu_name = "403G ??",
|
2005-09-23 19:08:58 +00:00
|
|
|
.cpu_features = CPU_FTRS_40X,
|
2005-04-16 22:20:36 +00:00
|
|
|
.cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
|
|
|
|
.icache_bsize = 16,
|
|
|
|
.dcache_bsize = 16,
|
2006-01-13 23:11:39 +00:00
|
|
|
.platform = "ppc403",
|
2005-04-16 22:20:36 +00:00
|
|
|
},
|
|
|
|
{ /* 405GP */
|
|
|
|
.pvr_mask = 0xffff0000,
|
|
|
|
.pvr_value = 0x40110000,
|
|
|
|
.cpu_name = "405GP",
|
2005-09-23 19:08:58 +00:00
|
|
|
.cpu_features = CPU_FTRS_40X,
|
2005-04-16 22:20:36 +00:00
|
|
|
.cpu_user_features = PPC_FEATURE_32 |
|
|
|
|
PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
|
|
|
|
.icache_bsize = 32,
|
|
|
|
.dcache_bsize = 32,
|
2006-01-13 23:11:39 +00:00
|
|
|
.platform = "ppc405",
|
2005-04-16 22:20:36 +00:00
|
|
|
},
|
|
|
|
{ /* STB 03xxx */
|
|
|
|
.pvr_mask = 0xffff0000,
|
|
|
|
.pvr_value = 0x40130000,
|
|
|
|
.cpu_name = "STB03xxx",
|
2005-09-23 19:08:58 +00:00
|
|
|
.cpu_features = CPU_FTRS_40X,
|
2005-04-16 22:20:36 +00:00
|
|
|
.cpu_user_features = PPC_FEATURE_32 |
|
|
|
|
PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
|
|
|
|
.icache_bsize = 32,
|
|
|
|
.dcache_bsize = 32,
|
2006-01-13 23:11:39 +00:00
|
|
|
.platform = "ppc405",
|
2005-04-16 22:20:36 +00:00
|
|
|
},
|
|
|
|
{ /* STB 04xxx */
|
|
|
|
.pvr_mask = 0xffff0000,
|
|
|
|
.pvr_value = 0x41810000,
|
|
|
|
.cpu_name = "STB04xxx",
|
2005-09-23 19:08:58 +00:00
|
|
|
.cpu_features = CPU_FTRS_40X,
|
2005-04-16 22:20:36 +00:00
|
|
|
.cpu_user_features = PPC_FEATURE_32 |
|
|
|
|
PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
|
|
|
|
.icache_bsize = 32,
|
|
|
|
.dcache_bsize = 32,
|
2006-01-13 23:11:39 +00:00
|
|
|
.platform = "ppc405",
|
2005-04-16 22:20:36 +00:00
|
|
|
},
|
|
|
|
{ /* NP405L */
|
|
|
|
.pvr_mask = 0xffff0000,
|
|
|
|
.pvr_value = 0x41610000,
|
|
|
|
.cpu_name = "NP405L",
|
2005-09-23 19:08:58 +00:00
|
|
|
.cpu_features = CPU_FTRS_40X,
|
2005-04-16 22:20:36 +00:00
|
|
|
.cpu_user_features = PPC_FEATURE_32 |
|
|
|
|
PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
|
|
|
|
.icache_bsize = 32,
|
|
|
|
.dcache_bsize = 32,
|
2006-01-13 23:11:39 +00:00
|
|
|
.platform = "ppc405",
|
2005-04-16 22:20:36 +00:00
|
|
|
},
|
|
|
|
{ /* NP4GS3 */
|
|
|
|
.pvr_mask = 0xffff0000,
|
|
|
|
.pvr_value = 0x40B10000,
|
|
|
|
.cpu_name = "NP4GS3",
|
2005-09-23 19:08:58 +00:00
|
|
|
.cpu_features = CPU_FTRS_40X,
|
2005-04-16 22:20:36 +00:00
|
|
|
.cpu_user_features = PPC_FEATURE_32 |
|
|
|
|
PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
|
|
|
|
.icache_bsize = 32,
|
|
|
|
.dcache_bsize = 32,
|
2006-01-13 23:11:39 +00:00
|
|
|
.platform = "ppc405",
|
2005-04-16 22:20:36 +00:00
|
|
|
},
|
|
|
|
{ /* NP405H */
|
|
|
|
.pvr_mask = 0xffff0000,
|
|
|
|
.pvr_value = 0x41410000,
|
|
|
|
.cpu_name = "NP405H",
|
2005-09-23 19:08:58 +00:00
|
|
|
.cpu_features = CPU_FTRS_40X,
|
2005-04-16 22:20:36 +00:00
|
|
|
.cpu_user_features = PPC_FEATURE_32 |
|
|
|
|
PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
|
|
|
|
.icache_bsize = 32,
|
|
|
|
.dcache_bsize = 32,
|
2006-01-13 23:11:39 +00:00
|
|
|
.platform = "ppc405",
|
2005-04-16 22:20:36 +00:00
|
|
|
},
|
|
|
|
{ /* 405GPr */
|
|
|
|
.pvr_mask = 0xffff0000,
|
|
|
|
.pvr_value = 0x50910000,
|
|
|
|
.cpu_name = "405GPr",
|
2005-09-23 19:08:58 +00:00
|
|
|
.cpu_features = CPU_FTRS_40X,
|
2005-04-16 22:20:36 +00:00
|
|
|
.cpu_user_features = PPC_FEATURE_32 |
|
|
|
|
PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
|
|
|
|
.icache_bsize = 32,
|
|
|
|
.dcache_bsize = 32,
|
2006-01-13 23:11:39 +00:00
|
|
|
.platform = "ppc405",
|
2005-04-16 22:20:36 +00:00
|
|
|
},
|
|
|
|
{ /* STBx25xx */
|
|
|
|
.pvr_mask = 0xffff0000,
|
|
|
|
.pvr_value = 0x51510000,
|
|
|
|
.cpu_name = "STBx25xx",
|
2005-09-23 19:08:58 +00:00
|
|
|
.cpu_features = CPU_FTRS_40X,
|
2005-04-16 22:20:36 +00:00
|
|
|
.cpu_user_features = PPC_FEATURE_32 |
|
|
|
|
PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
|
|
|
|
.icache_bsize = 32,
|
|
|
|
.dcache_bsize = 32,
|
2006-01-13 23:11:39 +00:00
|
|
|
.platform = "ppc405",
|
2005-04-16 22:20:36 +00:00
|
|
|
},
|
|
|
|
{ /* 405LP */
|
|
|
|
.pvr_mask = 0xffff0000,
|
|
|
|
.pvr_value = 0x41F10000,
|
|
|
|
.cpu_name = "405LP",
|
2005-09-23 19:08:58 +00:00
|
|
|
.cpu_features = CPU_FTRS_40X,
|
2005-04-16 22:20:36 +00:00
|
|
|
.cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
|
|
|
|
.icache_bsize = 32,
|
|
|
|
.dcache_bsize = 32,
|
2006-01-13 23:11:39 +00:00
|
|
|
.platform = "ppc405",
|
2005-04-16 22:20:36 +00:00
|
|
|
},
|
|
|
|
{ /* Xilinx Virtex-II Pro */
|
2006-01-19 08:13:20 +00:00
|
|
|
.pvr_mask = 0xfffff000,
|
2005-04-16 22:20:36 +00:00
|
|
|
.pvr_value = 0x20010000,
|
|
|
|
.cpu_name = "Virtex-II Pro",
|
2005-09-23 19:08:58 +00:00
|
|
|
.cpu_features = CPU_FTRS_40X,
|
2005-04-16 22:20:36 +00:00
|
|
|
.cpu_user_features = PPC_FEATURE_32 |
|
|
|
|
PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
|
|
|
|
.icache_bsize = 32,
|
|
|
|
.dcache_bsize = 32,
|
2006-01-13 23:11:39 +00:00
|
|
|
.platform = "ppc405",
|
2005-04-16 22:20:36 +00:00
|
|
|
},
|
2006-01-19 08:13:20 +00:00
|
|
|
{ /* Xilinx Virtex-4 FX */
|
|
|
|
.pvr_mask = 0xfffff000,
|
|
|
|
.pvr_value = 0x20011000,
|
|
|
|
.cpu_name = "Virtex-4 FX",
|
|
|
|
.cpu_features = CPU_FTRS_40X,
|
|
|
|
.cpu_user_features = PPC_FEATURE_32 |
|
|
|
|
PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
|
|
|
|
.icache_bsize = 32,
|
|
|
|
.dcache_bsize = 32,
|
2006-09-14 19:18:38 +00:00
|
|
|
.platform = "ppc405",
|
2006-01-19 08:13:20 +00:00
|
|
|
},
|
2005-06-07 20:22:09 +00:00
|
|
|
{ /* 405EP */
|
|
|
|
.pvr_mask = 0xffff0000,
|
|
|
|
.pvr_value = 0x51210000,
|
|
|
|
.cpu_name = "405EP",
|
2005-09-23 19:08:58 +00:00
|
|
|
.cpu_features = CPU_FTRS_40X,
|
2005-06-07 20:22:09 +00:00
|
|
|
.cpu_user_features = PPC_FEATURE_32 |
|
|
|
|
PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
|
|
|
|
.icache_bsize = 32,
|
|
|
|
.dcache_bsize = 32,
|
2006-01-13 23:11:39 +00:00
|
|
|
.platform = "ppc405",
|
2005-06-07 20:22:09 +00:00
|
|
|
},
|
2005-04-16 22:20:36 +00:00
|
|
|
|
|
|
|
#endif /* CONFIG_40x */
|
|
|
|
#ifdef CONFIG_44x
|
2005-08-01 05:34:52 +00:00
|
|
|
{
|
|
|
|
.pvr_mask = 0xf0000fff,
|
|
|
|
.pvr_value = 0x40000850,
|
|
|
|
.cpu_name = "440EP Rev. A",
|
2005-09-23 19:08:58 +00:00
|
|
|
.cpu_features = CPU_FTRS_44X,
|
2006-01-13 23:11:39 +00:00
|
|
|
.cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
|
2005-08-01 05:34:52 +00:00
|
|
|
.icache_bsize = 32,
|
|
|
|
.dcache_bsize = 32,
|
2006-01-13 23:11:39 +00:00
|
|
|
.platform = "ppc440",
|
2005-08-01 05:34:52 +00:00
|
|
|
},
|
|
|
|
{
|
|
|
|
.pvr_mask = 0xf0000fff,
|
|
|
|
.pvr_value = 0x400008d3,
|
|
|
|
.cpu_name = "440EP Rev. B",
|
2005-09-23 19:08:58 +00:00
|
|
|
.cpu_features = CPU_FTRS_44X,
|
2006-01-13 23:11:39 +00:00
|
|
|
.cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
|
2005-08-01 05:34:52 +00:00
|
|
|
.icache_bsize = 32,
|
|
|
|
.dcache_bsize = 32,
|
2006-01-13 23:11:39 +00:00
|
|
|
.platform = "ppc440",
|
2005-08-01 05:34:52 +00:00
|
|
|
},
|
2005-10-12 05:55:09 +00:00
|
|
|
{ /* 440GP Rev. B */
|
2005-04-16 22:20:36 +00:00
|
|
|
.pvr_mask = 0xf0000fff,
|
|
|
|
.pvr_value = 0x40000440,
|
|
|
|
.cpu_name = "440GP Rev. B",
|
2005-09-23 19:08:58 +00:00
|
|
|
.cpu_features = CPU_FTRS_44X,
|
2006-01-13 23:11:39 +00:00
|
|
|
.cpu_user_features = COMMON_USER_BOOKE,
|
2005-04-16 22:20:36 +00:00
|
|
|
.icache_bsize = 32,
|
|
|
|
.dcache_bsize = 32,
|
2006-01-13 23:11:39 +00:00
|
|
|
.platform = "ppc440gp",
|
2005-04-16 22:20:36 +00:00
|
|
|
},
|
2005-10-12 05:55:09 +00:00
|
|
|
{ /* 440GP Rev. C */
|
2005-04-16 22:20:36 +00:00
|
|
|
.pvr_mask = 0xf0000fff,
|
|
|
|
.pvr_value = 0x40000481,
|
|
|
|
.cpu_name = "440GP Rev. C",
|
2005-09-23 19:08:58 +00:00
|
|
|
.cpu_features = CPU_FTRS_44X,
|
2006-01-13 23:11:39 +00:00
|
|
|
.cpu_user_features = COMMON_USER_BOOKE,
|
2005-04-16 22:20:36 +00:00
|
|
|
.icache_bsize = 32,
|
|
|
|
.dcache_bsize = 32,
|
2006-01-13 23:11:39 +00:00
|
|
|
.platform = "ppc440gp",
|
2005-04-16 22:20:36 +00:00
|
|
|
},
|
|
|
|
{ /* 440GX Rev. A */
|
|
|
|
.pvr_mask = 0xf0000fff,
|
|
|
|
.pvr_value = 0x50000850,
|
|
|
|
.cpu_name = "440GX Rev. A",
|
2005-09-23 19:08:58 +00:00
|
|
|
.cpu_features = CPU_FTRS_44X,
|
2006-01-13 23:11:39 +00:00
|
|
|
.cpu_user_features = COMMON_USER_BOOKE,
|
2005-04-16 22:20:36 +00:00
|
|
|
.icache_bsize = 32,
|
|
|
|
.dcache_bsize = 32,
|
2006-01-13 23:11:39 +00:00
|
|
|
.platform = "ppc440",
|
2005-04-16 22:20:36 +00:00
|
|
|
},
|
|
|
|
{ /* 440GX Rev. B */
|
|
|
|
.pvr_mask = 0xf0000fff,
|
|
|
|
.pvr_value = 0x50000851,
|
|
|
|
.cpu_name = "440GX Rev. B",
|
2005-09-23 19:08:58 +00:00
|
|
|
.cpu_features = CPU_FTRS_44X,
|
2006-01-13 23:11:39 +00:00
|
|
|
.cpu_user_features = COMMON_USER_BOOKE,
|
2005-04-16 22:20:36 +00:00
|
|
|
.icache_bsize = 32,
|
|
|
|
.dcache_bsize = 32,
|
2006-01-13 23:11:39 +00:00
|
|
|
.platform = "ppc440",
|
2005-04-16 22:20:36 +00:00
|
|
|
},
|
|
|
|
{ /* 440GX Rev. C */
|
|
|
|
.pvr_mask = 0xf0000fff,
|
|
|
|
.pvr_value = 0x50000892,
|
|
|
|
.cpu_name = "440GX Rev. C",
|
2005-09-23 19:08:58 +00:00
|
|
|
.cpu_features = CPU_FTRS_44X,
|
2006-01-13 23:11:39 +00:00
|
|
|
.cpu_user_features = COMMON_USER_BOOKE,
|
2005-04-16 22:20:36 +00:00
|
|
|
.icache_bsize = 32,
|
|
|
|
.dcache_bsize = 32,
|
2006-01-13 23:11:39 +00:00
|
|
|
.platform = "ppc440",
|
2005-04-16 22:20:36 +00:00
|
|
|
},
|
2005-09-03 22:55:40 +00:00
|
|
|
{ /* 440GX Rev. F */
|
|
|
|
.pvr_mask = 0xf0000fff,
|
|
|
|
.pvr_value = 0x50000894,
|
|
|
|
.cpu_name = "440GX Rev. F",
|
2005-09-23 19:08:58 +00:00
|
|
|
.cpu_features = CPU_FTRS_44X,
|
2006-01-13 23:11:39 +00:00
|
|
|
.cpu_user_features = COMMON_USER_BOOKE,
|
2005-09-03 22:55:40 +00:00
|
|
|
.icache_bsize = 32,
|
|
|
|
.dcache_bsize = 32,
|
2006-01-13 23:11:39 +00:00
|
|
|
.platform = "ppc440",
|
2005-09-03 22:55:40 +00:00
|
|
|
},
|
2005-09-03 22:55:42 +00:00
|
|
|
{ /* 440SP Rev. A */
|
2007-06-15 19:36:32 +00:00
|
|
|
.pvr_mask = 0xfff00fff,
|
|
|
|
.pvr_value = 0x53200891,
|
2005-09-03 22:55:42 +00:00
|
|
|
.cpu_name = "440SP Rev. A",
|
2005-09-23 19:08:58 +00:00
|
|
|
.cpu_features = CPU_FTRS_44X,
|
2006-01-13 23:11:39 +00:00
|
|
|
.cpu_user_features = COMMON_USER_BOOKE,
|
2005-09-03 22:55:42 +00:00
|
|
|
.icache_bsize = 32,
|
|
|
|
.dcache_bsize = 32,
|
2006-01-13 23:11:39 +00:00
|
|
|
.platform = "ppc440",
|
2005-09-03 22:55:42 +00:00
|
|
|
},
|
2005-11-07 08:58:13 +00:00
|
|
|
{ /* 440SPe Rev. A */
|
2007-06-15 19:36:32 +00:00
|
|
|
.pvr_mask = 0xfff00fff,
|
|
|
|
.pvr_value = 0x53400890,
|
|
|
|
.cpu_name = "440SPe Rev. A",
|
|
|
|
.cpu_features = CPU_FTRS_44X,
|
|
|
|
.cpu_user_features = COMMON_USER_BOOKE,
|
|
|
|
.icache_bsize = 32,
|
|
|
|
.dcache_bsize = 32,
|
|
|
|
.platform = "ppc440",
|
|
|
|
},
|
|
|
|
{ /* 440SPe Rev. B */
|
|
|
|
.pvr_mask = 0xfff00fff,
|
|
|
|
.pvr_value = 0x53400891,
|
|
|
|
.cpu_name = "440SPe Rev. B",
|
2006-12-08 08:34:38 +00:00
|
|
|
.cpu_features = CPU_FTRS_44X,
|
2006-01-13 23:11:39 +00:00
|
|
|
.cpu_user_features = COMMON_USER_BOOKE,
|
2005-11-07 08:58:13 +00:00
|
|
|
.icache_bsize = 32,
|
|
|
|
.dcache_bsize = 32,
|
2006-01-13 23:11:39 +00:00
|
|
|
.platform = "ppc440",
|
2005-11-07 08:58:13 +00:00
|
|
|
},
|
2005-04-16 22:20:36 +00:00
|
|
|
#endif /* CONFIG_44x */
|
2005-06-25 21:54:37 +00:00
|
|
|
#ifdef CONFIG_FSL_BOOKE
|
2005-10-12 05:55:09 +00:00
|
|
|
{ /* e200z5 */
|
2005-06-25 21:54:37 +00:00
|
|
|
.pvr_mask = 0xfff00000,
|
|
|
|
.pvr_value = 0x81000000,
|
|
|
|
.cpu_name = "e200z5",
|
|
|
|
/* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
|
2005-09-23 19:08:58 +00:00
|
|
|
.cpu_features = CPU_FTRS_E200,
|
2006-01-13 23:11:39 +00:00
|
|
|
.cpu_user_features = COMMON_USER_BOOKE |
|
|
|
|
PPC_FEATURE_HAS_EFP_SINGLE |
|
2005-06-25 21:54:37 +00:00
|
|
|
PPC_FEATURE_UNIFIED_CACHE,
|
|
|
|
.dcache_bsize = 32,
|
2006-01-13 23:11:39 +00:00
|
|
|
.platform = "ppc5554",
|
2005-06-25 21:54:37 +00:00
|
|
|
},
|
2005-10-12 05:55:09 +00:00
|
|
|
{ /* e200z6 */
|
2005-06-25 21:54:37 +00:00
|
|
|
.pvr_mask = 0xfff00000,
|
|
|
|
.pvr_value = 0x81100000,
|
|
|
|
.cpu_name = "e200z6",
|
|
|
|
/* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
|
2005-09-23 19:08:58 +00:00
|
|
|
.cpu_features = CPU_FTRS_E200,
|
2006-01-13 23:11:39 +00:00
|
|
|
.cpu_user_features = COMMON_USER_BOOKE |
|
|
|
|
PPC_FEATURE_SPE_COMP |
|
2005-06-25 21:54:37 +00:00
|
|
|
PPC_FEATURE_HAS_EFP_SINGLE |
|
|
|
|
PPC_FEATURE_UNIFIED_CACHE,
|
|
|
|
.dcache_bsize = 32,
|
2006-01-13 23:11:39 +00:00
|
|
|
.platform = "ppc5554",
|
2005-06-25 21:54:37 +00:00
|
|
|
},
|
2005-10-12 05:55:09 +00:00
|
|
|
{ /* e500 */
|
2005-04-16 22:20:36 +00:00
|
|
|
.pvr_mask = 0xffff0000,
|
|
|
|
.pvr_value = 0x80200000,
|
|
|
|
.cpu_name = "e500",
|
|
|
|
/* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
|
2005-09-23 19:08:58 +00:00
|
|
|
.cpu_features = CPU_FTRS_E500,
|
2006-01-13 23:11:39 +00:00
|
|
|
.cpu_user_features = COMMON_USER_BOOKE |
|
|
|
|
PPC_FEATURE_SPE_COMP |
|
2005-04-16 22:20:36 +00:00
|
|
|
PPC_FEATURE_HAS_EFP_SINGLE,
|
|
|
|
.icache_bsize = 32,
|
|
|
|
.dcache_bsize = 32,
|
|
|
|
.num_pmcs = 4,
|
2005-12-16 02:02:04 +00:00
|
|
|
.oprofile_cpu_type = "ppc/e500",
|
2006-01-13 12:35:49 +00:00
|
|
|
.oprofile_type = PPC_OPROFILE_BOOKE,
|
2006-01-13 23:11:39 +00:00
|
|
|
.platform = "ppc8540",
|
2005-04-16 22:20:36 +00:00
|
|
|
},
|
2005-10-12 05:55:09 +00:00
|
|
|
{ /* e500v2 */
|
2005-06-22 00:15:18 +00:00
|
|
|
.pvr_mask = 0xffff0000,
|
|
|
|
.pvr_value = 0x80210000,
|
|
|
|
.cpu_name = "e500v2",
|
|
|
|
/* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
|
2005-09-23 19:08:58 +00:00
|
|
|
.cpu_features = CPU_FTRS_E500_2,
|
2006-01-13 23:11:39 +00:00
|
|
|
.cpu_user_features = COMMON_USER_BOOKE |
|
|
|
|
PPC_FEATURE_SPE_COMP |
|
|
|
|
PPC_FEATURE_HAS_EFP_SINGLE |
|
|
|
|
PPC_FEATURE_HAS_EFP_DOUBLE,
|
2005-06-22 00:15:18 +00:00
|
|
|
.icache_bsize = 32,
|
|
|
|
.dcache_bsize = 32,
|
|
|
|
.num_pmcs = 4,
|
2005-12-16 02:02:04 +00:00
|
|
|
.oprofile_cpu_type = "ppc/e500",
|
2006-01-13 12:35:49 +00:00
|
|
|
.oprofile_type = PPC_OPROFILE_BOOKE,
|
2006-01-13 23:11:39 +00:00
|
|
|
.platform = "ppc8548",
|
2005-06-22 00:15:18 +00:00
|
|
|
},
|
2005-04-16 22:20:36 +00:00
|
|
|
#endif
|
|
|
|
#if !CLASSIC_PPC
|
|
|
|
{ /* default match */
|
|
|
|
.pvr_mask = 0x00000000,
|
|
|
|
.pvr_value = 0x00000000,
|
|
|
|
.cpu_name = "(generic PPC)",
|
2005-09-23 19:08:58 +00:00
|
|
|
.cpu_features = CPU_FTRS_GENERIC_32,
|
2005-04-16 22:20:36 +00:00
|
|
|
.cpu_user_features = PPC_FEATURE_32,
|
|
|
|
.icache_bsize = 32,
|
|
|
|
.dcache_bsize = 32,
|
2006-01-13 23:11:39 +00:00
|
|
|
.platform = "powerpc",
|
2005-04-16 22:20:36 +00:00
|
|
|
}
|
|
|
|
#endif /* !CLASSIC_PPC */
|
2005-10-12 05:55:09 +00:00
|
|
|
#endif /* CONFIG_PPC32 */
|
2005-04-16 22:20:36 +00:00
|
|
|
};
|
2006-10-24 06:42:40 +00:00
|
|
|
|
2006-11-10 09:38:53 +00:00
|
|
|
struct cpu_spec *identify_cpu(unsigned long offset, unsigned int pvr)
|
2006-10-24 06:42:40 +00:00
|
|
|
{
|
|
|
|
struct cpu_spec *s = cpu_specs;
|
|
|
|
struct cpu_spec **cur = &cur_cpu_spec;
|
|
|
|
int i;
|
|
|
|
|
|
|
|
s = PTRRELOC(s);
|
|
|
|
cur = PTRRELOC(cur);
|
|
|
|
|
|
|
|
for (i = 0; i < ARRAY_SIZE(cpu_specs); i++,s++)
|
|
|
|
if ((pvr & s->pvr_mask) == s->pvr_value) {
|
|
|
|
*cur = cpu_specs + i;
|
|
|
|
#ifdef CONFIG_PPC64
|
|
|
|
/* ppc64 expects identify_cpu to also call setup_cpu
|
|
|
|
* for that processor. I will consolidate that at a
|
|
|
|
* later time, for now, just use our friend #ifdef.
|
|
|
|
* we also don't need to PTRRELOC the function pointer
|
|
|
|
* on ppc64 as we are running at 0 in real mode.
|
|
|
|
*/
|
|
|
|
if (s->cpu_setup) {
|
|
|
|
s->cpu_setup(offset, s);
|
|
|
|
}
|
|
|
|
#endif /* CONFIG_PPC64 */
|
|
|
|
return s;
|
|
|
|
}
|
|
|
|
BUG();
|
|
|
|
return NULL;
|
|
|
|
}
|
|
|
|
|
2006-10-20 01:47:18 +00:00
|
|
|
void do_feature_fixups(unsigned long value, void *fixup_start, void *fixup_end)
|
2006-10-24 06:42:40 +00:00
|
|
|
{
|
|
|
|
struct fixup_entry {
|
|
|
|
unsigned long mask;
|
|
|
|
unsigned long value;
|
2006-10-20 01:47:18 +00:00
|
|
|
long start_off;
|
|
|
|
long end_off;
|
2006-10-24 06:42:40 +00:00
|
|
|
} *fcur, *fend;
|
|
|
|
|
|
|
|
fcur = fixup_start;
|
|
|
|
fend = fixup_end;
|
|
|
|
|
|
|
|
for (; fcur < fend; fcur++) {
|
|
|
|
unsigned int *pstart, *pend, *p;
|
|
|
|
|
|
|
|
if ((value & fcur->mask) == fcur->value)
|
|
|
|
continue;
|
|
|
|
|
|
|
|
/* These PTRRELOCs will disappear once the new scheme for
|
|
|
|
* modules and vdso is implemented
|
|
|
|
*/
|
2006-10-20 01:47:18 +00:00
|
|
|
pstart = ((unsigned int *)fcur) + (fcur->start_off / 4);
|
|
|
|
pend = ((unsigned int *)fcur) + (fcur->end_off / 4);
|
2006-10-24 06:42:40 +00:00
|
|
|
|
|
|
|
for (p = pstart; p < pend; p++) {
|
|
|
|
*p = 0x60000000u;
|
|
|
|
asm volatile ("dcbst 0, %0" : : "r" (p));
|
|
|
|
}
|
|
|
|
asm volatile ("sync" : : : "memory");
|
|
|
|
for (p = pstart; p < pend; p++)
|
|
|
|
asm volatile ("icbi 0,%0" : : "r" (p));
|
|
|
|
asm volatile ("sync; isync" : : : "memory");
|
|
|
|
}
|
|
|
|
}
|