2019-05-29 14:18:04 +00:00
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/* SPDX-License-Identifier: GPL-2.0-only */
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2013-09-05 23:41:31 +00:00
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/*
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* Intel MIC Platform Software Stack (MPSS)
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*
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* Copyright(c) 2013 Intel Corporation.
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*
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* Intel MIC driver.
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*/
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2013-09-27 16:49:42 +00:00
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#ifndef __MIC_DEV_H__
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#define __MIC_DEV_H__
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2013-09-05 23:41:31 +00:00
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2015-09-30 01:13:54 +00:00
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/* The maximum number of MIC devices supported in a single host system. */
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#define MIC_MAX_NUM_DEVS 128
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/**
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* enum mic_hw_family - The hardware family to which a device belongs.
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*/
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enum mic_hw_family {
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MIC_FAMILY_X100 = 0,
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MIC_FAMILY_X200,
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MIC_FAMILY_UNKNOWN,
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MIC_FAMILY_LAST
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};
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2013-09-05 23:41:31 +00:00
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/**
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* struct mic_mw - MIC memory window
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*
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* @pa: Base physical address.
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* @va: Base ioremap'd virtual address.
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* @len: Size of the memory window.
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*/
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struct mic_mw {
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phys_addr_t pa;
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void __iomem *va;
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resource_size_t len;
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};
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2013-09-05 23:41:55 +00:00
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/*
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* Scratch pad register offsets used by the host to communicate
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* device page DMA address to the card.
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*/
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#define MIC_DPLO_SPAD 14
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#define MIC_DPHI_SPAD 15
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2013-09-05 23:42:18 +00:00
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/*
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* These values are supposed to be in the config_change field of the
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* device page when the host sends a config change interrupt to the card.
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*/
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#define MIC_VIRTIO_PARAM_DEV_REMOVE 0x1
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#define MIC_VIRTIO_PARAM_CONFIG_CHANGED 0x2
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2015-04-29 12:32:32 +00:00
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/* Maximum number of DMA channels */
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#define MIC_MAX_DMA_CHAN 4
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2013-09-05 23:41:31 +00:00
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#endif
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