2012-09-13 15:41:48 +00:00
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/*
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* Device Tree Include file for Marvell Armada XP family SoC
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*
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* Copyright (C) 2012 Marvell
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*
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* Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
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*
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* This file is licensed under the terms of the GNU General Public
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* License version 2. This program is licensed "as is" without any
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* warranty of any kind, whether express or implied.
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*
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* Contains definitions specific to the Armada XP MV78260 SoC that are not
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* common to all Armada XP SoCs.
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*/
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/include/ "armada-xp.dtsi"
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/ {
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model = "Marvell Armada XP MV78260 SoC";
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compatible = "marvell,armadaxp-mv78260", "marvell,armadaxp", "marvell,armada-370-xp";
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2012-09-19 20:53:01 +00:00
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aliases {
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gpio0 = &gpio0;
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gpio1 = &gpio1;
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gpio2 = &gpio2;
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};
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2012-11-17 14:22:24 +00:00
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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cpu@0 {
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device_type = "cpu";
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compatible = "marvell,sheeva-v7";
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reg = <0>;
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clocks = <&cpuclk 0>;
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};
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cpu@1 {
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device_type = "cpu";
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compatible = "marvell,sheeva-v7";
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reg = <1>;
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clocks = <&cpuclk 1>;
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};
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};
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2012-09-13 15:41:48 +00:00
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soc {
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pinctrl {
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compatible = "marvell,mv78260-pinctrl";
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reg = <0xd0018000 0x38>;
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};
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2012-09-19 20:53:01 +00:00
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gpio0: gpio@d0018100 {
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compatible = "marvell,armadaxp-gpio";
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reg = <0xd0018100 0x40>,
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<0xd0018800 0x30>;
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ngpios = <32>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupts-cells = <2>;
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interrupts = <16>, <17>, <18>, <19>;
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};
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gpio1: gpio@d0018140 {
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compatible = "marvell,armadaxp-gpio";
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reg = <0xd0018140 0x40>,
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<0xd0018840 0x30>;
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ngpios = <32>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupts-cells = <2>;
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interrupts = <20>, <21>, <22>, <23>;
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};
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gpio2: gpio@d0018180 {
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compatible = "marvell,armadaxp-gpio";
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reg = <0xd0018180 0x40>,
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<0xd0018870 0x30>;
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ngpios = <3>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupts-cells = <2>;
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interrupts = <24>;
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};
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2012-09-13 15:41:48 +00:00
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};
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};
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