2007-07-06 09:20:49 +00:00
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/*
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* irq.c: API for in kernel interrupt controller
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* Copyright (c) 2007, Intel Corporation.
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2010-10-06 12:23:22 +00:00
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* Copyright 2009 Red Hat, Inc. and/or its affiliates.
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2007-07-06 09:20:49 +00:00
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program; if not, write to the Free Software Foundation, Inc., 59 Temple
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* Place - Suite 330, Boston, MA 02111-1307 USA.
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* Authors:
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* Yaozu (Eddie) Dong <Eddie.dong@intel.com>
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*
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*/
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2016-07-14 00:19:00 +00:00
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#include <linux/export.h>
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2007-12-16 09:02:48 +00:00
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#include <linux/kvm_host.h>
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2007-07-06 09:20:49 +00:00
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#include "irq.h"
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2008-01-27 21:10:22 +00:00
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#include "i8254.h"
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2009-04-21 14:44:56 +00:00
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#include "x86.h"
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2007-07-06 09:20:49 +00:00
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2008-04-11 17:53:26 +00:00
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/*
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* check if there are pending timer events
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* to be processed.
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*/
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int kvm_cpu_has_pending_timer(struct kvm_vcpu *vcpu)
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{
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2016-01-08 12:41:16 +00:00
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if (lapic_in_kernel(vcpu))
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return apic_has_pending_timer(vcpu);
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return 0;
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2008-04-11 17:53:26 +00:00
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}
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EXPORT_SYMBOL(kvm_cpu_has_pending_timer);
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KVM: x86: Add support for local interrupt requests from userspace
In order to enable userspace PIC support, the userspace PIC needs to
be able to inject local interrupts even when the APICs are in the
kernel.
KVM_INTERRUPT now supports sending local interrupts to an APIC when
APICs are in the kernel.
The ready_for_interrupt_request flag is now only set when the CPU/APIC
will immediately accept and inject an interrupt (i.e. APIC has not
masked the PIC).
When the PIC wishes to initiate an INTA cycle with, say, CPU0, it
kicks CPU0 out of the guest, and renedezvous with CPU0 once it arrives
in userspace.
When the CPU/APIC unmasks the PIC, a KVM_EXIT_IRQ_WINDOW_OPEN is
triggered, so that userspace has a chance to inject a PIC interrupt
if it had been pending.
Overall, this design can lead to a small number of spurious userspace
renedezvous. In particular, whenever the PIC transistions from low to
high while it is masked and whenever the PIC becomes unmasked while
it is low.
Note: this does not buffer more than one local interrupt in the
kernel, so the VMM needs to enter the guest in order to complete
interrupt injection before injecting an additional interrupt.
Compiles for x86.
Can pass the KVM Unit Tests.
Signed-off-by: Steve Rutherford <srutherford@google.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2015-07-30 09:27:16 +00:00
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/*
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* check if there is a pending userspace external interrupt
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*/
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static int pending_userspace_extint(struct kvm_vcpu *v)
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{
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return v->arch.pending_external_vector != -1;
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}
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2013-01-25 02:18:51 +00:00
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/*
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* check if there is pending interrupt from
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* non-APIC source without intack.
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*/
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static int kvm_cpu_has_extint(struct kvm_vcpu *v)
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{
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KVM: x86: Add support for local interrupt requests from userspace
In order to enable userspace PIC support, the userspace PIC needs to
be able to inject local interrupts even when the APICs are in the
kernel.
KVM_INTERRUPT now supports sending local interrupts to an APIC when
APICs are in the kernel.
The ready_for_interrupt_request flag is now only set when the CPU/APIC
will immediately accept and inject an interrupt (i.e. APIC has not
masked the PIC).
When the PIC wishes to initiate an INTA cycle with, say, CPU0, it
kicks CPU0 out of the guest, and renedezvous with CPU0 once it arrives
in userspace.
When the CPU/APIC unmasks the PIC, a KVM_EXIT_IRQ_WINDOW_OPEN is
triggered, so that userspace has a chance to inject a PIC interrupt
if it had been pending.
Overall, this design can lead to a small number of spurious userspace
renedezvous. In particular, whenever the PIC transistions from low to
high while it is masked and whenever the PIC becomes unmasked while
it is low.
Note: this does not buffer more than one local interrupt in the
kernel, so the VMM needs to enter the guest in order to complete
interrupt injection before injecting an additional interrupt.
Compiles for x86.
Can pass the KVM Unit Tests.
Signed-off-by: Steve Rutherford <srutherford@google.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2015-07-30 09:27:16 +00:00
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u8 accept = kvm_apic_accept_pic_intr(v);
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if (accept) {
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if (irqchip_split(v->kvm))
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return pending_userspace_extint(v);
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else
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2017-04-07 08:50:23 +00:00
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return v->kvm->arch.vpic->output;
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KVM: x86: Add support for local interrupt requests from userspace
In order to enable userspace PIC support, the userspace PIC needs to
be able to inject local interrupts even when the APICs are in the
kernel.
KVM_INTERRUPT now supports sending local interrupts to an APIC when
APICs are in the kernel.
The ready_for_interrupt_request flag is now only set when the CPU/APIC
will immediately accept and inject an interrupt (i.e. APIC has not
masked the PIC).
When the PIC wishes to initiate an INTA cycle with, say, CPU0, it
kicks CPU0 out of the guest, and renedezvous with CPU0 once it arrives
in userspace.
When the CPU/APIC unmasks the PIC, a KVM_EXIT_IRQ_WINDOW_OPEN is
triggered, so that userspace has a chance to inject a PIC interrupt
if it had been pending.
Overall, this design can lead to a small number of spurious userspace
renedezvous. In particular, whenever the PIC transistions from low to
high while it is masked and whenever the PIC becomes unmasked while
it is low.
Note: this does not buffer more than one local interrupt in the
kernel, so the VMM needs to enter the guest in order to complete
interrupt injection before injecting an additional interrupt.
Compiles for x86.
Can pass the KVM Unit Tests.
Signed-off-by: Steve Rutherford <srutherford@google.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2015-07-30 09:27:16 +00:00
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} else
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2013-01-25 02:18:51 +00:00
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return 0;
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}
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/*
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* check if there is injectable interrupt:
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* when virtual interrupt delivery enabled,
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* interrupt from apic will handled by hardware,
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* we don't need to check it here.
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*/
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int kvm_cpu_has_injectable_intr(struct kvm_vcpu *v)
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{
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2015-07-29 10:05:37 +00:00
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if (!lapic_in_kernel(v))
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2013-01-25 02:18:51 +00:00
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return v->arch.interrupt.pending;
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if (kvm_cpu_has_extint(v))
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return 1;
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2017-12-24 16:12:56 +00:00
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if (!is_guest_mode(v) && kvm_vcpu_apicv_active(v))
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2013-01-25 02:18:51 +00:00
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return 0;
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return kvm_apic_has_interrupt(v) != -1; /* LAPIC */
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}
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2007-07-06 09:20:49 +00:00
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/*
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* check if there is pending interrupt without
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* intack.
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*/
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int kvm_cpu_has_interrupt(struct kvm_vcpu *v)
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{
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2015-07-29 10:05:37 +00:00
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if (!lapic_in_kernel(v))
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2009-05-11 10:35:48 +00:00
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return v->arch.interrupt.pending;
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2009-04-21 14:44:56 +00:00
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2013-01-25 02:18:51 +00:00
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if (kvm_cpu_has_extint(v))
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return 1;
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2012-12-10 12:05:55 +00:00
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return kvm_apic_has_interrupt(v) != -1; /* LAPIC */
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2007-07-06 09:20:49 +00:00
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}
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EXPORT_SYMBOL_GPL(kvm_cpu_has_interrupt);
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2013-01-25 02:18:51 +00:00
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/*
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* Read pending interrupt(from non-APIC source)
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* vector and intack.
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*/
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static int kvm_cpu_get_extint(struct kvm_vcpu *v)
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{
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KVM: x86: Add support for local interrupt requests from userspace
In order to enable userspace PIC support, the userspace PIC needs to
be able to inject local interrupts even when the APICs are in the
kernel.
KVM_INTERRUPT now supports sending local interrupts to an APIC when
APICs are in the kernel.
The ready_for_interrupt_request flag is now only set when the CPU/APIC
will immediately accept and inject an interrupt (i.e. APIC has not
masked the PIC).
When the PIC wishes to initiate an INTA cycle with, say, CPU0, it
kicks CPU0 out of the guest, and renedezvous with CPU0 once it arrives
in userspace.
When the CPU/APIC unmasks the PIC, a KVM_EXIT_IRQ_WINDOW_OPEN is
triggered, so that userspace has a chance to inject a PIC interrupt
if it had been pending.
Overall, this design can lead to a small number of spurious userspace
renedezvous. In particular, whenever the PIC transistions from low to
high while it is masked and whenever the PIC becomes unmasked while
it is low.
Note: this does not buffer more than one local interrupt in the
kernel, so the VMM needs to enter the guest in order to complete
interrupt injection before injecting an additional interrupt.
Compiles for x86.
Can pass the KVM Unit Tests.
Signed-off-by: Steve Rutherford <srutherford@google.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2015-07-30 09:27:16 +00:00
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if (kvm_cpu_has_extint(v)) {
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if (irqchip_split(v->kvm)) {
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int vector = v->arch.pending_external_vector;
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v->arch.pending_external_vector = -1;
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return vector;
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} else
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return kvm_pic_read_irq(v->kvm); /* PIC */
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} else
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return -1;
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2013-01-25 02:18:51 +00:00
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}
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2007-07-06 09:20:49 +00:00
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/*
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* Read pending interrupt vector and intack.
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*/
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int kvm_cpu_get_interrupt(struct kvm_vcpu *v)
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{
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2013-01-25 02:18:51 +00:00
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int vector;
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2015-07-29 10:05:37 +00:00
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if (!lapic_in_kernel(v))
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2009-05-11 10:35:48 +00:00
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return v->arch.interrupt.nr;
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2009-04-21 14:44:56 +00:00
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2013-01-25 02:18:51 +00:00
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vector = kvm_cpu_get_extint(v);
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KVM: nVMX: fix "acknowledge interrupt on exit" when APICv is in use
After commit 77b0f5d (KVM: nVMX: Ack and write vector info to intr_info
if L1 asks us to), "Acknowledge interrupt on exit" behavior can be
emulated. To do so, KVM will ask the APIC for the interrupt vector if
during a nested vmexit if VM_EXIT_ACK_INTR_ON_EXIT is set. With APICv,
kvm_get_apic_interrupt would return -1 and give the following WARNING:
Call Trace:
[<ffffffff81493563>] dump_stack+0x49/0x5e
[<ffffffff8103f0eb>] warn_slowpath_common+0x7c/0x96
[<ffffffffa059709a>] ? nested_vmx_vmexit+0xa4/0x233 [kvm_intel]
[<ffffffff8103f11a>] warn_slowpath_null+0x15/0x17
[<ffffffffa059709a>] nested_vmx_vmexit+0xa4/0x233 [kvm_intel]
[<ffffffffa0594295>] ? nested_vmx_exit_handled+0x6a/0x39e [kvm_intel]
[<ffffffffa0537931>] ? kvm_apic_has_interrupt+0x80/0xd5 [kvm]
[<ffffffffa05972ec>] vmx_check_nested_events+0xc3/0xd3 [kvm_intel]
[<ffffffffa051ebe9>] inject_pending_event+0xd0/0x16e [kvm]
[<ffffffffa051efa0>] vcpu_enter_guest+0x319/0x704 [kvm]
To fix this, we cannot rely on the processor's virtual interrupt delivery,
because "acknowledge interrupt on exit" must only update the virtual
ISR/PPR/IRR registers (and SVI, which is just a cache of the virtual ISR)
but it should not deliver the interrupt through the IDT. Thus, KVM has
to deliver the interrupt "by hand", similar to the treatment of EOI in
commit fc57ac2c9ca8 (KVM: lapic: sync highest ISR to hardware apic on
EOI, 2014-05-14).
The patch modifies kvm_cpu_get_interrupt to always acknowledge an
interrupt; there are only two callers, and the other is not affected
because it is never reached with kvm_apic_vid_enabled() == true. Then it
modifies apic_set_isr and apic_clear_irr to update SVI and RVI in addition
to the registers.
Suggested-by: Paolo Bonzini <pbonzini@redhat.com>
Suggested-by: "Zhang, Yang Z" <yang.z.zhang@intel.com>
Tested-by: Liu, RongrongX <rongrongx.liu@intel.com>
Tested-by: Felipe Reyes <freyes@suse.com>
Fixes: 77b0f5d67ff2781f36831cba79674c3e97bd7acf
Cc: stable@vger.kernel.org
Signed-off-by: Wanpeng Li <wanpeng.li@linux.intel.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2014-08-05 04:42:24 +00:00
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if (vector != -1)
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2013-01-25 02:18:51 +00:00
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return vector; /* PIC */
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2012-12-10 12:05:55 +00:00
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return kvm_get_apic_interrupt(v); /* APIC */
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2007-07-06 09:20:49 +00:00
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}
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2014-04-19 22:17:45 +00:00
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EXPORT_SYMBOL_GPL(kvm_cpu_get_interrupt);
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2007-09-12 07:58:04 +00:00
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2007-09-03 13:56:58 +00:00
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void kvm_inject_pending_timer_irqs(struct kvm_vcpu *vcpu)
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{
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2016-01-08 12:41:16 +00:00
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if (lapic_in_kernel(vcpu))
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kvm_inject_apic_timer_irqs(vcpu);
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2007-09-03 13:56:58 +00:00
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}
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EXPORT_SYMBOL_GPL(kvm_inject_pending_timer_irqs);
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2008-05-27 15:10:20 +00:00
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void __kvm_migrate_timers(struct kvm_vcpu *vcpu)
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{
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__kvm_migrate_apic_timer(vcpu);
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__kvm_migrate_pit_timer(vcpu);
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}
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