License cleanup: add SPDX GPL-2.0 license identifier to files with no license
Many source files in the tree are missing licensing information, which
makes it harder for compliance tools to determine the correct license.
By default all files without license information are under the default
license of the kernel, which is GPL version 2.
Update the files which contain no license information with the 'GPL-2.0'
SPDX license identifier. The SPDX identifier is a legally binding
shorthand, which can be used instead of the full boiler plate text.
This patch is based on work done by Thomas Gleixner and Kate Stewart and
Philippe Ombredanne.
How this work was done:
Patches were generated and checked against linux-4.14-rc6 for a subset of
the use cases:
- file had no licensing information it it.
- file was a */uapi/* one with no licensing information in it,
- file was a */uapi/* one with existing licensing information,
Further patches will be generated in subsequent months to fix up cases
where non-standard license headers were used, and references to license
had to be inferred by heuristics based on keywords.
The analysis to determine which SPDX License Identifier to be applied to
a file was done in a spreadsheet of side by side results from of the
output of two independent scanners (ScanCode & Windriver) producing SPDX
tag:value files created by Philippe Ombredanne. Philippe prepared the
base worksheet, and did an initial spot review of a few 1000 files.
The 4.13 kernel was the starting point of the analysis with 60,537 files
assessed. Kate Stewart did a file by file comparison of the scanner
results in the spreadsheet to determine which SPDX license identifier(s)
to be applied to the file. She confirmed any determination that was not
immediately clear with lawyers working with the Linux Foundation.
Criteria used to select files for SPDX license identifier tagging was:
- Files considered eligible had to be source code files.
- Make and config files were included as candidates if they contained >5
lines of source
- File already had some variant of a license header in it (even if <5
lines).
All documentation files were explicitly excluded.
The following heuristics were used to determine which SPDX license
identifiers to apply.
- when both scanners couldn't find any license traces, file was
considered to have no license information in it, and the top level
COPYING file license applied.
For non */uapi/* files that summary was:
SPDX license identifier # files
---------------------------------------------------|-------
GPL-2.0 11139
and resulted in the first patch in this series.
If that file was a */uapi/* path one, it was "GPL-2.0 WITH
Linux-syscall-note" otherwise it was "GPL-2.0". Results of that was:
SPDX license identifier # files
---------------------------------------------------|-------
GPL-2.0 WITH Linux-syscall-note 930
and resulted in the second patch in this series.
- if a file had some form of licensing information in it, and was one
of the */uapi/* ones, it was denoted with the Linux-syscall-note if
any GPL family license was found in the file or had no licensing in
it (per prior point). Results summary:
SPDX license identifier # files
---------------------------------------------------|------
GPL-2.0 WITH Linux-syscall-note 270
GPL-2.0+ WITH Linux-syscall-note 169
((GPL-2.0 WITH Linux-syscall-note) OR BSD-2-Clause) 21
((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause) 17
LGPL-2.1+ WITH Linux-syscall-note 15
GPL-1.0+ WITH Linux-syscall-note 14
((GPL-2.0+ WITH Linux-syscall-note) OR BSD-3-Clause) 5
LGPL-2.0+ WITH Linux-syscall-note 4
LGPL-2.1 WITH Linux-syscall-note 3
((GPL-2.0 WITH Linux-syscall-note) OR MIT) 3
((GPL-2.0 WITH Linux-syscall-note) AND MIT) 1
and that resulted in the third patch in this series.
- when the two scanners agreed on the detected license(s), that became
the concluded license(s).
- when there was disagreement between the two scanners (one detected a
license but the other didn't, or they both detected different
licenses) a manual inspection of the file occurred.
- In most cases a manual inspection of the information in the file
resulted in a clear resolution of the license that should apply (and
which scanner probably needed to revisit its heuristics).
- When it was not immediately clear, the license identifier was
confirmed with lawyers working with the Linux Foundation.
- If there was any question as to the appropriate license identifier,
the file was flagged for further research and to be revisited later
in time.
In total, over 70 hours of logged manual review was done on the
spreadsheet to determine the SPDX license identifiers to apply to the
source files by Kate, Philippe, Thomas and, in some cases, confirmation
by lawyers working with the Linux Foundation.
Kate also obtained a third independent scan of the 4.13 code base from
FOSSology, and compared selected files where the other two scanners
disagreed against that SPDX file, to see if there was new insights. The
Windriver scanner is based on an older version of FOSSology in part, so
they are related.
Thomas did random spot checks in about 500 files from the spreadsheets
for the uapi headers and agreed with SPDX license identifier in the
files he inspected. For the non-uapi files Thomas did random spot checks
in about 15000 files.
In initial set of patches against 4.14-rc6, 3 files were found to have
copy/paste license identifier errors, and have been fixed to reflect the
correct identifier.
Additionally Philippe spent 10 hours this week doing a detailed manual
inspection and review of the 12,461 patched files from the initial patch
version early this week with:
- a full scancode scan run, collecting the matched texts, detected
license ids and scores
- reviewing anything where there was a license detected (about 500+
files) to ensure that the applied SPDX license was correct
- reviewing anything where there was no detection but the patch license
was not GPL-2.0 WITH Linux-syscall-note to ensure that the applied
SPDX license was correct
This produced a worksheet with 20 files needing minor correction. This
worksheet was then exported into 3 different .csv files for the
different types of files to be modified.
These .csv files were then reviewed by Greg. Thomas wrote a script to
parse the csv files and add the proper SPDX tag to the file, in the
format that the file expected. This script was further refined by Greg
based on the output to detect more types of files automatically and to
distinguish between header and source .c files (which need different
comment types.) Finally Greg ran the script using the .csv files to
generate the patches.
Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org>
Reviewed-by: Philippe Ombredanne <pombredanne@nexb.com>
Reviewed-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-11-01 14:07:57 +00:00
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/* SPDX-License-Identifier: GPL-2.0 */
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2015-11-12 20:59:04 +00:00
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#include <linux/jump_label.h>
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2017-07-11 15:33:44 +00:00
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#include <asm/unwind_hints.h>
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2017-12-04 14:07:35 +00:00
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#include <asm/cpufeatures.h>
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#include <asm/page_types.h>
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2017-12-04 14:07:59 +00:00
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#include <asm/percpu.h>
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#include <asm/asm-offsets.h>
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#include <asm/processor-flags.h>
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2015-11-12 20:59:04 +00:00
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2008-01-30 12:32:49 +00:00
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/*
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2009-02-03 17:02:36 +00:00
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x86 function call convention, 64-bit:
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-------------------------------------
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arguments | callee-saved | extra caller-saved | return
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[callee-clobbered] | | [callee-clobbered] |
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---------------------------------------------------------------------------
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rdi rsi rdx rcx r8-9 | rbx rbp [*] r12-15 | r10-11 | rax, rdx [**]
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( rsp is obviously invariant across normal function calls. (gcc can 'merge'
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functions when it sees tail-call optimization possibilities) rflags is
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clobbered. Leftover arguments are passed over the stack frame.)
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[*] In the frame-pointers case rbp is fixed to the stack frame.
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[**] for struct return values wider than 64 bits the return convention is a
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bit more complex: up to 128 bits width we return small structures
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straight in rax, rdx. For structures larger than that (3 words or
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larger) the caller puts a pointer to an on-stack return struct
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[allocated in the caller's stack frame] into the first argument - i.e.
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into rdi. All other arguments shift up by one in this case.
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Fortunately this case is rare in the kernel.
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For 32-bit we have the following conventions - kernel is built with
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-mregparm=3 and -freg-struct-return:
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x86 function calling convention, 32-bit:
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----------------------------------------
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arguments | callee-saved | extra caller-saved | return
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[callee-clobbered] | | [callee-clobbered] |
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-------------------------------------------------------------------------
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eax edx ecx | ebx edi esi ebp [*] | <none> | eax, edx [**]
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( here too esp is obviously invariant across normal function calls. eflags
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is clobbered. Leftover arguments are passed over the stack frame. )
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[*] In the frame-pointers case ebp is fixed to the stack frame.
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[**] We build with -freg-struct-return, which on 32-bit means similar
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semantics as on 64-bit: edx can be used for a second return value
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(i.e. covering integer and structure sizes up to 64 bits) - after that
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it gets more complex and more expensive: 3-word or larger struct returns
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get done in the caller's frame and the pointer to the return struct goes
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into regparm0, i.e. eax - the other arguments shift up and the
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function's register parameters degenerate to regparm=2 in essence.
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*/
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2013-08-14 12:51:00 +00:00
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#ifdef CONFIG_X86_64
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2009-02-03 17:02:36 +00:00
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/*
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2012-09-26 08:28:22 +00:00
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* 64-bit system call stack frame layout defines and helpers,
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* for assembly code:
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2008-01-30 12:32:49 +00:00
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*/
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2005-04-16 22:20:36 +00:00
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x86/asm/entry/64: Always allocate a complete "struct pt_regs" on the kernel stack
The 64-bit entry code was using six stack slots less by not
saving/restoring registers which are callee-preserved according
to the C ABI, and was not allocating space for them.
Only when syscalls needed a complete "struct pt_regs" was
the complete area allocated and filled in.
As an additional twist, on interrupt entry a "slightly less
truncated pt_regs" trick is used, to make nested interrupt
stacks easier to unwind.
This proved to be a source of significant obfuscation and subtle
bugs. For example, 'stub_fork' had to pop the return address,
extend the struct, save registers, and push return address back.
Ugly. 'ia32_ptregs_common' pops return address and "returns" via
jmp insn, throwing a wrench into CPU return stack cache.
This patch changes the code to always allocate a complete
"struct pt_regs" on the kernel stack. The saving of registers
is still done lazily.
"Partial pt_regs" trick on interrupt stack is retained.
Macros which manipulate "struct pt_regs" on stack are reworked:
- ALLOC_PT_GPREGS_ON_STACK allocates the structure.
- SAVE_C_REGS saves to it those registers which are clobbered
by C code.
- SAVE_EXTRA_REGS saves to it all other registers.
- Corresponding RESTORE_* and REMOVE_PT_GPREGS_FROM_STACK macros
reverse it.
'ia32_ptregs_common', 'stub_fork' and friends lost their ugly dance
with the return pointer.
LOAD_ARGS32 in ia32entry.S now uses symbolic stack offsets
instead of magic numbers.
'error_entry' and 'save_paranoid' now use SAVE_C_REGS +
SAVE_EXTRA_REGS instead of having it open-coded yet again.
Patch was run-tested: 64-bit executables, 32-bit executables,
strace works.
Timing tests did not show measurable difference in 32-bit
and 64-bit syscalls.
Signed-off-by: Denys Vlasenko <dvlasenk@redhat.com>
Signed-off-by: Andy Lutomirski <luto@amacapital.net>
Cc: Alexei Starovoitov <ast@plumgrid.com>
Cc: Borislav Petkov <bp@alien8.de>
Cc: Frederic Weisbecker <fweisbec@gmail.com>
Cc: H. Peter Anvin <hpa@zytor.com>
Cc: Kees Cook <keescook@chromium.org>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Oleg Nesterov <oleg@redhat.com>
Cc: Will Drewry <wad@chromium.org>
Link: http://lkml.kernel.org/r/1423778052-21038-2-git-send-email-dvlasenk@redhat.com
Link: http://lkml.kernel.org/r/b89763d354aa23e670b9bdf3a40ae320320a7c2e.1424989793.git.luto@amacapital.net
Signed-off-by: Ingo Molnar <mingo@kernel.org>
2015-02-26 22:40:27 +00:00
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|
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/* The layout forms the "struct pt_regs" on the stack: */
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/*
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* C ABI says these regs are callee-preserved. They aren't saved on kernel entry
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* unless syscall needs a complete, fully filled "struct pt_regs".
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*/
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#define R15 0*8
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#define R14 1*8
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#define R13 2*8
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#define R12 3*8
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#define RBP 4*8
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#define RBX 5*8
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/* These regs are callee-clobbered. Always saved on kernel entry. */
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#define R11 6*8
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#define R10 7*8
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#define R9 8*8
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#define R8 9*8
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#define RAX 10*8
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#define RCX 11*8
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#define RDX 12*8
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#define RSI 13*8
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#define RDI 14*8
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/*
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|
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|
* On syscall entry, this is syscall#. On CPU exception, this is error code.
|
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|
* On hw interrupt, it's IRQ number:
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*/
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|
#define ORIG_RAX 15*8
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|
/* Return frame for iretq */
|
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#define RIP 16*8
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|
#define CS 17*8
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|
#define EFLAGS 18*8
|
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|
#define RSP 19*8
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|
#define SS 20*8
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|
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|
2015-02-26 22:40:36 +00:00
|
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|
#define SIZEOF_PTREGS 21*8
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|
2016-10-19 19:11:08 +00:00
|
|
|
.macro ALLOC_PT_GPREGS_ON_STACK
|
|
|
|
|
addq $-(15*8), %rsp
|
x86/asm/entry/64: Always allocate a complete "struct pt_regs" on the kernel stack
The 64-bit entry code was using six stack slots less by not
saving/restoring registers which are callee-preserved according
to the C ABI, and was not allocating space for them.
Only when syscalls needed a complete "struct pt_regs" was
the complete area allocated and filled in.
As an additional twist, on interrupt entry a "slightly less
truncated pt_regs" trick is used, to make nested interrupt
stacks easier to unwind.
This proved to be a source of significant obfuscation and subtle
bugs. For example, 'stub_fork' had to pop the return address,
extend the struct, save registers, and push return address back.
Ugly. 'ia32_ptregs_common' pops return address and "returns" via
jmp insn, throwing a wrench into CPU return stack cache.
This patch changes the code to always allocate a complete
"struct pt_regs" on the kernel stack. The saving of registers
is still done lazily.
"Partial pt_regs" trick on interrupt stack is retained.
Macros which manipulate "struct pt_regs" on stack are reworked:
- ALLOC_PT_GPREGS_ON_STACK allocates the structure.
- SAVE_C_REGS saves to it those registers which are clobbered
by C code.
- SAVE_EXTRA_REGS saves to it all other registers.
- Corresponding RESTORE_* and REMOVE_PT_GPREGS_FROM_STACK macros
reverse it.
'ia32_ptregs_common', 'stub_fork' and friends lost their ugly dance
with the return pointer.
LOAD_ARGS32 in ia32entry.S now uses symbolic stack offsets
instead of magic numbers.
'error_entry' and 'save_paranoid' now use SAVE_C_REGS +
SAVE_EXTRA_REGS instead of having it open-coded yet again.
Patch was run-tested: 64-bit executables, 32-bit executables,
strace works.
Timing tests did not show measurable difference in 32-bit
and 64-bit syscalls.
Signed-off-by: Denys Vlasenko <dvlasenk@redhat.com>
Signed-off-by: Andy Lutomirski <luto@amacapital.net>
Cc: Alexei Starovoitov <ast@plumgrid.com>
Cc: Borislav Petkov <bp@alien8.de>
Cc: Frederic Weisbecker <fweisbec@gmail.com>
Cc: H. Peter Anvin <hpa@zytor.com>
Cc: Kees Cook <keescook@chromium.org>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Oleg Nesterov <oleg@redhat.com>
Cc: Will Drewry <wad@chromium.org>
Link: http://lkml.kernel.org/r/1423778052-21038-2-git-send-email-dvlasenk@redhat.com
Link: http://lkml.kernel.org/r/b89763d354aa23e670b9bdf3a40ae320320a7c2e.1424989793.git.luto@amacapital.net
Signed-off-by: Ingo Molnar <mingo@kernel.org>
2015-02-26 22:40:27 +00:00
|
|
|
.endm
|
2011-05-31 20:21:51 +00:00
|
|
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|
2018-02-11 10:49:44 +00:00
|
|
|
.macro SAVE_AND_CLEAR_REGS offset=0
|
|
|
|
|
/*
|
|
|
|
|
* Save registers and sanitize registers of values that a
|
|
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|
|
* speculation attack might otherwise want to exploit. The
|
|
|
|
|
* lower registers are likely clobbered well before they
|
|
|
|
|
* could be put to use in a speculative execution gadget.
|
|
|
|
|
* Interleave XOR with PUSH for better uop scheduling:
|
|
|
|
|
*/
|
x86/debug: Remove perpetually broken, unmaintainable dwarf annotations
So the dwarf2 annotations in low level assembly code have
become an increasing hindrance: unreadable, messy macros
mixed into some of the most security sensitive code paths
of the Linux kernel.
These debug info annotations don't even buy the upstream
kernel anything: dwarf driven stack unwinding has caused
problems in the past so it's out of tree, and the upstream
kernel only uses the much more robust framepointers based
stack unwinding method.
In addition to that there's a steady, slow bitrot going
on with these annotations, requiring frequent fixups.
There's no tooling and no functionality upstream that
keeps it correct.
So burn down the sick forest, allowing new, healthier growth:
27 files changed, 350 insertions(+), 1101 deletions(-)
Someone who has the willingness and time to do this
properly can attempt to reintroduce dwarf debuginfo in x86
assembly code plus dwarf unwinding from first principles,
with the following conditions:
- it should be maximally readable, and maximally low-key to
'ordinary' code reading and maintenance.
- find a build time method to insert dwarf annotations
automatically in the most common cases, for pop/push
instructions that manipulate the stack pointer. This could
be done for example via a preprocessing step that just
looks for common patterns - plus special annotations for
the few cases where we want to depart from the default.
We have hundreds of CFI annotations, so automating most of
that makes sense.
- it should come with build tooling checks that ensure that
CFI annotations are sensible. We've seen such efforts from
the framepointer side, and there's no reason it couldn't be
done on the dwarf side.
Cc: Andy Lutomirski <luto@amacapital.net>
Cc: Borislav Petkov <bp@alien8.de>
Cc: Brian Gerst <brgerst@gmail.com>
Cc: Denys Vlasenko <dvlasenk@redhat.com>
Cc: Frédéric Weisbecker <fweisbec@gmail.com
Cc: H. Peter Anvin <hpa@zytor.com>
Cc: Jan Beulich <JBeulich@suse.com>
Cc: Josh Poimboeuf <jpoimboe@redhat.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: linux-kernel@vger.kernel.org
Signed-off-by: Ingo Molnar <mingo@kernel.org>
2015-05-28 10:21:47 +00:00
|
|
|
movq %rdi, 14*8+\offset(%rsp)
|
2018-02-11 10:49:42 +00:00
|
|
|
movq %rsi, 13*8+\offset(%rsp)
|
|
|
|
|
movq %rdx, 12*8+\offset(%rsp)
|
|
|
|
|
movq %rcx, 11*8+\offset(%rsp)
|
|
|
|
|
movq %rax, 10*8+\offset(%rsp)
|
|
|
|
|
movq %r8, 9*8+\offset(%rsp)
|
2018-02-11 10:49:44 +00:00
|
|
|
xorq %r8, %r8 /* nospec r8 */
|
2018-02-11 10:49:42 +00:00
|
|
|
movq %r9, 8*8+\offset(%rsp)
|
2018-02-11 10:49:44 +00:00
|
|
|
xorq %r9, %r9 /* nospec r9 */
|
2018-02-11 10:49:42 +00:00
|
|
|
movq %r10, 7*8+\offset(%rsp)
|
2018-02-11 10:49:44 +00:00
|
|
|
xorq %r10, %r10 /* nospec r10 */
|
2018-02-11 10:49:42 +00:00
|
|
|
movq %r11, 6*8+\offset(%rsp)
|
2018-02-11 10:49:44 +00:00
|
|
|
xorq %r11, %r11 /* nospec r11 */
|
x86/debug: Remove perpetually broken, unmaintainable dwarf annotations
So the dwarf2 annotations in low level assembly code have
become an increasing hindrance: unreadable, messy macros
mixed into some of the most security sensitive code paths
of the Linux kernel.
These debug info annotations don't even buy the upstream
kernel anything: dwarf driven stack unwinding has caused
problems in the past so it's out of tree, and the upstream
kernel only uses the much more robust framepointers based
stack unwinding method.
In addition to that there's a steady, slow bitrot going
on with these annotations, requiring frequent fixups.
There's no tooling and no functionality upstream that
keeps it correct.
So burn down the sick forest, allowing new, healthier growth:
27 files changed, 350 insertions(+), 1101 deletions(-)
Someone who has the willingness and time to do this
properly can attempt to reintroduce dwarf debuginfo in x86
assembly code plus dwarf unwinding from first principles,
with the following conditions:
- it should be maximally readable, and maximally low-key to
'ordinary' code reading and maintenance.
- find a build time method to insert dwarf annotations
automatically in the most common cases, for pop/push
instructions that manipulate the stack pointer. This could
be done for example via a preprocessing step that just
looks for common patterns - plus special annotations for
the few cases where we want to depart from the default.
We have hundreds of CFI annotations, so automating most of
that makes sense.
- it should come with build tooling checks that ensure that
CFI annotations are sensible. We've seen such efforts from
the framepointer side, and there's no reason it couldn't be
done on the dwarf side.
Cc: Andy Lutomirski <luto@amacapital.net>
Cc: Borislav Petkov <bp@alien8.de>
Cc: Brian Gerst <brgerst@gmail.com>
Cc: Denys Vlasenko <dvlasenk@redhat.com>
Cc: Frédéric Weisbecker <fweisbec@gmail.com
Cc: H. Peter Anvin <hpa@zytor.com>
Cc: Jan Beulich <JBeulich@suse.com>
Cc: Josh Poimboeuf <jpoimboe@redhat.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: linux-kernel@vger.kernel.org
Signed-off-by: Ingo Molnar <mingo@kernel.org>
2015-05-28 10:21:47 +00:00
|
|
|
movq %rbx, 5*8+\offset(%rsp)
|
2018-02-11 10:49:44 +00:00
|
|
|
xorl %ebx, %ebx /* nospec rbx */
|
2018-02-11 10:49:42 +00:00
|
|
|
movq %rbp, 4*8+\offset(%rsp)
|
2018-02-11 10:49:44 +00:00
|
|
|
xorl %ebp, %ebp /* nospec rbp */
|
2018-02-11 10:49:42 +00:00
|
|
|
movq %r12, 3*8+\offset(%rsp)
|
2018-02-11 10:49:44 +00:00
|
|
|
xorq %r12, %r12 /* nospec r12 */
|
2018-02-11 10:49:42 +00:00
|
|
|
movq %r13, 2*8+\offset(%rsp)
|
2018-02-11 10:49:44 +00:00
|
|
|
xorq %r13, %r13 /* nospec r13 */
|
2018-02-11 10:49:42 +00:00
|
|
|
movq %r14, 1*8+\offset(%rsp)
|
2018-02-11 10:49:44 +00:00
|
|
|
xorq %r14, %r14 /* nospec r14 */
|
2018-02-11 10:49:42 +00:00
|
|
|
movq %r15, 0*8+\offset(%rsp)
|
2018-02-11 10:49:44 +00:00
|
|
|
xorq %r15, %r15 /* nospec r15 */
|
2017-07-11 15:33:44 +00:00
|
|
|
UNWIND_HINT_REGS offset=\offset
|
x86/asm/entry/64: Always allocate a complete "struct pt_regs" on the kernel stack
The 64-bit entry code was using six stack slots less by not
saving/restoring registers which are callee-preserved according
to the C ABI, and was not allocating space for them.
Only when syscalls needed a complete "struct pt_regs" was
the complete area allocated and filled in.
As an additional twist, on interrupt entry a "slightly less
truncated pt_regs" trick is used, to make nested interrupt
stacks easier to unwind.
This proved to be a source of significant obfuscation and subtle
bugs. For example, 'stub_fork' had to pop the return address,
extend the struct, save registers, and push return address back.
Ugly. 'ia32_ptregs_common' pops return address and "returns" via
jmp insn, throwing a wrench into CPU return stack cache.
This patch changes the code to always allocate a complete
"struct pt_regs" on the kernel stack. The saving of registers
is still done lazily.
"Partial pt_regs" trick on interrupt stack is retained.
Macros which manipulate "struct pt_regs" on stack are reworked:
- ALLOC_PT_GPREGS_ON_STACK allocates the structure.
- SAVE_C_REGS saves to it those registers which are clobbered
by C code.
- SAVE_EXTRA_REGS saves to it all other registers.
- Corresponding RESTORE_* and REMOVE_PT_GPREGS_FROM_STACK macros
reverse it.
'ia32_ptregs_common', 'stub_fork' and friends lost their ugly dance
with the return pointer.
LOAD_ARGS32 in ia32entry.S now uses symbolic stack offsets
instead of magic numbers.
'error_entry' and 'save_paranoid' now use SAVE_C_REGS +
SAVE_EXTRA_REGS instead of having it open-coded yet again.
Patch was run-tested: 64-bit executables, 32-bit executables,
strace works.
Timing tests did not show measurable difference in 32-bit
and 64-bit syscalls.
Signed-off-by: Denys Vlasenko <dvlasenk@redhat.com>
Signed-off-by: Andy Lutomirski <luto@amacapital.net>
Cc: Alexei Starovoitov <ast@plumgrid.com>
Cc: Borislav Petkov <bp@alien8.de>
Cc: Frederic Weisbecker <fweisbec@gmail.com>
Cc: H. Peter Anvin <hpa@zytor.com>
Cc: Kees Cook <keescook@chromium.org>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Oleg Nesterov <oleg@redhat.com>
Cc: Will Drewry <wad@chromium.org>
Link: http://lkml.kernel.org/r/1423778052-21038-2-git-send-email-dvlasenk@redhat.com
Link: http://lkml.kernel.org/r/b89763d354aa23e670b9bdf3a40ae320320a7c2e.1424989793.git.luto@amacapital.net
Signed-off-by: Ingo Molnar <mingo@kernel.org>
2015-02-26 22:40:27 +00:00
|
|
|
.endm
|
2005-04-16 22:20:36 +00:00
|
|
|
|
2018-02-11 10:49:45 +00:00
|
|
|
.macro PUSH_AND_CLEAR_REGS
|
|
|
|
|
/*
|
|
|
|
|
* Push registers and sanitize registers of values that a
|
|
|
|
|
* speculation attack might otherwise want to exploit. The
|
|
|
|
|
* lower registers are likely clobbered well before they
|
|
|
|
|
* could be put to use in a speculative execution gadget.
|
|
|
|
|
* Interleave XOR with PUSH for better uop scheduling:
|
|
|
|
|
*/
|
|
|
|
|
pushq %rdi /* pt_regs->di */
|
|
|
|
|
pushq %rsi /* pt_regs->si */
|
|
|
|
|
pushq %rdx /* pt_regs->dx */
|
|
|
|
|
pushq %rcx /* pt_regs->cx */
|
|
|
|
|
pushq %rax /* pt_regs->ax */
|
|
|
|
|
pushq %r8 /* pt_regs->r8 */
|
|
|
|
|
xorq %r8, %r8 /* nospec r8 */
|
|
|
|
|
pushq %r9 /* pt_regs->r9 */
|
|
|
|
|
xorq %r9, %r9 /* nospec r9 */
|
|
|
|
|
pushq %r10 /* pt_regs->r10 */
|
|
|
|
|
xorq %r10, %r10 /* nospec r10 */
|
|
|
|
|
pushq %r11 /* pt_regs->r11 */
|
|
|
|
|
xorq %r11, %r11 /* nospec r11*/
|
|
|
|
|
pushq %rbx /* pt_regs->rbx */
|
|
|
|
|
xorl %ebx, %ebx /* nospec rbx*/
|
|
|
|
|
pushq %rbp /* pt_regs->rbp */
|
|
|
|
|
xorl %ebp, %ebp /* nospec rbp*/
|
|
|
|
|
pushq %r12 /* pt_regs->r12 */
|
|
|
|
|
xorq %r12, %r12 /* nospec r12*/
|
|
|
|
|
pushq %r13 /* pt_regs->r13 */
|
|
|
|
|
xorq %r13, %r13 /* nospec r13*/
|
|
|
|
|
pushq %r14 /* pt_regs->r14 */
|
|
|
|
|
xorq %r14, %r14 /* nospec r14*/
|
|
|
|
|
pushq %r15 /* pt_regs->r15 */
|
|
|
|
|
xorq %r15, %r15 /* nospec r15*/
|
|
|
|
|
UNWIND_HINT_REGS
|
|
|
|
|
.endm
|
|
|
|
|
|
2018-02-11 10:49:43 +00:00
|
|
|
.macro POP_REGS pop_rdi=1 skip_r11rcx=0
|
2017-11-02 07:59:01 +00:00
|
|
|
popq %r15
|
|
|
|
|
popq %r14
|
|
|
|
|
popq %r13
|
|
|
|
|
popq %r12
|
|
|
|
|
popq %rbp
|
|
|
|
|
popq %rbx
|
2018-02-11 10:49:43 +00:00
|
|
|
.if \skip_r11rcx
|
|
|
|
|
popq %rsi
|
|
|
|
|
.else
|
2017-11-02 07:59:01 +00:00
|
|
|
popq %r11
|
2018-02-11 10:49:43 +00:00
|
|
|
.endif
|
2017-11-02 07:59:01 +00:00
|
|
|
popq %r10
|
|
|
|
|
popq %r9
|
|
|
|
|
popq %r8
|
|
|
|
|
popq %rax
|
2018-02-11 10:49:43 +00:00
|
|
|
.if \skip_r11rcx
|
|
|
|
|
popq %rsi
|
|
|
|
|
.else
|
2017-11-02 07:59:01 +00:00
|
|
|
popq %rcx
|
2018-02-11 10:49:43 +00:00
|
|
|
.endif
|
2017-11-02 07:59:01 +00:00
|
|
|
popq %rdx
|
|
|
|
|
popq %rsi
|
2018-02-11 10:49:43 +00:00
|
|
|
.if \pop_rdi
|
2017-11-02 07:59:01 +00:00
|
|
|
popq %rdi
|
2018-02-11 10:49:43 +00:00
|
|
|
.endif
|
2005-04-16 22:20:36 +00:00
|
|
|
.endm
|
|
|
|
|
|
|
|
|
|
.macro icebp
|
|
|
|
|
.byte 0xf1
|
|
|
|
|
.endm
|
2013-08-14 12:51:00 +00:00
|
|
|
|
2016-10-20 16:34:40 +00:00
|
|
|
/*
|
|
|
|
|
* This is a sneaky trick to help the unwinder find pt_regs on the stack. The
|
|
|
|
|
* frame pointer is replaced with an encoded pointer to pt_regs. The encoding
|
|
|
|
|
* is just setting the LSB, which makes it an invalid stack address and is also
|
|
|
|
|
* a signal to the unwinder that it's a pt_regs pointer in disguise.
|
|
|
|
|
*
|
2018-02-11 10:49:44 +00:00
|
|
|
* NOTE: This macro must be used *after* SAVE_AND_CLEAR_REGS because it corrupts
|
2016-10-20 16:34:40 +00:00
|
|
|
* the original rbp.
|
|
|
|
|
*/
|
|
|
|
|
.macro ENCODE_FRAME_POINTER ptregs_offset=0
|
|
|
|
|
#ifdef CONFIG_FRAME_POINTER
|
|
|
|
|
.if \ptregs_offset
|
|
|
|
|
leaq \ptregs_offset(%rsp), %rbp
|
|
|
|
|
.else
|
|
|
|
|
mov %rsp, %rbp
|
|
|
|
|
.endif
|
|
|
|
|
orq $0x1, %rbp
|
|
|
|
|
#endif
|
|
|
|
|
.endm
|
|
|
|
|
|
2017-12-04 14:07:35 +00:00
|
|
|
#ifdef CONFIG_PAGE_TABLE_ISOLATION
|
|
|
|
|
|
2017-12-04 14:07:59 +00:00
|
|
|
/*
|
|
|
|
|
* PAGE_TABLE_ISOLATION PGDs are 8k. Flip bit 12 to switch between the two
|
|
|
|
|
* halves:
|
|
|
|
|
*/
|
2018-01-13 23:23:57 +00:00
|
|
|
#define PTI_USER_PGTABLE_BIT PAGE_SHIFT
|
|
|
|
|
#define PTI_USER_PGTABLE_MASK (1 << PTI_USER_PGTABLE_BIT)
|
|
|
|
|
#define PTI_USER_PCID_BIT X86_CR3_PTI_PCID_USER_BIT
|
|
|
|
|
#define PTI_USER_PCID_MASK (1 << PTI_USER_PCID_BIT)
|
|
|
|
|
#define PTI_USER_PGTABLE_AND_PCID_MASK (PTI_USER_PCID_MASK | PTI_USER_PGTABLE_MASK)
|
2017-12-04 14:07:35 +00:00
|
|
|
|
2017-12-04 14:07:59 +00:00
|
|
|
.macro SET_NOFLUSH_BIT reg:req
|
|
|
|
|
bts $X86_CR3_PCID_NOFLUSH_BIT, \reg
|
2017-12-04 14:07:35 +00:00
|
|
|
.endm
|
|
|
|
|
|
2017-12-04 14:07:59 +00:00
|
|
|
.macro ADJUST_KERNEL_CR3 reg:req
|
|
|
|
|
ALTERNATIVE "", "SET_NOFLUSH_BIT \reg", X86_FEATURE_PCID
|
|
|
|
|
/* Clear PCID and "PAGE_TABLE_ISOLATION bit", point CR3 at kernel pagetables: */
|
2018-01-13 23:23:57 +00:00
|
|
|
andq $(~PTI_USER_PGTABLE_AND_PCID_MASK), \reg
|
2017-12-04 14:07:35 +00:00
|
|
|
.endm
|
|
|
|
|
|
|
|
|
|
.macro SWITCH_TO_KERNEL_CR3 scratch_reg:req
|
2017-12-04 14:07:36 +00:00
|
|
|
ALTERNATIVE "jmp .Lend_\@", "", X86_FEATURE_PTI
|
2017-12-04 14:07:35 +00:00
|
|
|
mov %cr3, \scratch_reg
|
|
|
|
|
ADJUST_KERNEL_CR3 \scratch_reg
|
|
|
|
|
mov \scratch_reg, %cr3
|
2017-12-04 14:07:36 +00:00
|
|
|
.Lend_\@:
|
2017-12-04 14:07:35 +00:00
|
|
|
.endm
|
|
|
|
|
|
2017-12-04 14:07:59 +00:00
|
|
|
#define THIS_CPU_user_pcid_flush_mask \
|
|
|
|
|
PER_CPU_VAR(cpu_tlbstate) + TLB_STATE_user_pcid_flush_mask
|
|
|
|
|
|
|
|
|
|
.macro SWITCH_TO_USER_CR3_NOSTACK scratch_reg:req scratch_reg2:req
|
2017-12-04 14:07:36 +00:00
|
|
|
ALTERNATIVE "jmp .Lend_\@", "", X86_FEATURE_PTI
|
2017-12-04 14:07:35 +00:00
|
|
|
mov %cr3, \scratch_reg
|
2017-12-04 14:07:59 +00:00
|
|
|
|
|
|
|
|
ALTERNATIVE "jmp .Lwrcr3_\@", "", X86_FEATURE_PCID
|
|
|
|
|
|
|
|
|
|
/*
|
|
|
|
|
* Test if the ASID needs a flush.
|
|
|
|
|
*/
|
|
|
|
|
movq \scratch_reg, \scratch_reg2
|
|
|
|
|
andq $(0x7FF), \scratch_reg /* mask ASID */
|
|
|
|
|
bt \scratch_reg, THIS_CPU_user_pcid_flush_mask
|
|
|
|
|
jnc .Lnoflush_\@
|
|
|
|
|
|
|
|
|
|
/* Flush needed, clear the bit */
|
|
|
|
|
btr \scratch_reg, THIS_CPU_user_pcid_flush_mask
|
|
|
|
|
movq \scratch_reg2, \scratch_reg
|
2018-01-13 23:23:57 +00:00
|
|
|
jmp .Lwrcr3_pcid_\@
|
2017-12-04 14:07:59 +00:00
|
|
|
|
|
|
|
|
.Lnoflush_\@:
|
|
|
|
|
movq \scratch_reg2, \scratch_reg
|
|
|
|
|
SET_NOFLUSH_BIT \scratch_reg
|
|
|
|
|
|
2018-01-13 23:23:57 +00:00
|
|
|
.Lwrcr3_pcid_\@:
|
|
|
|
|
/* Flip the ASID to the user version */
|
|
|
|
|
orq $(PTI_USER_PCID_MASK), \scratch_reg
|
|
|
|
|
|
2017-12-04 14:07:59 +00:00
|
|
|
.Lwrcr3_\@:
|
2018-01-13 23:23:57 +00:00
|
|
|
/* Flip the PGD to the user version */
|
|
|
|
|
orq $(PTI_USER_PGTABLE_MASK), \scratch_reg
|
2017-12-04 14:07:35 +00:00
|
|
|
mov \scratch_reg, %cr3
|
2017-12-04 14:07:36 +00:00
|
|
|
.Lend_\@:
|
2017-12-04 14:07:35 +00:00
|
|
|
.endm
|
|
|
|
|
|
2017-12-04 14:07:59 +00:00
|
|
|
.macro SWITCH_TO_USER_CR3_STACK scratch_reg:req
|
|
|
|
|
pushq %rax
|
|
|
|
|
SWITCH_TO_USER_CR3_NOSTACK scratch_reg=\scratch_reg scratch_reg2=%rax
|
|
|
|
|
popq %rax
|
|
|
|
|
.endm
|
|
|
|
|
|
2017-12-04 14:07:35 +00:00
|
|
|
.macro SAVE_AND_SWITCH_TO_KERNEL_CR3 scratch_reg:req save_reg:req
|
2017-12-04 14:07:36 +00:00
|
|
|
ALTERNATIVE "jmp .Ldone_\@", "", X86_FEATURE_PTI
|
2017-12-04 14:07:35 +00:00
|
|
|
movq %cr3, \scratch_reg
|
|
|
|
|
movq \scratch_reg, \save_reg
|
|
|
|
|
/*
|
2018-01-13 23:23:57 +00:00
|
|
|
* Test the user pagetable bit. If set, then the user page tables
|
|
|
|
|
* are active. If clear CR3 already has the kernel page table
|
|
|
|
|
* active.
|
2017-12-04 14:07:35 +00:00
|
|
|
*/
|
2018-01-13 23:23:57 +00:00
|
|
|
bt $PTI_USER_PGTABLE_BIT, \scratch_reg
|
|
|
|
|
jnc .Ldone_\@
|
2017-12-04 14:07:35 +00:00
|
|
|
|
|
|
|
|
ADJUST_KERNEL_CR3 \scratch_reg
|
|
|
|
|
movq \scratch_reg, %cr3
|
|
|
|
|
|
|
|
|
|
.Ldone_\@:
|
|
|
|
|
.endm
|
|
|
|
|
|
2017-12-04 14:08:00 +00:00
|
|
|
.macro RESTORE_CR3 scratch_reg:req save_reg:req
|
2017-12-04 14:07:36 +00:00
|
|
|
ALTERNATIVE "jmp .Lend_\@", "", X86_FEATURE_PTI
|
2017-12-04 14:08:00 +00:00
|
|
|
|
|
|
|
|
ALTERNATIVE "jmp .Lwrcr3_\@", "", X86_FEATURE_PCID
|
|
|
|
|
|
|
|
|
|
/*
|
|
|
|
|
* KERNEL pages can always resume with NOFLUSH as we do
|
|
|
|
|
* explicit flushes.
|
|
|
|
|
*/
|
2018-01-13 23:23:57 +00:00
|
|
|
bt $PTI_USER_PGTABLE_BIT, \save_reg
|
2017-12-04 14:08:00 +00:00
|
|
|
jnc .Lnoflush_\@
|
|
|
|
|
|
|
|
|
|
/*
|
|
|
|
|
* Check if there's a pending flush for the user ASID we're
|
|
|
|
|
* about to set.
|
|
|
|
|
*/
|
|
|
|
|
movq \save_reg, \scratch_reg
|
|
|
|
|
andq $(0x7FF), \scratch_reg
|
|
|
|
|
bt \scratch_reg, THIS_CPU_user_pcid_flush_mask
|
|
|
|
|
jnc .Lnoflush_\@
|
|
|
|
|
|
|
|
|
|
btr \scratch_reg, THIS_CPU_user_pcid_flush_mask
|
|
|
|
|
jmp .Lwrcr3_\@
|
|
|
|
|
|
|
|
|
|
.Lnoflush_\@:
|
|
|
|
|
SET_NOFLUSH_BIT \save_reg
|
|
|
|
|
|
|
|
|
|
.Lwrcr3_\@:
|
2017-12-04 14:07:35 +00:00
|
|
|
/*
|
|
|
|
|
* The CR3 write could be avoided when not changing its value,
|
|
|
|
|
* but would require a CR3 read *and* a scratch register.
|
|
|
|
|
*/
|
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movq \save_reg, %cr3
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2017-12-04 14:07:36 +00:00
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.Lend_\@:
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2017-12-04 14:07:35 +00:00
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.endm
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#else /* CONFIG_PAGE_TABLE_ISOLATION=n: */
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.macro SWITCH_TO_KERNEL_CR3 scratch_reg:req
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.endm
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2017-12-04 14:07:59 +00:00
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.macro SWITCH_TO_USER_CR3_NOSTACK scratch_reg:req scratch_reg2:req
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.endm
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.macro SWITCH_TO_USER_CR3_STACK scratch_reg:req
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2017-12-04 14:07:35 +00:00
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.endm
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.macro SAVE_AND_SWITCH_TO_KERNEL_CR3 scratch_reg:req save_reg:req
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.endm
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2017-12-04 14:08:00 +00:00
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.macro RESTORE_CR3 scratch_reg:req save_reg:req
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2017-12-04 14:07:35 +00:00
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.endm
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#endif
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2013-08-14 12:51:00 +00:00
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#endif /* CONFIG_X86_64 */
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2015-11-12 20:59:04 +00:00
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/*
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* This does 'call enter_from_user_mode' unless we can avoid it based on
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* kernel config or using the static jump infrastructure.
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*/
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.macro CALL_enter_from_user_mode
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#ifdef CONFIG_CONTEXT_TRACKING
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#ifdef HAVE_JUMP_LABEL
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STATIC_JUMP_IF_FALSE .Lafter_call_\@, context_tracking_enabled, def=0
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#endif
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call enter_from_user_mode
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.Lafter_call_\@:
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#endif
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.endm
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