[PATCH] avr32 architecture
This adds support for the Atmel AVR32 architecture as well as the AT32AP7000
CPU and the AT32STK1000 development board.
AVR32 is a new high-performance 32-bit RISC microprocessor core, designed for
cost-sensitive embedded applications, with particular emphasis on low power
consumption and high code density. The AVR32 architecture is not binary
compatible with earlier 8-bit AVR architectures.
The AVR32 architecture, including the instruction set, is described by the
AVR32 Architecture Manual, available from
http://www.atmel.com/dyn/resources/prod_documents/doc32000.pdf
The Atmel AT32AP7000 is the first CPU implementing the AVR32 architecture. It
features a 7-stage pipeline, 16KB instruction and data caches and a full
Memory Management Unit. It also comes with a large set of integrated
peripherals, many of which are shared with the AT91 ARM-based controllers from
Atmel.
Full data sheet is available from
http://www.atmel.com/dyn/resources/prod_documents/doc32003.pdf
while the CPU core implementation including caches and MMU is documented by
the AVR32 AP Technical Reference, available from
http://www.atmel.com/dyn/resources/prod_documents/doc32001.pdf
Information about the AT32STK1000 development board can be found at
http://www.atmel.com/dyn/products/tools_card.asp?tool_id=3918
including a BSP CD image with an earlier version of this patch, development
tools (binaries and source/patches) and a root filesystem image suitable for
booting from SD card.
Alternatively, there's a preliminary "getting started" guide available at
http://avr32linux.org/twiki/bin/view/Main/GettingStarted which provides links
to the sources and patches you will need in order to set up a cross-compiling
environment for avr32-linux.
This patch, as well as the other patches included with the BSP and the
toolchain patches, is actively supported by Atmel Corporation.
[dmccr@us.ibm.com: Fix more pxx_page macro locations]
[bunk@stusta.de: fix `make defconfig']
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Signed-off-by: Adrian Bunk <bunk@stusta.de>
Signed-off-by: Dave McCracken <dmccr@us.ibm.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-09-26 06:32:13 +00:00
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/*
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* Copyright (C) 2004-2006 Atmel Corporation
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#ifndef __ASM_AVR32_PAGE_H
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#define __ASM_AVR32_PAGE_H
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/* PAGE_SHIFT determines the page size */
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#define PAGE_SHIFT 12
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#ifdef __ASSEMBLY__
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#define PAGE_SIZE (1 << PAGE_SHIFT)
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#else
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#define PAGE_SIZE (1UL << PAGE_SHIFT)
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#endif
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#define PAGE_MASK (~(PAGE_SIZE-1))
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#define PTE_MASK PAGE_MASK
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#ifndef __ASSEMBLY__
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#include <asm/addrspace.h>
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extern void clear_page(void *to);
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extern void copy_page(void *to, void *from);
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#define clear_user_page(page, vaddr, pg) clear_page(page)
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#define copy_user_page(to, from, vaddr, pg) copy_page(to, from)
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/*
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* These are used to make use of C type-checking..
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*/
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typedef struct { unsigned long pte; } pte_t;
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typedef struct { unsigned long pgd; } pgd_t;
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typedef struct { unsigned long pgprot; } pgprot_t;
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2008-02-08 12:22:04 +00:00
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typedef struct page *pgtable_t;
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[PATCH] avr32 architecture
This adds support for the Atmel AVR32 architecture as well as the AT32AP7000
CPU and the AT32STK1000 development board.
AVR32 is a new high-performance 32-bit RISC microprocessor core, designed for
cost-sensitive embedded applications, with particular emphasis on low power
consumption and high code density. The AVR32 architecture is not binary
compatible with earlier 8-bit AVR architectures.
The AVR32 architecture, including the instruction set, is described by the
AVR32 Architecture Manual, available from
http://www.atmel.com/dyn/resources/prod_documents/doc32000.pdf
The Atmel AT32AP7000 is the first CPU implementing the AVR32 architecture. It
features a 7-stage pipeline, 16KB instruction and data caches and a full
Memory Management Unit. It also comes with a large set of integrated
peripherals, many of which are shared with the AT91 ARM-based controllers from
Atmel.
Full data sheet is available from
http://www.atmel.com/dyn/resources/prod_documents/doc32003.pdf
while the CPU core implementation including caches and MMU is documented by
the AVR32 AP Technical Reference, available from
http://www.atmel.com/dyn/resources/prod_documents/doc32001.pdf
Information about the AT32STK1000 development board can be found at
http://www.atmel.com/dyn/products/tools_card.asp?tool_id=3918
including a BSP CD image with an earlier version of this patch, development
tools (binaries and source/patches) and a root filesystem image suitable for
booting from SD card.
Alternatively, there's a preliminary "getting started" guide available at
http://avr32linux.org/twiki/bin/view/Main/GettingStarted which provides links
to the sources and patches you will need in order to set up a cross-compiling
environment for avr32-linux.
This patch, as well as the other patches included with the BSP and the
toolchain patches, is actively supported by Atmel Corporation.
[dmccr@us.ibm.com: Fix more pxx_page macro locations]
[bunk@stusta.de: fix `make defconfig']
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Signed-off-by: Adrian Bunk <bunk@stusta.de>
Signed-off-by: Dave McCracken <dmccr@us.ibm.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-09-26 06:32:13 +00:00
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#define pte_val(x) ((x).pte)
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#define pgd_val(x) ((x).pgd)
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#define pgprot_val(x) ((x).pgprot)
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#define __pte(x) ((pte_t) { (x) })
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#define __pgd(x) ((pgd_t) { (x) })
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#define __pgprot(x) ((pgprot_t) { (x) })
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/* FIXME: These should be removed soon */
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extern unsigned long memory_start, memory_end;
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/* Pure 2^n version of get_order */
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static inline int get_order(unsigned long size)
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{
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unsigned lz;
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size = (size - 1) >> PAGE_SHIFT;
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asm("clz %0, %1" : "=r"(lz) : "r"(size));
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return 32 - lz;
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}
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#endif /* !__ASSEMBLY__ */
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/* Align the pointer to the (next) page boundary */
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#define PAGE_ALIGN(addr) (((addr) + PAGE_SIZE - 1) & PAGE_MASK)
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/*
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* The hardware maps the virtual addresses 0x80000000 -> 0x9fffffff
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* permanently to the physical addresses 0x00000000 -> 0x1fffffff when
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* segmentation is enabled. We want to make use of this in order to
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* minimize TLB pressure.
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*/
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#define PAGE_OFFSET (0x80000000UL)
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/*
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* ALSA uses virt_to_page() on DMA pages, which I'm not entirely sure
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* is a good idea. Anyway, we can't simply subtract PAGE_OFFSET here
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* in that case, so we'll have to mask out the three most significant
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* bits of the address instead...
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*
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* What's the difference between __pa() and virt_to_phys() anyway?
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*/
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#define __pa(x) PHYSADDR(x)
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#define __va(x) ((void *)(P1SEGADDR(x)))
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#define MAP_NR(addr) (((unsigned long)(addr) - PAGE_OFFSET) >> PAGE_SHIFT)
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#define phys_to_page(phys) (pfn_to_page(phys >> PAGE_SHIFT))
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#define page_to_phys(page) (page_to_pfn(page) << PAGE_SHIFT)
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#ifndef CONFIG_NEED_MULTIPLE_NODES
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#define PHYS_PFN_OFFSET (CONFIG_PHYS_OFFSET >> PAGE_SHIFT)
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#define pfn_to_page(pfn) (mem_map + ((pfn) - PHYS_PFN_OFFSET))
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#define page_to_pfn(page) ((unsigned long)((page) - mem_map) + PHYS_PFN_OFFSET)
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#define pfn_valid(pfn) ((pfn) >= PHYS_PFN_OFFSET && (pfn) < (PHYS_PFN_OFFSET + max_mapnr))
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#endif /* CONFIG_NEED_MULTIPLE_NODES */
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#define virt_to_page(kaddr) pfn_to_page(__pa(kaddr) >> PAGE_SHIFT)
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#define virt_addr_valid(kaddr) pfn_valid(__pa(kaddr) >> PAGE_SHIFT)
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#define VM_DATA_DEFAULT_FLAGS (VM_READ | VM_WRITE | \
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VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC)
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/*
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* Memory above this physical address will be considered highmem.
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*/
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#define HIGHMEM_START 0x20000000UL
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#endif /* __ASM_AVR32_PAGE_H */
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