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linux/arch/arm/boot/dts/am33xx.dtsi

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arm/dts: Add initial DT support for AM33XX SoC family Add device tree source include file for the AM33XX SoC family. An additional .dtsi file is created to describe the generic AM33XX CPU module like intc, ocp. Actual selection of available peripherals is handled in seperate .dts files using this am33xx.dtsi generic header file. Signed-off-by: AnilKumar Ch <anilkumar@ti.com> Reviewed-by: Vaibhav Hiremath <hvaibhav@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2012-06-22 09:40:48 +00:00
/*
* Device Tree Source for AM33XX SoC
*
* Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
*
* This file is licensed under the terms of the GNU General Public License
* version 2. This program is licensed "as is" without any warranty of any
* kind, whether express or implied.
*/
ARM: dts: AM33XX: Use existing constants for GPIOs Use standard GPIO constants to enhance the readability of DT GPIOs. Signed-off-by: Florian Vaussard <florian.vaussard@epfl.ch> Tested-by: Afzal Mohammed <afzal@ti.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-06-03 14:12:23 +00:00
#include <dt-bindings/gpio/gpio.h>
ARM: dts: AM33XX: Use pinctrl constants Using constants for pinctrl allows a better readability, and removes redundancy with comments. Signed-off-by: Florian Vaussard <florian.vaussard@epfl.ch> Tested-by: Afzal Mohammed <afzal@ti.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-06-03 14:12:25 +00:00
#include <dt-bindings/pinctrl/am33xx.h>
ARM: dts: AM33XX: Use existing constants for GPIOs Use standard GPIO constants to enhance the readability of DT GPIOs. Signed-off-by: Florian Vaussard <florian.vaussard@epfl.ch> Tested-by: Afzal Mohammed <afzal@ti.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-06-03 14:12:23 +00:00
ARM: dts: AM3XXX: Use #include for all device trees Replace /include/ by #include for AM33XX and AM35XX device tree files, in order to use the C pre-processor, making use of #define features possible. Signed-off-by: Florian Vaussard <florian.vaussard@epfl.ch> Tested-by: Afzal Mohammed <afzal@ti.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-06-03 14:12:22 +00:00
#include "skeleton.dtsi"
arm/dts: Add initial DT support for AM33XX SoC family Add device tree source include file for the AM33XX SoC family. An additional .dtsi file is created to describe the generic AM33XX CPU module like intc, ocp. Actual selection of available peripherals is handled in seperate .dts files using this am33xx.dtsi generic header file. Signed-off-by: AnilKumar Ch <anilkumar@ti.com> Reviewed-by: Vaibhav Hiremath <hvaibhav@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2012-06-22 09:40:48 +00:00
/ {
compatible = "ti,am33xx";
ARM: dts: OMAP: Move interrupt-parent to the root node to avoid duplication The interrupt-parent attribute does not have to be added in each node since the fmwk will check for the parent as well to get it. Create an interrupt-parent for OMAP2, OMAP3, AM33xx and remove the attributes from every nodes that were using it. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Cc: Vaibhav Hiremath <hvaibhav@ti.com> Cc: Peter Ujfalusi <peter.ujfalusi@ti.com> Cc: Sebastien Guiriec <s-guiriec@ti.com>
2012-10-24 08:47:52 +00:00
interrupt-parent = <&intc>;
arm/dts: Add initial DT support for AM33XX SoC family Add device tree source include file for the AM33XX SoC family. An additional .dtsi file is created to describe the generic AM33XX CPU module like intc, ocp. Actual selection of available peripherals is handled in seperate .dts files using this am33xx.dtsi generic header file. Signed-off-by: AnilKumar Ch <anilkumar@ti.com> Reviewed-by: Vaibhav Hiremath <hvaibhav@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2012-06-22 09:40:48 +00:00
aliases {
ARM: dts: AM33xx+: Add i2c aliases Provide alias to allow ordering the i2c devices correctly. Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Benoit Cousson <bcousson@baylibre.com>
2013-10-16 20:21:04 +00:00
i2c0 = &i2c0;
i2c1 = &i2c1;
i2c2 = &i2c2;
ARM: dts: AM33XX: Fix uart numbering to match hardware/TRM With DT support, where naming convention is based on base-addr and not id, so we should follow TRM/Spec numbering label. This patch changes UART numbering as per TRM, as uart0-5. Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com> Acked-by: Matt Porter <mporter@ti.com> Cc: Peter Korsgaard <jacmet@sunsite.dk> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-03-28 06:06:05 +00:00
serial0 = &uart0;
serial1 = &uart1;
serial2 = &uart2;
serial3 = &uart3;
serial4 = &uart4;
serial5 = &uart5;
ARM: dts: AM33XX: Add d_can instances to aliases Add d_can instances to aliases node to get the D_CAN instance number from the driver. To initialize D_CAN message RAM, corresponding instance number is required. To initialize instance 0 message RAM then 0x1 should be written and for instance 1 message RAM, 0x2 should be written to control module register. With device-tree framework ip instance number is "-1" by default for all instances. To get device id/instance number then modules should be added to DT "aliases" node. of_alias_get_id() gives the device id number based on number of alias nodes present in "aliases node". Signed-off-by: AnilKumar Ch <anilkumar@ti.com> Acked-by: Marc Kleine-Budde <mkl@pengutronix.de> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2012-11-14 18:08:24 +00:00
d_can0 = &dcan0;
d_can1 = &dcan1;
usb: musb: dsps: use proper child nodes This moves the two instances from the big node into two child nodes. The glue layer ontop does almost nothing. There is one devices containing the control module for USB (2) phy, (2) usb and later the dma engine. The usb device is the "glue device" which contains the musb device as a child. This is what we do ever since. The new file musb_am335x is just here to prob the new bus and populate child devices. There are a lot of changes to the dsps file as a result of the changes: - musb_core_offset This is gone. The device tree provides memory ressources information for the device there is no need to "fix" things - instances This is gone as well. If we have two instances then we have have two child enabled nodes in the device tree. For instance the SoC in beagle bone has two USB instances but only one has been wired up so there is no need to load and init the second instance since it won't be used. - dsps_glue is now per glue device In the past there was one of this structs but with an array of two and each instance accessed its variable depending on the platform device id. - no unneeded copy of structs I do not know why struct dsps_musb_wrapper is copied but it is not necessary. The same goes for musb_hdrc_platform_data which allocated on demand and then again by platform_device_add_data(). One copy is enough. Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de> Signed-off-by: Felipe Balbi <balbi@ti.com>
2013-07-05 12:51:33 +00:00
usb0 = &usb0;
usb1 = &usb1;
phy0 = &usb0_phy;
phy1 = &usb1_phy;
ARM: dts: AM33XX: add ethernet alias's for am33xx Set the alias for ethernet0 and ethernet1 so that uBoot can set the MAC address appropriately. Currently u-boot cannot find the alias and there for does not set the MAC address. Signed-off-by: Dan Murphy <dmurphy@ti.com> Tested-by: Mugunthan V N <mugunthanvnm@ti.com> Signed-off-by: Benoit Cousson <bcousson@baylibre.com>
2013-10-02 17:58:33 +00:00
ethernet0 = &cpsw_emac0;
ethernet1 = &cpsw_emac1;
arm/dts: Add initial DT support for AM33XX SoC family Add device tree source include file for the AM33XX SoC family. An additional .dtsi file is created to describe the generic AM33XX CPU module like intc, ocp. Actual selection of available peripherals is handled in seperate .dts files using this am33xx.dtsi generic header file. Signed-off-by: AnilKumar Ch <anilkumar@ti.com> Reviewed-by: Vaibhav Hiremath <hvaibhav@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2012-06-22 09:40:48 +00:00
};
cpus {
ARM: dts: am33xx: cpus/cpu nodes dts updates This patch updates the in-kernel dts files according to the latest cpus and cpu bindings updates for ARM. Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
2013-04-18 17:35:59 +00:00
#address-cells = <1>;
#size-cells = <0>;
arm/dts: Add initial DT support for AM33XX SoC family Add device tree source include file for the AM33XX SoC family. An additional .dtsi file is created to describe the generic AM33XX CPU module like intc, ocp. Actual selection of available peripherals is handled in seperate .dts files using this am33xx.dtsi generic header file. Signed-off-by: AnilKumar Ch <anilkumar@ti.com> Reviewed-by: Vaibhav Hiremath <hvaibhav@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2012-06-22 09:40:48 +00:00
cpu@0 {
compatible = "arm,cortex-a8";
ARM: dts: am33xx: cpus/cpu nodes dts updates This patch updates the in-kernel dts files according to the latest cpus and cpu bindings updates for ARM. Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
2013-04-18 17:35:59 +00:00
device_type = "cpu";
reg = <0>;
ARM: dts: AM33XX: Add device tree OPP table Add DT OPP table for AM33XX family of devices. This data is decoded by OF with of_init_opp_table() helper function. Also adds cpu0 supply name to the corresponding dts files. cpu0-supply name is used by cpufreq-cpu0 driver to get the regulator pointer for voltage modifications. Signed-off-by: AnilKumar Ch <anilkumar@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-08-31 09:37:20 +00:00
/*
* To consider voltage drop between PMIC and SoC,
* tolerance value is reduced to 2% from 4% and
* voltage value is increased as a precaution.
*/
operating-points = <
/* kHz uV */
720000 1285000
600000 1225000
500000 1125000
275000 1125000
>;
voltage-tolerance = <2>; /* 2 percentage */
ARM: dts: OMAP3+: add clock nodes for CPU OMAP34xx, AM3517 and OMAP36xx platforms use dpll1 clock. OMAP443x, OMAP446x, OMAP447x, OMAP5, DRA7, AM43xx platforms use dpll_mpu clock. Latency used is the generic latency defined in omap-cpufreq driver. Signed-off-by: Nishanth Menon <nm@ti.com> Acked-by: Acked-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2014-01-29 18:19:17 +00:00
clocks = <&dpll_mpu_ck>;
clock-names = "cpu";
ARM: dts: AM33XX: Add device tree OPP table Add DT OPP table for AM33XX family of devices. This data is decoded by OF with of_init_opp_table() helper function. Also adds cpu0 supply name to the corresponding dts files. cpu0-supply name is used by cpufreq-cpu0 driver to get the regulator pointer for voltage modifications. Signed-off-by: AnilKumar Ch <anilkumar@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-08-31 09:37:20 +00:00
clock-latency = <300000>; /* From omap-cpufreq driver */
arm/dts: Add initial DT support for AM33XX SoC family Add device tree source include file for the AM33XX SoC family. An additional .dtsi file is created to describe the generic AM33XX CPU module like intc, ocp. Actual selection of available peripherals is handled in seperate .dts files using this am33xx.dtsi generic header file. Signed-off-by: AnilKumar Ch <anilkumar@ti.com> Reviewed-by: Vaibhav Hiremath <hvaibhav@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2012-06-22 09:40:48 +00:00
};
};
ARM: dts: AM33XX: Add PMU support ARM Performance Monitor Units are available on the am33xx, add the support in the dtsi. Tested with perf and oprofile on a regular beaglebone. Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Signed-off-by: Benoit Cousson <bcousson@baylibre.com>
2013-08-03 18:00:54 +00:00
pmu {
compatible = "arm,cortex-a8-pmu";
interrupts = <3>;
};
arm/dts: Add initial DT support for AM33XX SoC family Add device tree source include file for the AM33XX SoC family. An additional .dtsi file is created to describe the generic AM33XX CPU module like intc, ocp. Actual selection of available peripherals is handled in seperate .dts files using this am33xx.dtsi generic header file. Signed-off-by: AnilKumar Ch <anilkumar@ti.com> Reviewed-by: Vaibhav Hiremath <hvaibhav@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2012-06-22 09:40:48 +00:00
/*
ARM: dts: Grammar /is uses/ is used/ Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Cc: linux-omap@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org Signed-off-by: Tony Lindgren <tony@atomide.com>
2014-03-28 10:11:37 +00:00
* The soc node represents the soc top level view. It is used for IPs
arm/dts: Add initial DT support for AM33XX SoC family Add device tree source include file for the AM33XX SoC family. An additional .dtsi file is created to describe the generic AM33XX CPU module like intc, ocp. Actual selection of available peripherals is handled in seperate .dts files using this am33xx.dtsi generic header file. Signed-off-by: AnilKumar Ch <anilkumar@ti.com> Reviewed-by: Vaibhav Hiremath <hvaibhav@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2012-06-22 09:40:48 +00:00
* that are not memory mapped in the MPU view or for the MPU itself.
*/
soc {
compatible = "ti,omap-infra";
mpu {
compatible = "ti,omap3-mpu";
ti,hwmods = "mpu";
};
};
ARM: dts: AM33XX: Add basic pinctrl device tree data Adds basic pinctrl device tree data for AM33XX family of devices. This patch is based on the pinctrl-single driver. Signed-off-by: AnilKumar Ch <anilkumar@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-09-19 21:19:26 +00:00
am33xx_pinmux: pinmux@44e10800 {
compatible = "pinctrl-single";
reg = <0x44e10800 0x0238>;
#address-cells = <1>;
#size-cells = <0>;
pinctrl-single,register-width = <32>;
pinctrl-single,function-mask = <0x7f>;
};
arm/dts: Add initial DT support for AM33XX SoC family Add device tree source include file for the AM33XX SoC family. An additional .dtsi file is created to describe the generic AM33XX CPU module like intc, ocp. Actual selection of available peripherals is handled in seperate .dts files using this am33xx.dtsi generic header file. Signed-off-by: AnilKumar Ch <anilkumar@ti.com> Reviewed-by: Vaibhav Hiremath <hvaibhav@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2012-06-22 09:40:48 +00:00
/*
* XXX: Use a flat representation of the AM33XX interconnect.
ARM: dts: Grammar /that will/it will/ Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Cc: linux-omap@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org Signed-off-by: Tony Lindgren <tony@atomide.com>
2014-03-28 10:11:39 +00:00
* The real AM33XX interconnect network is quite complex. Since
* it will not bring real advantage to represent that in DT
arm/dts: Add initial DT support for AM33XX SoC family Add device tree source include file for the AM33XX SoC family. An additional .dtsi file is created to describe the generic AM33XX CPU module like intc, ocp. Actual selection of available peripherals is handled in seperate .dts files using this am33xx.dtsi generic header file. Signed-off-by: AnilKumar Ch <anilkumar@ti.com> Reviewed-by: Vaibhav Hiremath <hvaibhav@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2012-06-22 09:40:48 +00:00
* for the moment, just use a fake OCP bus entry to represent
* the whole bus hierarchy.
*/
ocp {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
ranges;
ti,hwmods = "l3_main";
ARM: dts: am33xx clock data This patch creates a unique node for each clock in the AM33xx power, reset and clock manager (PRCM). Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-07-18 15:15:35 +00:00
prcm: prcm@44e00000 {
compatible = "ti,am3-prcm";
reg = <0x44e00000 0x4000>;
prcm_clocks: clocks {
#address-cells = <1>;
#size-cells = <0>;
};
prcm_clockdomains: clockdomains {
};
};
scrm: scrm@44e10000 {
compatible = "ti,am3-scrm";
reg = <0x44e10000 0x2000>;
scrm_clocks: clocks {
#address-cells = <1>;
#size-cells = <0>;
};
scrm_clockdomains: clockdomains {
};
};
arm/dts: Add initial DT support for AM33XX SoC family Add device tree source include file for the AM33XX SoC family. An additional .dtsi file is created to describe the generic AM33XX CPU module like intc, ocp. Actual selection of available peripherals is handled in seperate .dts files using this am33xx.dtsi generic header file. Signed-off-by: AnilKumar Ch <anilkumar@ti.com> Reviewed-by: Vaibhav Hiremath <hvaibhav@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2012-06-22 09:40:48 +00:00
intc: interrupt-controller@48200000 {
compatible = "ti,omap2-intc";
interrupt-controller;
#interrupt-cells = <1>;
ti,intc-size = <128>;
reg = <0x48200000 0x1000>;
};
ARM: dts: AM33XX: Add EDMA support Adds AM33XX EDMA support to the am33xx.dtsi as documented in Documentation/devicetree/bindings/dma/ti-edma.txt [Joel Fernandes <joelf@ti.com>] Drop DT entries that are non-hardware-description as discussed in [1] [1] https://patchwork.kernel.org/patch/2226761/ Signed-off-by: Matt Porter <mporter@ti.com> Signed-off-by: Joel A Fernandes <joelagnel@ti.com> Signed-off-by: Benoit Cousson <bcousson@baylibre.com>
2013-09-10 19:24:37 +00:00
edma: edma@49000000 {
compatible = "ti,edma3";
ti,hwmods = "tpcc", "tptc0", "tptc1", "tptc2";
reg = <0x49000000 0x10000>,
ARM: common: edma: Fix xbar mapping This is another great example of trainwreck engineering: commit 2646a0e529 (ARM: edma: Add EDMA crossbar event mux support) added support for using EDMA on peripherals which have no direct EDMA event mapping. The code compiles and does not explode in your face, but that's it. 1) Reading an u16 array from an u32 device tree array simply does not work. Even if the function is named "edma_of_read_u32_to_s16_array". It merily calls of_property_read_u16_array. So the resulting 16bit array will have every other entry = 0. 2) The DT entry for the xbar registers related to xbar has length 0x10 instead of the real length: 0xfd0 - 0xf90 = 0x40. Not a real problem as it does not cross a page boundary, but wrong nevertheless. 3) But none of this matters as the mapping never happens: After reading nonsense edma_of_read_u32_to_s16_array() invalidates the first array entry pair, so nobody can ever notice the braindamage by immediate explosion. Seems the QA criteria for this code was solely not to explode when someone adds edma-xbar-event-map entries to the DT. Goal achieved, congratulations! Not really helpful if someone wants to use edma on a device which requires a xbar mapping. Fix the issues by: - annotating the device tree entry with "/bits/ 16" as documented in the of_property_read_u16_array kernel doc - make the size of the xbar register mapping correct - invalidating the end of the array and not the start This convoluted mess wants to be completely rewritten as there is no point to keep the xbar_chan array memory and the iomapping of the xbar regs around forever. Marking the xbar mapped channels as used should be done right there. But that's a different issue and this patch is small enough to make it work and allows a simple backport for stable. Cc: stable@vger.kernel.org # v3.12+ Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2014-04-13 18:44:46 +00:00
<0x44e10f90 0x40>;
ARM: dts: AM33XX: Add EDMA support Adds AM33XX EDMA support to the am33xx.dtsi as documented in Documentation/devicetree/bindings/dma/ti-edma.txt [Joel Fernandes <joelf@ti.com>] Drop DT entries that are non-hardware-description as discussed in [1] [1] https://patchwork.kernel.org/patch/2226761/ Signed-off-by: Matt Porter <mporter@ti.com> Signed-off-by: Joel A Fernandes <joelagnel@ti.com> Signed-off-by: Benoit Cousson <bcousson@baylibre.com>
2013-09-10 19:24:37 +00:00
interrupts = <12 13 14>;
#dma-cells = <1>;
};
ARM: dts: AM33XX: Rename I2C and GPIO nodes Rename I2C and GPIO nodes according to AM33XX TRM. According to AM33XX TRM device instances are starting from "0" like i2c0, i2c1 and i2c3. Signed-off-by: Pantelis Antoniou <panto@antoniou-consulting.com> [panto@antoniou-consulting.com: initial patch by pantelis's] Signed-off-by: AnilKumar Ch <anilkumar@ti.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2012-11-21 11:52:17 +00:00
gpio0: gpio@44e07000 {
arm/dts: Add initial DT support for AM33XX SoC family Add device tree source include file for the AM33XX SoC family. An additional .dtsi file is created to describe the generic AM33XX CPU module like intc, ocp. Actual selection of available peripherals is handled in seperate .dts files using this am33xx.dtsi generic header file. Signed-off-by: AnilKumar Ch <anilkumar@ti.com> Reviewed-by: Vaibhav Hiremath <hvaibhav@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2012-06-22 09:40:48 +00:00
compatible = "ti,omap4-gpio";
ti,hwmods = "gpio1";
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
ARM: dts: AM33xx: Correct gpio #interrupt-cells property Following commit ff5c9059 and therefore other omap platforms using the gpio-omap driver correct the #interrupt-cells property on am33xx too. The omap gpio binding documentaion also states that the #interrupt-cells property should be 2. Signed-off-by: Lars Poeschel <poeschel@lemonage.de> Reviewed-by: Javier Martinez Canillas <javier@dowhile0.org> Acked-by: Mark Rutland <mark.rutland@arm.com> Signed-off-by: Benoit Cousson <bcousson@baylibre.com>
2013-08-07 11:06:32 +00:00
#interrupt-cells = <2>;
ARM: dts: AM33XX: Specify reg and interrupt property for all nodes The device/node resources (like, IORESOURCE_MEM and IORESOURCE_IRQ) are overwritten by hwmod resources, due to all known reasons but that should not be the reason for not providing all the information in the DTS blob. Ideally we should use DTS resource and use HWMOD framework wherever required and for only specific things. Newer platforms like, OMAP5 and AM33XX, we only support DT boot mode, so this patch is preparation for the future where we supposed to get rid of hwmod dependency anyway. Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com> Cc: Tony Lindgren <tony@atomide.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-08-27 11:51:01 +00:00
reg = <0x44e07000 0x1000>;
interrupts = <96>;
arm/dts: Add initial DT support for AM33XX SoC family Add device tree source include file for the AM33XX SoC family. An additional .dtsi file is created to describe the generic AM33XX CPU module like intc, ocp. Actual selection of available peripherals is handled in seperate .dts files using this am33xx.dtsi generic header file. Signed-off-by: AnilKumar Ch <anilkumar@ti.com> Reviewed-by: Vaibhav Hiremath <hvaibhav@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2012-06-22 09:40:48 +00:00
};
ARM: dts: AM33XX: Rename I2C and GPIO nodes Rename I2C and GPIO nodes according to AM33XX TRM. According to AM33XX TRM device instances are starting from "0" like i2c0, i2c1 and i2c3. Signed-off-by: Pantelis Antoniou <panto@antoniou-consulting.com> [panto@antoniou-consulting.com: initial patch by pantelis's] Signed-off-by: AnilKumar Ch <anilkumar@ti.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2012-11-21 11:52:17 +00:00
gpio1: gpio@4804c000 {
arm/dts: Add initial DT support for AM33XX SoC family Add device tree source include file for the AM33XX SoC family. An additional .dtsi file is created to describe the generic AM33XX CPU module like intc, ocp. Actual selection of available peripherals is handled in seperate .dts files using this am33xx.dtsi generic header file. Signed-off-by: AnilKumar Ch <anilkumar@ti.com> Reviewed-by: Vaibhav Hiremath <hvaibhav@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2012-06-22 09:40:48 +00:00
compatible = "ti,omap4-gpio";
ti,hwmods = "gpio2";
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
ARM: dts: AM33xx: Correct gpio #interrupt-cells property Following commit ff5c9059 and therefore other omap platforms using the gpio-omap driver correct the #interrupt-cells property on am33xx too. The omap gpio binding documentaion also states that the #interrupt-cells property should be 2. Signed-off-by: Lars Poeschel <poeschel@lemonage.de> Reviewed-by: Javier Martinez Canillas <javier@dowhile0.org> Acked-by: Mark Rutland <mark.rutland@arm.com> Signed-off-by: Benoit Cousson <bcousson@baylibre.com>
2013-08-07 11:06:32 +00:00
#interrupt-cells = <2>;
ARM: dts: AM33XX: Specify reg and interrupt property for all nodes The device/node resources (like, IORESOURCE_MEM and IORESOURCE_IRQ) are overwritten by hwmod resources, due to all known reasons but that should not be the reason for not providing all the information in the DTS blob. Ideally we should use DTS resource and use HWMOD framework wherever required and for only specific things. Newer platforms like, OMAP5 and AM33XX, we only support DT boot mode, so this patch is preparation for the future where we supposed to get rid of hwmod dependency anyway. Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com> Cc: Tony Lindgren <tony@atomide.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-08-27 11:51:01 +00:00
reg = <0x4804c000 0x1000>;
interrupts = <98>;
arm/dts: Add initial DT support for AM33XX SoC family Add device tree source include file for the AM33XX SoC family. An additional .dtsi file is created to describe the generic AM33XX CPU module like intc, ocp. Actual selection of available peripherals is handled in seperate .dts files using this am33xx.dtsi generic header file. Signed-off-by: AnilKumar Ch <anilkumar@ti.com> Reviewed-by: Vaibhav Hiremath <hvaibhav@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2012-06-22 09:40:48 +00:00
};
ARM: dts: AM33XX: Rename I2C and GPIO nodes Rename I2C and GPIO nodes according to AM33XX TRM. According to AM33XX TRM device instances are starting from "0" like i2c0, i2c1 and i2c3. Signed-off-by: Pantelis Antoniou <panto@antoniou-consulting.com> [panto@antoniou-consulting.com: initial patch by pantelis's] Signed-off-by: AnilKumar Ch <anilkumar@ti.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2012-11-21 11:52:17 +00:00
gpio2: gpio@481ac000 {
arm/dts: Add initial DT support for AM33XX SoC family Add device tree source include file for the AM33XX SoC family. An additional .dtsi file is created to describe the generic AM33XX CPU module like intc, ocp. Actual selection of available peripherals is handled in seperate .dts files using this am33xx.dtsi generic header file. Signed-off-by: AnilKumar Ch <anilkumar@ti.com> Reviewed-by: Vaibhav Hiremath <hvaibhav@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2012-06-22 09:40:48 +00:00
compatible = "ti,omap4-gpio";
ti,hwmods = "gpio3";
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
ARM: dts: AM33xx: Correct gpio #interrupt-cells property Following commit ff5c9059 and therefore other omap platforms using the gpio-omap driver correct the #interrupt-cells property on am33xx too. The omap gpio binding documentaion also states that the #interrupt-cells property should be 2. Signed-off-by: Lars Poeschel <poeschel@lemonage.de> Reviewed-by: Javier Martinez Canillas <javier@dowhile0.org> Acked-by: Mark Rutland <mark.rutland@arm.com> Signed-off-by: Benoit Cousson <bcousson@baylibre.com>
2013-08-07 11:06:32 +00:00
#interrupt-cells = <2>;
ARM: dts: AM33XX: Specify reg and interrupt property for all nodes The device/node resources (like, IORESOURCE_MEM and IORESOURCE_IRQ) are overwritten by hwmod resources, due to all known reasons but that should not be the reason for not providing all the information in the DTS blob. Ideally we should use DTS resource and use HWMOD framework wherever required and for only specific things. Newer platforms like, OMAP5 and AM33XX, we only support DT boot mode, so this patch is preparation for the future where we supposed to get rid of hwmod dependency anyway. Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com> Cc: Tony Lindgren <tony@atomide.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-08-27 11:51:01 +00:00
reg = <0x481ac000 0x1000>;
interrupts = <32>;
arm/dts: Add initial DT support for AM33XX SoC family Add device tree source include file for the AM33XX SoC family. An additional .dtsi file is created to describe the generic AM33XX CPU module like intc, ocp. Actual selection of available peripherals is handled in seperate .dts files using this am33xx.dtsi generic header file. Signed-off-by: AnilKumar Ch <anilkumar@ti.com> Reviewed-by: Vaibhav Hiremath <hvaibhav@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2012-06-22 09:40:48 +00:00
};
ARM: dts: AM33XX: Rename I2C and GPIO nodes Rename I2C and GPIO nodes according to AM33XX TRM. According to AM33XX TRM device instances are starting from "0" like i2c0, i2c1 and i2c3. Signed-off-by: Pantelis Antoniou <panto@antoniou-consulting.com> [panto@antoniou-consulting.com: initial patch by pantelis's] Signed-off-by: AnilKumar Ch <anilkumar@ti.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2012-11-21 11:52:17 +00:00
gpio3: gpio@481ae000 {
arm/dts: Add initial DT support for AM33XX SoC family Add device tree source include file for the AM33XX SoC family. An additional .dtsi file is created to describe the generic AM33XX CPU module like intc, ocp. Actual selection of available peripherals is handled in seperate .dts files using this am33xx.dtsi generic header file. Signed-off-by: AnilKumar Ch <anilkumar@ti.com> Reviewed-by: Vaibhav Hiremath <hvaibhav@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2012-06-22 09:40:48 +00:00
compatible = "ti,omap4-gpio";
ti,hwmods = "gpio4";
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
ARM: dts: AM33xx: Correct gpio #interrupt-cells property Following commit ff5c9059 and therefore other omap platforms using the gpio-omap driver correct the #interrupt-cells property on am33xx too. The omap gpio binding documentaion also states that the #interrupt-cells property should be 2. Signed-off-by: Lars Poeschel <poeschel@lemonage.de> Reviewed-by: Javier Martinez Canillas <javier@dowhile0.org> Acked-by: Mark Rutland <mark.rutland@arm.com> Signed-off-by: Benoit Cousson <bcousson@baylibre.com>
2013-08-07 11:06:32 +00:00
#interrupt-cells = <2>;
ARM: dts: AM33XX: Specify reg and interrupt property for all nodes The device/node resources (like, IORESOURCE_MEM and IORESOURCE_IRQ) are overwritten by hwmod resources, due to all known reasons but that should not be the reason for not providing all the information in the DTS blob. Ideally we should use DTS resource and use HWMOD framework wherever required and for only specific things. Newer platforms like, OMAP5 and AM33XX, we only support DT boot mode, so this patch is preparation for the future where we supposed to get rid of hwmod dependency anyway. Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com> Cc: Tony Lindgren <tony@atomide.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-08-27 11:51:01 +00:00
reg = <0x481ae000 0x1000>;
interrupts = <62>;
arm/dts: Add initial DT support for AM33XX SoC family Add device tree source include file for the AM33XX SoC family. An additional .dtsi file is created to describe the generic AM33XX CPU module like intc, ocp. Actual selection of available peripherals is handled in seperate .dts files using this am33xx.dtsi generic header file. Signed-off-by: AnilKumar Ch <anilkumar@ti.com> Reviewed-by: Vaibhav Hiremath <hvaibhav@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2012-06-22 09:40:48 +00:00
};
ARM: dts: AM33XX: Fix uart numbering to match hardware/TRM With DT support, where naming convention is based on base-addr and not id, so we should follow TRM/Spec numbering label. This patch changes UART numbering as per TRM, as uart0-5. Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com> Acked-by: Matt Porter <mporter@ti.com> Cc: Peter Korsgaard <jacmet@sunsite.dk> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-03-28 06:06:05 +00:00
uart0: serial@44e09000 {
arm/dts: Add initial DT support for AM33XX SoC family Add device tree source include file for the AM33XX SoC family. An additional .dtsi file is created to describe the generic AM33XX CPU module like intc, ocp. Actual selection of available peripherals is handled in seperate .dts files using this am33xx.dtsi generic header file. Signed-off-by: AnilKumar Ch <anilkumar@ti.com> Reviewed-by: Vaibhav Hiremath <hvaibhav@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2012-06-22 09:40:48 +00:00
compatible = "ti,omap3-uart";
ti,hwmods = "uart1";
clock-frequency = <48000000>;
ARM: dts: AM33XX: Specify reg and interrupt property for all nodes The device/node resources (like, IORESOURCE_MEM and IORESOURCE_IRQ) are overwritten by hwmod resources, due to all known reasons but that should not be the reason for not providing all the information in the DTS blob. Ideally we should use DTS resource and use HWMOD framework wherever required and for only specific things. Newer platforms like, OMAP5 and AM33XX, we only support DT boot mode, so this patch is preparation for the future where we supposed to get rid of hwmod dependency anyway. Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com> Cc: Tony Lindgren <tony@atomide.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-08-27 11:51:01 +00:00
reg = <0x44e09000 0x2000>;
interrupts = <72>;
arm/dts: AM33XX: Set the default status of module to "disabled" state Ideally in common SoC dtsi file should set all modules to "disabled" state and it should get enabled in respective EVM/Board dts file as per usage. This patch sets default status of all modules to "disabled" state in am33xx.dtsi file. Currently there are no modules supported as part of Bone and EVM dts support, so care to add entry "status = "okay"" while adding support for any module. Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Cc: Benoit Cousson <b-cousson@ti.com> Cc: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: Tony Lindgren <tony@atomide.com>
2012-08-15 11:23:25 +00:00
status = "disabled";
arm/dts: Add initial DT support for AM33XX SoC family Add device tree source include file for the AM33XX SoC family. An additional .dtsi file is created to describe the generic AM33XX CPU module like intc, ocp. Actual selection of available peripherals is handled in seperate .dts files using this am33xx.dtsi generic header file. Signed-off-by: AnilKumar Ch <anilkumar@ti.com> Reviewed-by: Vaibhav Hiremath <hvaibhav@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2012-06-22 09:40:48 +00:00
};
ARM: dts: AM33XX: Fix uart numbering to match hardware/TRM With DT support, where naming convention is based on base-addr and not id, so we should follow TRM/Spec numbering label. This patch changes UART numbering as per TRM, as uart0-5. Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com> Acked-by: Matt Porter <mporter@ti.com> Cc: Peter Korsgaard <jacmet@sunsite.dk> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-03-28 06:06:05 +00:00
uart1: serial@48022000 {
arm/dts: Add initial DT support for AM33XX SoC family Add device tree source include file for the AM33XX SoC family. An additional .dtsi file is created to describe the generic AM33XX CPU module like intc, ocp. Actual selection of available peripherals is handled in seperate .dts files using this am33xx.dtsi generic header file. Signed-off-by: AnilKumar Ch <anilkumar@ti.com> Reviewed-by: Vaibhav Hiremath <hvaibhav@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2012-06-22 09:40:48 +00:00
compatible = "ti,omap3-uart";
ti,hwmods = "uart2";
clock-frequency = <48000000>;
ARM: dts: AM33XX: Specify reg and interrupt property for all nodes The device/node resources (like, IORESOURCE_MEM and IORESOURCE_IRQ) are overwritten by hwmod resources, due to all known reasons but that should not be the reason for not providing all the information in the DTS blob. Ideally we should use DTS resource and use HWMOD framework wherever required and for only specific things. Newer platforms like, OMAP5 and AM33XX, we only support DT boot mode, so this patch is preparation for the future where we supposed to get rid of hwmod dependency anyway. Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com> Cc: Tony Lindgren <tony@atomide.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-08-27 11:51:01 +00:00
reg = <0x48022000 0x2000>;
interrupts = <73>;
arm/dts: AM33XX: Set the default status of module to "disabled" state Ideally in common SoC dtsi file should set all modules to "disabled" state and it should get enabled in respective EVM/Board dts file as per usage. This patch sets default status of all modules to "disabled" state in am33xx.dtsi file. Currently there are no modules supported as part of Bone and EVM dts support, so care to add entry "status = "okay"" while adding support for any module. Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Cc: Benoit Cousson <b-cousson@ti.com> Cc: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: Tony Lindgren <tony@atomide.com>
2012-08-15 11:23:25 +00:00
status = "disabled";
arm/dts: Add initial DT support for AM33XX SoC family Add device tree source include file for the AM33XX SoC family. An additional .dtsi file is created to describe the generic AM33XX CPU module like intc, ocp. Actual selection of available peripherals is handled in seperate .dts files using this am33xx.dtsi generic header file. Signed-off-by: AnilKumar Ch <anilkumar@ti.com> Reviewed-by: Vaibhav Hiremath <hvaibhav@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2012-06-22 09:40:48 +00:00
};
ARM: dts: AM33XX: Fix uart numbering to match hardware/TRM With DT support, where naming convention is based on base-addr and not id, so we should follow TRM/Spec numbering label. This patch changes UART numbering as per TRM, as uart0-5. Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com> Acked-by: Matt Porter <mporter@ti.com> Cc: Peter Korsgaard <jacmet@sunsite.dk> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-03-28 06:06:05 +00:00
uart2: serial@48024000 {
arm/dts: Add initial DT support for AM33XX SoC family Add device tree source include file for the AM33XX SoC family. An additional .dtsi file is created to describe the generic AM33XX CPU module like intc, ocp. Actual selection of available peripherals is handled in seperate .dts files using this am33xx.dtsi generic header file. Signed-off-by: AnilKumar Ch <anilkumar@ti.com> Reviewed-by: Vaibhav Hiremath <hvaibhav@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2012-06-22 09:40:48 +00:00
compatible = "ti,omap3-uart";
ti,hwmods = "uart3";
clock-frequency = <48000000>;
ARM: dts: AM33XX: Specify reg and interrupt property for all nodes The device/node resources (like, IORESOURCE_MEM and IORESOURCE_IRQ) are overwritten by hwmod resources, due to all known reasons but that should not be the reason for not providing all the information in the DTS blob. Ideally we should use DTS resource and use HWMOD framework wherever required and for only specific things. Newer platforms like, OMAP5 and AM33XX, we only support DT boot mode, so this patch is preparation for the future where we supposed to get rid of hwmod dependency anyway. Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com> Cc: Tony Lindgren <tony@atomide.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-08-27 11:51:01 +00:00
reg = <0x48024000 0x2000>;
interrupts = <74>;
arm/dts: AM33XX: Set the default status of module to "disabled" state Ideally in common SoC dtsi file should set all modules to "disabled" state and it should get enabled in respective EVM/Board dts file as per usage. This patch sets default status of all modules to "disabled" state in am33xx.dtsi file. Currently there are no modules supported as part of Bone and EVM dts support, so care to add entry "status = "okay"" while adding support for any module. Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Cc: Benoit Cousson <b-cousson@ti.com> Cc: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: Tony Lindgren <tony@atomide.com>
2012-08-15 11:23:25 +00:00
status = "disabled";
arm/dts: Add initial DT support for AM33XX SoC family Add device tree source include file for the AM33XX SoC family. An additional .dtsi file is created to describe the generic AM33XX CPU module like intc, ocp. Actual selection of available peripherals is handled in seperate .dts files using this am33xx.dtsi generic header file. Signed-off-by: AnilKumar Ch <anilkumar@ti.com> Reviewed-by: Vaibhav Hiremath <hvaibhav@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2012-06-22 09:40:48 +00:00
};
ARM: dts: AM33XX: Fix uart numbering to match hardware/TRM With DT support, where naming convention is based on base-addr and not id, so we should follow TRM/Spec numbering label. This patch changes UART numbering as per TRM, as uart0-5. Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com> Acked-by: Matt Porter <mporter@ti.com> Cc: Peter Korsgaard <jacmet@sunsite.dk> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-03-28 06:06:05 +00:00
uart3: serial@481a6000 {
arm/dts: Add initial DT support for AM33XX SoC family Add device tree source include file for the AM33XX SoC family. An additional .dtsi file is created to describe the generic AM33XX CPU module like intc, ocp. Actual selection of available peripherals is handled in seperate .dts files using this am33xx.dtsi generic header file. Signed-off-by: AnilKumar Ch <anilkumar@ti.com> Reviewed-by: Vaibhav Hiremath <hvaibhav@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2012-06-22 09:40:48 +00:00
compatible = "ti,omap3-uart";
ti,hwmods = "uart4";
clock-frequency = <48000000>;
ARM: dts: AM33XX: Specify reg and interrupt property for all nodes The device/node resources (like, IORESOURCE_MEM and IORESOURCE_IRQ) are overwritten by hwmod resources, due to all known reasons but that should not be the reason for not providing all the information in the DTS blob. Ideally we should use DTS resource and use HWMOD framework wherever required and for only specific things. Newer platforms like, OMAP5 and AM33XX, we only support DT boot mode, so this patch is preparation for the future where we supposed to get rid of hwmod dependency anyway. Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com> Cc: Tony Lindgren <tony@atomide.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-08-27 11:51:01 +00:00
reg = <0x481a6000 0x2000>;
interrupts = <44>;
arm/dts: AM33XX: Set the default status of module to "disabled" state Ideally in common SoC dtsi file should set all modules to "disabled" state and it should get enabled in respective EVM/Board dts file as per usage. This patch sets default status of all modules to "disabled" state in am33xx.dtsi file. Currently there are no modules supported as part of Bone and EVM dts support, so care to add entry "status = "okay"" while adding support for any module. Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Cc: Benoit Cousson <b-cousson@ti.com> Cc: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: Tony Lindgren <tony@atomide.com>
2012-08-15 11:23:25 +00:00
status = "disabled";
arm/dts: Add initial DT support for AM33XX SoC family Add device tree source include file for the AM33XX SoC family. An additional .dtsi file is created to describe the generic AM33XX CPU module like intc, ocp. Actual selection of available peripherals is handled in seperate .dts files using this am33xx.dtsi generic header file. Signed-off-by: AnilKumar Ch <anilkumar@ti.com> Reviewed-by: Vaibhav Hiremath <hvaibhav@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2012-06-22 09:40:48 +00:00
};
ARM: dts: AM33XX: Fix uart numbering to match hardware/TRM With DT support, where naming convention is based on base-addr and not id, so we should follow TRM/Spec numbering label. This patch changes UART numbering as per TRM, as uart0-5. Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com> Acked-by: Matt Porter <mporter@ti.com> Cc: Peter Korsgaard <jacmet@sunsite.dk> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-03-28 06:06:05 +00:00
uart4: serial@481a8000 {
arm/dts: Add initial DT support for AM33XX SoC family Add device tree source include file for the AM33XX SoC family. An additional .dtsi file is created to describe the generic AM33XX CPU module like intc, ocp. Actual selection of available peripherals is handled in seperate .dts files using this am33xx.dtsi generic header file. Signed-off-by: AnilKumar Ch <anilkumar@ti.com> Reviewed-by: Vaibhav Hiremath <hvaibhav@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2012-06-22 09:40:48 +00:00
compatible = "ti,omap3-uart";
ti,hwmods = "uart5";
clock-frequency = <48000000>;
ARM: dts: AM33XX: Specify reg and interrupt property for all nodes The device/node resources (like, IORESOURCE_MEM and IORESOURCE_IRQ) are overwritten by hwmod resources, due to all known reasons but that should not be the reason for not providing all the information in the DTS blob. Ideally we should use DTS resource and use HWMOD framework wherever required and for only specific things. Newer platforms like, OMAP5 and AM33XX, we only support DT boot mode, so this patch is preparation for the future where we supposed to get rid of hwmod dependency anyway. Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com> Cc: Tony Lindgren <tony@atomide.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-08-27 11:51:01 +00:00
reg = <0x481a8000 0x2000>;
interrupts = <45>;
arm/dts: AM33XX: Set the default status of module to "disabled" state Ideally in common SoC dtsi file should set all modules to "disabled" state and it should get enabled in respective EVM/Board dts file as per usage. This patch sets default status of all modules to "disabled" state in am33xx.dtsi file. Currently there are no modules supported as part of Bone and EVM dts support, so care to add entry "status = "okay"" while adding support for any module. Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Cc: Benoit Cousson <b-cousson@ti.com> Cc: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: Tony Lindgren <tony@atomide.com>
2012-08-15 11:23:25 +00:00
status = "disabled";
arm/dts: Add initial DT support for AM33XX SoC family Add device tree source include file for the AM33XX SoC family. An additional .dtsi file is created to describe the generic AM33XX CPU module like intc, ocp. Actual selection of available peripherals is handled in seperate .dts files using this am33xx.dtsi generic header file. Signed-off-by: AnilKumar Ch <anilkumar@ti.com> Reviewed-by: Vaibhav Hiremath <hvaibhav@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2012-06-22 09:40:48 +00:00
};
ARM: dts: AM33XX: Fix uart numbering to match hardware/TRM With DT support, where naming convention is based on base-addr and not id, so we should follow TRM/Spec numbering label. This patch changes UART numbering as per TRM, as uart0-5. Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com> Acked-by: Matt Porter <mporter@ti.com> Cc: Peter Korsgaard <jacmet@sunsite.dk> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-03-28 06:06:05 +00:00
uart5: serial@481aa000 {
arm/dts: Add initial DT support for AM33XX SoC family Add device tree source include file for the AM33XX SoC family. An additional .dtsi file is created to describe the generic AM33XX CPU module like intc, ocp. Actual selection of available peripherals is handled in seperate .dts files using this am33xx.dtsi generic header file. Signed-off-by: AnilKumar Ch <anilkumar@ti.com> Reviewed-by: Vaibhav Hiremath <hvaibhav@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2012-06-22 09:40:48 +00:00
compatible = "ti,omap3-uart";
ti,hwmods = "uart6";
clock-frequency = <48000000>;
ARM: dts: AM33XX: Specify reg and interrupt property for all nodes The device/node resources (like, IORESOURCE_MEM and IORESOURCE_IRQ) are overwritten by hwmod resources, due to all known reasons but that should not be the reason for not providing all the information in the DTS blob. Ideally we should use DTS resource and use HWMOD framework wherever required and for only specific things. Newer platforms like, OMAP5 and AM33XX, we only support DT boot mode, so this patch is preparation for the future where we supposed to get rid of hwmod dependency anyway. Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com> Cc: Tony Lindgren <tony@atomide.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-08-27 11:51:01 +00:00
reg = <0x481aa000 0x2000>;
interrupts = <46>;
arm/dts: AM33XX: Set the default status of module to "disabled" state Ideally in common SoC dtsi file should set all modules to "disabled" state and it should get enabled in respective EVM/Board dts file as per usage. This patch sets default status of all modules to "disabled" state in am33xx.dtsi file. Currently there are no modules supported as part of Bone and EVM dts support, so care to add entry "status = "okay"" while adding support for any module. Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Cc: Benoit Cousson <b-cousson@ti.com> Cc: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: Tony Lindgren <tony@atomide.com>
2012-08-15 11:23:25 +00:00
status = "disabled";
arm/dts: Add initial DT support for AM33XX SoC family Add device tree source include file for the AM33XX SoC family. An additional .dtsi file is created to describe the generic AM33XX CPU module like intc, ocp. Actual selection of available peripherals is handled in seperate .dts files using this am33xx.dtsi generic header file. Signed-off-by: AnilKumar Ch <anilkumar@ti.com> Reviewed-by: Vaibhav Hiremath <hvaibhav@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2012-06-22 09:40:48 +00:00
};
ARM: dts: AM33XX: Rename I2C and GPIO nodes Rename I2C and GPIO nodes according to AM33XX TRM. According to AM33XX TRM device instances are starting from "0" like i2c0, i2c1 and i2c3. Signed-off-by: Pantelis Antoniou <panto@antoniou-consulting.com> [panto@antoniou-consulting.com: initial patch by pantelis's] Signed-off-by: AnilKumar Ch <anilkumar@ti.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2012-11-21 11:52:17 +00:00
i2c0: i2c@44e0b000 {
arm/dts: Add initial DT support for AM33XX SoC family Add device tree source include file for the AM33XX SoC family. An additional .dtsi file is created to describe the generic AM33XX CPU module like intc, ocp. Actual selection of available peripherals is handled in seperate .dts files using this am33xx.dtsi generic header file. Signed-off-by: AnilKumar Ch <anilkumar@ti.com> Reviewed-by: Vaibhav Hiremath <hvaibhav@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2012-06-22 09:40:48 +00:00
compatible = "ti,omap4-i2c";
#address-cells = <1>;
#size-cells = <0>;
ti,hwmods = "i2c1";
ARM: dts: AM33XX: Specify reg and interrupt property for all nodes The device/node resources (like, IORESOURCE_MEM and IORESOURCE_IRQ) are overwritten by hwmod resources, due to all known reasons but that should not be the reason for not providing all the information in the DTS blob. Ideally we should use DTS resource and use HWMOD framework wherever required and for only specific things. Newer platforms like, OMAP5 and AM33XX, we only support DT boot mode, so this patch is preparation for the future where we supposed to get rid of hwmod dependency anyway. Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com> Cc: Tony Lindgren <tony@atomide.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-08-27 11:51:01 +00:00
reg = <0x44e0b000 0x1000>;
interrupts = <70>;
arm/dts: AM33XX: Set the default status of module to "disabled" state Ideally in common SoC dtsi file should set all modules to "disabled" state and it should get enabled in respective EVM/Board dts file as per usage. This patch sets default status of all modules to "disabled" state in am33xx.dtsi file. Currently there are no modules supported as part of Bone and EVM dts support, so care to add entry "status = "okay"" while adding support for any module. Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Cc: Benoit Cousson <b-cousson@ti.com> Cc: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: Tony Lindgren <tony@atomide.com>
2012-08-15 11:23:25 +00:00
status = "disabled";
arm/dts: Add initial DT support for AM33XX SoC family Add device tree source include file for the AM33XX SoC family. An additional .dtsi file is created to describe the generic AM33XX CPU module like intc, ocp. Actual selection of available peripherals is handled in seperate .dts files using this am33xx.dtsi generic header file. Signed-off-by: AnilKumar Ch <anilkumar@ti.com> Reviewed-by: Vaibhav Hiremath <hvaibhav@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2012-06-22 09:40:48 +00:00
};
ARM: dts: AM33XX: Rename I2C and GPIO nodes Rename I2C and GPIO nodes according to AM33XX TRM. According to AM33XX TRM device instances are starting from "0" like i2c0, i2c1 and i2c3. Signed-off-by: Pantelis Antoniou <panto@antoniou-consulting.com> [panto@antoniou-consulting.com: initial patch by pantelis's] Signed-off-by: AnilKumar Ch <anilkumar@ti.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2012-11-21 11:52:17 +00:00
i2c1: i2c@4802a000 {
arm/dts: Add initial DT support for AM33XX SoC family Add device tree source include file for the AM33XX SoC family. An additional .dtsi file is created to describe the generic AM33XX CPU module like intc, ocp. Actual selection of available peripherals is handled in seperate .dts files using this am33xx.dtsi generic header file. Signed-off-by: AnilKumar Ch <anilkumar@ti.com> Reviewed-by: Vaibhav Hiremath <hvaibhav@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2012-06-22 09:40:48 +00:00
compatible = "ti,omap4-i2c";
#address-cells = <1>;
#size-cells = <0>;
ti,hwmods = "i2c2";
ARM: dts: AM33XX: Specify reg and interrupt property for all nodes The device/node resources (like, IORESOURCE_MEM and IORESOURCE_IRQ) are overwritten by hwmod resources, due to all known reasons but that should not be the reason for not providing all the information in the DTS blob. Ideally we should use DTS resource and use HWMOD framework wherever required and for only specific things. Newer platforms like, OMAP5 and AM33XX, we only support DT boot mode, so this patch is preparation for the future where we supposed to get rid of hwmod dependency anyway. Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com> Cc: Tony Lindgren <tony@atomide.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-08-27 11:51:01 +00:00
reg = <0x4802a000 0x1000>;
interrupts = <71>;
arm/dts: AM33XX: Set the default status of module to "disabled" state Ideally in common SoC dtsi file should set all modules to "disabled" state and it should get enabled in respective EVM/Board dts file as per usage. This patch sets default status of all modules to "disabled" state in am33xx.dtsi file. Currently there are no modules supported as part of Bone and EVM dts support, so care to add entry "status = "okay"" while adding support for any module. Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Cc: Benoit Cousson <b-cousson@ti.com> Cc: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: Tony Lindgren <tony@atomide.com>
2012-08-15 11:23:25 +00:00
status = "disabled";
arm/dts: Add initial DT support for AM33XX SoC family Add device tree source include file for the AM33XX SoC family. An additional .dtsi file is created to describe the generic AM33XX CPU module like intc, ocp. Actual selection of available peripherals is handled in seperate .dts files using this am33xx.dtsi generic header file. Signed-off-by: AnilKumar Ch <anilkumar@ti.com> Reviewed-by: Vaibhav Hiremath <hvaibhav@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2012-06-22 09:40:48 +00:00
};
ARM: dts: AM33XX: Rename I2C and GPIO nodes Rename I2C and GPIO nodes according to AM33XX TRM. According to AM33XX TRM device instances are starting from "0" like i2c0, i2c1 and i2c3. Signed-off-by: Pantelis Antoniou <panto@antoniou-consulting.com> [panto@antoniou-consulting.com: initial patch by pantelis's] Signed-off-by: AnilKumar Ch <anilkumar@ti.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2012-11-21 11:52:17 +00:00
i2c2: i2c@4819c000 {
arm/dts: Add initial DT support for AM33XX SoC family Add device tree source include file for the AM33XX SoC family. An additional .dtsi file is created to describe the generic AM33XX CPU module like intc, ocp. Actual selection of available peripherals is handled in seperate .dts files using this am33xx.dtsi generic header file. Signed-off-by: AnilKumar Ch <anilkumar@ti.com> Reviewed-by: Vaibhav Hiremath <hvaibhav@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2012-06-22 09:40:48 +00:00
compatible = "ti,omap4-i2c";
#address-cells = <1>;
#size-cells = <0>;
ti,hwmods = "i2c3";
ARM: dts: AM33XX: Specify reg and interrupt property for all nodes The device/node resources (like, IORESOURCE_MEM and IORESOURCE_IRQ) are overwritten by hwmod resources, due to all known reasons but that should not be the reason for not providing all the information in the DTS blob. Ideally we should use DTS resource and use HWMOD framework wherever required and for only specific things. Newer platforms like, OMAP5 and AM33XX, we only support DT boot mode, so this patch is preparation for the future where we supposed to get rid of hwmod dependency anyway. Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com> Cc: Tony Lindgren <tony@atomide.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-08-27 11:51:01 +00:00
reg = <0x4819c000 0x1000>;
interrupts = <30>;
arm/dts: AM33XX: Set the default status of module to "disabled" state Ideally in common SoC dtsi file should set all modules to "disabled" state and it should get enabled in respective EVM/Board dts file as per usage. This patch sets default status of all modules to "disabled" state in am33xx.dtsi file. Currently there are no modules supported as part of Bone and EVM dts support, so care to add entry "status = "okay"" while adding support for any module. Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Cc: Benoit Cousson <b-cousson@ti.com> Cc: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: Tony Lindgren <tony@atomide.com>
2012-08-15 11:23:25 +00:00
status = "disabled";
arm/dts: Add initial DT support for AM33XX SoC family Add device tree source include file for the AM33XX SoC family. An additional .dtsi file is created to describe the generic AM33XX CPU module like intc, ocp. Actual selection of available peripherals is handled in seperate .dts files using this am33xx.dtsi generic header file. Signed-off-by: AnilKumar Ch <anilkumar@ti.com> Reviewed-by: Vaibhav Hiremath <hvaibhav@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2012-06-22 09:40:48 +00:00
};
arm/dts: Fix am33xx wdt node Add am33xx wdt node. Signed-off-by: Afzal Mohammed <afzal@ti.com> [tony@atomide.com: I messed up and produced an empty commit db27ac80 with stg apply] Signed-off-by: Tony Lindgren <tony@atomide.com>
2012-07-04 12:30:37 +00:00
ARM: dts: AM33XX: Add MMC support and documentation Adds AM33XX MMC support for am335x-bone, am335x-evm and am335x-evmsk boards. Also added is the DMA binding definitions based on the generic DMA request binding. Additional changes made to DTS: * Interrupt, reg and compatible properties added * ti,needs-special-hs-handling added Signed-off-by: Matt Porter <mporter@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Joel Fernandes <joelf@ti.com> Signed-off-by: Benoit Cousson <bcousson@baylibre.com>
2013-09-10 19:24:39 +00:00
mmc1: mmc@48060000 {
compatible = "ti,omap4-hsmmc";
ti,hwmods = "mmc1";
ti,dual-volt;
ti,needs-special-reset;
ti,needs-special-hs-handling;
dmas = <&edma 24
&edma 25>;
dma-names = "tx", "rx";
interrupts = <64>;
interrupt-parent = <&intc>;
reg = <0x48060000 0x1000>;
status = "disabled";
};
mmc2: mmc@481d8000 {
compatible = "ti,omap4-hsmmc";
ti,hwmods = "mmc2";
ti,needs-special-reset;
dmas = <&edma 2
&edma 3>;
dma-names = "tx", "rx";
interrupts = <28>;
interrupt-parent = <&intc>;
reg = <0x481d8000 0x1000>;
status = "disabled";
};
mmc3: mmc@47810000 {
compatible = "ti,omap4-hsmmc";
ti,hwmods = "mmc3";
ti,needs-special-reset;
interrupts = <29>;
interrupt-parent = <&intc>;
reg = <0x47810000 0x1000>;
status = "disabled";
};
ARM: dts: AM33XX: Add hwspinlock node Add the hwspinlock device tree node for AM33xx family of SoCs. Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2013-10-10 21:15:35 +00:00
hwspinlock: spinlock@480ca000 {
compatible = "ti,omap4-hwspinlock";
reg = <0x480ca000 0x1000>;
ti,hwmods = "spinlock";
ARM: dts: OMAP: Add #hwlock-cells property to hwspinlock nodes Add a new generic property "#hwlock-cells" to the hwspinlock DT nodes on OMAP4, OMAP5 and AM33xx. This common property allows different platform implementations to define the args specifier length. OMAP implementations will always use a value of 1. Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2014-01-14 00:26:45 +00:00
#hwlock-cells = <1>;
ARM: dts: AM33XX: Add hwspinlock node Add the hwspinlock device tree node for AM33xx family of SoCs. Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2013-10-10 21:15:35 +00:00
};
arm/dts: Fix am33xx wdt node Add am33xx wdt node. Signed-off-by: Afzal Mohammed <afzal@ti.com> [tony@atomide.com: I messed up and produced an empty commit db27ac80 with stg apply] Signed-off-by: Tony Lindgren <tony@atomide.com>
2012-07-04 12:30:37 +00:00
wdt2: wdt@44e35000 {
compatible = "ti,omap3-wdt";
ti,hwmods = "wd_timer2";
ARM: dts: AM33XX: Specify reg and interrupt property for all nodes The device/node resources (like, IORESOURCE_MEM and IORESOURCE_IRQ) are overwritten by hwmod resources, due to all known reasons but that should not be the reason for not providing all the information in the DTS blob. Ideally we should use DTS resource and use HWMOD framework wherever required and for only specific things. Newer platforms like, OMAP5 and AM33XX, we only support DT boot mode, so this patch is preparation for the future where we supposed to get rid of hwmod dependency anyway. Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com> Cc: Tony Lindgren <tony@atomide.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-08-27 11:51:01 +00:00
reg = <0x44e35000 0x1000>;
interrupts = <91>;
arm/dts: Fix am33xx wdt node Add am33xx wdt node. Signed-off-by: Afzal Mohammed <afzal@ti.com> [tony@atomide.com: I messed up and produced an empty commit db27ac80 with stg apply] Signed-off-by: Tony Lindgren <tony@atomide.com>
2012-07-04 12:30:37 +00:00
};
ARM: dts: AM33XX: Add D_CAN device tree data Add Bosch D_CAN controller device tree data to AM33XX dtsi file by adding d_can device nodes with all the necessary parameters. Signed-off-by: AnilKumar Ch <anilkumar@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-09-19 21:19:27 +00:00
dcan0: d_can@481cc000 {
compatible = "bosch,d_can";
ti,hwmods = "d_can0";
ARM: dts: AM33XX: Add memory resource to d_can node Add a new address space/memory resource to d_can device tree node. D_CAN RAM initialization is achieved through RAMINIT register which is part of AM33XX control module address space. D_CAN RAM init or de-init should be done by writing instance corresponding value to control module register. Till we have a separate control module driver to write to control module, d_can driver will handle the register writes to control module by itself. So a new address space to represent this control module register is added to d_can driver. Signed-off-by: AnilKumar Ch <anilkumar@ti.com> Acked-by: Marc Kleine-Budde <mkl@pengutronix.de> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2012-11-14 18:08:25 +00:00
reg = <0x481cc000 0x2000
0x44e10644 0x4>;
ARM: dts: AM33XX: Add D_CAN device tree data Add Bosch D_CAN controller device tree data to AM33XX dtsi file by adding d_can device nodes with all the necessary parameters. Signed-off-by: AnilKumar Ch <anilkumar@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-09-19 21:19:27 +00:00
interrupts = <52>;
status = "disabled";
};
dcan1: d_can@481d0000 {
compatible = "bosch,d_can";
ti,hwmods = "d_can1";
ARM: dts: AM33XX: Add memory resource to d_can node Add a new address space/memory resource to d_can device tree node. D_CAN RAM initialization is achieved through RAMINIT register which is part of AM33XX control module address space. D_CAN RAM init or de-init should be done by writing instance corresponding value to control module register. Till we have a separate control module driver to write to control module, d_can driver will handle the register writes to control module by itself. So a new address space to represent this control module register is added to d_can driver. Signed-off-by: AnilKumar Ch <anilkumar@ti.com> Acked-by: Marc Kleine-Budde <mkl@pengutronix.de> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2012-11-14 18:08:25 +00:00
reg = <0x481d0000 0x2000
0x44e10644 0x4>;
ARM: dts: AM33XX: Add D_CAN device tree data Add Bosch D_CAN controller device tree data to AM33XX dtsi file by adding d_can device nodes with all the necessary parameters. Signed-off-by: AnilKumar Ch <anilkumar@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-09-19 21:19:27 +00:00
interrupts = <55>;
status = "disabled";
};
ARM: dts: OMAP: Add timer nodes Add the 12 GP timers nodes present in OMAP2. Add the 12 GP timers nodes present in OMAP3. Add the 11 GP timers nodes present in OMAP4. Add the 7 GP timers nodes present in AM33xx. Add documentation for timer properties specific to OMAP. Thanks to Vaibhav Hiremath for creating the AM33xx timer nodes. I have modified Vaibhav's original nodes adding information on which timers support a PWM output. V5 changes: - Updated timer register sizes for OMAP2/3/4. - Modified AM335x timer register size to be 1KB instead of 4KB to align with HWMOD. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Acked-Reviewed-&-Tested-By: Vaibhav Hiremath <hvaibhav@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-10-19 14:59:00 +00:00
ARM: dts: AM33xx: Add mailbox node The mailbox DT node data has been added for AM33xx device. The mailbox IP in AM33xx is similar to the version found in OMAP4+ devices. Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2014-07-11 21:44:36 +00:00
mailbox: mailbox@480C8000 {
compatible = "ti,omap4-mailbox";
reg = <0x480C8000 0x200>;
interrupts = <77>;
ti,hwmods = "mailbox";
ti,mbox-num-users = <4>;
ti,mbox-num-fifos = <8>;
};
ARM: dts: OMAP: Add timer nodes Add the 12 GP timers nodes present in OMAP2. Add the 12 GP timers nodes present in OMAP3. Add the 11 GP timers nodes present in OMAP4. Add the 7 GP timers nodes present in AM33xx. Add documentation for timer properties specific to OMAP. Thanks to Vaibhav Hiremath for creating the AM33xx timer nodes. I have modified Vaibhav's original nodes adding information on which timers support a PWM output. V5 changes: - Updated timer register sizes for OMAP2/3/4. - Modified AM335x timer register size to be 1KB instead of 4KB to align with HWMOD. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Acked-Reviewed-&-Tested-By: Vaibhav Hiremath <hvaibhav@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-10-19 14:59:00 +00:00
timer1: timer@44e31000 {
ARM: dts: OMAP2+: Update DMTIMER compatibility property Update the DMTIMER compatibility property to reflect the register level compatibilty between devices and update the various OMAP/AM timer bindings with the appropriate compatibility string. By doing this we can add platform specific data applicable to specific timer versions to the driver. For example, errata flags can be populated for the timer versions that are impacted. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-03-19 17:38:18 +00:00
compatible = "ti,am335x-timer-1ms";
ARM: dts: OMAP: Add timer nodes Add the 12 GP timers nodes present in OMAP2. Add the 12 GP timers nodes present in OMAP3. Add the 11 GP timers nodes present in OMAP4. Add the 7 GP timers nodes present in AM33xx. Add documentation for timer properties specific to OMAP. Thanks to Vaibhav Hiremath for creating the AM33xx timer nodes. I have modified Vaibhav's original nodes adding information on which timers support a PWM output. V5 changes: - Updated timer register sizes for OMAP2/3/4. - Modified AM335x timer register size to be 1KB instead of 4KB to align with HWMOD. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Acked-Reviewed-&-Tested-By: Vaibhav Hiremath <hvaibhav@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-10-19 14:59:00 +00:00
reg = <0x44e31000 0x400>;
interrupts = <67>;
ti,hwmods = "timer1";
ti,timer-alwon;
};
timer2: timer@48040000 {
ARM: dts: OMAP2+: Update DMTIMER compatibility property Update the DMTIMER compatibility property to reflect the register level compatibilty between devices and update the various OMAP/AM timer bindings with the appropriate compatibility string. By doing this we can add platform specific data applicable to specific timer versions to the driver. For example, errata flags can be populated for the timer versions that are impacted. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-03-19 17:38:18 +00:00
compatible = "ti,am335x-timer";
ARM: dts: OMAP: Add timer nodes Add the 12 GP timers nodes present in OMAP2. Add the 12 GP timers nodes present in OMAP3. Add the 11 GP timers nodes present in OMAP4. Add the 7 GP timers nodes present in AM33xx. Add documentation for timer properties specific to OMAP. Thanks to Vaibhav Hiremath for creating the AM33xx timer nodes. I have modified Vaibhav's original nodes adding information on which timers support a PWM output. V5 changes: - Updated timer register sizes for OMAP2/3/4. - Modified AM335x timer register size to be 1KB instead of 4KB to align with HWMOD. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Acked-Reviewed-&-Tested-By: Vaibhav Hiremath <hvaibhav@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-10-19 14:59:00 +00:00
reg = <0x48040000 0x400>;
interrupts = <68>;
ti,hwmods = "timer2";
};
timer3: timer@48042000 {
ARM: dts: OMAP2+: Update DMTIMER compatibility property Update the DMTIMER compatibility property to reflect the register level compatibilty between devices and update the various OMAP/AM timer bindings with the appropriate compatibility string. By doing this we can add platform specific data applicable to specific timer versions to the driver. For example, errata flags can be populated for the timer versions that are impacted. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-03-19 17:38:18 +00:00
compatible = "ti,am335x-timer";
ARM: dts: OMAP: Add timer nodes Add the 12 GP timers nodes present in OMAP2. Add the 12 GP timers nodes present in OMAP3. Add the 11 GP timers nodes present in OMAP4. Add the 7 GP timers nodes present in AM33xx. Add documentation for timer properties specific to OMAP. Thanks to Vaibhav Hiremath for creating the AM33xx timer nodes. I have modified Vaibhav's original nodes adding information on which timers support a PWM output. V5 changes: - Updated timer register sizes for OMAP2/3/4. - Modified AM335x timer register size to be 1KB instead of 4KB to align with HWMOD. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Acked-Reviewed-&-Tested-By: Vaibhav Hiremath <hvaibhav@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-10-19 14:59:00 +00:00
reg = <0x48042000 0x400>;
interrupts = <69>;
ti,hwmods = "timer3";
};
timer4: timer@48044000 {
ARM: dts: OMAP2+: Update DMTIMER compatibility property Update the DMTIMER compatibility property to reflect the register level compatibilty between devices and update the various OMAP/AM timer bindings with the appropriate compatibility string. By doing this we can add platform specific data applicable to specific timer versions to the driver. For example, errata flags can be populated for the timer versions that are impacted. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-03-19 17:38:18 +00:00
compatible = "ti,am335x-timer";
ARM: dts: OMAP: Add timer nodes Add the 12 GP timers nodes present in OMAP2. Add the 12 GP timers nodes present in OMAP3. Add the 11 GP timers nodes present in OMAP4. Add the 7 GP timers nodes present in AM33xx. Add documentation for timer properties specific to OMAP. Thanks to Vaibhav Hiremath for creating the AM33xx timer nodes. I have modified Vaibhav's original nodes adding information on which timers support a PWM output. V5 changes: - Updated timer register sizes for OMAP2/3/4. - Modified AM335x timer register size to be 1KB instead of 4KB to align with HWMOD. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Acked-Reviewed-&-Tested-By: Vaibhav Hiremath <hvaibhav@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-10-19 14:59:00 +00:00
reg = <0x48044000 0x400>;
interrupts = <92>;
ti,hwmods = "timer4";
ti,timer-pwm;
};
timer5: timer@48046000 {
ARM: dts: OMAP2+: Update DMTIMER compatibility property Update the DMTIMER compatibility property to reflect the register level compatibilty between devices and update the various OMAP/AM timer bindings with the appropriate compatibility string. By doing this we can add platform specific data applicable to specific timer versions to the driver. For example, errata flags can be populated for the timer versions that are impacted. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-03-19 17:38:18 +00:00
compatible = "ti,am335x-timer";
ARM: dts: OMAP: Add timer nodes Add the 12 GP timers nodes present in OMAP2. Add the 12 GP timers nodes present in OMAP3. Add the 11 GP timers nodes present in OMAP4. Add the 7 GP timers nodes present in AM33xx. Add documentation for timer properties specific to OMAP. Thanks to Vaibhav Hiremath for creating the AM33xx timer nodes. I have modified Vaibhav's original nodes adding information on which timers support a PWM output. V5 changes: - Updated timer register sizes for OMAP2/3/4. - Modified AM335x timer register size to be 1KB instead of 4KB to align with HWMOD. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Acked-Reviewed-&-Tested-By: Vaibhav Hiremath <hvaibhav@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-10-19 14:59:00 +00:00
reg = <0x48046000 0x400>;
interrupts = <93>;
ti,hwmods = "timer5";
ti,timer-pwm;
};
timer6: timer@48048000 {
ARM: dts: OMAP2+: Update DMTIMER compatibility property Update the DMTIMER compatibility property to reflect the register level compatibilty between devices and update the various OMAP/AM timer bindings with the appropriate compatibility string. By doing this we can add platform specific data applicable to specific timer versions to the driver. For example, errata flags can be populated for the timer versions that are impacted. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-03-19 17:38:18 +00:00
compatible = "ti,am335x-timer";
ARM: dts: OMAP: Add timer nodes Add the 12 GP timers nodes present in OMAP2. Add the 12 GP timers nodes present in OMAP3. Add the 11 GP timers nodes present in OMAP4. Add the 7 GP timers nodes present in AM33xx. Add documentation for timer properties specific to OMAP. Thanks to Vaibhav Hiremath for creating the AM33xx timer nodes. I have modified Vaibhav's original nodes adding information on which timers support a PWM output. V5 changes: - Updated timer register sizes for OMAP2/3/4. - Modified AM335x timer register size to be 1KB instead of 4KB to align with HWMOD. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Acked-Reviewed-&-Tested-By: Vaibhav Hiremath <hvaibhav@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-10-19 14:59:00 +00:00
reg = <0x48048000 0x400>;
interrupts = <94>;
ti,hwmods = "timer6";
ti,timer-pwm;
};
timer7: timer@4804a000 {
ARM: dts: OMAP2+: Update DMTIMER compatibility property Update the DMTIMER compatibility property to reflect the register level compatibilty between devices and update the various OMAP/AM timer bindings with the appropriate compatibility string. By doing this we can add platform specific data applicable to specific timer versions to the driver. For example, errata flags can be populated for the timer versions that are impacted. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-03-19 17:38:18 +00:00
compatible = "ti,am335x-timer";
ARM: dts: OMAP: Add timer nodes Add the 12 GP timers nodes present in OMAP2. Add the 12 GP timers nodes present in OMAP3. Add the 11 GP timers nodes present in OMAP4. Add the 7 GP timers nodes present in AM33xx. Add documentation for timer properties specific to OMAP. Thanks to Vaibhav Hiremath for creating the AM33xx timer nodes. I have modified Vaibhav's original nodes adding information on which timers support a PWM output. V5 changes: - Updated timer register sizes for OMAP2/3/4. - Modified AM335x timer register size to be 1KB instead of 4KB to align with HWMOD. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Acked-Reviewed-&-Tested-By: Vaibhav Hiremath <hvaibhav@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-10-19 14:59:00 +00:00
reg = <0x4804a000 0x400>;
interrupts = <95>;
ti,hwmods = "timer7";
ti,timer-pwm;
};
ARM: dts: AM33XX: Add rtc node Add am33xx rtc node. Signed-off-by: Afzal Mohammed <afzal@ti.com> [b-cousson@ti.com: Update the subject] Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-10-30 09:34:01 +00:00
arm: dts: am33xx.dtsi: Add node name to rtc device node Making it possible to reference and therefor change (disable) this device node from other dts file which import this dtsi file. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Lukas Stockmann <lukas.stockmann@siemens.com> Cc: Benoit Cousson <bcousson@baylibre.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2014-02-05 12:12:39 +00:00
rtc: rtc@44e3e000 {
ARM: dts: AM33XX: Add rtc node Add am33xx rtc node. Signed-off-by: Afzal Mohammed <afzal@ti.com> [b-cousson@ti.com: Update the subject] Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-10-30 09:34:01 +00:00
compatible = "ti,da830-rtc";
reg = <0x44e3e000 0x1000>;
interrupts = <75
76>;
ti,hwmods = "rtc";
};
ARM: dts: AM33XX: Add SPI node Add McSPI data node to AM33XX device tree file. The McSPI module (and so as the driver) is reused from OMAP4. Signed-off-by: Philip, Avinash <avinashphilip@ti.com> Tested-by: Matt Porter <mporter@ti.com> [b-cousson@ti.com: Remove interrupt-parent] Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-10-31 10:51:09 +00:00
spi0: spi@48030000 {
compatible = "ti,omap4-mcspi";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x48030000 0x400>;
ARM: dts: AM33XX: Corrects typo in interrupt field in SPI node DT field of "interrupts" was mentioned wrongly as "interrupt" in SPI node. This went unnoticed as spi-omap2 driver not making use of interrupt. Fixes the typo. Signed-off-by: Philip Avinash <avinashphilip@ti.com> Acked-by: Peter Korsgaard <jacmet@sunsite.dk> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-02-01 05:37:27 +00:00
interrupts = <65>;
ARM: dts: AM33XX: Add SPI node Add McSPI data node to AM33XX device tree file. The McSPI module (and so as the driver) is reused from OMAP4. Signed-off-by: Philip, Avinash <avinashphilip@ti.com> Tested-by: Matt Porter <mporter@ti.com> [b-cousson@ti.com: Remove interrupt-parent] Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-10-31 10:51:09 +00:00
ti,spi-num-cs = <2>;
ti,hwmods = "spi0";
ARM: dts: AM33XX: Add SPI DMA support Adds DMA resources to the AM33XX SPI nodes. Signed-off-by: Matt Porter <mporter@ti.com> Signed-off-by: Joel A Fernandes <joelagnel@ti.com> Signed-off-by: Benoit Cousson <bcousson@baylibre.com>
2013-09-10 19:24:38 +00:00
dmas = <&edma 16
&edma 17
&edma 18
&edma 19>;
dma-names = "tx0", "rx0", "tx1", "rx1";
ARM: dts: AM33XX: Add SPI node Add McSPI data node to AM33XX device tree file. The McSPI module (and so as the driver) is reused from OMAP4. Signed-off-by: Philip, Avinash <avinashphilip@ti.com> Tested-by: Matt Porter <mporter@ti.com> [b-cousson@ti.com: Remove interrupt-parent] Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-10-31 10:51:09 +00:00
status = "disabled";
};
spi1: spi@481a0000 {
compatible = "ti,omap4-mcspi";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x481a0000 0x400>;
ARM: dts: AM33XX: Corrects typo in interrupt field in SPI node DT field of "interrupts" was mentioned wrongly as "interrupt" in SPI node. This went unnoticed as spi-omap2 driver not making use of interrupt. Fixes the typo. Signed-off-by: Philip Avinash <avinashphilip@ti.com> Acked-by: Peter Korsgaard <jacmet@sunsite.dk> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-02-01 05:37:27 +00:00
interrupts = <125>;
ARM: dts: AM33XX: Add SPI node Add McSPI data node to AM33XX device tree file. The McSPI module (and so as the driver) is reused from OMAP4. Signed-off-by: Philip, Avinash <avinashphilip@ti.com> Tested-by: Matt Porter <mporter@ti.com> [b-cousson@ti.com: Remove interrupt-parent] Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-10-31 10:51:09 +00:00
ti,spi-num-cs = <2>;
ti,hwmods = "spi1";
ARM: dts: AM33XX: Add SPI DMA support Adds DMA resources to the AM33XX SPI nodes. Signed-off-by: Matt Porter <mporter@ti.com> Signed-off-by: Joel A Fernandes <joelagnel@ti.com> Signed-off-by: Benoit Cousson <bcousson@baylibre.com>
2013-09-10 19:24:38 +00:00
dmas = <&edma 42
&edma 43
&edma 44
&edma 45>;
dma-names = "tx0", "rx0", "tx1", "rx1";
ARM: dts: AM33XX: Add SPI node Add McSPI data node to AM33XX device tree file. The McSPI module (and so as the driver) is reused from OMAP4. Signed-off-by: Philip, Avinash <avinashphilip@ti.com> Tested-by: Matt Porter <mporter@ti.com> [b-cousson@ti.com: Remove interrupt-parent] Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-10-31 10:51:09 +00:00
status = "disabled";
};
ARM: dts: AM33XX: Add usbss node Device tree node for usbss on AM33XX. There are two musb controllers on am33xx platform so have port0-mode and port1-mode data. Signed-off-by: Ajay Kumar Gupta <ajay.gupta@ti.com> Signed-off-by: Santhapuri, Damodar <damodar.santhapuri@ti.com> Signed-off-by: Ravi Babu <ravibabu@ti.com> [afzal@ti.com: reg & interrupt property addition] Signed-off-by: Afzal Mohammed <afzal@ti.com> Reviewed-by: Felipe Balbi <balbi@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-11-06 14:29:38 +00:00
usb: musb: dsps: use proper child nodes This moves the two instances from the big node into two child nodes. The glue layer ontop does almost nothing. There is one devices containing the control module for USB (2) phy, (2) usb and later the dma engine. The usb device is the "glue device" which contains the musb device as a child. This is what we do ever since. The new file musb_am335x is just here to prob the new bus and populate child devices. There are a lot of changes to the dsps file as a result of the changes: - musb_core_offset This is gone. The device tree provides memory ressources information for the device there is no need to "fix" things - instances This is gone as well. If we have two instances then we have have two child enabled nodes in the device tree. For instance the SoC in beagle bone has two USB instances but only one has been wired up so there is no need to load and init the second instance since it won't be used. - dsps_glue is now per glue device In the past there was one of this structs but with an array of two and each instance accessed its variable depending on the platform device id. - no unneeded copy of structs I do not know why struct dsps_musb_wrapper is copied but it is not necessary. The same goes for musb_hdrc_platform_data which allocated on demand and then again by platform_device_add_data(). One copy is enough. Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de> Signed-off-by: Felipe Balbi <balbi@ti.com>
2013-07-05 12:51:33 +00:00
usb: usb@47400000 {
compatible = "ti,am33xx-usb";
reg = <0x47400000 0x1000>;
ranges;
#address-cells = <1>;
#size-cells = <1>;
ARM: dts: AM33XX: Add usbss node Device tree node for usbss on AM33XX. There are two musb controllers on am33xx platform so have port0-mode and port1-mode data. Signed-off-by: Ajay Kumar Gupta <ajay.gupta@ti.com> Signed-off-by: Santhapuri, Damodar <damodar.santhapuri@ti.com> Signed-off-by: Ravi Babu <ravibabu@ti.com> [afzal@ti.com: reg & interrupt property addition] Signed-off-by: Afzal Mohammed <afzal@ti.com> Reviewed-by: Felipe Balbi <balbi@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-11-06 14:29:38 +00:00
ti,hwmods = "usb_otg_hs";
usb: musb: dsps: use proper child nodes This moves the two instances from the big node into two child nodes. The glue layer ontop does almost nothing. There is one devices containing the control module for USB (2) phy, (2) usb and later the dma engine. The usb device is the "glue device" which contains the musb device as a child. This is what we do ever since. The new file musb_am335x is just here to prob the new bus and populate child devices. There are a lot of changes to the dsps file as a result of the changes: - musb_core_offset This is gone. The device tree provides memory ressources information for the device there is no need to "fix" things - instances This is gone as well. If we have two instances then we have have two child enabled nodes in the device tree. For instance the SoC in beagle bone has two USB instances but only one has been wired up so there is no need to load and init the second instance since it won't be used. - dsps_glue is now per glue device In the past there was one of this structs but with an array of two and each instance accessed its variable depending on the platform device id. - no unneeded copy of structs I do not know why struct dsps_musb_wrapper is copied but it is not necessary. The same goes for musb_hdrc_platform_data which allocated on demand and then again by platform_device_add_data(). One copy is enough. Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de> Signed-off-by: Felipe Balbi <balbi@ti.com>
2013-07-05 12:51:33 +00:00
status = "disabled";
ARM: dts: am33xx: correcting dt node unit address for usb DT node's unit address should be its own register offset address to make it a unique across the system. This patch corrects the incorrect USB entries with correct register offset for unit address. Cc: stable@vger.kernel.org # v3.12+ Acked-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de> Acked-by: Felipe Balbi <balbi@ti.com> Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2014-03-06 12:31:34 +00:00
usb_ctrl_mod: control@44e10620 {
usb: musb: dsps: use proper child nodes This moves the two instances from the big node into two child nodes. The glue layer ontop does almost nothing. There is one devices containing the control module for USB (2) phy, (2) usb and later the dma engine. The usb device is the "glue device" which contains the musb device as a child. This is what we do ever since. The new file musb_am335x is just here to prob the new bus and populate child devices. There are a lot of changes to the dsps file as a result of the changes: - musb_core_offset This is gone. The device tree provides memory ressources information for the device there is no need to "fix" things - instances This is gone as well. If we have two instances then we have have two child enabled nodes in the device tree. For instance the SoC in beagle bone has two USB instances but only one has been wired up so there is no need to load and init the second instance since it won't be used. - dsps_glue is now per glue device In the past there was one of this structs but with an array of two and each instance accessed its variable depending on the platform device id. - no unneeded copy of structs I do not know why struct dsps_musb_wrapper is copied but it is not necessary. The same goes for musb_hdrc_platform_data which allocated on demand and then again by platform_device_add_data(). One copy is enough. Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de> Signed-off-by: Felipe Balbi <balbi@ti.com>
2013-07-05 12:51:33 +00:00
compatible = "ti,am335x-usb-ctrl-module";
reg = <0x44e10620 0x10
0x44e10648 0x4>;
reg-names = "phy_ctrl", "wakeup";
status = "disabled";
};
usb: usb: dsps: update code according to the binding document This relfects the code and dts requires changes due to recent .dts binding updates: - use mg prefix for the Metor Graphics specific attributes - use power in mA not in mA/2 as specifed in the USB2.0 specification - remove the child node for USB. This is driver specific on won't be reflected in the device tree - use the "mentor" prefix instead of "mg". - use "dr_mode" istead of "mg,port-mode" for the port mode. The former is used by a few other drivers. Cc: Rob Herring <rob.herring@calxeda.com> Cc: Pawel Moll <pawel.moll@arm.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Stephen Warren <swarren@wwwdotorg.org> Cc: Ian Campbell <ian.campbell@citrix.com> Cc: devicetree@vger.kernel.org Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de> Signed-off-by: Felipe Balbi <balbi@ti.com>
2013-08-20 16:35:47 +00:00
usb0_phy: usb-phy@47401300 {
usb: musb: dsps: use proper child nodes This moves the two instances from the big node into two child nodes. The glue layer ontop does almost nothing. There is one devices containing the control module for USB (2) phy, (2) usb and later the dma engine. The usb device is the "glue device" which contains the musb device as a child. This is what we do ever since. The new file musb_am335x is just here to prob the new bus and populate child devices. There are a lot of changes to the dsps file as a result of the changes: - musb_core_offset This is gone. The device tree provides memory ressources information for the device there is no need to "fix" things - instances This is gone as well. If we have two instances then we have have two child enabled nodes in the device tree. For instance the SoC in beagle bone has two USB instances but only one has been wired up so there is no need to load and init the second instance since it won't be used. - dsps_glue is now per glue device In the past there was one of this structs but with an array of two and each instance accessed its variable depending on the platform device id. - no unneeded copy of structs I do not know why struct dsps_musb_wrapper is copied but it is not necessary. The same goes for musb_hdrc_platform_data which allocated on demand and then again by platform_device_add_data(). One copy is enough. Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de> Signed-off-by: Felipe Balbi <balbi@ti.com>
2013-07-05 12:51:33 +00:00
compatible = "ti,am335x-usb-phy";
reg = <0x47401300 0x100>;
reg-names = "phy";
status = "disabled";
ARM: dts: am33xx, change usb ctrl module label Control module is not usb specific. Changes the label to usb_ctrl_mod. Signed-off-by: Markus Pargmann <mpa@pengutronix.de> Signed-off-by: Benoit Cousson <bcousson@baylibre.com>
2013-10-14 12:49:21 +00:00
ti,ctrl_mod = <&usb_ctrl_mod>;
usb: musb: dsps: use proper child nodes This moves the two instances from the big node into two child nodes. The glue layer ontop does almost nothing. There is one devices containing the control module for USB (2) phy, (2) usb and later the dma engine. The usb device is the "glue device" which contains the musb device as a child. This is what we do ever since. The new file musb_am335x is just here to prob the new bus and populate child devices. There are a lot of changes to the dsps file as a result of the changes: - musb_core_offset This is gone. The device tree provides memory ressources information for the device there is no need to "fix" things - instances This is gone as well. If we have two instances then we have have two child enabled nodes in the device tree. For instance the SoC in beagle bone has two USB instances but only one has been wired up so there is no need to load and init the second instance since it won't be used. - dsps_glue is now per glue device In the past there was one of this structs but with an array of two and each instance accessed its variable depending on the platform device id. - no unneeded copy of structs I do not know why struct dsps_musb_wrapper is copied but it is not necessary. The same goes for musb_hdrc_platform_data which allocated on demand and then again by platform_device_add_data(). One copy is enough. Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de> Signed-off-by: Felipe Balbi <balbi@ti.com>
2013-07-05 12:51:33 +00:00
};
usb0: usb@47401000 {
compatible = "ti,musb-am33xx";
status = "disabled";
usb: usb: dsps: update code according to the binding document This relfects the code and dts requires changes due to recent .dts binding updates: - use mg prefix for the Metor Graphics specific attributes - use power in mA not in mA/2 as specifed in the USB2.0 specification - remove the child node for USB. This is driver specific on won't be reflected in the device tree - use the "mentor" prefix instead of "mg". - use "dr_mode" istead of "mg,port-mode" for the port mode. The former is used by a few other drivers. Cc: Rob Herring <rob.herring@calxeda.com> Cc: Pawel Moll <pawel.moll@arm.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Stephen Warren <swarren@wwwdotorg.org> Cc: Ian Campbell <ian.campbell@citrix.com> Cc: devicetree@vger.kernel.org Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de> Signed-off-by: Felipe Balbi <balbi@ti.com>
2013-08-20 16:35:47 +00:00
reg = <0x47401400 0x400
0x47401000 0x200>;
reg-names = "mc", "control";
interrupts = <18>;
interrupt-names = "mc";
dr_mode = "otg";
mentor,multipoint = <1>;
mentor,num-eps = <16>;
mentor,ram-bits = <12>;
mentor,power = <500>;
phys = <&usb0_phy>;
usb: musb dma: add cppi41 dma driver This driver is currently used by musb' cppi41 couter part. I may merge both dma engine user of musb at some point but not just yet. The driver seems to work in RX/TX mode in host mode, tested on mass storage. I increaed the size of the TX / RX transfers and waited for the core code to cancel a transfers and it seems to recover. v2..3: - use mall transfers on RX side and check data toggle. - use rndis mode on tx side so we haveon interrupt for 4096 transfers. - remove custom "transferred" hack and use dmaengine_tx_status() to compute the total amount of data that has been transferred. - cancel transfers and reclaim descriptors v1..v2: - RX path added - dma mode 0 & 1 is working - device tree nodes re-created. Cc: Vinod Koul <vinod.koul@intel.com> Cc: Dan Williams <djbw@fb.com> Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de> Signed-off-by: Felipe Balbi <balbi@ti.com>
2013-06-20 10:13:04 +00:00
dmas = <&cppi41dma 0 0 &cppi41dma 1 0
&cppi41dma 2 0 &cppi41dma 3 0
&cppi41dma 4 0 &cppi41dma 5 0
&cppi41dma 6 0 &cppi41dma 7 0
&cppi41dma 8 0 &cppi41dma 9 0
&cppi41dma 10 0 &cppi41dma 11 0
&cppi41dma 12 0 &cppi41dma 13 0
&cppi41dma 14 0 &cppi41dma 0 1
&cppi41dma 1 1 &cppi41dma 2 1
&cppi41dma 3 1 &cppi41dma 4 1
&cppi41dma 5 1 &cppi41dma 6 1
&cppi41dma 7 1 &cppi41dma 8 1
&cppi41dma 9 1 &cppi41dma 10 1
&cppi41dma 11 1 &cppi41dma 12 1
&cppi41dma 13 1 &cppi41dma 14 1>;
dma-names =
"rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
"rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
"rx14", "rx15",
"tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
"tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
"tx14", "tx15";
usb: musb: dsps: use proper child nodes This moves the two instances from the big node into two child nodes. The glue layer ontop does almost nothing. There is one devices containing the control module for USB (2) phy, (2) usb and later the dma engine. The usb device is the "glue device" which contains the musb device as a child. This is what we do ever since. The new file musb_am335x is just here to prob the new bus and populate child devices. There are a lot of changes to the dsps file as a result of the changes: - musb_core_offset This is gone. The device tree provides memory ressources information for the device there is no need to "fix" things - instances This is gone as well. If we have two instances then we have have two child enabled nodes in the device tree. For instance the SoC in beagle bone has two USB instances but only one has been wired up so there is no need to load and init the second instance since it won't be used. - dsps_glue is now per glue device In the past there was one of this structs but with an array of two and each instance accessed its variable depending on the platform device id. - no unneeded copy of structs I do not know why struct dsps_musb_wrapper is copied but it is not necessary. The same goes for musb_hdrc_platform_data which allocated on demand and then again by platform_device_add_data(). One copy is enough. Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de> Signed-off-by: Felipe Balbi <balbi@ti.com>
2013-07-05 12:51:33 +00:00
};
usb: usb: dsps: update code according to the binding document This relfects the code and dts requires changes due to recent .dts binding updates: - use mg prefix for the Metor Graphics specific attributes - use power in mA not in mA/2 as specifed in the USB2.0 specification - remove the child node for USB. This is driver specific on won't be reflected in the device tree - use the "mentor" prefix instead of "mg". - use "dr_mode" istead of "mg,port-mode" for the port mode. The former is used by a few other drivers. Cc: Rob Herring <rob.herring@calxeda.com> Cc: Pawel Moll <pawel.moll@arm.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Stephen Warren <swarren@wwwdotorg.org> Cc: Ian Campbell <ian.campbell@citrix.com> Cc: devicetree@vger.kernel.org Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de> Signed-off-by: Felipe Balbi <balbi@ti.com>
2013-08-20 16:35:47 +00:00
usb1_phy: usb-phy@47401b00 {
usb: musb: dsps: use proper child nodes This moves the two instances from the big node into two child nodes. The glue layer ontop does almost nothing. There is one devices containing the control module for USB (2) phy, (2) usb and later the dma engine. The usb device is the "glue device" which contains the musb device as a child. This is what we do ever since. The new file musb_am335x is just here to prob the new bus and populate child devices. There are a lot of changes to the dsps file as a result of the changes: - musb_core_offset This is gone. The device tree provides memory ressources information for the device there is no need to "fix" things - instances This is gone as well. If we have two instances then we have have two child enabled nodes in the device tree. For instance the SoC in beagle bone has two USB instances but only one has been wired up so there is no need to load and init the second instance since it won't be used. - dsps_glue is now per glue device In the past there was one of this structs but with an array of two and each instance accessed its variable depending on the platform device id. - no unneeded copy of structs I do not know why struct dsps_musb_wrapper is copied but it is not necessary. The same goes for musb_hdrc_platform_data which allocated on demand and then again by platform_device_add_data(). One copy is enough. Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de> Signed-off-by: Felipe Balbi <balbi@ti.com>
2013-07-05 12:51:33 +00:00
compatible = "ti,am335x-usb-phy";
reg = <0x47401b00 0x100>;
reg-names = "phy";
status = "disabled";
ARM: dts: am33xx, change usb ctrl module label Control module is not usb specific. Changes the label to usb_ctrl_mod. Signed-off-by: Markus Pargmann <mpa@pengutronix.de> Signed-off-by: Benoit Cousson <bcousson@baylibre.com>
2013-10-14 12:49:21 +00:00
ti,ctrl_mod = <&usb_ctrl_mod>;
usb: musb: dsps: use proper child nodes This moves the two instances from the big node into two child nodes. The glue layer ontop does almost nothing. There is one devices containing the control module for USB (2) phy, (2) usb and later the dma engine. The usb device is the "glue device" which contains the musb device as a child. This is what we do ever since. The new file musb_am335x is just here to prob the new bus and populate child devices. There are a lot of changes to the dsps file as a result of the changes: - musb_core_offset This is gone. The device tree provides memory ressources information for the device there is no need to "fix" things - instances This is gone as well. If we have two instances then we have have two child enabled nodes in the device tree. For instance the SoC in beagle bone has two USB instances but only one has been wired up so there is no need to load and init the second instance since it won't be used. - dsps_glue is now per glue device In the past there was one of this structs but with an array of two and each instance accessed its variable depending on the platform device id. - no unneeded copy of structs I do not know why struct dsps_musb_wrapper is copied but it is not necessary. The same goes for musb_hdrc_platform_data which allocated on demand and then again by platform_device_add_data(). One copy is enough. Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de> Signed-off-by: Felipe Balbi <balbi@ti.com>
2013-07-05 12:51:33 +00:00
};
usb1: usb@47401800 {
compatible = "ti,musb-am33xx";
status = "disabled";
usb: usb: dsps: update code according to the binding document This relfects the code and dts requires changes due to recent .dts binding updates: - use mg prefix for the Metor Graphics specific attributes - use power in mA not in mA/2 as specifed in the USB2.0 specification - remove the child node for USB. This is driver specific on won't be reflected in the device tree - use the "mentor" prefix instead of "mg". - use "dr_mode" istead of "mg,port-mode" for the port mode. The former is used by a few other drivers. Cc: Rob Herring <rob.herring@calxeda.com> Cc: Pawel Moll <pawel.moll@arm.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Stephen Warren <swarren@wwwdotorg.org> Cc: Ian Campbell <ian.campbell@citrix.com> Cc: devicetree@vger.kernel.org Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de> Signed-off-by: Felipe Balbi <balbi@ti.com>
2013-08-20 16:35:47 +00:00
reg = <0x47401c00 0x400
0x47401800 0x200>;
reg-names = "mc", "control";
interrupts = <19>;
interrupt-names = "mc";
dr_mode = "otg";
mentor,multipoint = <1>;
mentor,num-eps = <16>;
mentor,ram-bits = <12>;
mentor,power = <500>;
phys = <&usb1_phy>;
usb: musb dma: add cppi41 dma driver This driver is currently used by musb' cppi41 couter part. I may merge both dma engine user of musb at some point but not just yet. The driver seems to work in RX/TX mode in host mode, tested on mass storage. I increaed the size of the TX / RX transfers and waited for the core code to cancel a transfers and it seems to recover. v2..3: - use mall transfers on RX side and check data toggle. - use rndis mode on tx side so we haveon interrupt for 4096 transfers. - remove custom "transferred" hack and use dmaengine_tx_status() to compute the total amount of data that has been transferred. - cancel transfers and reclaim descriptors v1..v2: - RX path added - dma mode 0 & 1 is working - device tree nodes re-created. Cc: Vinod Koul <vinod.koul@intel.com> Cc: Dan Williams <djbw@fb.com> Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de> Signed-off-by: Felipe Balbi <balbi@ti.com>
2013-06-20 10:13:04 +00:00
dmas = <&cppi41dma 15 0 &cppi41dma 16 0
&cppi41dma 17 0 &cppi41dma 18 0
&cppi41dma 19 0 &cppi41dma 20 0
&cppi41dma 21 0 &cppi41dma 22 0
&cppi41dma 23 0 &cppi41dma 24 0
&cppi41dma 25 0 &cppi41dma 26 0
&cppi41dma 27 0 &cppi41dma 28 0
&cppi41dma 29 0 &cppi41dma 15 1
&cppi41dma 16 1 &cppi41dma 17 1
&cppi41dma 18 1 &cppi41dma 19 1
&cppi41dma 20 1 &cppi41dma 21 1
&cppi41dma 22 1 &cppi41dma 23 1
&cppi41dma 24 1 &cppi41dma 25 1
&cppi41dma 26 1 &cppi41dma 27 1
&cppi41dma 28 1 &cppi41dma 29 1>;
dma-names =
"rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
"rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
"rx14", "rx15",
"tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
"tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
"tx14", "tx15";
usb: musb: dsps: use proper child nodes This moves the two instances from the big node into two child nodes. The glue layer ontop does almost nothing. There is one devices containing the control module for USB (2) phy, (2) usb and later the dma engine. The usb device is the "glue device" which contains the musb device as a child. This is what we do ever since. The new file musb_am335x is just here to prob the new bus and populate child devices. There are a lot of changes to the dsps file as a result of the changes: - musb_core_offset This is gone. The device tree provides memory ressources information for the device there is no need to "fix" things - instances This is gone as well. If we have two instances then we have have two child enabled nodes in the device tree. For instance the SoC in beagle bone has two USB instances but only one has been wired up so there is no need to load and init the second instance since it won't be used. - dsps_glue is now per glue device In the past there was one of this structs but with an array of two and each instance accessed its variable depending on the platform device id. - no unneeded copy of structs I do not know why struct dsps_musb_wrapper is copied but it is not necessary. The same goes for musb_hdrc_platform_data which allocated on demand and then again by platform_device_add_data(). One copy is enough. Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de> Signed-off-by: Felipe Balbi <balbi@ti.com>
2013-07-05 12:51:33 +00:00
};
usb: musb dma: add cppi41 dma driver This driver is currently used by musb' cppi41 couter part. I may merge both dma engine user of musb at some point but not just yet. The driver seems to work in RX/TX mode in host mode, tested on mass storage. I increaed the size of the TX / RX transfers and waited for the core code to cancel a transfers and it seems to recover. v2..3: - use mall transfers on RX side and check data toggle. - use rndis mode on tx side so we haveon interrupt for 4096 transfers. - remove custom "transferred" hack and use dmaengine_tx_status() to compute the total amount of data that has been transferred. - cancel transfers and reclaim descriptors v1..v2: - RX path added - dma mode 0 & 1 is working - device tree nodes re-created. Cc: Vinod Koul <vinod.koul@intel.com> Cc: Dan Williams <djbw@fb.com> Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de> Signed-off-by: Felipe Balbi <balbi@ti.com>
2013-06-20 10:13:04 +00:00
ARM: dts: am33xx: correcting dt node unit address for usb DT node's unit address should be its own register offset address to make it a unique across the system. This patch corrects the incorrect USB entries with correct register offset for unit address. Cc: stable@vger.kernel.org # v3.12+ Acked-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de> Acked-by: Felipe Balbi <balbi@ti.com> Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2014-03-06 12:31:34 +00:00
cppi41dma: dma-controller@47402000 {
usb: musb dma: add cppi41 dma driver This driver is currently used by musb' cppi41 couter part. I may merge both dma engine user of musb at some point but not just yet. The driver seems to work in RX/TX mode in host mode, tested on mass storage. I increaed the size of the TX / RX transfers and waited for the core code to cancel a transfers and it seems to recover. v2..3: - use mall transfers on RX side and check data toggle. - use rndis mode on tx side so we haveon interrupt for 4096 transfers. - remove custom "transferred" hack and use dmaengine_tx_status() to compute the total amount of data that has been transferred. - cancel transfers and reclaim descriptors v1..v2: - RX path added - dma mode 0 & 1 is working - device tree nodes re-created. Cc: Vinod Koul <vinod.koul@intel.com> Cc: Dan Williams <djbw@fb.com> Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de> Signed-off-by: Felipe Balbi <balbi@ti.com>
2013-06-20 10:13:04 +00:00
compatible = "ti,am3359-cppi41";
reg = <0x47400000 0x1000
0x47402000 0x1000
0x47403000 0x1000
0x47404000 0x4000>;
usb: musb: dsps fix the typo in reg-names of the dma node I forgot to separete the different names in the reg-names property. This didn't cause anything to fail because the driver does not use the names and simply relies on the order of the memory offsets in reg. This patch fixes this in case it is used later. Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de> Signed-off-by: Felipe Balbi <balbi@ti.com>
2013-08-20 16:35:45 +00:00
reg-names = "glue", "controller", "scheduler", "queuemgr";
usb: musb dma: add cppi41 dma driver This driver is currently used by musb' cppi41 couter part. I may merge both dma engine user of musb at some point but not just yet. The driver seems to work in RX/TX mode in host mode, tested on mass storage. I increaed the size of the TX / RX transfers and waited for the core code to cancel a transfers and it seems to recover. v2..3: - use mall transfers on RX side and check data toggle. - use rndis mode on tx side so we haveon interrupt for 4096 transfers. - remove custom "transferred" hack and use dmaengine_tx_status() to compute the total amount of data that has been transferred. - cancel transfers and reclaim descriptors v1..v2: - RX path added - dma mode 0 & 1 is working - device tree nodes re-created. Cc: Vinod Koul <vinod.koul@intel.com> Cc: Dan Williams <djbw@fb.com> Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de> Signed-off-by: Felipe Balbi <balbi@ti.com>
2013-06-20 10:13:04 +00:00
interrupts = <17>;
interrupt-names = "glue";
#dma-cells = <2>;
#dma-channels = <30>;
#dma-requests = <256>;
status = "disabled";
};
ARM: dts: AM33XX: Add usbss node Device tree node for usbss on AM33XX. There are two musb controllers on am33xx platform so have port0-mode and port1-mode data. Signed-off-by: Ajay Kumar Gupta <ajay.gupta@ti.com> Signed-off-by: Santhapuri, Damodar <damodar.santhapuri@ti.com> Signed-off-by: Ravi Babu <ravibabu@ti.com> [afzal@ti.com: reg & interrupt property addition] Signed-off-by: Afzal Mohammed <afzal@ti.com> Reviewed-by: Felipe Balbi <balbi@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-11-06 14:29:38 +00:00
};
Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net-next Pull networking changes from David Miller: 1) Allow to dump, monitor, and change the bridge multicast database using netlink. From Cong Wang. 2) RFC 5961 TCP blind data injection attack mitigation, from Eric Dumazet. 3) Networking user namespace support from Eric W. Biederman. 4) tuntap/virtio-net multiqueue support by Jason Wang. 5) Support for checksum offload of encapsulated packets (basically, tunneled traffic can still be checksummed by HW). From Joseph Gasparakis. 6) Allow BPF filter access to VLAN tags, from Eric Dumazet and Daniel Borkmann. 7) Bridge port parameters over netlink and BPDU blocking support from Stephen Hemminger. 8) Improve data access patterns during inet socket demux by rearranging socket layout, from Eric Dumazet. 9) TIPC protocol updates and cleanups from Ying Xue, Paul Gortmaker, and Jon Maloy. 10) Update TCP socket hash sizing to be more in line with current day realities. The existing heurstics were choosen a decade ago. From Eric Dumazet. 11) Fix races, queue bloat, and excessive wakeups in ATM and associated drivers, from Krzysztof Mazur and David Woodhouse. 12) Support DOVE (Distributed Overlay Virtual Ethernet) extensions in VXLAN driver, from David Stevens. 13) Add "oops_only" mode to netconsole, from Amerigo Wang. 14) Support set and query of VEB/VEPA bridge mode via PF_BRIDGE, also allow DCB netlink to work on namespaces other than the initial namespace. From John Fastabend. 15) Support PTP in the Tigon3 driver, from Matt Carlson. 16) tun/vhost zero copy fixes and improvements, plus turn it on by default, from Michael S. Tsirkin. 17) Support per-association statistics in SCTP, from Michele Baldessari. And many, many, driver updates, cleanups, and improvements. Too numerous to mention individually. * git://git.kernel.org/pub/scm/linux/kernel/git/davem/net-next: (1722 commits) net/mlx4_en: Add support for destination MAC in steering rules net/mlx4_en: Use generic etherdevice.h functions. net: ethtool: Add destination MAC address to flow steering API bridge: add support of adding and deleting mdb entries bridge: notify mdb changes via netlink ndisc: Unexport ndisc_{build,send}_skb(). uapi: add missing netconf.h to export list pkt_sched: avoid requeues if possible solos-pci: fix double-free of TX skb in DMA mode bnx2: Fix accidental reversions. bna: Driver Version Updated to 3.1.2.1 bna: Firmware update bna: Add RX State bna: Rx Page Based Allocation bna: TX Intr Coalescing Fix bna: Tx and Rx Optimizations bna: Code Cleanup and Enhancements ath9k: check pdata variable before dereferencing it ath5k: RX timestamp is reported at end of frame ath9k_htc: RX timestamp is reported at end of frame ...
2012-12-13 02:07:07 +00:00
ARM: dts: AM33XX: Add PWMSS device tree nodes Add PWMSS device tree nodes in relation with ECAP & EHRPWM DT nodes to AM33XX SoC family. Also populates device tree nodes for ECAP & EHRPWM by adding necessary properties like pwm-cells, base reg & set disabled as status. Signed-off-by: Philip Avinash <avinashphilip@ti.com> Reviewed-by: Thierry Reding <thierry.reding@avionic-design.de> Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-06-06 13:52:37 +00:00
epwmss0: epwmss@48300000 {
compatible = "ti,am33xx-pwmss";
reg = <0x48300000 0x10>;
ti,hwmods = "epwmss0";
#address-cells = <1>;
#size-cells = <1>;
status = "disabled";
ranges = <0x48300100 0x48300100 0x80 /* ECAP */
0x48300180 0x48300180 0x80 /* EQEP */
0x48300200 0x48300200 0x80>; /* EHRPWM */
ecap0: ecap@48300100 {
compatible = "ti,am33xx-ecap";
#pwm-cells = <3>;
reg = <0x48300100 0x80>;
ARM: dts: AM33XX: Add ecap interrupt properties Add missing interrupt properties to the ecap0, ecap1, and ecap2 nodes. Signed-off-by: Matt Porter <mporter@linaro.org> Signed-off-by: Tony Lindgren <tony@atomide.com>
2014-01-29 20:59:59 +00:00
interrupts = <31>;
interrupt-names = "ecap0";
ARM: dts: AM33XX: Add PWMSS device tree nodes Add PWMSS device tree nodes in relation with ECAP & EHRPWM DT nodes to AM33XX SoC family. Also populates device tree nodes for ECAP & EHRPWM by adding necessary properties like pwm-cells, base reg & set disabled as status. Signed-off-by: Philip Avinash <avinashphilip@ti.com> Reviewed-by: Thierry Reding <thierry.reding@avionic-design.de> Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-06-06 13:52:37 +00:00
ti,hwmods = "ecap0";
status = "disabled";
};
ehrpwm0: ehrpwm@48300200 {
compatible = "ti,am33xx-ehrpwm";
#pwm-cells = <3>;
reg = <0x48300200 0x80>;
ti,hwmods = "ehrpwm0";
status = "disabled";
};
};
epwmss1: epwmss@48302000 {
compatible = "ti,am33xx-pwmss";
reg = <0x48302000 0x10>;
ti,hwmods = "epwmss1";
#address-cells = <1>;
#size-cells = <1>;
status = "disabled";
ranges = <0x48302100 0x48302100 0x80 /* ECAP */
0x48302180 0x48302180 0x80 /* EQEP */
0x48302200 0x48302200 0x80>; /* EHRPWM */
ecap1: ecap@48302100 {
compatible = "ti,am33xx-ecap";
#pwm-cells = <3>;
reg = <0x48302100 0x80>;
ARM: dts: AM33XX: Add ecap interrupt properties Add missing interrupt properties to the ecap0, ecap1, and ecap2 nodes. Signed-off-by: Matt Porter <mporter@linaro.org> Signed-off-by: Tony Lindgren <tony@atomide.com>
2014-01-29 20:59:59 +00:00
interrupts = <47>;
interrupt-names = "ecap1";
ARM: dts: AM33XX: Add PWMSS device tree nodes Add PWMSS device tree nodes in relation with ECAP & EHRPWM DT nodes to AM33XX SoC family. Also populates device tree nodes for ECAP & EHRPWM by adding necessary properties like pwm-cells, base reg & set disabled as status. Signed-off-by: Philip Avinash <avinashphilip@ti.com> Reviewed-by: Thierry Reding <thierry.reding@avionic-design.de> Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-06-06 13:52:37 +00:00
ti,hwmods = "ecap1";
status = "disabled";
};
ehrpwm1: ehrpwm@48302200 {
compatible = "ti,am33xx-ehrpwm";
#pwm-cells = <3>;
reg = <0x48302200 0x80>;
ti,hwmods = "ehrpwm1";
status = "disabled";
};
};
epwmss2: epwmss@48304000 {
compatible = "ti,am33xx-pwmss";
reg = <0x48304000 0x10>;
ti,hwmods = "epwmss2";
#address-cells = <1>;
#size-cells = <1>;
status = "disabled";
ranges = <0x48304100 0x48304100 0x80 /* ECAP */
0x48304180 0x48304180 0x80 /* EQEP */
0x48304200 0x48304200 0x80>; /* EHRPWM */
ecap2: ecap@48304100 {
compatible = "ti,am33xx-ecap";
#pwm-cells = <3>;
reg = <0x48304100 0x80>;
ARM: dts: AM33XX: Add ecap interrupt properties Add missing interrupt properties to the ecap0, ecap1, and ecap2 nodes. Signed-off-by: Matt Porter <mporter@linaro.org> Signed-off-by: Tony Lindgren <tony@atomide.com>
2014-01-29 20:59:59 +00:00
interrupts = <61>;
interrupt-names = "ecap2";
ARM: dts: AM33XX: Add PWMSS device tree nodes Add PWMSS device tree nodes in relation with ECAP & EHRPWM DT nodes to AM33XX SoC family. Also populates device tree nodes for ECAP & EHRPWM by adding necessary properties like pwm-cells, base reg & set disabled as status. Signed-off-by: Philip Avinash <avinashphilip@ti.com> Reviewed-by: Thierry Reding <thierry.reding@avionic-design.de> Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-06-06 13:52:37 +00:00
ti,hwmods = "ecap2";
status = "disabled";
};
ehrpwm2: ehrpwm@48304200 {
compatible = "ti,am33xx-ehrpwm";
#pwm-cells = <3>;
reg = <0x48304200 0x80>;
ti,hwmods = "ehrpwm2";
status = "disabled";
};
};
arm/dts: am33xx: Add CPSW and MDIO module nodes for AM33XX Add CPSW and MDIO related device tree data for AM33XX. Also enable them into board/evm dts files by providing respective phy-id. Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com> Cc: Benoit Cousson <b-cousson@ti.com> Acked-by: Peter Korsgaard <jacmet@sunsite.dk> Acked-by: Richard Cochran <richardcochran@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2012-11-14 09:08:00 +00:00
mac: ethernet@4a100000 {
compatible = "ti,cpsw";
ti,hwmods = "cpgmac0";
ARM: dts: am33xx: Add clock names for cpsw and cpts Add CPSW fck and CPTS clock and clock names Signed-off-by: George Cherian <george.cherian@ti.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-05-02 06:31:59 +00:00
clocks = <&cpsw_125mhz_gclk>, <&cpsw_cpts_rft_clk>;
clock-names = "fck", "cpts";
arm/dts: am33xx: Add CPSW and MDIO module nodes for AM33XX Add CPSW and MDIO related device tree data for AM33XX. Also enable them into board/evm dts files by providing respective phy-id. Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com> Cc: Benoit Cousson <b-cousson@ti.com> Acked-by: Peter Korsgaard <jacmet@sunsite.dk> Acked-by: Richard Cochran <richardcochran@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2012-11-14 09:08:00 +00:00
cpdma_channels = <8>;
ale_entries = <1024>;
bd_ram_size = <0x2000>;
no_bd_ram = <0>;
rx_descs = <64>;
mac_control = <0x20>;
slaves = <2>;
drivers: net: ethernet: cpsw: change cpts_active_slave to active_slave Change cpts_active_slave to active_slave so that the same DT property can be used to ethtool and SIOCGMIIPHY. CC: Richard Cochran <richardcochran@gmail.com> Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2013-03-11 23:16:35 +00:00
active_slave = <0>;
arm/dts: am33xx: Add CPSW and MDIO module nodes for AM33XX Add CPSW and MDIO related device tree data for AM33XX. Also enable them into board/evm dts files by providing respective phy-id. Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com> Cc: Benoit Cousson <b-cousson@ti.com> Acked-by: Peter Korsgaard <jacmet@sunsite.dk> Acked-by: Richard Cochran <richardcochran@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2012-11-14 09:08:00 +00:00
cpts_clock_mult = <0x80000000>;
cpts_clock_shift = <29>;
reg = <0x4a100000 0x800
0x4a101200 0x100>;
#address-cells = <1>;
#size-cells = <1>;
interrupt-parent = <&intc>;
/*
* c0_rx_thresh_pend
* c0_rx_pend
* c0_tx_pend
* c0_misc_pend
*/
interrupts = <40 41 42 43>;
ranges;
ARM: dts: AM33XX: fix ethernet and mdio default state Make sure ethernet and mdio nodes are disabled by default and enable them explicitly only on boards that actually use them. Signed-off-by: Johan Hovold <jhovold@gmail.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2014-05-08 08:57:36 +00:00
status = "disabled";
arm/dts: am33xx: Add CPSW and MDIO module nodes for AM33XX Add CPSW and MDIO related device tree data for AM33XX. Also enable them into board/evm dts files by providing respective phy-id. Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com> Cc: Benoit Cousson <b-cousson@ti.com> Acked-by: Peter Korsgaard <jacmet@sunsite.dk> Acked-by: Richard Cochran <richardcochran@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2012-11-14 09:08:00 +00:00
davinci_mdio: mdio@4a101000 {
compatible = "ti,davinci_mdio";
#address-cells = <1>;
#size-cells = <0>;
ti,hwmods = "davinci_mdio";
bus_freq = <1000000>;
reg = <0x4a101000 0x100>;
ARM: dts: AM33XX: fix ethernet and mdio default state Make sure ethernet and mdio nodes are disabled by default and enable them explicitly only on boards that actually use them. Signed-off-by: Johan Hovold <jhovold@gmail.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2014-05-08 08:57:36 +00:00
status = "disabled";
arm/dts: am33xx: Add CPSW and MDIO module nodes for AM33XX Add CPSW and MDIO related device tree data for AM33XX. Also enable them into board/evm dts files by providing respective phy-id. Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com> Cc: Benoit Cousson <b-cousson@ti.com> Acked-by: Peter Korsgaard <jacmet@sunsite.dk> Acked-by: Richard Cochran <richardcochran@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2012-11-14 09:08:00 +00:00
};
cpsw_emac0: slave@4a100200 {
/* Filled in by U-Boot */
mac-address = [ 00 00 00 00 00 00 ];
};
cpsw_emac1: slave@4a100300 {
/* Filled in by U-Boot */
mac-address = [ 00 00 00 00 00 00 ];
};
ARM: dts: am33xx: adopt to cpsw-phy-sel driver to configure phy mode Add DT entries for the phy mode selection in AM33xx SoC using cpsw-phy-sel driver. Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Tested-by: Daniel Mack <zonque@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2013-09-20 19:20:41 +00:00
phy_sel: cpsw-phy-sel@44e10650 {
compatible = "ti,am3352-cpsw-phy-sel";
reg= <0x44e10650 0x4>;
reg-names = "gmii-sel";
};
arm/dts: am33xx: Add CPSW and MDIO module nodes for AM33XX Add CPSW and MDIO related device tree data for AM33XX. Also enable them into board/evm dts files by providing respective phy-id. Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com> Cc: Benoit Cousson <b-cousson@ti.com> Acked-by: Peter Korsgaard <jacmet@sunsite.dk> Acked-by: Richard Cochran <richardcochran@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2012-11-14 09:08:00 +00:00
};
ARM: DTS: AM33XX: Add nodes for OCMC RAM and WKUP-M3 Since AM33XX supports only DT-boot, this is needed for the appropriate device nodes to be created. Note: OCMC RAM is part of the PER power domain and supports retention. The assembly code for low power entry/exit will run from OCMC RAM. To ensure that the OMAP PM code does not attempt to disable the clock to OCMC RAM as part of the suspend process add the no_idle_on_suspend flag. Signed-off-by: Vaibhav Bedia <vaibhav.bedia@ti.com> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: Peter Korsgaard <jacmet@sunsite.dk> Signed-off-by: Paul Walmsley <paul@pwsan.com>
2013-01-29 11:15:07 +00:00
ocmcram: ocmcram@40300000 {
compatible = "ti,am3352-ocmcram";
reg = <0x40300000 0x10000>;
ti,hwmods = "ocmcram";
};
wkup_m3: wkup_m3@44d00000 {
compatible = "ti,am3353-wkup-m3";
reg = <0x44d00000 0x4000 /* M3 UMEM */
0x44d80000 0x2000>; /* M3 DMEM */
ti,hwmods = "wkup_m3";
ARM: dts: omap: Add reset/idle on init bindings for OMAP On OMAP we have co-processor IPs, memory controllers, GPIOs which control regulators and power switches to PMIC, and SoC internal Bus IPs, some or most of which should either not be reset or idled or both at init. (In some cases there are erratas which prevent an IP from being reset) Have a way to pass this information from DT. Update the am33xx/omap4 and omap5 dtsi files with the new bindings for modules which either should not be idled. reset or both. A later patch would cleanup the same information that exists today as part of the hwmod data files. Signed-off-by: Rajendra Nayak <rnayak@ti.com> Signed-off-by: Benoit Cousson <bcousson@baylibre.com>
2013-10-15 07:07:50 +00:00
ti,no-reset-on-init;
ARM: DTS: AM33XX: Add nodes for OCMC RAM and WKUP-M3 Since AM33XX supports only DT-boot, this is needed for the appropriate device nodes to be created. Note: OCMC RAM is part of the PER power domain and supports retention. The assembly code for low power entry/exit will run from OCMC RAM. To ensure that the OMAP PM code does not attempt to disable the clock to OCMC RAM as part of the suspend process add the no_idle_on_suspend flag. Signed-off-by: Vaibhav Bedia <vaibhav.bedia@ti.com> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: Peter Korsgaard <jacmet@sunsite.dk> Signed-off-by: Paul Walmsley <paul@pwsan.com>
2013-01-29 11:15:07 +00:00
};
ARM: dts: AM33XX: Add GPMC node Add GPMC data node to AM33XX device tree file. Signed-off-by: Philip Avinash <avinashphilip@ti.com> Acked-by: Peter Korsgaard <jacmet@sunsite.dk> Signed-off-by: Pekon Gupta <pekon@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2013-05-02 09:44:03 +00:00
ARM: dts: AM33XX: Add ELM node ELM hardware engine is used for locating bit-flips in NAND data This patch is required for working of hardware based NAND ECC schemes with DT support. Signed-off-by: Philip Avinash <avinashphilip@ti.com> Acked-by: Peter Korsgaard <jacmet@sunsite.dk> Signed-off-by: Pekon Gupta <pekon@ti.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-05-31 07:49:03 +00:00
elm: elm@48080000 {
compatible = "ti,am3352-elm";
reg = <0x48080000 0x2000>;
interrupts = <4>;
ti,hwmods = "elm";
ARM: dts: AM33XX: Add LCDC info into am335x-evm Add LCDC device node in DT for am33xx Add LCDC and Panel info in DT for am335x-evm Changes: - remove redundant/unnecessary SoC specific setting in the board dts - resolved conflicts on for_3.13/dts Signed-off-by: Benoit Parrot <bparrot@ti.com> Signed-off-by: Joel Fernandes <joelf@ti.com> Signed-off-by: Benoit Cousson <bcousson@baylibre.com>
2013-08-08 23:28:14 +00:00
status = "disabled";
};
lcdc: lcdc@4830e000 {
compatible = "ti,am33xx-tilcdc";
reg = <0x4830e000 0x1000>;
interrupt-parent = <&intc>;
interrupts = <36>;
ti,hwmods = "lcdc";
ARM: dts: AM33XX: Add ELM node ELM hardware engine is used for locating bit-flips in NAND data This patch is required for working of hardware based NAND ECC schemes with DT support. Signed-off-by: Philip Avinash <avinashphilip@ti.com> Acked-by: Peter Korsgaard <jacmet@sunsite.dk> Signed-off-by: Pekon Gupta <pekon@ti.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-05-31 07:49:03 +00:00
status = "disabled";
};
arm: am33xx: add TSC/ADC mfd device support Add support for core multifunctional device along with its clients touchscreen and ADC. Signed-off-by: Pantelis Antoniou <panto@antoniou-consulting.com> Signed-off-by: Patil, Rachna <rachna@ti.com> Signed-off-by: Felipe Balbi <balbi@ti.com> Signed-off-by: Sebastian Andrzej Siewior <sebastian@breakpoint.cc>
2013-01-24 03:45:12 +00:00
tscadc: tscadc@44e0d000 {
compatible = "ti,am3359-tscadc";
reg = <0x44e0d000 0x1000>;
interrupt-parent = <&intc>;
interrupts = <16>;
ti,hwmods = "adc_tsc";
status = "disabled";
tsc {
compatible = "ti,am3359-tsc";
};
am335x_adc: adc {
#io-channel-cells = <1>;
compatible = "ti,am3359-adc";
};
};
ARM: dts: AM33XX: Add GPMC node Add GPMC data node to AM33XX device tree file. Signed-off-by: Philip Avinash <avinashphilip@ti.com> Acked-by: Peter Korsgaard <jacmet@sunsite.dk> Signed-off-by: Pekon Gupta <pekon@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2013-05-02 09:44:03 +00:00
gpmc: gpmc@50000000 {
compatible = "ti,am3352-gpmc";
ti,hwmods = "gpmc";
ARM: dts: omap: Add reset/idle on init bindings for OMAP On OMAP we have co-processor IPs, memory controllers, GPIOs which control regulators and power switches to PMIC, and SoC internal Bus IPs, some or most of which should either not be reset or idled or both at init. (In some cases there are erratas which prevent an IP from being reset) Have a way to pass this information from DT. Update the am33xx/omap4 and omap5 dtsi files with the new bindings for modules which either should not be idled. reset or both. A later patch would cleanup the same information that exists today as part of the hwmod data files. Signed-off-by: Rajendra Nayak <rnayak@ti.com> Signed-off-by: Benoit Cousson <bcousson@baylibre.com>
2013-10-15 07:07:50 +00:00
ti,no-idle-on-init;
ARM: dts: AM33XX: Add GPMC node Add GPMC data node to AM33XX device tree file. Signed-off-by: Philip Avinash <avinashphilip@ti.com> Acked-by: Peter Korsgaard <jacmet@sunsite.dk> Signed-off-by: Pekon Gupta <pekon@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2013-05-02 09:44:03 +00:00
reg = <0x50000000 0x2000>;
interrupts = <100>;
ARM: dts: AM33xx: Fix properties on gpmc node The gpmc driver is actually looking for "gpmc,num-cs" and "gpmc,num-waitpins" properties in DT. The binding doc also states this. Correct the properties in the dts to provide the right values for the gpmc driver. Signed-off-by: Lars Poeschel <poeschel@lemonage.de> Acked-by: Peter Korsgaard <jacmet@sunsite.dk> Acked-by: Pekon Gupta <pekon@ti.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-05-28 08:24:57 +00:00
gpmc,num-cs = <7>;
gpmc,num-waitpins = <2>;
ARM: dts: AM33XX: Add GPMC node Add GPMC data node to AM33XX device tree file. Signed-off-by: Philip Avinash <avinashphilip@ti.com> Acked-by: Peter Korsgaard <jacmet@sunsite.dk> Signed-off-by: Pekon Gupta <pekon@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2013-05-02 09:44:03 +00:00
#address-cells = <2>;
#size-cells = <1>;
status = "disabled";
};
ARM: dts: AM33XX: Add SHAM data and documentation Add the generic AM33XX SHAM module's device tree data and enable it for the am335x-evm, am335x-evmsk, and am335x-bone platforms. Also add Documentation file describing the data for the SHAM module. Cc: Paul Walmsley <paul@pwsan.com> Signed-off-by: Mark A. Greer <mgreer@animalcreek.com> Signed-off-by: Joel Fernandes <joelf@ti.com> [joelf@ti.com: Dropped interrupt-parent property, documentation fixups] Acked-by: Mark Rutland <mark.rutland@arm.com> Signed-off-by: Benoit Cousson <bcousson@baylibre.com>
2013-08-23 21:12:35 +00:00
sham: sham@53100000 {
compatible = "ti,omap4-sham";
ti,hwmods = "sham";
reg = <0x53100000 0x200>;
interrupts = <109>;
dmas = <&edma 36>;
dma-names = "rx";
};
ARM: dts: AM33XX: Add AES data and documentation Add the generic AM33XX AES module's device tree data and enable it for the am335x-evm, am335x-evmsk, and am335x-bone platforms. Also add Documentation file describing the data for the AES module. Cc: Paul Walmsley <paul@pwsan.com> Signed-off-by: Mark A. Greer <mgreer@animalcreek.com> Signed-off-by: Joel Fernandes <joelf@ti.com> [joelf@ti.com: Dropped interrupt-parent property, documentation fixups] Signed-off-by: Benoit Cousson <bcousson@baylibre.com>
2013-08-23 21:12:36 +00:00
aes: aes@53500000 {
compatible = "ti,omap4-aes";
ti,hwmods = "aes";
reg = <0x53500000 0xa0>;
ARM: dts: AM33XX: Fix AES interrupt number AES interrupts were previously not used, but after recent changes to omap-aes driver, its being used. Correct the interrupt number to have working PIO mode. Signed-off-by: Joel Fernandes <joelf@ti.com> Signed-off-by: Benoit Cousson <bcousson@baylibre.com>
2013-07-18 00:07:52 +00:00
interrupts = <103>;
ARM: dts: AM33XX: Add AES data and documentation Add the generic AM33XX AES module's device tree data and enable it for the am335x-evm, am335x-evmsk, and am335x-bone platforms. Also add Documentation file describing the data for the AES module. Cc: Paul Walmsley <paul@pwsan.com> Signed-off-by: Mark A. Greer <mgreer@animalcreek.com> Signed-off-by: Joel Fernandes <joelf@ti.com> [joelf@ti.com: Dropped interrupt-parent property, documentation fixups] Signed-off-by: Benoit Cousson <bcousson@baylibre.com>
2013-08-23 21:12:36 +00:00
dmas = <&edma 6>,
<&edma 5>;
dma-names = "tx", "rx";
};
ARM: dts: AM33XX: Add mcasp0 and mcasp1 device tree entries Add missing mcasp entries in the am33xx.dtsi include file. Signed-off-by: Pantelis Antoniou <panto@antoniou-consulting.com> Signed-off-by: Darren Etheridge <detheridge@ti.com> Signed-off-by: Jyri Sarha <jsarha@ti.com> Signed-off-by: Benoit Cousson <bcousson@baylibre.com>
2013-10-20 17:04:08 +00:00
mcasp0: mcasp@48038000 {
compatible = "ti,am33xx-mcasp-audio";
ti,hwmods = "mcasp0";
ARM: dts: AM33XX: mcasp: Add location for data port registers to reg-property This patch adds a second tuple to reg property. The new property tuple describes the memory location for data port registers mapped trough L3 bus on am33xx. The both property tuples are named accordingly in the reg-names property. Signed-off-by: Hebbar, Gururaja <gururaja.hebbar@ti.com> Signed-off-by: Darren Etheridge <detheridge@ti.com> Signed-off-by: Jyri Sarha <jsarha@ti.com> Signed-off-by: Benoit Cousson <bcousson@baylibre.com>
2013-10-20 17:04:09 +00:00
reg = <0x48038000 0x2000>,
<0x46000000 0x400000>;
reg-names = "mpu", "dat";
ARM: dts: AM33XX: Add mcasp0 and mcasp1 device tree entries Add missing mcasp entries in the am33xx.dtsi include file. Signed-off-by: Pantelis Antoniou <panto@antoniou-consulting.com> Signed-off-by: Darren Etheridge <detheridge@ti.com> Signed-off-by: Jyri Sarha <jsarha@ti.com> Signed-off-by: Benoit Cousson <bcousson@baylibre.com>
2013-10-20 17:04:08 +00:00
interrupts = <80>, <81>;
dt: Fix binding typos in clock-names and interrupt-names s/interrupts-names/interrupt-names/g s/clocks-names/clock-names/g Some of the binding files and device tree files get this wrong and the kernel won't be able to pick it up. Fix them up now so that they don't get widely used. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by : Patrice Chotard <patrice.chotard@st.com> Signed-off-by: Grant Likely <grant.likely@linaro.org>
2014-04-22 18:40:25 +00:00
interrupt-names = "tx", "rx";
ARM: dts: AM33XX: Add mcasp0 and mcasp1 device tree entries Add missing mcasp entries in the am33xx.dtsi include file. Signed-off-by: Pantelis Antoniou <panto@antoniou-consulting.com> Signed-off-by: Darren Etheridge <detheridge@ti.com> Signed-off-by: Jyri Sarha <jsarha@ti.com> Signed-off-by: Benoit Cousson <bcousson@baylibre.com>
2013-10-20 17:04:08 +00:00
status = "disabled";
dmas = <&edma 8>,
<&edma 9>;
dma-names = "tx", "rx";
};
mcasp1: mcasp@4803C000 {
compatible = "ti,am33xx-mcasp-audio";
ti,hwmods = "mcasp1";
ARM: dts: AM33XX: mcasp: Add location for data port registers to reg-property This patch adds a second tuple to reg property. The new property tuple describes the memory location for data port registers mapped trough L3 bus on am33xx. The both property tuples are named accordingly in the reg-names property. Signed-off-by: Hebbar, Gururaja <gururaja.hebbar@ti.com> Signed-off-by: Darren Etheridge <detheridge@ti.com> Signed-off-by: Jyri Sarha <jsarha@ti.com> Signed-off-by: Benoit Cousson <bcousson@baylibre.com>
2013-10-20 17:04:09 +00:00
reg = <0x4803C000 0x2000>,
<0x46400000 0x400000>;
reg-names = "mpu", "dat";
ARM: dts: AM33XX: Add mcasp0 and mcasp1 device tree entries Add missing mcasp entries in the am33xx.dtsi include file. Signed-off-by: Pantelis Antoniou <panto@antoniou-consulting.com> Signed-off-by: Darren Etheridge <detheridge@ti.com> Signed-off-by: Jyri Sarha <jsarha@ti.com> Signed-off-by: Benoit Cousson <bcousson@baylibre.com>
2013-10-20 17:04:08 +00:00
interrupts = <82>, <83>;
dt: Fix binding typos in clock-names and interrupt-names s/interrupts-names/interrupt-names/g s/clocks-names/clock-names/g Some of the binding files and device tree files get this wrong and the kernel won't be able to pick it up. Fix them up now so that they don't get widely used. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by : Patrice Chotard <patrice.chotard@st.com> Signed-off-by: Grant Likely <grant.likely@linaro.org>
2014-04-22 18:40:25 +00:00
interrupt-names = "tx", "rx";
ARM: dts: AM33XX: Add mcasp0 and mcasp1 device tree entries Add missing mcasp entries in the am33xx.dtsi include file. Signed-off-by: Pantelis Antoniou <panto@antoniou-consulting.com> Signed-off-by: Darren Etheridge <detheridge@ti.com> Signed-off-by: Jyri Sarha <jsarha@ti.com> Signed-off-by: Benoit Cousson <bcousson@baylibre.com>
2013-10-20 17:04:08 +00:00
status = "disabled";
dmas = <&edma 10>,
<&edma 11>;
dma-names = "tx", "rx";
};
ARM: dts: AM33xx: Add RNG node Add the AM33xx RNG module's device tree data. Also add Documentation file describing the data for the RNG module. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2013-08-29 12:52:09 +00:00
rng: rng@48310000 {
compatible = "ti,omap4-rng";
ti,hwmods = "rng";
reg = <0x48310000 0x2000>;
interrupts = <111>;
};
arm/dts: Add initial DT support for AM33XX SoC family Add device tree source include file for the AM33XX SoC family. An additional .dtsi file is created to describe the generic AM33XX CPU module like intc, ocp. Actual selection of available peripherals is handled in seperate .dts files using this am33xx.dtsi generic header file. Signed-off-by: AnilKumar Ch <anilkumar@ti.com> Reviewed-by: Vaibhav Hiremath <hvaibhav@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2012-06-22 09:40:48 +00:00
};
};
ARM: dts: am33xx clock data This patch creates a unique node for each clock in the AM33xx power, reset and clock manager (PRCM). Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-07-18 15:15:35 +00:00
/include/ "am33xx-clocks.dtsi"
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