2019-04-07 21:12:23 +00:00
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// SPDX-License-Identifier: GPL-2.0+
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2009-09-22 23:46:26 +00:00
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/*
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* Freescale STMP37XX/STMP378X Real Time Clock driver
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*
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* Copyright (c) 2007 Sigmatel, Inc.
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* Peter Hartley, <peter.hartley@sigmatel.com>
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*
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* Copyright 2008 Freescale Semiconductor, Inc. All Rights Reserved.
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* Copyright 2008 Embedded Alley Solutions, Inc All Rights Reserved.
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2011-05-25 10:56:53 +00:00
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* Copyright 2011 Wolfram Sang, Pengutronix e.K.
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2009-09-22 23:46:26 +00:00
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*/
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#include <linux/kernel.h>
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#include <linux/module.h>
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2011-05-25 10:56:52 +00:00
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#include <linux/io.h>
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2009-09-22 23:46:26 +00:00
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#include <linux/init.h>
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#include <linux/platform_device.h>
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#include <linux/interrupt.h>
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2013-08-13 23:00:56 +00:00
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#include <linux/delay.h>
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2009-09-22 23:46:26 +00:00
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#include <linux/rtc.h>
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include cleanup: Update gfp.h and slab.h includes to prepare for breaking implicit slab.h inclusion from percpu.h
percpu.h is included by sched.h and module.h and thus ends up being
included when building most .c files. percpu.h includes slab.h which
in turn includes gfp.h making everything defined by the two files
universally available and complicating inclusion dependencies.
percpu.h -> slab.h dependency is about to be removed. Prepare for
this change by updating users of gfp and slab facilities include those
headers directly instead of assuming availability. As this conversion
needs to touch large number of source files, the following script is
used as the basis of conversion.
http://userweb.kernel.org/~tj/misc/slabh-sweep.py
The script does the followings.
* Scan files for gfp and slab usages and update includes such that
only the necessary includes are there. ie. if only gfp is used,
gfp.h, if slab is used, slab.h.
* When the script inserts a new include, it looks at the include
blocks and try to put the new include such that its order conforms
to its surrounding. It's put in the include block which contains
core kernel includes, in the same order that the rest are ordered -
alphabetical, Christmas tree, rev-Xmas-tree or at the end if there
doesn't seem to be any matching order.
* If the script can't find a place to put a new include (mostly
because the file doesn't have fitting include block), it prints out
an error message indicating which .h file needs to be added to the
file.
The conversion was done in the following steps.
1. The initial automatic conversion of all .c files updated slightly
over 4000 files, deleting around 700 includes and adding ~480 gfp.h
and ~3000 slab.h inclusions. The script emitted errors for ~400
files.
2. Each error was manually checked. Some didn't need the inclusion,
some needed manual addition while adding it to implementation .h or
embedding .c file was more appropriate for others. This step added
inclusions to around 150 files.
3. The script was run again and the output was compared to the edits
from #2 to make sure no file was left behind.
4. Several build tests were done and a couple of problems were fixed.
e.g. lib/decompress_*.c used malloc/free() wrappers around slab
APIs requiring slab.h to be added manually.
5. The script was run on all .h files but without automatically
editing them as sprinkling gfp.h and slab.h inclusions around .h
files could easily lead to inclusion dependency hell. Most gfp.h
inclusion directives were ignored as stuff from gfp.h was usually
wildly available and often used in preprocessor macros. Each
slab.h inclusion directive was examined and added manually as
necessary.
6. percpu.h was updated not to include slab.h.
7. Build test were done on the following configurations and failures
were fixed. CONFIG_GCOV_KERNEL was turned off for all tests (as my
distributed build env didn't work with gcov compiles) and a few
more options had to be turned off depending on archs to make things
build (like ipr on powerpc/64 which failed due to missing writeq).
* x86 and x86_64 UP and SMP allmodconfig and a custom test config.
* powerpc and powerpc64 SMP allmodconfig
* sparc and sparc64 SMP allmodconfig
* ia64 SMP allmodconfig
* s390 SMP allmodconfig
* alpha SMP allmodconfig
* um on x86_64 SMP allmodconfig
8. percpu.h modifications were reverted so that it could be applied as
a separate patch and serve as bisection point.
Given the fact that I had only a couple of failures from tests on step
6, I'm fairly confident about the coverage of this conversion patch.
If there is a breakage, it's likely to be something in one of the arch
headers which should be easily discoverable easily on most builds of
the specific arch.
Signed-off-by: Tejun Heo <tj@kernel.org>
Guess-its-ok-by: Christoph Lameter <cl@linux-foundation.org>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: Lee Schermerhorn <Lee.Schermerhorn@hp.com>
2010-03-24 08:04:11 +00:00
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#include <linux/slab.h>
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2012-06-26 08:29:27 +00:00
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#include <linux/of_device.h>
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2013-02-22 00:44:28 +00:00
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#include <linux/of.h>
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2011-09-27 20:21:37 +00:00
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#include <linux/stmp_device.h>
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#include <linux/stmp3xxx_rtc_wdt.h>
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2009-09-22 23:46:26 +00:00
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2011-05-25 10:56:49 +00:00
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#define STMP3XXX_RTC_CTRL 0x0
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#define STMP3XXX_RTC_CTRL_ALARM_IRQ_EN 0x00000001
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#define STMP3XXX_RTC_CTRL_ONEMSEC_IRQ_EN 0x00000002
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#define STMP3XXX_RTC_CTRL_ALARM_IRQ 0x00000004
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2011-09-27 20:21:37 +00:00
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#define STMP3XXX_RTC_CTRL_WATCHDOGEN 0x00000010
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2011-05-25 10:56:49 +00:00
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#define STMP3XXX_RTC_STAT 0x10
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#define STMP3XXX_RTC_STAT_STALE_SHIFT 16
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#define STMP3XXX_RTC_STAT_RTC_PRESENT 0x80000000
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2015-04-16 19:45:04 +00:00
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#define STMP3XXX_RTC_STAT_XTAL32000_PRESENT 0x10000000
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#define STMP3XXX_RTC_STAT_XTAL32768_PRESENT 0x08000000
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2011-05-25 10:56:49 +00:00
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#define STMP3XXX_RTC_SECONDS 0x30
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#define STMP3XXX_RTC_ALARM 0x40
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2011-09-27 20:21:37 +00:00
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#define STMP3XXX_RTC_WATCHDOG 0x50
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2011-05-25 10:56:49 +00:00
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#define STMP3XXX_RTC_PERSISTENT0 0x60
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2015-04-16 19:45:04 +00:00
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#define STMP3XXX_RTC_PERSISTENT0_CLOCKSOURCE (1 << 0)
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#define STMP3XXX_RTC_PERSISTENT0_ALARM_WAKE_EN (1 << 1)
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#define STMP3XXX_RTC_PERSISTENT0_ALARM_EN (1 << 2)
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#define STMP3XXX_RTC_PERSISTENT0_XTAL24MHZ_PWRUP (1 << 4)
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#define STMP3XXX_RTC_PERSISTENT0_XTAL32KHZ_PWRUP (1 << 5)
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#define STMP3XXX_RTC_PERSISTENT0_XTAL32_FREQ (1 << 6)
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#define STMP3XXX_RTC_PERSISTENT0_ALARM_WAKE (1 << 7)
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2009-09-22 23:46:26 +00:00
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2011-09-27 20:21:37 +00:00
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#define STMP3XXX_RTC_PERSISTENT1 0x70
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/* missing bitmask in headers */
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#define STMP3XXX_RTC_PERSISTENT1_FORCE_UPDATER 0x80000000
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2009-09-22 23:46:26 +00:00
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struct stmp3xxx_rtc_data {
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struct rtc_device *rtc;
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void __iomem *io;
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2011-05-25 10:56:53 +00:00
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int irq_alarm;
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2009-09-22 23:46:26 +00:00
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};
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2011-09-27 20:21:37 +00:00
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#if IS_ENABLED(CONFIG_STMP3XXX_RTC_WATCHDOG)
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/**
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* stmp3xxx_wdt_set_timeout - configure the watchdog inside the STMP3xxx RTC
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* @dev: the parent device of the watchdog (= the RTC)
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* @timeout: the desired value for the timeout register of the watchdog.
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* 0 disables the watchdog
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*
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* The watchdog needs one register and two bits which are in the RTC domain.
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* To handle the resource conflict, the RTC driver will create another
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* platform_device for the watchdog driver as a child of the RTC device.
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* The watchdog driver is passed the below accessor function via platform_data
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* to configure the watchdog. Locking is not needed because accessing SET/CLR
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* registers is atomic.
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*/
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static void stmp3xxx_wdt_set_timeout(struct device *dev, u32 timeout)
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{
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struct stmp3xxx_rtc_data *rtc_data = dev_get_drvdata(dev);
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if (timeout) {
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writel(timeout, rtc_data->io + STMP3XXX_RTC_WATCHDOG);
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writel(STMP3XXX_RTC_CTRL_WATCHDOGEN,
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rtc_data->io + STMP3XXX_RTC_CTRL + STMP_OFFSET_REG_SET);
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writel(STMP3XXX_RTC_PERSISTENT1_FORCE_UPDATER,
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rtc_data->io + STMP3XXX_RTC_PERSISTENT1 + STMP_OFFSET_REG_SET);
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} else {
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writel(STMP3XXX_RTC_CTRL_WATCHDOGEN,
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rtc_data->io + STMP3XXX_RTC_CTRL + STMP_OFFSET_REG_CLR);
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writel(STMP3XXX_RTC_PERSISTENT1_FORCE_UPDATER,
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rtc_data->io + STMP3XXX_RTC_PERSISTENT1 + STMP_OFFSET_REG_CLR);
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}
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}
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static struct stmp3xxx_wdt_pdata wdt_pdata = {
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.wdt_set_timeout = stmp3xxx_wdt_set_timeout,
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};
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static void stmp3xxx_wdt_register(struct platform_device *rtc_pdev)
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{
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2016-04-30 19:11:30 +00:00
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int rc = -1;
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2011-09-27 20:21:37 +00:00
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struct platform_device *wdt_pdev =
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platform_device_alloc("stmp3xxx_rtc_wdt", rtc_pdev->id);
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if (wdt_pdev) {
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wdt_pdev->dev.parent = &rtc_pdev->dev;
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wdt_pdev->dev.platform_data = &wdt_pdata;
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2016-04-30 19:11:30 +00:00
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rc = platform_device_add(wdt_pdev);
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2011-09-27 20:21:37 +00:00
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}
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2016-04-30 19:11:30 +00:00
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if (rc)
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dev_err(&rtc_pdev->dev,
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"failed to register stmp3xxx_rtc_wdt\n");
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2011-09-27 20:21:37 +00:00
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}
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#else
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static void stmp3xxx_wdt_register(struct platform_device *rtc_pdev)
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{
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}
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#endif /* CONFIG_STMP3XXX_RTC_WATCHDOG */
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2013-08-13 23:00:56 +00:00
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static int stmp3xxx_wait_time(struct stmp3xxx_rtc_data *rtc_data)
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2009-09-22 23:46:26 +00:00
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{
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2013-08-13 23:00:56 +00:00
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int timeout = 5000; /* 3ms according to i.MX28 Ref Manual */
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2009-09-22 23:46:26 +00:00
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/*
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2013-08-13 23:00:56 +00:00
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* The i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
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* states:
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* | The order in which registers are updated is
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* | Persistent 0, 1, 2, 3, 4, 5, Alarm, Seconds.
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* | (This list is in bitfield order, from LSB to MSB, as they would
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* | appear in the STALE_REGS and NEW_REGS bitfields of the HW_RTC_STAT
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* | register. For example, the Seconds register corresponds to
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* | STALE_REGS or NEW_REGS containing 0x80.)
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2009-09-22 23:46:26 +00:00
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*/
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2013-08-13 23:00:56 +00:00
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do {
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if (!(readl(rtc_data->io + STMP3XXX_RTC_STAT) &
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(0x80 << STMP3XXX_RTC_STAT_STALE_SHIFT)))
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return 0;
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udelay(1);
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} while (--timeout > 0);
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return (readl(rtc_data->io + STMP3XXX_RTC_STAT) &
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(0x80 << STMP3XXX_RTC_STAT_STALE_SHIFT)) ? -ETIME : 0;
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2009-09-22 23:46:26 +00:00
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}
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/* Time read/write */
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static int stmp3xxx_rtc_gettime(struct device *dev, struct rtc_time *rtc_tm)
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{
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2013-08-13 23:00:56 +00:00
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int ret;
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2009-09-22 23:46:26 +00:00
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struct stmp3xxx_rtc_data *rtc_data = dev_get_drvdata(dev);
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2013-08-13 23:00:56 +00:00
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ret = stmp3xxx_wait_time(rtc_data);
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if (ret)
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return ret;
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2019-04-07 21:12:21 +00:00
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rtc_time64_to_tm(readl(rtc_data->io + STMP3XXX_RTC_SECONDS), rtc_tm);
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2009-09-22 23:46:26 +00:00
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return 0;
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}
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2019-04-07 21:12:22 +00:00
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static int stmp3xxx_rtc_settime(struct device *dev, struct rtc_time *rtc_tm)
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2009-09-22 23:46:26 +00:00
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{
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struct stmp3xxx_rtc_data *rtc_data = dev_get_drvdata(dev);
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2019-04-07 21:12:22 +00:00
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writel(rtc_tm_to_time64(rtc_tm), rtc_data->io + STMP3XXX_RTC_SECONDS);
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2013-08-13 23:00:56 +00:00
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return stmp3xxx_wait_time(rtc_data);
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2009-09-22 23:46:26 +00:00
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}
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/* interrupt(s) handler */
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static irqreturn_t stmp3xxx_rtc_interrupt(int irq, void *dev_id)
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{
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struct stmp3xxx_rtc_data *rtc_data = dev_get_drvdata(dev_id);
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2011-05-25 10:56:53 +00:00
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u32 status = readl(rtc_data->io + STMP3XXX_RTC_CTRL);
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2009-09-22 23:46:26 +00:00
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2011-05-25 10:56:49 +00:00
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if (status & STMP3XXX_RTC_CTRL_ALARM_IRQ) {
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2011-05-25 10:56:52 +00:00
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writel(STMP3XXX_RTC_CTRL_ALARM_IRQ,
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2015-10-02 20:18:01 +00:00
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rtc_data->io + STMP3XXX_RTC_CTRL + STMP_OFFSET_REG_CLR);
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2011-05-25 10:56:53 +00:00
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rtc_update_irq(rtc_data->rtc, 1, RTC_AF | RTC_IRQF);
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return IRQ_HANDLED;
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2009-09-22 23:46:26 +00:00
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}
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2011-05-25 10:56:53 +00:00
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return IRQ_NONE;
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2009-09-22 23:46:26 +00:00
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}
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static int stmp3xxx_alarm_irq_enable(struct device *dev, unsigned int enabled)
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{
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struct stmp3xxx_rtc_data *rtc_data = dev_get_drvdata(dev);
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if (enabled) {
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2011-05-25 10:56:52 +00:00
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writel(STMP3XXX_RTC_PERSISTENT0_ALARM_EN |
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STMP3XXX_RTC_PERSISTENT0_ALARM_WAKE_EN,
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2015-10-02 20:18:01 +00:00
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rtc_data->io + STMP3XXX_RTC_PERSISTENT0 +
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STMP_OFFSET_REG_SET);
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2011-05-25 10:56:52 +00:00
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writel(STMP3XXX_RTC_CTRL_ALARM_IRQ_EN,
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2015-10-02 20:18:01 +00:00
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rtc_data->io + STMP3XXX_RTC_CTRL + STMP_OFFSET_REG_SET);
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2009-09-22 23:46:26 +00:00
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} else {
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2011-05-25 10:56:52 +00:00
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writel(STMP3XXX_RTC_PERSISTENT0_ALARM_EN |
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STMP3XXX_RTC_PERSISTENT0_ALARM_WAKE_EN,
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2015-10-02 20:18:01 +00:00
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rtc_data->io + STMP3XXX_RTC_PERSISTENT0 +
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STMP_OFFSET_REG_CLR);
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2011-05-25 10:56:52 +00:00
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writel(STMP3XXX_RTC_CTRL_ALARM_IRQ_EN,
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2015-10-02 20:18:01 +00:00
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rtc_data->io + STMP3XXX_RTC_CTRL + STMP_OFFSET_REG_CLR);
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2009-09-22 23:46:26 +00:00
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}
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return 0;
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}
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static int stmp3xxx_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alm)
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{
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struct stmp3xxx_rtc_data *rtc_data = dev_get_drvdata(dev);
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2019-04-07 21:12:21 +00:00
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rtc_time64_to_tm(readl(rtc_data->io + STMP3XXX_RTC_ALARM), &alm->time);
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2009-09-22 23:46:26 +00:00
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return 0;
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}
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static int stmp3xxx_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alm)
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{
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struct stmp3xxx_rtc_data *rtc_data = dev_get_drvdata(dev);
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2019-04-07 21:12:21 +00:00
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writel(rtc_tm_to_time64(&alm->time), rtc_data->io + STMP3XXX_RTC_ALARM);
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2011-05-25 10:56:53 +00:00
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stmp3xxx_alarm_irq_enable(dev, alm->enabled);
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2009-09-22 23:46:26 +00:00
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return 0;
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}
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rtc: constify rtc_class_ops structures
Check for rtc_class_ops structures that are only passed to
devm_rtc_device_register, rtc_device_register,
platform_device_register_data, all of which declare the corresponding
parameter as const. Declare rtc_class_ops structures that have these
properties as const.
The semantic patch that makes this change is as follows:
(http://coccinelle.lip6.fr/)
// <smpl>
@r disable optional_qualifier@
identifier i;
position p;
@@
static struct rtc_class_ops i@p = { ... };
@ok@
identifier r.i;
expression e1,e2,e3,e4;
position p;
@@
(
devm_rtc_device_register(e1,e2,&i@p,e3)
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rtc_device_register(e1,e2,&i@p,e3)
|
platform_device_register_data(e1,e2,e3,&i@p,e4)
)
@bad@
position p != {r.p,ok.p};
identifier r.i;
@@
i@p
@depends on !bad disable optional_qualifier@
identifier r.i;
@@
static
+const
struct rtc_class_ops i = { ... };
// </smpl>
Signed-off-by: Julia Lawall <Julia.Lawall@lip6.fr>
Acked-by: Baruch Siach <baruch@tkos.co.il>
Acked-by: Hans Ulli Kroll <ulli.kroll@googlemail.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
2016-08-31 08:05:25 +00:00
|
|
|
static const struct rtc_class_ops stmp3xxx_rtc_ops = {
|
2009-09-22 23:46:26 +00:00
|
|
|
.alarm_irq_enable =
|
|
|
|
stmp3xxx_alarm_irq_enable,
|
|
|
|
.read_time = stmp3xxx_rtc_gettime,
|
2019-04-07 21:12:22 +00:00
|
|
|
.set_time = stmp3xxx_rtc_settime,
|
2009-09-22 23:46:26 +00:00
|
|
|
.read_alarm = stmp3xxx_rtc_read_alarm,
|
|
|
|
.set_alarm = stmp3xxx_rtc_set_alarm,
|
|
|
|
};
|
|
|
|
|
|
|
|
static int stmp3xxx_rtc_remove(struct platform_device *pdev)
|
|
|
|
{
|
|
|
|
struct stmp3xxx_rtc_data *rtc_data = platform_get_drvdata(pdev);
|
|
|
|
|
|
|
|
if (!rtc_data)
|
|
|
|
return 0;
|
|
|
|
|
2011-05-25 10:56:53 +00:00
|
|
|
writel(STMP3XXX_RTC_CTRL_ALARM_IRQ_EN,
|
2015-10-02 20:18:01 +00:00
|
|
|
rtc_data->io + STMP3XXX_RTC_CTRL + STMP_OFFSET_REG_CLR);
|
2009-09-22 23:46:26 +00:00
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int stmp3xxx_rtc_probe(struct platform_device *pdev)
|
|
|
|
{
|
|
|
|
struct stmp3xxx_rtc_data *rtc_data;
|
|
|
|
struct resource *r;
|
2015-04-16 19:45:04 +00:00
|
|
|
u32 rtc_stat;
|
|
|
|
u32 pers0_set, pers0_clr;
|
|
|
|
u32 crystalfreq = 0;
|
2009-09-22 23:46:26 +00:00
|
|
|
int err;
|
|
|
|
|
2013-04-29 23:20:55 +00:00
|
|
|
rtc_data = devm_kzalloc(&pdev->dev, sizeof(*rtc_data), GFP_KERNEL);
|
2009-09-22 23:46:26 +00:00
|
|
|
if (!rtc_data)
|
|
|
|
return -ENOMEM;
|
|
|
|
|
|
|
|
r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
|
|
|
if (!r) {
|
|
|
|
dev_err(&pdev->dev, "failed to get resource\n");
|
2013-04-29 23:20:55 +00:00
|
|
|
return -ENXIO;
|
2009-09-22 23:46:26 +00:00
|
|
|
}
|
|
|
|
|
2013-04-29 23:20:55 +00:00
|
|
|
rtc_data->io = devm_ioremap(&pdev->dev, r->start, resource_size(r));
|
2009-09-22 23:46:26 +00:00
|
|
|
if (!rtc_data->io) {
|
|
|
|
dev_err(&pdev->dev, "ioremap failed\n");
|
2013-04-29 23:20:55 +00:00
|
|
|
return -EIO;
|
2009-09-22 23:46:26 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
rtc_data->irq_alarm = platform_get_irq(pdev, 0);
|
|
|
|
|
2015-04-16 19:45:04 +00:00
|
|
|
rtc_stat = readl(rtc_data->io + STMP3XXX_RTC_STAT);
|
|
|
|
if (!(rtc_stat & STMP3XXX_RTC_STAT_RTC_PRESENT)) {
|
2009-09-22 23:46:26 +00:00
|
|
|
dev_err(&pdev->dev, "no device onboard\n");
|
2013-04-29 23:20:55 +00:00
|
|
|
return -ENODEV;
|
2009-09-22 23:46:26 +00:00
|
|
|
}
|
|
|
|
|
2011-05-25 10:56:51 +00:00
|
|
|
platform_set_drvdata(pdev, rtc_data);
|
|
|
|
|
2018-06-09 06:43:13 +00:00
|
|
|
/*
|
|
|
|
* Resetting the rtc stops the watchdog timer that is potentially
|
|
|
|
* running. So (assuming it is running on purpose) don't reset if the
|
|
|
|
* watchdog is enabled.
|
|
|
|
*/
|
|
|
|
if (readl(rtc_data->io + STMP3XXX_RTC_CTRL) &
|
|
|
|
STMP3XXX_RTC_CTRL_WATCHDOGEN) {
|
|
|
|
dev_info(&pdev->dev,
|
|
|
|
"Watchdog is running, skip resetting rtc\n");
|
|
|
|
} else {
|
|
|
|
err = stmp_reset_block(rtc_data->io);
|
|
|
|
if (err) {
|
|
|
|
dev_err(&pdev->dev, "stmp_reset_block failed: %d\n",
|
|
|
|
err);
|
|
|
|
return err;
|
|
|
|
}
|
2013-07-08 23:00:45 +00:00
|
|
|
}
|
|
|
|
|
2015-04-16 19:45:04 +00:00
|
|
|
/*
|
|
|
|
* Obviously the rtc needs a clock input to be able to run.
|
|
|
|
* This clock can be provided by an external 32k crystal. If that one is
|
|
|
|
* missing XTAL must not be disabled in suspend which consumes a
|
|
|
|
* lot of power. Normally the presence and exact frequency (supported
|
|
|
|
* are 32000 Hz and 32768 Hz) is detectable from fuses, but as reality
|
|
|
|
* proves these fuses are not blown correctly on all machines, so the
|
|
|
|
* frequency can be overridden in the device tree.
|
|
|
|
*/
|
|
|
|
if (rtc_stat & STMP3XXX_RTC_STAT_XTAL32000_PRESENT)
|
|
|
|
crystalfreq = 32000;
|
|
|
|
else if (rtc_stat & STMP3XXX_RTC_STAT_XTAL32768_PRESENT)
|
|
|
|
crystalfreq = 32768;
|
|
|
|
|
|
|
|
of_property_read_u32(pdev->dev.of_node, "stmp,crystal-freq",
|
|
|
|
&crystalfreq);
|
|
|
|
|
|
|
|
switch (crystalfreq) {
|
|
|
|
case 32000:
|
|
|
|
/* keep 32kHz crystal running in low-power mode */
|
|
|
|
pers0_set = STMP3XXX_RTC_PERSISTENT0_XTAL32_FREQ |
|
|
|
|
STMP3XXX_RTC_PERSISTENT0_XTAL32KHZ_PWRUP |
|
|
|
|
STMP3XXX_RTC_PERSISTENT0_CLOCKSOURCE;
|
|
|
|
pers0_clr = STMP3XXX_RTC_PERSISTENT0_XTAL24MHZ_PWRUP;
|
|
|
|
break;
|
|
|
|
case 32768:
|
|
|
|
/* keep 32.768kHz crystal running in low-power mode */
|
|
|
|
pers0_set = STMP3XXX_RTC_PERSISTENT0_XTAL32KHZ_PWRUP |
|
|
|
|
STMP3XXX_RTC_PERSISTENT0_CLOCKSOURCE;
|
|
|
|
pers0_clr = STMP3XXX_RTC_PERSISTENT0_XTAL24MHZ_PWRUP |
|
|
|
|
STMP3XXX_RTC_PERSISTENT0_XTAL32_FREQ;
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
dev_warn(&pdev->dev,
|
|
|
|
"invalid crystal-freq specified in device-tree. Assuming no crystal\n");
|
2020-08-23 22:36:59 +00:00
|
|
|
fallthrough;
|
2015-04-16 19:45:04 +00:00
|
|
|
case 0:
|
|
|
|
/* keep XTAL on in low-power mode */
|
|
|
|
pers0_set = STMP3XXX_RTC_PERSISTENT0_XTAL24MHZ_PWRUP;
|
|
|
|
pers0_clr = STMP3XXX_RTC_PERSISTENT0_XTAL32KHZ_PWRUP |
|
|
|
|
STMP3XXX_RTC_PERSISTENT0_CLOCKSOURCE;
|
|
|
|
}
|
|
|
|
|
2015-10-02 20:18:01 +00:00
|
|
|
writel(pers0_set, rtc_data->io + STMP3XXX_RTC_PERSISTENT0 +
|
|
|
|
STMP_OFFSET_REG_SET);
|
2015-04-16 19:45:04 +00:00
|
|
|
|
2011-05-25 10:56:52 +00:00
|
|
|
writel(STMP3XXX_RTC_PERSISTENT0_ALARM_EN |
|
2011-05-25 10:56:49 +00:00
|
|
|
STMP3XXX_RTC_PERSISTENT0_ALARM_WAKE_EN |
|
2015-04-16 19:45:04 +00:00
|
|
|
STMP3XXX_RTC_PERSISTENT0_ALARM_WAKE | pers0_clr,
|
2015-10-02 20:18:01 +00:00
|
|
|
rtc_data->io + STMP3XXX_RTC_PERSISTENT0 + STMP_OFFSET_REG_CLR);
|
2011-05-25 10:56:51 +00:00
|
|
|
|
2011-05-25 10:56:53 +00:00
|
|
|
writel(STMP3XXX_RTC_CTRL_ONEMSEC_IRQ_EN |
|
|
|
|
STMP3XXX_RTC_CTRL_ALARM_IRQ_EN,
|
2015-10-02 20:18:01 +00:00
|
|
|
rtc_data->io + STMP3XXX_RTC_CTRL + STMP_OFFSET_REG_CLR);
|
2011-05-25 10:56:53 +00:00
|
|
|
|
2019-04-07 21:12:20 +00:00
|
|
|
rtc_data->rtc = devm_rtc_allocate_device(&pdev->dev);
|
2013-07-03 22:06:37 +00:00
|
|
|
if (IS_ERR(rtc_data->rtc))
|
|
|
|
return PTR_ERR(rtc_data->rtc);
|
2009-09-22 23:46:26 +00:00
|
|
|
|
2013-04-29 23:20:55 +00:00
|
|
|
err = devm_request_irq(&pdev->dev, rtc_data->irq_alarm,
|
|
|
|
stmp3xxx_rtc_interrupt, 0, "RTC alarm", &pdev->dev);
|
2009-09-22 23:46:26 +00:00
|
|
|
if (err) {
|
|
|
|
dev_err(&pdev->dev, "Cannot claim IRQ%d\n",
|
|
|
|
rtc_data->irq_alarm);
|
2013-07-03 22:06:37 +00:00
|
|
|
return err;
|
2009-09-22 23:46:26 +00:00
|
|
|
}
|
|
|
|
|
2019-04-07 21:12:20 +00:00
|
|
|
rtc_data->rtc->ops = &stmp3xxx_rtc_ops;
|
|
|
|
rtc_data->rtc->range_max = U32_MAX;
|
|
|
|
|
2020-11-09 16:34:08 +00:00
|
|
|
err = devm_rtc_register_device(rtc_data->rtc);
|
2019-04-07 21:12:20 +00:00
|
|
|
if (err)
|
|
|
|
return err;
|
|
|
|
|
2011-09-27 20:21:37 +00:00
|
|
|
stmp3xxx_wdt_register(pdev);
|
2009-09-22 23:46:26 +00:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2013-04-29 23:21:03 +00:00
|
|
|
#ifdef CONFIG_PM_SLEEP
|
|
|
|
static int stmp3xxx_rtc_suspend(struct device *dev)
|
2009-09-22 23:46:26 +00:00
|
|
|
{
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2013-04-29 23:21:03 +00:00
|
|
|
static int stmp3xxx_rtc_resume(struct device *dev)
|
2009-09-22 23:46:26 +00:00
|
|
|
{
|
2013-04-29 23:21:03 +00:00
|
|
|
struct stmp3xxx_rtc_data *rtc_data = dev_get_drvdata(dev);
|
2009-09-22 23:46:26 +00:00
|
|
|
|
2013-03-28 15:13:14 +00:00
|
|
|
stmp_reset_block(rtc_data->io);
|
2011-05-25 10:56:52 +00:00
|
|
|
writel(STMP3XXX_RTC_PERSISTENT0_ALARM_EN |
|
2011-05-25 10:56:49 +00:00
|
|
|
STMP3XXX_RTC_PERSISTENT0_ALARM_WAKE_EN |
|
|
|
|
STMP3XXX_RTC_PERSISTENT0_ALARM_WAKE,
|
2015-10-02 20:18:01 +00:00
|
|
|
rtc_data->io + STMP3XXX_RTC_PERSISTENT0 + STMP_OFFSET_REG_CLR);
|
2009-09-22 23:46:26 +00:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
2013-04-29 23:21:03 +00:00
|
|
|
static SIMPLE_DEV_PM_OPS(stmp3xxx_rtc_pm_ops, stmp3xxx_rtc_suspend,
|
|
|
|
stmp3xxx_rtc_resume);
|
|
|
|
|
2012-06-26 08:29:27 +00:00
|
|
|
static const struct of_device_id rtc_dt_ids[] = {
|
|
|
|
{ .compatible = "fsl,stmp3xxx-rtc", },
|
|
|
|
{ /* sentinel */ }
|
|
|
|
};
|
|
|
|
MODULE_DEVICE_TABLE(of, rtc_dt_ids);
|
|
|
|
|
2009-09-22 23:46:26 +00:00
|
|
|
static struct platform_driver stmp3xxx_rtcdrv = {
|
|
|
|
.probe = stmp3xxx_rtc_probe,
|
|
|
|
.remove = stmp3xxx_rtc_remove,
|
|
|
|
.driver = {
|
|
|
|
.name = "stmp3xxx-rtc",
|
2013-04-29 23:21:03 +00:00
|
|
|
.pm = &stmp3xxx_rtc_pm_ops,
|
2013-11-12 23:10:58 +00:00
|
|
|
.of_match_table = rtc_dt_ids,
|
2009-09-22 23:46:26 +00:00
|
|
|
},
|
|
|
|
};
|
|
|
|
|
2012-01-10 23:10:48 +00:00
|
|
|
module_platform_driver(stmp3xxx_rtcdrv);
|
2009-09-22 23:46:26 +00:00
|
|
|
|
|
|
|
MODULE_DESCRIPTION("STMP3xxx RTC Driver");
|
2011-05-25 10:56:53 +00:00
|
|
|
MODULE_AUTHOR("dmitry pervushin <dpervushin@embeddedalley.com> and "
|
2020-05-02 14:27:04 +00:00
|
|
|
"Wolfram Sang <kernel@pengutronix.de>");
|
2009-09-22 23:46:26 +00:00
|
|
|
MODULE_LICENSE("GPL");
|