leandrof/linux
1
0
Fork 0
forked from Minki/linux
Code Issues Pull Requests Packages Projects Releases Wiki Activity
351291754d
linux/arch/arm/boot/dts/tegra114.dtsi

537 lines
15 KiB
Plaintext
Raw Normal View History

ARM: tegra114: convert device tree files to use CLK defines Use the Tegra114 CAR binding header (tegra114-car.h) to replace magic numbers in the device tree. For example, - clocks = <&tegra_car 28>; + clocks = <&tegra_car CLK_HOST1X>; Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com> [swarren, updated since tegra20-car.h moved for consistency] Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-05-22 16:45:36 +00:00
#include <dt-bindings/clock/tegra114-car.h>
ARM: tegra: convert device tree files to use GPIO defines Use TEGRA_GPIO() macro to name all GPIOs referenced by GPIO properties, and some interrupts properties. Use standard GPIO flag defines too. Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-02-13 00:25:15 +00:00
#include <dt-bindings/gpio/tegra-gpio.h>
ARM: tegra: convert device tree files to use IRQ defines Use the GIC and standard IRQ binding defines in all IRQ specifiers. Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-02-13 19:51:51 +00:00
#include <dt-bindings/interrupt-controller/arm-gic.h>
ARM: tegra: convert device tree files to use GPIO defines Use TEGRA_GPIO() macro to name all GPIOs referenced by GPIO properties, and some interrupts properties. Use standard GPIO flag defines too. Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-02-13 00:25:15 +00:00
ARM: tegra: use #include for all device trees Replace /include/ (dtc) with #include (C pre-processor) for all Tegra DT files, so that gcc -E handles the entire include tree, and hence any of those files can #include some other file e.g. for constant definitions. This allows future use of #defines and header files in order to define names for various constants, such as the IDs and flags in GPIO specifiers. Use of those features will increase the readability of the device tree files. Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-10-17 22:38:21 +00:00
#include "skeleton.dtsi"
ARM: dt: tegra114: Add new SoC base, Tegra114 SoC Initial support for Tegra 114 SoC. This is expected to be included in the board DTS files, Tegra 114 SoC based evaluation board family. Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-01-24 01:10:23 +00:00
/ {
compatible = "nvidia,tegra114";
interrupt-parent = <&gic>;
ARM: tegra: add aliases and DMA requestor for serial nodes of Tegra114 Add APB DMA requestor and serial aliases for serial controller. There are two serial drivers i.e. 8250 based simple serial driver and APB DMA based serial driver for higher baudrate and performace. The simple serial driver is selected by compatible value "nvidia,tegra114-uart", "nvidia,tegra20-uart", and the APB DMA based driver is selected by compatible value "nvidia,tegra114-hsuart", "nvidia,tegra30-hsuart". Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-03-13 19:49:52 +00:00
aliases {
serial0 = &uarta;
serial1 = &uartb;
serial2 = &uartc;
serial3 = &uartd;
};
ARM: dt: tegra114: Add new SoC base, Tegra114 SoC Initial support for Tegra 114 SoC. This is expected to be included in the board DTS files, Tegra 114 SoC based evaluation board family. Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-01-24 01:10:23 +00:00
gic: interrupt-controller {
compatible = "arm,cortex-a15-gic";
#interrupt-cells = <3>;
interrupt-controller;
reg = <0x50041000 0x1000>,
<0x50042000 0x1000>,
<0x50044000 0x2000>,
<0x50046000 0x2000>;
ARM: tegra: convert device tree files to use IRQ defines Use the GIC and standard IRQ binding defines in all IRQ specifiers. Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-02-13 19:51:51 +00:00
interrupts = <GIC_PPI 9
(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
ARM: dt: tegra114: Add new SoC base, Tegra114 SoC Initial support for Tegra 114 SoC. This is expected to be included in the board DTS files, Tegra 114 SoC based evaluation board family. Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-01-24 01:10:23 +00:00
};
timer@60005000 {
compatible = "nvidia,tegra114-timer", "nvidia,tegra20-timer";
reg = <0x60005000 0x400>;
ARM: tegra: convert device tree files to use IRQ defines Use the GIC and standard IRQ binding defines in all IRQ specifiers. Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-02-13 19:51:51 +00:00
interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>;
ARM: tegra114: convert device tree files to use CLK defines Use the Tegra114 CAR binding header (tegra114-car.h) to replace magic numbers in the device tree. For example, - clocks = <&tegra_car 28>; + clocks = <&tegra_car CLK_HOST1X>; Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com> [swarren, updated since tegra20-car.h moved for consistency] Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-05-22 16:45:36 +00:00
clocks = <&tegra_car TEGRA114_CLK_TIMER>;
ARM: dt: tegra114: Add new SoC base, Tegra114 SoC Initial support for Tegra 114 SoC. This is expected to be included in the board DTS files, Tegra 114 SoC based evaluation board family. Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-01-24 01:10:23 +00:00
};
tegra_car: clock {
ARM: dt: Add references to tegra_car clocks Add references to tegra_car clocks for the basic device nodes. Also remove the clock-frequency property of the serial node as the UART driver can now use the clock framework to obtain the frequency. Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com> Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-04-03 14:40:48 +00:00
compatible = "nvidia,tegra114-car";
ARM: dt: tegra114: Add new SoC base, Tegra114 SoC Initial support for Tegra 114 SoC. This is expected to be included in the board DTS files, Tegra 114 SoC based evaluation board family. Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-01-24 01:10:23 +00:00
reg = <0x60006000 0x1000>;
#clock-cells = <1>;
};
ARM: tegra: add APB DMA nodes to Tegra114 DT NVIDIA's Tegra114 has 32 channels APB DMA controller. Add DT entry for APB DMA controllers and make it compatible with "nvidia,tegra114-apbdma". Tegra114 DMA controller is not compatible with Tegra30/Tegra20 DMA controller driver as in Tegra114, the global pause also clock gate the DMA register and hence it iw not possible to write the DMA register with global pause. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> [swarren: fixed DT node order] Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-03-13 19:49:50 +00:00
apbdma: dma {
compatible = "nvidia,tegra114-apbdma";
reg = <0x6000a000 0x1400>;
ARM: tegra: convert device tree files to use IRQ defines Use the GIC and standard IRQ binding defines in all IRQ specifiers. Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-02-13 19:51:51 +00:00
interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
ARM: tegra114: convert device tree files to use CLK defines Use the Tegra114 CAR binding header (tegra114-car.h) to replace magic numbers in the device tree. For example, - clocks = <&tegra_car 28>; + clocks = <&tegra_car CLK_HOST1X>; Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com> [swarren, updated since tegra20-car.h moved for consistency] Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-05-22 16:45:36 +00:00
clocks = <&tegra_car TEGRA114_CLK_APBDMA>;
ARM: tegra: add APB DMA nodes to Tegra114 DT NVIDIA's Tegra114 has 32 channels APB DMA controller. Add DT entry for APB DMA controllers and make it compatible with "nvidia,tegra114-apbdma". Tegra114 DMA controller is not compatible with Tegra30/Tegra20 DMA controller driver as in Tegra114, the global pause also clock gate the DMA register and hence it iw not possible to write the DMA register with global pause. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> [swarren: fixed DT node order] Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-03-13 19:49:50 +00:00
};
ARM: tegra: add AHB entry to Tegra114 DT Add AHB entry. Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-01-15 08:17:27 +00:00
ahb: ahb {
compatible = "nvidia,tegra114-ahb", "nvidia,tegra30-ahb";
reg = <0x6000c004 0x14c>;
};
ARM: DT: tegra114: add GPIO DT entry Tegra114 has the GPIO controllers with 8 GPIO bank and each bank supports 32 pins. Add DT entry for GPIO controller. Tegra114 GPIO controller is compatible with Tegra30 GPIO controller driver. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-01-29 12:56:18 +00:00
gpio: gpio {
compatible = "nvidia,tegra114-gpio", "nvidia,tegra30-gpio";
reg = <0x6000d000 0x1000>;
ARM: tegra: convert device tree files to use IRQ defines Use the GIC and standard IRQ binding defines in all IRQ specifiers. Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-02-13 19:51:51 +00:00
interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>;
ARM: DT: tegra114: add GPIO DT entry Tegra114 has the GPIO controllers with 8 GPIO bank and each bank supports 32 pins. Add DT entry for GPIO controller. Tegra114 GPIO controller is compatible with Tegra30 GPIO controller driver. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-01-29 12:56:18 +00:00
#gpio-cells = <2>;
gpio-controller;
#interrupt-cells = <2>;
interrupt-controller;
};
ARM: DT: tegra114: add pinmux DT entry Add DT entry for pinmux and drive configuration addresses. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-01-29 12:56:20 +00:00
pinmux: pinmux {
compatible = "nvidia,tegra114-pinmux";
reg = <0x70000868 0x148 /* Pad control registers */
0x70003000 0x40c>; /* Mux registers */
};
ARM: tegra: add aliases and DMA requestor for serial nodes of Tegra114 Add APB DMA requestor and serial aliases for serial controller. There are two serial drivers i.e. 8250 based simple serial driver and APB DMA based serial driver for higher baudrate and performace. The simple serial driver is selected by compatible value "nvidia,tegra114-uart", "nvidia,tegra20-uart", and the APB DMA based driver is selected by compatible value "nvidia,tegra114-hsuart", "nvidia,tegra30-hsuart". Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-03-13 19:49:52 +00:00
/*
* There are two serial driver i.e. 8250 based simple serial
* driver and APB DMA based serial driver for higher baudrate
* and performace. To enable the 8250 based driver, the compatible
* is "nvidia,tegra114-uart", "nvidia,tegra20-uart" and to enable
* the APB DMA based serial driver, the comptible is
* "nvidia,tegra114-hsuart", "nvidia,tegra30-hsuart".
*/
uarta: serial@70006000 {
ARM: dt: tegra114: Add new SoC base, Tegra114 SoC Initial support for Tegra 114 SoC. This is expected to be included in the board DTS files, Tegra 114 SoC based evaluation board family. Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-01-24 01:10:23 +00:00
compatible = "nvidia,tegra114-uart", "nvidia,tegra20-uart";
reg = <0x70006000 0x40>;
reg-shift = <2>;
ARM: tegra: convert device tree files to use IRQ defines Use the GIC and standard IRQ binding defines in all IRQ specifiers. Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-02-13 19:51:51 +00:00
interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
ARM: tegra: add aliases and DMA requestor for serial nodes of Tegra114 Add APB DMA requestor and serial aliases for serial controller. There are two serial drivers i.e. 8250 based simple serial driver and APB DMA based serial driver for higher baudrate and performace. The simple serial driver is selected by compatible value "nvidia,tegra114-uart", "nvidia,tegra20-uart", and the APB DMA based driver is selected by compatible value "nvidia,tegra114-hsuart", "nvidia,tegra30-hsuart". Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-03-13 19:49:52 +00:00
nvidia,dma-request-selector = <&apbdma 8>;
ARM: dt: tegra114: Add new SoC base, Tegra114 SoC Initial support for Tegra 114 SoC. This is expected to be included in the board DTS files, Tegra 114 SoC based evaluation board family. Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-01-24 01:10:23 +00:00
status = "disabled";
ARM: tegra114: convert device tree files to use CLK defines Use the Tegra114 CAR binding header (tegra114-car.h) to replace magic numbers in the device tree. For example, - clocks = <&tegra_car 28>; + clocks = <&tegra_car CLK_HOST1X>; Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com> [swarren, updated since tegra20-car.h moved for consistency] Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-05-22 16:45:36 +00:00
clocks = <&tegra_car TEGRA114_CLK_UARTA>;
ARM: dt: tegra114: Add new SoC base, Tegra114 SoC Initial support for Tegra 114 SoC. This is expected to be included in the board DTS files, Tegra 114 SoC based evaluation board family. Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-01-24 01:10:23 +00:00
};
ARM: tegra: add aliases and DMA requestor for serial nodes of Tegra114 Add APB DMA requestor and serial aliases for serial controller. There are two serial drivers i.e. 8250 based simple serial driver and APB DMA based serial driver for higher baudrate and performace. The simple serial driver is selected by compatible value "nvidia,tegra114-uart", "nvidia,tegra20-uart", and the APB DMA based driver is selected by compatible value "nvidia,tegra114-hsuart", "nvidia,tegra30-hsuart". Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-03-13 19:49:52 +00:00
uartb: serial@70006040 {
ARM: dt: tegra114: Add new SoC base, Tegra114 SoC Initial support for Tegra 114 SoC. This is expected to be included in the board DTS files, Tegra 114 SoC based evaluation board family. Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-01-24 01:10:23 +00:00
compatible = "nvidia,tegra114-uart", "nvidia,tegra20-uart";
reg = <0x70006040 0x40>;
reg-shift = <2>;
ARM: tegra: convert device tree files to use IRQ defines Use the GIC and standard IRQ binding defines in all IRQ specifiers. Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-02-13 19:51:51 +00:00
interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
ARM: tegra: add aliases and DMA requestor for serial nodes of Tegra114 Add APB DMA requestor and serial aliases for serial controller. There are two serial drivers i.e. 8250 based simple serial driver and APB DMA based serial driver for higher baudrate and performace. The simple serial driver is selected by compatible value "nvidia,tegra114-uart", "nvidia,tegra20-uart", and the APB DMA based driver is selected by compatible value "nvidia,tegra114-hsuart", "nvidia,tegra30-hsuart". Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-03-13 19:49:52 +00:00
nvidia,dma-request-selector = <&apbdma 9>;
ARM: dt: tegra114: Add new SoC base, Tegra114 SoC Initial support for Tegra 114 SoC. This is expected to be included in the board DTS files, Tegra 114 SoC based evaluation board family. Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-01-24 01:10:23 +00:00
status = "disabled";
ARM: tegra114: convert device tree files to use CLK defines Use the Tegra114 CAR binding header (tegra114-car.h) to replace magic numbers in the device tree. For example, - clocks = <&tegra_car 28>; + clocks = <&tegra_car CLK_HOST1X>; Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com> [swarren, updated since tegra20-car.h moved for consistency] Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-05-22 16:45:36 +00:00
clocks = <&tegra_car TEGRA114_CLK_UARTB>;
ARM: dt: tegra114: Add new SoC base, Tegra114 SoC Initial support for Tegra 114 SoC. This is expected to be included in the board DTS files, Tegra 114 SoC based evaluation board family. Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-01-24 01:10:23 +00:00
};
ARM: tegra: add aliases and DMA requestor for serial nodes of Tegra114 Add APB DMA requestor and serial aliases for serial controller. There are two serial drivers i.e. 8250 based simple serial driver and APB DMA based serial driver for higher baudrate and performace. The simple serial driver is selected by compatible value "nvidia,tegra114-uart", "nvidia,tegra20-uart", and the APB DMA based driver is selected by compatible value "nvidia,tegra114-hsuart", "nvidia,tegra30-hsuart". Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-03-13 19:49:52 +00:00
uartc: serial@70006200 {
ARM: dt: tegra114: Add new SoC base, Tegra114 SoC Initial support for Tegra 114 SoC. This is expected to be included in the board DTS files, Tegra 114 SoC based evaluation board family. Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-01-24 01:10:23 +00:00
compatible = "nvidia,tegra114-uart", "nvidia,tegra20-uart";
reg = <0x70006200 0x100>;
reg-shift = <2>;
ARM: tegra: convert device tree files to use IRQ defines Use the GIC and standard IRQ binding defines in all IRQ specifiers. Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-02-13 19:51:51 +00:00
interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
ARM: tegra: add aliases and DMA requestor for serial nodes of Tegra114 Add APB DMA requestor and serial aliases for serial controller. There are two serial drivers i.e. 8250 based simple serial driver and APB DMA based serial driver for higher baudrate and performace. The simple serial driver is selected by compatible value "nvidia,tegra114-uart", "nvidia,tegra20-uart", and the APB DMA based driver is selected by compatible value "nvidia,tegra114-hsuart", "nvidia,tegra30-hsuart". Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-03-13 19:49:52 +00:00
nvidia,dma-request-selector = <&apbdma 10>;
ARM: dt: tegra114: Add new SoC base, Tegra114 SoC Initial support for Tegra 114 SoC. This is expected to be included in the board DTS files, Tegra 114 SoC based evaluation board family. Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-01-24 01:10:23 +00:00
status = "disabled";
ARM: tegra114: convert device tree files to use CLK defines Use the Tegra114 CAR binding header (tegra114-car.h) to replace magic numbers in the device tree. For example, - clocks = <&tegra_car 28>; + clocks = <&tegra_car CLK_HOST1X>; Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com> [swarren, updated since tegra20-car.h moved for consistency] Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-05-22 16:45:36 +00:00
clocks = <&tegra_car TEGRA114_CLK_UARTC>;
ARM: dt: tegra114: Add new SoC base, Tegra114 SoC Initial support for Tegra 114 SoC. This is expected to be included in the board DTS files, Tegra 114 SoC based evaluation board family. Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-01-24 01:10:23 +00:00
};
ARM: tegra: add aliases and DMA requestor for serial nodes of Tegra114 Add APB DMA requestor and serial aliases for serial controller. There are two serial drivers i.e. 8250 based simple serial driver and APB DMA based serial driver for higher baudrate and performace. The simple serial driver is selected by compatible value "nvidia,tegra114-uart", "nvidia,tegra20-uart", and the APB DMA based driver is selected by compatible value "nvidia,tegra114-hsuart", "nvidia,tegra30-hsuart". Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-03-13 19:49:52 +00:00
uartd: serial@70006300 {
ARM: dt: tegra114: Add new SoC base, Tegra114 SoC Initial support for Tegra 114 SoC. This is expected to be included in the board DTS files, Tegra 114 SoC based evaluation board family. Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-01-24 01:10:23 +00:00
compatible = "nvidia,tegra114-uart", "nvidia,tegra20-uart";
reg = <0x70006300 0x100>;
reg-shift = <2>;
ARM: tegra: convert device tree files to use IRQ defines Use the GIC and standard IRQ binding defines in all IRQ specifiers. Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-02-13 19:51:51 +00:00
interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>;
ARM: tegra: add aliases and DMA requestor for serial nodes of Tegra114 Add APB DMA requestor and serial aliases for serial controller. There are two serial drivers i.e. 8250 based simple serial driver and APB DMA based serial driver for higher baudrate and performace. The simple serial driver is selected by compatible value "nvidia,tegra114-uart", "nvidia,tegra20-uart", and the APB DMA based driver is selected by compatible value "nvidia,tegra114-hsuart", "nvidia,tegra30-hsuart". Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-03-13 19:49:52 +00:00
nvidia,dma-request-selector = <&apbdma 19>;
ARM: dt: tegra114: Add new SoC base, Tegra114 SoC Initial support for Tegra 114 SoC. This is expected to be included in the board DTS files, Tegra 114 SoC based evaluation board family. Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-01-24 01:10:23 +00:00
status = "disabled";
ARM: tegra114: convert device tree files to use CLK defines Use the Tegra114 CAR binding header (tegra114-car.h) to replace magic numbers in the device tree. For example, - clocks = <&tegra_car 28>; + clocks = <&tegra_car CLK_HOST1X>; Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com> [swarren, updated since tegra20-car.h moved for consistency] Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-05-22 16:45:36 +00:00
clocks = <&tegra_car TEGRA114_CLK_UARTD>;
ARM: dt: tegra114: Add new SoC base, Tegra114 SoC Initial support for Tegra 114 SoC. This is expected to be included in the board DTS files, Tegra 114 SoC based evaluation board family. Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-01-24 01:10:23 +00:00
};
ARM: tegra: add PWM nodes to Tegra114 DT This patch adds a device tree node for the four PWM controllers present on Tegra114. Signed-off-by: Andrew Chew <achew@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-03-12 23:40:50 +00:00
pwm: pwm {
compatible = "nvidia,tegra114-pwm", "nvidia,tegra20-pwm";
reg = <0x7000a000 0x100>;
#pwm-cells = <2>;
ARM: tegra114: convert device tree files to use CLK defines Use the Tegra114 CAR binding header (tegra114-car.h) to replace magic numbers in the device tree. For example, - clocks = <&tegra_car 28>; + clocks = <&tegra_car CLK_HOST1X>; Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com> [swarren, updated since tegra20-car.h moved for consistency] Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-05-22 16:45:36 +00:00
clocks = <&tegra_car TEGRA114_CLK_PWM>;
ARM: tegra: add PWM nodes to Tegra114 DT This patch adds a device tree node for the four PWM controllers present on Tegra114. Signed-off-by: Andrew Chew <achew@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-03-12 23:40:50 +00:00
status = "disabled";
};
ARM: tegra: add I2C nodes to Tegra114 DT NVIDIA's Tegra114 has 5 I2C controllers. These controllers have the following changes which makes incompatible with previous hardware: - Single clock source to I2C controller. - Interrupt support for per packet transfer. Add DT entry for I2C controllers and make it compatible with "nvidia,tegra114-i2c". Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> [swarren: fixed location of status property for consistency] Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-03-13 19:49:51 +00:00
i2c@7000c000 {
compatible = "nvidia,tegra114-i2c";
reg = <0x7000c000 0x100>;
ARM: tegra: convert device tree files to use IRQ defines Use the GIC and standard IRQ binding defines in all IRQ specifiers. Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-02-13 19:51:51 +00:00
interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
ARM: tegra: add I2C nodes to Tegra114 DT NVIDIA's Tegra114 has 5 I2C controllers. These controllers have the following changes which makes incompatible with previous hardware: - Single clock source to I2C controller. - Interrupt support for per packet transfer. Add DT entry for I2C controllers and make it compatible with "nvidia,tegra114-i2c". Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> [swarren: fixed location of status property for consistency] Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-03-13 19:49:51 +00:00
#address-cells = <1>;
#size-cells = <0>;
ARM: tegra114: convert device tree files to use CLK defines Use the Tegra114 CAR binding header (tegra114-car.h) to replace magic numbers in the device tree. For example, - clocks = <&tegra_car 28>; + clocks = <&tegra_car CLK_HOST1X>; Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com> [swarren, updated since tegra20-car.h moved for consistency] Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-05-22 16:45:36 +00:00
clocks = <&tegra_car TEGRA114_CLK_I2C1>;
ARM: tegra: add I2C nodes to Tegra114 DT NVIDIA's Tegra114 has 5 I2C controllers. These controllers have the following changes which makes incompatible with previous hardware: - Single clock source to I2C controller. - Interrupt support for per packet transfer. Add DT entry for I2C controllers and make it compatible with "nvidia,tegra114-i2c". Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> [swarren: fixed location of status property for consistency] Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-03-13 19:49:51 +00:00
clock-names = "div-clk";
status = "disabled";
};
i2c@7000c400 {
compatible = "nvidia,tegra114-i2c";
reg = <0x7000c400 0x100>;
ARM: tegra: convert device tree files to use IRQ defines Use the GIC and standard IRQ binding defines in all IRQ specifiers. Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-02-13 19:51:51 +00:00
interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
ARM: tegra: add I2C nodes to Tegra114 DT NVIDIA's Tegra114 has 5 I2C controllers. These controllers have the following changes which makes incompatible with previous hardware: - Single clock source to I2C controller. - Interrupt support for per packet transfer. Add DT entry for I2C controllers and make it compatible with "nvidia,tegra114-i2c". Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> [swarren: fixed location of status property for consistency] Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-03-13 19:49:51 +00:00
#address-cells = <1>;
#size-cells = <0>;
ARM: tegra114: convert device tree files to use CLK defines Use the Tegra114 CAR binding header (tegra114-car.h) to replace magic numbers in the device tree. For example, - clocks = <&tegra_car 28>; + clocks = <&tegra_car CLK_HOST1X>; Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com> [swarren, updated since tegra20-car.h moved for consistency] Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-05-22 16:45:36 +00:00
clocks = <&tegra_car TEGRA114_CLK_I2C2>;
ARM: tegra: add I2C nodes to Tegra114 DT NVIDIA's Tegra114 has 5 I2C controllers. These controllers have the following changes which makes incompatible with previous hardware: - Single clock source to I2C controller. - Interrupt support for per packet transfer. Add DT entry for I2C controllers and make it compatible with "nvidia,tegra114-i2c". Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> [swarren: fixed location of status property for consistency] Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-03-13 19:49:51 +00:00
clock-names = "div-clk";
status = "disabled";
};
i2c@7000c500 {
compatible = "nvidia,tegra114-i2c";
reg = <0x7000c500 0x100>;
ARM: tegra: convert device tree files to use IRQ defines Use the GIC and standard IRQ binding defines in all IRQ specifiers. Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-02-13 19:51:51 +00:00
interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>;
ARM: tegra: add I2C nodes to Tegra114 DT NVIDIA's Tegra114 has 5 I2C controllers. These controllers have the following changes which makes incompatible with previous hardware: - Single clock source to I2C controller. - Interrupt support for per packet transfer. Add DT entry for I2C controllers and make it compatible with "nvidia,tegra114-i2c". Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> [swarren: fixed location of status property for consistency] Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-03-13 19:49:51 +00:00
#address-cells = <1>;
#size-cells = <0>;
ARM: tegra114: convert device tree files to use CLK defines Use the Tegra114 CAR binding header (tegra114-car.h) to replace magic numbers in the device tree. For example, - clocks = <&tegra_car 28>; + clocks = <&tegra_car CLK_HOST1X>; Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com> [swarren, updated since tegra20-car.h moved for consistency] Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-05-22 16:45:36 +00:00
clocks = <&tegra_car TEGRA114_CLK_I2C3>;
ARM: tegra: add I2C nodes to Tegra114 DT NVIDIA's Tegra114 has 5 I2C controllers. These controllers have the following changes which makes incompatible with previous hardware: - Single clock source to I2C controller. - Interrupt support for per packet transfer. Add DT entry for I2C controllers and make it compatible with "nvidia,tegra114-i2c". Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> [swarren: fixed location of status property for consistency] Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-03-13 19:49:51 +00:00
clock-names = "div-clk";
status = "disabled";
};
i2c@7000c700 {
compatible = "nvidia,tegra114-i2c";
reg = <0x7000c700 0x100>;
ARM: tegra: convert device tree files to use IRQ defines Use the GIC and standard IRQ binding defines in all IRQ specifiers. Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-02-13 19:51:51 +00:00
interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
ARM: tegra: add I2C nodes to Tegra114 DT NVIDIA's Tegra114 has 5 I2C controllers. These controllers have the following changes which makes incompatible with previous hardware: - Single clock source to I2C controller. - Interrupt support for per packet transfer. Add DT entry for I2C controllers and make it compatible with "nvidia,tegra114-i2c". Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> [swarren: fixed location of status property for consistency] Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-03-13 19:49:51 +00:00
#address-cells = <1>;
#size-cells = <0>;
ARM: tegra114: convert device tree files to use CLK defines Use the Tegra114 CAR binding header (tegra114-car.h) to replace magic numbers in the device tree. For example, - clocks = <&tegra_car 28>; + clocks = <&tegra_car CLK_HOST1X>; Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com> [swarren, updated since tegra20-car.h moved for consistency] Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-05-22 16:45:36 +00:00
clocks = <&tegra_car TEGRA114_CLK_I2C4>;
ARM: tegra: add I2C nodes to Tegra114 DT NVIDIA's Tegra114 has 5 I2C controllers. These controllers have the following changes which makes incompatible with previous hardware: - Single clock source to I2C controller. - Interrupt support for per packet transfer. Add DT entry for I2C controllers and make it compatible with "nvidia,tegra114-i2c". Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> [swarren: fixed location of status property for consistency] Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-03-13 19:49:51 +00:00
clock-names = "div-clk";
status = "disabled";
};
i2c@7000d000 {
compatible = "nvidia,tegra114-i2c";
reg = <0x7000d000 0x100>;
ARM: tegra: convert device tree files to use IRQ defines Use the GIC and standard IRQ binding defines in all IRQ specifiers. Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-02-13 19:51:51 +00:00
interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>;
ARM: tegra: add I2C nodes to Tegra114 DT NVIDIA's Tegra114 has 5 I2C controllers. These controllers have the following changes which makes incompatible with previous hardware: - Single clock source to I2C controller. - Interrupt support for per packet transfer. Add DT entry for I2C controllers and make it compatible with "nvidia,tegra114-i2c". Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> [swarren: fixed location of status property for consistency] Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-03-13 19:49:51 +00:00
#address-cells = <1>;
#size-cells = <0>;
ARM: tegra114: convert device tree files to use CLK defines Use the Tegra114 CAR binding header (tegra114-car.h) to replace magic numbers in the device tree. For example, - clocks = <&tegra_car 28>; + clocks = <&tegra_car CLK_HOST1X>; Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com> [swarren, updated since tegra20-car.h moved for consistency] Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-05-22 16:45:36 +00:00
clocks = <&tegra_car TEGRA114_CLK_I2C5>;
ARM: tegra: add I2C nodes to Tegra114 DT NVIDIA's Tegra114 has 5 I2C controllers. These controllers have the following changes which makes incompatible with previous hardware: - Single clock source to I2C controller. - Interrupt support for per packet transfer. Add DT entry for I2C controllers and make it compatible with "nvidia,tegra114-i2c". Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> [swarren: fixed location of status property for consistency] Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-03-13 19:49:51 +00:00
clock-names = "div-clk";
status = "disabled";
};
ARM: tegra: add SPI nodes to Tegra114 DT NVIDIA's Tegra114 has 6 SPI controllers. These controllers are redesign on T114 with different register interface. Add DT entry for spi controllers and make it compatible with "nvidia,tegra114-spi", since they are a new incompatible design. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> [swarren: fixed reg property for 3rd SPI controller] Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-03-15 18:37:25 +00:00
spi@7000d400 {
compatible = "nvidia,tegra114-spi";
reg = <0x7000d400 0x200>;
ARM: tegra: convert device tree files to use IRQ defines Use the GIC and standard IRQ binding defines in all IRQ specifiers. Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-02-13 19:51:51 +00:00
interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>;
ARM: tegra: add SPI nodes to Tegra114 DT NVIDIA's Tegra114 has 6 SPI controllers. These controllers are redesign on T114 with different register interface. Add DT entry for spi controllers and make it compatible with "nvidia,tegra114-spi", since they are a new incompatible design. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> [swarren: fixed reg property for 3rd SPI controller] Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-03-15 18:37:25 +00:00
nvidia,dma-request-selector = <&apbdma 15>;
#address-cells = <1>;
#size-cells = <0>;
ARM: tegra114: convert device tree files to use CLK defines Use the Tegra114 CAR binding header (tegra114-car.h) to replace magic numbers in the device tree. For example, - clocks = <&tegra_car 28>; + clocks = <&tegra_car CLK_HOST1X>; Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com> [swarren, updated since tegra20-car.h moved for consistency] Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-05-22 16:45:36 +00:00
clocks = <&tegra_car TEGRA114_CLK_SBC1>;
ARM: tegra: add SPI nodes to Tegra114 DT NVIDIA's Tegra114 has 6 SPI controllers. These controllers are redesign on T114 with different register interface. Add DT entry for spi controllers and make it compatible with "nvidia,tegra114-spi", since they are a new incompatible design. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> [swarren: fixed reg property for 3rd SPI controller] Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-03-15 18:37:25 +00:00
clock-names = "spi";
status = "disabled";
};
spi@7000d600 {
compatible = "nvidia,tegra114-spi";
reg = <0x7000d600 0x200>;
ARM: tegra: convert device tree files to use IRQ defines Use the GIC and standard IRQ binding defines in all IRQ specifiers. Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-02-13 19:51:51 +00:00
interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
ARM: tegra: add SPI nodes to Tegra114 DT NVIDIA's Tegra114 has 6 SPI controllers. These controllers are redesign on T114 with different register interface. Add DT entry for spi controllers and make it compatible with "nvidia,tegra114-spi", since they are a new incompatible design. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> [swarren: fixed reg property for 3rd SPI controller] Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-03-15 18:37:25 +00:00
nvidia,dma-request-selector = <&apbdma 16>;
#address-cells = <1>;
#size-cells = <0>;
ARM: tegra114: convert device tree files to use CLK defines Use the Tegra114 CAR binding header (tegra114-car.h) to replace magic numbers in the device tree. For example, - clocks = <&tegra_car 28>; + clocks = <&tegra_car CLK_HOST1X>; Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com> [swarren, updated since tegra20-car.h moved for consistency] Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-05-22 16:45:36 +00:00
clocks = <&tegra_car TEGRA114_CLK_SBC2>;
ARM: tegra: add SPI nodes to Tegra114 DT NVIDIA's Tegra114 has 6 SPI controllers. These controllers are redesign on T114 with different register interface. Add DT entry for spi controllers and make it compatible with "nvidia,tegra114-spi", since they are a new incompatible design. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> [swarren: fixed reg property for 3rd SPI controller] Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-03-15 18:37:25 +00:00
clock-names = "spi";
status = "disabled";
};
spi@7000d800 {
compatible = "nvidia,tegra114-spi";
reg = <0x7000d800 0x200>;
ARM: tegra: convert device tree files to use IRQ defines Use the GIC and standard IRQ binding defines in all IRQ specifiers. Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-02-13 19:51:51 +00:00
interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
ARM: tegra: add SPI nodes to Tegra114 DT NVIDIA's Tegra114 has 6 SPI controllers. These controllers are redesign on T114 with different register interface. Add DT entry for spi controllers and make it compatible with "nvidia,tegra114-spi", since they are a new incompatible design. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> [swarren: fixed reg property for 3rd SPI controller] Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-03-15 18:37:25 +00:00
nvidia,dma-request-selector = <&apbdma 17>;
#address-cells = <1>;
#size-cells = <0>;
ARM: tegra114: convert device tree files to use CLK defines Use the Tegra114 CAR binding header (tegra114-car.h) to replace magic numbers in the device tree. For example, - clocks = <&tegra_car 28>; + clocks = <&tegra_car CLK_HOST1X>; Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com> [swarren, updated since tegra20-car.h moved for consistency] Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-05-22 16:45:36 +00:00
clocks = <&tegra_car TEGRA114_CLK_SBC3>;
ARM: tegra: add SPI nodes to Tegra114 DT NVIDIA's Tegra114 has 6 SPI controllers. These controllers are redesign on T114 with different register interface. Add DT entry for spi controllers and make it compatible with "nvidia,tegra114-spi", since they are a new incompatible design. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> [swarren: fixed reg property for 3rd SPI controller] Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-03-15 18:37:25 +00:00
clock-names = "spi";
status = "disabled";
};
spi@7000da00 {
compatible = "nvidia,tegra114-spi";
reg = <0x7000da00 0x200>;
ARM: tegra: convert device tree files to use IRQ defines Use the GIC and standard IRQ binding defines in all IRQ specifiers. Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-02-13 19:51:51 +00:00
interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
ARM: tegra: add SPI nodes to Tegra114 DT NVIDIA's Tegra114 has 6 SPI controllers. These controllers are redesign on T114 with different register interface. Add DT entry for spi controllers and make it compatible with "nvidia,tegra114-spi", since they are a new incompatible design. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> [swarren: fixed reg property for 3rd SPI controller] Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-03-15 18:37:25 +00:00
nvidia,dma-request-selector = <&apbdma 18>;
#address-cells = <1>;
#size-cells = <0>;
ARM: tegra114: convert device tree files to use CLK defines Use the Tegra114 CAR binding header (tegra114-car.h) to replace magic numbers in the device tree. For example, - clocks = <&tegra_car 28>; + clocks = <&tegra_car CLK_HOST1X>; Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com> [swarren, updated since tegra20-car.h moved for consistency] Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-05-22 16:45:36 +00:00
clocks = <&tegra_car TEGRA114_CLK_SBC4>;
ARM: tegra: add SPI nodes to Tegra114 DT NVIDIA's Tegra114 has 6 SPI controllers. These controllers are redesign on T114 with different register interface. Add DT entry for spi controllers and make it compatible with "nvidia,tegra114-spi", since they are a new incompatible design. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> [swarren: fixed reg property for 3rd SPI controller] Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-03-15 18:37:25 +00:00
clock-names = "spi";
status = "disabled";
};
spi@7000dc00 {
compatible = "nvidia,tegra114-spi";
reg = <0x7000dc00 0x200>;
ARM: tegra: convert device tree files to use IRQ defines Use the GIC and standard IRQ binding defines in all IRQ specifiers. Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-02-13 19:51:51 +00:00
interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>;
ARM: tegra: add SPI nodes to Tegra114 DT NVIDIA's Tegra114 has 6 SPI controllers. These controllers are redesign on T114 with different register interface. Add DT entry for spi controllers and make it compatible with "nvidia,tegra114-spi", since they are a new incompatible design. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> [swarren: fixed reg property for 3rd SPI controller] Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-03-15 18:37:25 +00:00
nvidia,dma-request-selector = <&apbdma 27>;
#address-cells = <1>;
#size-cells = <0>;
ARM: tegra114: convert device tree files to use CLK defines Use the Tegra114 CAR binding header (tegra114-car.h) to replace magic numbers in the device tree. For example, - clocks = <&tegra_car 28>; + clocks = <&tegra_car CLK_HOST1X>; Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com> [swarren, updated since tegra20-car.h moved for consistency] Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-05-22 16:45:36 +00:00
clocks = <&tegra_car TEGRA114_CLK_SBC5>;
ARM: tegra: add SPI nodes to Tegra114 DT NVIDIA's Tegra114 has 6 SPI controllers. These controllers are redesign on T114 with different register interface. Add DT entry for spi controllers and make it compatible with "nvidia,tegra114-spi", since they are a new incompatible design. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> [swarren: fixed reg property for 3rd SPI controller] Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-03-15 18:37:25 +00:00
clock-names = "spi";
status = "disabled";
};
spi@7000de00 {
compatible = "nvidia,tegra114-spi";
reg = <0x7000de00 0x200>;
ARM: tegra: convert device tree files to use IRQ defines Use the GIC and standard IRQ binding defines in all IRQ specifiers. Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-02-13 19:51:51 +00:00
interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
ARM: tegra: add SPI nodes to Tegra114 DT NVIDIA's Tegra114 has 6 SPI controllers. These controllers are redesign on T114 with different register interface. Add DT entry for spi controllers and make it compatible with "nvidia,tegra114-spi", since they are a new incompatible design. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> [swarren: fixed reg property for 3rd SPI controller] Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-03-15 18:37:25 +00:00
nvidia,dma-request-selector = <&apbdma 28>;
#address-cells = <1>;
#size-cells = <0>;
ARM: tegra114: convert device tree files to use CLK defines Use the Tegra114 CAR binding header (tegra114-car.h) to replace magic numbers in the device tree. For example, - clocks = <&tegra_car 28>; + clocks = <&tegra_car CLK_HOST1X>; Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com> [swarren, updated since tegra20-car.h moved for consistency] Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-05-22 16:45:36 +00:00
clocks = <&tegra_car TEGRA114_CLK_SBC6>;
ARM: tegra: add SPI nodes to Tegra114 DT NVIDIA's Tegra114 has 6 SPI controllers. These controllers are redesign on T114 with different register interface. Add DT entry for spi controllers and make it compatible with "nvidia,tegra114-spi", since they are a new incompatible design. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> [swarren: fixed reg property for 3rd SPI controller] Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-03-15 18:37:25 +00:00
clock-names = "spi";
status = "disabled";
};
ARM: dt: tegra114: Add new SoC base, Tegra114 SoC Initial support for Tegra 114 SoC. This is expected to be included in the board DTS files, Tegra 114 SoC based evaluation board family. Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-01-24 01:10:23 +00:00
rtc {
compatible = "nvidia,tegra114-rtc", "nvidia,tegra20-rtc";
reg = <0x7000e000 0x100>;
ARM: tegra: convert device tree files to use IRQ defines Use the GIC and standard IRQ binding defines in all IRQ specifiers. Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-02-13 19:51:51 +00:00
interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
ARM: tegra114: convert device tree files to use CLK defines Use the Tegra114 CAR binding header (tegra114-car.h) to replace magic numbers in the device tree. For example, - clocks = <&tegra_car 28>; + clocks = <&tegra_car CLK_HOST1X>; Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com> [swarren, updated since tegra20-car.h moved for consistency] Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-05-22 16:45:36 +00:00
clocks = <&tegra_car TEGRA114_CLK_RTC>;
ARM: dt: tegra114: Add new SoC base, Tegra114 SoC Initial support for Tegra 114 SoC. This is expected to be included in the board DTS files, Tegra 114 SoC based evaluation board family. Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-01-24 01:10:23 +00:00
};
ARM: tegra: add KBC nodes to Tegra114 DT NVIDIA's Tegra114 SoCs have the matrix keyboard controller which supports 11x8 type of matrix. The number of rows and columns are configurable. Add DT entry for KBC controller with compatibility as "nvidia,tegra114-kbc". Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-03-13 19:49:53 +00:00
kbc {
compatible = "nvidia,tegra114-kbc";
reg = <0x7000e200 0x100>;
ARM: tegra: convert device tree files to use IRQ defines Use the GIC and standard IRQ binding defines in all IRQ specifiers. Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-02-13 19:51:51 +00:00
interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
ARM: tegra114: convert device tree files to use CLK defines Use the Tegra114 CAR binding header (tegra114-car.h) to replace magic numbers in the device tree. For example, - clocks = <&tegra_car 28>; + clocks = <&tegra_car CLK_HOST1X>; Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com> [swarren, updated since tegra20-car.h moved for consistency] Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-05-22 16:45:36 +00:00
clocks = <&tegra_car TEGRA114_CLK_KBC>;
ARM: tegra: add KBC nodes to Tegra114 DT NVIDIA's Tegra114 SoCs have the matrix keyboard controller which supports 11x8 type of matrix. The number of rows and columns are configurable. Add DT entry for KBC controller with compatibility as "nvidia,tegra114-kbc". Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-03-13 19:49:53 +00:00
status = "disabled";
};
ARM: dt: tegra114: Add new SoC base, Tegra114 SoC Initial support for Tegra 114 SoC. This is expected to be included in the board DTS files, Tegra 114 SoC based evaluation board family. Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-01-24 01:10:23 +00:00
pmc {
ARM: tegra: fix the PMC compatible string in DT The PMC HW is not 100% compatible across all Tegra series. We need to specify them in DT. Signed-off-by: Joseph Lo <josephl@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-02-26 16:27:43 +00:00
compatible = "nvidia,tegra114-pmc";
ARM: dt: tegra114: Add new SoC base, Tegra114 SoC Initial support for Tegra 114 SoC. This is expected to be included in the board DTS files, Tegra 114 SoC based evaluation board family. Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-01-24 01:10:23 +00:00
reg = <0x7000e400 0x400>;
ARM: tegra114: convert device tree files to use CLK defines Use the Tegra114 CAR binding header (tegra114-car.h) to replace magic numbers in the device tree. For example, - clocks = <&tegra_car 28>; + clocks = <&tegra_car CLK_HOST1X>; Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com> [swarren, updated since tegra20-car.h moved for consistency] Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-05-22 16:45:36 +00:00
clocks = <&tegra_car TEGRA114_CLK_PCLK>, <&clk32k_in>;
ARM: tegra: add clock source of PMC to device trees Adding the bindings of the clock source of PMC in DT. Signed-off-by: Joseph Lo <josephl@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-04-03 11:31:27 +00:00
clock-names = "pclk", "clk32k_in";
ARM: dt: tegra114: Add new SoC base, Tegra114 SoC Initial support for Tegra 114 SoC. This is expected to be included in the board DTS files, Tegra 114 SoC based evaluation board family. Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-01-24 01:10:23 +00:00
};
ARM: tegra: Add SMMU entry to Tegra114 DT Add SMMU entry. Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-01-15 08:17:28 +00:00
iommu {
compatible = "nvidia,tegra114-smmu", "nvidia,tegra30-smmu";
ARM: tegra: fix Tegra114 IOMMU register address The IOMMU node's reg property contains completely bogus values! Somehow, this had no practical effect, despite the fact the IOMMU driver appears to be writing to those registers. I suppose that since no HW modules is actually at that address, the writes simply had no effect. Note that I'm not CCing stable here, even though the problem exists as far back as v3.9, simply because this patch doesn't fix any observed issue, and I don't want to run the risk of suddenly writing to some registers and causing a regression. Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com> [swarren, wrote commit description] Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Olof Johansson <olof@lixom.net>
2013-10-30 23:17:48 +00:00
reg = <0x70019010 0x02c
0x700191f0 0x010
0x70019228 0x074>;
ARM: tegra: Add SMMU entry to Tegra114 DT Add SMMU entry. Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-01-15 08:17:28 +00:00
nvidia,#asids = <4>;
dma-window = <0 0x40000000>;
nvidia,swgroups = <0x18659fe>;
nvidia,ahb = <&ahb>;
};
ARM: tegra: add audio-related nodes to Tegra114 DT Add nodes for the Tegra114 AHUB and I2S controllers. Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-03-12 23:03:30 +00:00
ahub {
compatible = "nvidia,tegra114-ahub";
reg = <0x70080000 0x200>,
<0x70080200 0x100>,
<0x70081000 0x200>;
interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
nvidia,dma-request-selector = <&apbdma 1>, <&apbdma 2>,
<&apbdma 3>, <&apbdma 4>, <&apbdma 6>, <&apbdma 7>,
<&apbdma 12>, <&apbdma 13>, <&apbdma 14>,
<&apbdma 29>;
clocks = <&tegra_car TEGRA114_CLK_D_AUDIO>,
<&tegra_car TEGRA114_CLK_APBIF>,
<&tegra_car TEGRA114_CLK_I2S0>,
<&tegra_car TEGRA114_CLK_I2S1>,
<&tegra_car TEGRA114_CLK_I2S2>,
<&tegra_car TEGRA114_CLK_I2S3>,
<&tegra_car TEGRA114_CLK_I2S4>,
<&tegra_car TEGRA114_CLK_DAM0>,
<&tegra_car TEGRA114_CLK_DAM1>,
<&tegra_car TEGRA114_CLK_DAM2>,
<&tegra_car TEGRA114_CLK_SPDIF_IN>,
<&tegra_car TEGRA114_CLK_AMX>,
<&tegra_car TEGRA114_CLK_ADX>;
clock-names = "d_audio", "apbif", "i2s0", "i2s1", "i2s2",
"i2s3", "i2s4", "dam0", "dam1", "dam2",
"spdif_in", "amx", "adx";
ranges;
#address-cells = <1>;
#size-cells = <1>;
tegra_i2s0: i2s@70080300 {
compatible = "nvidia,tegra114-i2s", "nvidia,tegra30-i2s";
reg = <0x70080300 0x100>;
nvidia,ahub-cif-ids = <4 4>;
clocks = <&tegra_car TEGRA114_CLK_I2S0>;
status = "disabled";
};
tegra_i2s1: i2s@70080400 {
compatible = "nvidia,tegra114-i2s", "nvidia,tegra30-i2s";
reg = <0x70080400 0x100>;
nvidia,ahub-cif-ids = <5 5>;
clocks = <&tegra_car TEGRA114_CLK_I2S1>;
status = "disabled";
};
tegra_i2s2: i2s@70080500 {
compatible = "nvidia,tegra114-i2s", "nvidia,tegra30-i2s";
reg = <0x70080500 0x100>;
nvidia,ahub-cif-ids = <6 6>;
clocks = <&tegra_car TEGRA114_CLK_I2S2>;
status = "disabled";
};
tegra_i2s3: i2s@70080600 {
compatible = "nvidia,tegra114-i2s", "nvidia,tegra30-i2s";
reg = <0x70080600 0x100>;
nvidia,ahub-cif-ids = <7 7>;
clocks = <&tegra_car TEGRA114_CLK_I2S3>;
status = "disabled";
};
tegra_i2s4: i2s@70080700 {
compatible = "nvidia,tegra114-i2s", "nvidia,tegra30-i2s";
reg = <0x70080700 0x100>;
nvidia,ahub-cif-ids = <8 8>;
clocks = <&tegra_car TEGRA114_CLK_I2S4>;
status = "disabled";
};
};
ARM: tegra: add SDHCI nodes with common properties This patch adds in the SDHCI nodes for the busses supported on Tegra114 boards. Signed-off-by: Pritesh Raithatha <praithatha@nvidia.com> [Rhyland added clk refs to & reordered sdhci nodes and removed spaces] Signed-off-by: Rhyland Klein <rklein@nvidia.com> [swarren: fixed DT node sort order] Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-02-20 18:35:14 +00:00
sdhci@78000000 {
compatible = "nvidia,tegra114-sdhci", "nvidia,tegra30-sdhci";
reg = <0x78000000 0x200>;
ARM: tegra: convert device tree files to use IRQ defines Use the GIC and standard IRQ binding defines in all IRQ specifiers. Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-02-13 19:51:51 +00:00
interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
ARM: tegra114: convert device tree files to use CLK defines Use the Tegra114 CAR binding header (tegra114-car.h) to replace magic numbers in the device tree. For example, - clocks = <&tegra_car 28>; + clocks = <&tegra_car CLK_HOST1X>; Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com> [swarren, updated since tegra20-car.h moved for consistency] Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-05-22 16:45:36 +00:00
clocks = <&tegra_car TEGRA114_CLK_SDMMC1>;
ARM: tegra: add SDHCI nodes with common properties This patch adds in the SDHCI nodes for the busses supported on Tegra114 boards. Signed-off-by: Pritesh Raithatha <praithatha@nvidia.com> [Rhyland added clk refs to & reordered sdhci nodes and removed spaces] Signed-off-by: Rhyland Klein <rklein@nvidia.com> [swarren: fixed DT node sort order] Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-02-20 18:35:14 +00:00
status = "disable";
};
sdhci@78000200 {
compatible = "nvidia,tegra114-sdhci", "nvidia,tegra30-sdhci";
reg = <0x78000200 0x200>;
ARM: tegra: convert device tree files to use IRQ defines Use the GIC and standard IRQ binding defines in all IRQ specifiers. Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-02-13 19:51:51 +00:00
interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
ARM: tegra114: convert device tree files to use CLK defines Use the Tegra114 CAR binding header (tegra114-car.h) to replace magic numbers in the device tree. For example, - clocks = <&tegra_car 28>; + clocks = <&tegra_car CLK_HOST1X>; Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com> [swarren, updated since tegra20-car.h moved for consistency] Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-05-22 16:45:36 +00:00
clocks = <&tegra_car TEGRA114_CLK_SDMMC2>;
ARM: tegra: add SDHCI nodes with common properties This patch adds in the SDHCI nodes for the busses supported on Tegra114 boards. Signed-off-by: Pritesh Raithatha <praithatha@nvidia.com> [Rhyland added clk refs to & reordered sdhci nodes and removed spaces] Signed-off-by: Rhyland Klein <rklein@nvidia.com> [swarren: fixed DT node sort order] Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-02-20 18:35:14 +00:00
status = "disable";
};
sdhci@78000400 {
compatible = "nvidia,tegra114-sdhci", "nvidia,tegra30-sdhci";
reg = <0x78000400 0x200>;
ARM: tegra: convert device tree files to use IRQ defines Use the GIC and standard IRQ binding defines in all IRQ specifiers. Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-02-13 19:51:51 +00:00
interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
ARM: tegra114: convert device tree files to use CLK defines Use the Tegra114 CAR binding header (tegra114-car.h) to replace magic numbers in the device tree. For example, - clocks = <&tegra_car 28>; + clocks = <&tegra_car CLK_HOST1X>; Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com> [swarren, updated since tegra20-car.h moved for consistency] Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-05-22 16:45:36 +00:00
clocks = <&tegra_car TEGRA114_CLK_SDMMC3>;
ARM: tegra: add SDHCI nodes with common properties This patch adds in the SDHCI nodes for the busses supported on Tegra114 boards. Signed-off-by: Pritesh Raithatha <praithatha@nvidia.com> [Rhyland added clk refs to & reordered sdhci nodes and removed spaces] Signed-off-by: Rhyland Klein <rklein@nvidia.com> [swarren: fixed DT node sort order] Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-02-20 18:35:14 +00:00
status = "disable";
};
sdhci@78000600 {
compatible = "nvidia,tegra114-sdhci", "nvidia,tegra30-sdhci";
reg = <0x78000600 0x200>;
ARM: tegra: convert device tree files to use IRQ defines Use the GIC and standard IRQ binding defines in all IRQ specifiers. Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-02-13 19:51:51 +00:00
interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
ARM: tegra114: convert device tree files to use CLK defines Use the Tegra114 CAR binding header (tegra114-car.h) to replace magic numbers in the device tree. For example, - clocks = <&tegra_car 28>; + clocks = <&tegra_car CLK_HOST1X>; Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com> [swarren, updated since tegra20-car.h moved for consistency] Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-05-22 16:45:36 +00:00
clocks = <&tegra_car TEGRA114_CLK_SDMMC4>;
ARM: tegra: add SDHCI nodes with common properties This patch adds in the SDHCI nodes for the busses supported on Tegra114 boards. Signed-off-by: Pritesh Raithatha <praithatha@nvidia.com> [Rhyland added clk refs to & reordered sdhci nodes and removed spaces] Signed-off-by: Rhyland Klein <rklein@nvidia.com> [swarren: fixed DT node sort order] Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-02-20 18:35:14 +00:00
status = "disable";
};
ARM: tegra: add USB DT entries for Tegra114, Dalmore Device tree entries for the three EHCI controllers on Tegra114. Enables the the third controller (USB host) on Dalmore. Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-08-01 15:00:18 +00:00
usb@7d000000 {
compatible = "nvidia,tegra30-ehci", "usb-ehci";
reg = <0x7d000000 0x4000>;
interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
phy_type = "utmi";
clocks = <&tegra_car TEGRA114_CLK_USBD>;
nvidia,phy = <&phy1>;
status = "disabled";
};
phy1: usb-phy@7d000000 {
compatible = "nvidia,tegra30-usb-phy";
reg = <0x7d000000 0x4000 0x7d000000 0x4000>;
phy_type = "utmi";
clocks = <&tegra_car TEGRA114_CLK_USBD>,
<&tegra_car TEGRA114_CLK_PLL_U>,
<&tegra_car TEGRA114_CLK_USBD>;
clock-names = "reg", "pll_u", "utmi-pads";
nvidia,hssync-start-delay = <0>;
nvidia,idle-wait-delay = <17>;
nvidia,elastic-limit = <16>;
nvidia,term-range-adj = <6>;
nvidia,xcvr-setup = <9>;
nvidia,xcvr-lsfslew = <0>;
nvidia,xcvr-lsrslew = <3>;
nvidia,hssquelch-level = <2>;
nvidia,hsdiscon-level = <5>;
nvidia,xcvr-hsslew = <12>;
status = "disabled";
};
usb@7d008000 {
compatible = "nvidia,tegra30-ehci", "usb-ehci";
reg = <0x7d008000 0x4000>;
interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
phy_type = "utmi";
clocks = <&tegra_car TEGRA114_CLK_USB3>;
nvidia,phy = <&phy3>;
status = "disabled";
};
phy3: usb-phy@7d008000 {
compatible = "nvidia,tegra30-usb-phy";
reg = <0x7d008000 0x4000 0x7d000000 0x4000>;
phy_type = "utmi";
clocks = <&tegra_car TEGRA114_CLK_USB3>,
<&tegra_car TEGRA114_CLK_PLL_U>,
<&tegra_car TEGRA114_CLK_USBD>;
clock-names = "reg", "pll_u", "utmi-pads";
nvidia,hssync-start-delay = <0>;
nvidia,idle-wait-delay = <17>;
nvidia,elastic-limit = <16>;
nvidia,term-range-adj = <6>;
nvidia,xcvr-setup = <9>;
nvidia,xcvr-lsfslew = <0>;
nvidia,xcvr-lsrslew = <3>;
nvidia,hssquelch-level = <2>;
nvidia,hsdiscon-level = <5>;
nvidia,xcvr-hsslew = <12>;
status = "disabled";
};
ARM: dt: tegra114: Add new SoC base, Tegra114 SoC Initial support for Tegra 114 SoC. This is expected to be included in the board DTS files, Tegra 114 SoC based evaluation board family. Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-01-24 01:10:23 +00:00
cpus {
#address-cells = <1>;
#size-cells = <0>;
cpu@0 {
device_type = "cpu";
compatible = "arm,cortex-a15";
reg = <0>;
};
cpu@1 {
device_type = "cpu";
compatible = "arm,cortex-a15";
reg = <1>;
};
cpu@2 {
device_type = "cpu";
compatible = "arm,cortex-a15";
reg = <2>;
};
cpu@3 {
device_type = "cpu";
compatible = "arm,cortex-a15";
reg = <3>;
};
};
timer {
compatible = "arm,armv7-timer";
ARM: tegra: convert device tree files to use IRQ defines Use the GIC and standard IRQ binding defines in all IRQ specifiers. Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-02-13 19:51:51 +00:00
interrupts =
<GIC_PPI 13
(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 14
(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 11
(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 10
(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
ARM: dt: tegra114: Add new SoC base, Tegra114 SoC Initial support for Tegra 114 SoC. This is expected to be included in the board DTS files, Tegra 114 SoC based evaluation board family. Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-01-24 01:10:23 +00:00
};
};
Reference in New Issue Copy Permalink