2005-11-10 14:26:51 +00:00
|
|
|
/*
|
2006-10-03 21:01:26 +00:00
|
|
|
* arch/arm/mach-omap2/serial.c
|
2005-11-10 14:26:51 +00:00
|
|
|
*
|
|
|
|
|
* OMAP2 serial support.
|
|
|
|
|
*
|
2008-10-06 12:49:15 +00:00
|
|
|
* Copyright (C) 2005-2008 Nokia Corporation
|
2005-11-10 14:26:51 +00:00
|
|
|
* Author: Paul Mundt <paul.mundt@nokia.com>
|
|
|
|
|
*
|
OMAP3: PM: UART: disable clocks when idle and off-mode support
This patch allows the UART clocks to be disabled when the OMAP UARTs
are inactive, thus permitting the chip to hit retention in idle.
After the expiration of an activity timer, each UART is allowed to
disable its clocks so the system can enter retention. The activity
timer is (re)activated on any UART interrupt, UART wake event or any
IO pad wakeup. The actual disable of the UART clocks is done in the
'prepare_idle' hook called from the OMAP idle loop.
While the activity timer is active, the smart-idle mode of the UART is
also disabled. This is due to a "feature" of the UART module that
after a UART wakeup, the smart-idle mode may be entered before the
UART has communicated the interrupt, or upon TX, an idle mode may be
entered before the TX FIFOs are emptied.
Upon suspend, the 'prepare_suspend' hook cancels any pending activity
timers and allows the clocks to be disabled immediately.
In addition, upon disabling clocks the UART state is saved in case
of an off-mode transition while clocks are off.
Special thanks to Tero Kristo for the initial ideas and first versions
of UART idle support, and to Jouni Hogander for extra testing and
bugfixes.
Tested on OMAP3 (Beagle, RX51, SDP, EVM) and OMAP2 (n810)
Cc: Tero Kristo <tero.kristo@nokia.com>
Cc: Jouni Hogander <jouni.hogander@nokia.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-02-04 18:51:40 +00:00
|
|
|
* Major rework for PM support by Kevin Hilman
|
|
|
|
|
*
|
2005-11-10 14:26:51 +00:00
|
|
|
* Based off of arch/arm/mach-omap/omap1/serial.c
|
|
|
|
|
*
|
2009-05-28 21:16:04 +00:00
|
|
|
* Copyright (C) 2009 Texas Instruments
|
|
|
|
|
* Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com
|
|
|
|
|
*
|
2005-11-10 14:26:51 +00:00
|
|
|
* This file is subject to the terms and conditions of the GNU General Public
|
|
|
|
|
* License. See the file "COPYING" in the main directory of this archive
|
|
|
|
|
* for more details.
|
|
|
|
|
*/
|
|
|
|
|
#include <linux/kernel.h>
|
|
|
|
|
#include <linux/init.h>
|
2006-01-07 16:15:52 +00:00
|
|
|
#include <linux/clk.h>
|
2008-09-06 11:10:45 +00:00
|
|
|
#include <linux/io.h>
|
2010-02-18 08:59:06 +00:00
|
|
|
#include <linux/delay.h>
|
2010-09-27 14:49:38 +00:00
|
|
|
#include <linux/platform_device.h>
|
|
|
|
|
#include <linux/slab.h>
|
2010-09-27 14:49:53 +00:00
|
|
|
#include <linux/pm_runtime.h>
|
OMAP2+: PM/serial: hold console semaphore while OMAP UARTs are disabled
The console semaphore must be held while the OMAP UART devices are
disabled, lest a console write cause an ARM abort (and a kernel crash)
when the underlying console device is inaccessible. These crashes
only occur when the console is on one of the OMAP internal serial
ports.
While this problem has been latent in the PM idle loop for some time,
the crash was not triggerable with an unmodified kernel until commit
6f251e9db1093c187addc309b5f2f7fe3efd2995 ("OMAP: UART: omap_device
conversions, remove implicit 8520 assumptions"). After this patch, a
console write often occurs after the console UART has been disabled in
the idle loop, crashing the system. Several users have encountered
this bug:
http://www.mail-archive.com/linux-omap@vger.kernel.org/msg38396.html
http://www.mail-archive.com/linux-omap@vger.kernel.org/msg36602.html
The same commit also introduced new code that disabled the UARTs
during init, in omap_serial_init_port(). The kernel will also crash
in this code when earlyconsole and extra debugging is enabled:
http://www.mail-archive.com/linux-omap@vger.kernel.org/msg36411.html
The minimal fix for the -rc series is to hold the console semaphore
while the OMAP UARTs are disabled. This is a somewhat overbroad fix,
since the console may not be located on an OMAP UART, as is the case
with the GPMC UART on Zoom3. While it is technically possible to
determine which devices the console or earlyconsole is actually
running on, it is not a trivial problem to solve, and the code to do
so is not really appropriate for the -rc series.
The right long-term fix is to ensure that no code outside of the OMAP
serial driver can disable an OMAP UART. As I understand it, code to
implement this is under development by TI.
This patch is a collaboration between Paul Walmsley <paul@pwsan.com>
and Tony Lindgren <tony@atomide.com>. Thanks to Ming Lei
<tom.leiming@gmail.com> and Pramod <pramod.gurav@ti.com> for their
feedback on earlier versions of this patch.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Acked-by: Kevin Hilman <khilman@deeprootsystems.com>
Cc: Ming Lei <tom.leiming@gmail.com>
Cc: Pramod <pramod.gurav@ti.com>
Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Cc: Jean Pihet <jean.pihet@newoldbits.com>
Cc: Govindraj.R <govindraj.raja@ti.com>
2010-11-24 23:49:05 +00:00
|
|
|
#include <linux/console.h>
|
2010-09-27 14:49:38 +00:00
|
|
|
|
|
|
|
|
#include <plat/omap-serial.h>
|
2011-11-10 21:45:17 +00:00
|
|
|
#include "common.h"
|
2009-10-20 16:40:47 +00:00
|
|
|
#include <plat/board.h>
|
2010-09-27 14:49:38 +00:00
|
|
|
#include <plat/dma.h>
|
|
|
|
|
#include <plat/omap_hwmod.h>
|
|
|
|
|
#include <plat/omap_device.h>
|
OMAP3: PM: UART: disable clocks when idle and off-mode support
This patch allows the UART clocks to be disabled when the OMAP UARTs
are inactive, thus permitting the chip to hit retention in idle.
After the expiration of an activity timer, each UART is allowed to
disable its clocks so the system can enter retention. The activity
timer is (re)activated on any UART interrupt, UART wake event or any
IO pad wakeup. The actual disable of the UART clocks is done in the
'prepare_idle' hook called from the OMAP idle loop.
While the activity timer is active, the smart-idle mode of the UART is
also disabled. This is due to a "feature" of the UART module that
after a UART wakeup, the smart-idle mode may be entered before the
UART has communicated the interrupt, or upon TX, an idle mode may be
entered before the TX FIFOs are emptied.
Upon suspend, the 'prepare_suspend' hook cancels any pending activity
timers and allows the clocks to be disabled immediately.
In addition, upon disabling clocks the UART state is saved in case
of an off-mode transition while clocks are off.
Special thanks to Tero Kristo for the initial ideas and first versions
of UART idle support, and to Jouni Hogander for extra testing and
bugfixes.
Tested on OMAP3 (Beagle, RX51, SDP, EVM) and OMAP2 (n810)
Cc: Tero Kristo <tero.kristo@nokia.com>
Cc: Jouni Hogander <jouni.hogander@nokia.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-02-04 18:51:40 +00:00
|
|
|
|
2010-12-21 22:30:55 +00:00
|
|
|
#include "prm2xxx_3xxx.h"
|
OMAP3: PM: UART: disable clocks when idle and off-mode support
This patch allows the UART clocks to be disabled when the OMAP UARTs
are inactive, thus permitting the chip to hit retention in idle.
After the expiration of an activity timer, each UART is allowed to
disable its clocks so the system can enter retention. The activity
timer is (re)activated on any UART interrupt, UART wake event or any
IO pad wakeup. The actual disable of the UART clocks is done in the
'prepare_idle' hook called from the OMAP idle loop.
While the activity timer is active, the smart-idle mode of the UART is
also disabled. This is due to a "feature" of the UART module that
after a UART wakeup, the smart-idle mode may be entered before the
UART has communicated the interrupt, or upon TX, an idle mode may be
entered before the TX FIFOs are emptied.
Upon suspend, the 'prepare_suspend' hook cancels any pending activity
timers and allows the clocks to be disabled immediately.
In addition, upon disabling clocks the UART state is saved in case
of an off-mode transition while clocks are off.
Special thanks to Tero Kristo for the initial ideas and first versions
of UART idle support, and to Jouni Hogander for extra testing and
bugfixes.
Tested on OMAP3 (Beagle, RX51, SDP, EVM) and OMAP2 (n810)
Cc: Tero Kristo <tero.kristo@nokia.com>
Cc: Jouni Hogander <jouni.hogander@nokia.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-02-04 18:51:40 +00:00
|
|
|
#include "pm.h"
|
2010-12-21 22:30:55 +00:00
|
|
|
#include "cm2xxx_3xxx.h"
|
OMAP3: PM: UART: disable clocks when idle and off-mode support
This patch allows the UART clocks to be disabled when the OMAP UARTs
are inactive, thus permitting the chip to hit retention in idle.
After the expiration of an activity timer, each UART is allowed to
disable its clocks so the system can enter retention. The activity
timer is (re)activated on any UART interrupt, UART wake event or any
IO pad wakeup. The actual disable of the UART clocks is done in the
'prepare_idle' hook called from the OMAP idle loop.
While the activity timer is active, the smart-idle mode of the UART is
also disabled. This is due to a "feature" of the UART module that
after a UART wakeup, the smart-idle mode may be entered before the
UART has communicated the interrupt, or upon TX, an idle mode may be
entered before the TX FIFOs are emptied.
Upon suspend, the 'prepare_suspend' hook cancels any pending activity
timers and allows the clocks to be disabled immediately.
In addition, upon disabling clocks the UART state is saved in case
of an off-mode transition while clocks are off.
Special thanks to Tero Kristo for the initial ideas and first versions
of UART idle support, and to Jouni Hogander for extra testing and
bugfixes.
Tested on OMAP3 (Beagle, RX51, SDP, EVM) and OMAP2 (n810)
Cc: Tero Kristo <tero.kristo@nokia.com>
Cc: Jouni Hogander <jouni.hogander@nokia.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-02-04 18:51:40 +00:00
|
|
|
#include "prm-regbits-34xx.h"
|
2010-10-08 17:40:20 +00:00
|
|
|
#include "control.h"
|
2010-12-23 02:42:35 +00:00
|
|
|
#include "mux.h"
|
OMAP3: PM: UART: disable clocks when idle and off-mode support
This patch allows the UART clocks to be disabled when the OMAP UARTs
are inactive, thus permitting the chip to hit retention in idle.
After the expiration of an activity timer, each UART is allowed to
disable its clocks so the system can enter retention. The activity
timer is (re)activated on any UART interrupt, UART wake event or any
IO pad wakeup. The actual disable of the UART clocks is done in the
'prepare_idle' hook called from the OMAP idle loop.
While the activity timer is active, the smart-idle mode of the UART is
also disabled. This is due to a "feature" of the UART module that
after a UART wakeup, the smart-idle mode may be entered before the
UART has communicated the interrupt, or upon TX, an idle mode may be
entered before the TX FIFOs are emptied.
Upon suspend, the 'prepare_suspend' hook cancels any pending activity
timers and allows the clocks to be disabled immediately.
In addition, upon disabling clocks the UART state is saved in case
of an off-mode transition while clocks are off.
Special thanks to Tero Kristo for the initial ideas and first versions
of UART idle support, and to Jouni Hogander for extra testing and
bugfixes.
Tested on OMAP3 (Beagle, RX51, SDP, EVM) and OMAP2 (n810)
Cc: Tero Kristo <tero.kristo@nokia.com>
Cc: Jouni Hogander <jouni.hogander@nokia.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-02-04 18:51:40 +00:00
|
|
|
|
2010-08-02 10:18:12 +00:00
|
|
|
#define UART_ERRATA_i202_MDR1_ACCESS (0x1 << 1)
|
2010-08-02 10:18:12 +00:00
|
|
|
|
2010-02-01 20:34:31 +00:00
|
|
|
/*
|
|
|
|
|
* NOTE: By default the serial timeout is disabled as it causes lost characters
|
|
|
|
|
* over the serial ports. This means that the UART clocks will stay on until
|
|
|
|
|
* disabled via sysfs. This also causes that any deeper omap sleep states are
|
|
|
|
|
* blocked.
|
|
|
|
|
*/
|
|
|
|
|
#define DEFAULT_TIMEOUT 0
|
OMAP3: PM: UART: disable clocks when idle and off-mode support
This patch allows the UART clocks to be disabled when the OMAP UARTs
are inactive, thus permitting the chip to hit retention in idle.
After the expiration of an activity timer, each UART is allowed to
disable its clocks so the system can enter retention. The activity
timer is (re)activated on any UART interrupt, UART wake event or any
IO pad wakeup. The actual disable of the UART clocks is done in the
'prepare_idle' hook called from the OMAP idle loop.
While the activity timer is active, the smart-idle mode of the UART is
also disabled. This is due to a "feature" of the UART module that
after a UART wakeup, the smart-idle mode may be entered before the
UART has communicated the interrupt, or upon TX, an idle mode may be
entered before the TX FIFOs are emptied.
Upon suspend, the 'prepare_suspend' hook cancels any pending activity
timers and allows the clocks to be disabled immediately.
In addition, upon disabling clocks the UART state is saved in case
of an off-mode transition while clocks are off.
Special thanks to Tero Kristo for the initial ideas and first versions
of UART idle support, and to Jouni Hogander for extra testing and
bugfixes.
Tested on OMAP3 (Beagle, RX51, SDP, EVM) and OMAP2 (n810)
Cc: Tero Kristo <tero.kristo@nokia.com>
Cc: Jouni Hogander <jouni.hogander@nokia.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-02-04 18:51:40 +00:00
|
|
|
|
2010-09-27 14:49:38 +00:00
|
|
|
#define MAX_UART_HWMOD_NAME_LEN 16
|
|
|
|
|
|
OMAP3: PM: UART: disable clocks when idle and off-mode support
This patch allows the UART clocks to be disabled when the OMAP UARTs
are inactive, thus permitting the chip to hit retention in idle.
After the expiration of an activity timer, each UART is allowed to
disable its clocks so the system can enter retention. The activity
timer is (re)activated on any UART interrupt, UART wake event or any
IO pad wakeup. The actual disable of the UART clocks is done in the
'prepare_idle' hook called from the OMAP idle loop.
While the activity timer is active, the smart-idle mode of the UART is
also disabled. This is due to a "feature" of the UART module that
after a UART wakeup, the smart-idle mode may be entered before the
UART has communicated the interrupt, or upon TX, an idle mode may be
entered before the TX FIFOs are emptied.
Upon suspend, the 'prepare_suspend' hook cancels any pending activity
timers and allows the clocks to be disabled immediately.
In addition, upon disabling clocks the UART state is saved in case
of an off-mode transition while clocks are off.
Special thanks to Tero Kristo for the initial ideas and first versions
of UART idle support, and to Jouni Hogander for extra testing and
bugfixes.
Tested on OMAP3 (Beagle, RX51, SDP, EVM) and OMAP2 (n810)
Cc: Tero Kristo <tero.kristo@nokia.com>
Cc: Jouni Hogander <jouni.hogander@nokia.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-02-04 18:51:40 +00:00
|
|
|
struct omap_uart_state {
|
|
|
|
|
int num;
|
|
|
|
|
int can_sleep;
|
|
|
|
|
|
|
|
|
|
void __iomem *wk_st;
|
|
|
|
|
void __iomem *wk_en;
|
|
|
|
|
u32 wk_mask;
|
2010-09-27 14:49:38 +00:00
|
|
|
u32 dma_enabled;
|
OMAP3: PM: UART: disable clocks when idle and off-mode support
This patch allows the UART clocks to be disabled when the OMAP UARTs
are inactive, thus permitting the chip to hit retention in idle.
After the expiration of an activity timer, each UART is allowed to
disable its clocks so the system can enter retention. The activity
timer is (re)activated on any UART interrupt, UART wake event or any
IO pad wakeup. The actual disable of the UART clocks is done in the
'prepare_idle' hook called from the OMAP idle loop.
While the activity timer is active, the smart-idle mode of the UART is
also disabled. This is due to a "feature" of the UART module that
after a UART wakeup, the smart-idle mode may be entered before the
UART has communicated the interrupt, or upon TX, an idle mode may be
entered before the TX FIFOs are emptied.
Upon suspend, the 'prepare_suspend' hook cancels any pending activity
timers and allows the clocks to be disabled immediately.
In addition, upon disabling clocks the UART state is saved in case
of an off-mode transition while clocks are off.
Special thanks to Tero Kristo for the initial ideas and first versions
of UART idle support, and to Jouni Hogander for extra testing and
bugfixes.
Tested on OMAP3 (Beagle, RX51, SDP, EVM) and OMAP2 (n810)
Cc: Tero Kristo <tero.kristo@nokia.com>
Cc: Jouni Hogander <jouni.hogander@nokia.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-02-04 18:51:40 +00:00
|
|
|
|
|
|
|
|
int clocked;
|
|
|
|
|
|
|
|
|
|
struct list_head node;
|
2010-09-27 14:49:38 +00:00
|
|
|
struct omap_hwmod *oh;
|
|
|
|
|
struct platform_device *pdev;
|
2005-11-10 14:26:51 +00:00
|
|
|
|
2010-08-02 10:18:12 +00:00
|
|
|
u32 errata;
|
OMAP3: PM: UART: disable clocks when idle and off-mode support
This patch allows the UART clocks to be disabled when the OMAP UARTs
are inactive, thus permitting the chip to hit retention in idle.
After the expiration of an activity timer, each UART is allowed to
disable its clocks so the system can enter retention. The activity
timer is (re)activated on any UART interrupt, UART wake event or any
IO pad wakeup. The actual disable of the UART clocks is done in the
'prepare_idle' hook called from the OMAP idle loop.
While the activity timer is active, the smart-idle mode of the UART is
also disabled. This is due to a "feature" of the UART module that
after a UART wakeup, the smart-idle mode may be entered before the
UART has communicated the interrupt, or upon TX, an idle mode may be
entered before the TX FIFOs are emptied.
Upon suspend, the 'prepare_suspend' hook cancels any pending activity
timers and allows the clocks to be disabled immediately.
In addition, upon disabling clocks the UART state is saved in case
of an off-mode transition while clocks are off.
Special thanks to Tero Kristo for the initial ideas and first versions
of UART idle support, and to Jouni Hogander for extra testing and
bugfixes.
Tested on OMAP3 (Beagle, RX51, SDP, EVM) and OMAP2 (n810)
Cc: Tero Kristo <tero.kristo@nokia.com>
Cc: Jouni Hogander <jouni.hogander@nokia.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-02-04 18:51:40 +00:00
|
|
|
};
|
|
|
|
|
|
|
|
|
|
static LIST_HEAD(uart_list);
|
2010-09-27 14:49:38 +00:00
|
|
|
static u8 num_uarts;
|
2005-11-10 14:26:51 +00:00
|
|
|
|
OMAP3: PM: UART: disable clocks when idle and off-mode support
This patch allows the UART clocks to be disabled when the OMAP UARTs
are inactive, thus permitting the chip to hit retention in idle.
After the expiration of an activity timer, each UART is allowed to
disable its clocks so the system can enter retention. The activity
timer is (re)activated on any UART interrupt, UART wake event or any
IO pad wakeup. The actual disable of the UART clocks is done in the
'prepare_idle' hook called from the OMAP idle loop.
While the activity timer is active, the smart-idle mode of the UART is
also disabled. This is due to a "feature" of the UART module that
after a UART wakeup, the smart-idle mode may be entered before the
UART has communicated the interrupt, or upon TX, an idle mode may be
entered before the TX FIFOs are emptied.
Upon suspend, the 'prepare_suspend' hook cancels any pending activity
timers and allows the clocks to be disabled immediately.
In addition, upon disabling clocks the UART state is saved in case
of an off-mode transition while clocks are off.
Special thanks to Tero Kristo for the initial ideas and first versions
of UART idle support, and to Jouni Hogander for extra testing and
bugfixes.
Tested on OMAP3 (Beagle, RX51, SDP, EVM) and OMAP2 (n810)
Cc: Tero Kristo <tero.kristo@nokia.com>
Cc: Jouni Hogander <jouni.hogander@nokia.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-02-04 18:51:40 +00:00
|
|
|
#if defined(CONFIG_PM) && defined(CONFIG_ARCH_OMAP3)
|
|
|
|
|
|
2010-08-02 10:18:12 +00:00
|
|
|
/*
|
|
|
|
|
* Work Around for Errata i202 (3430 - 1.12, 3630 - 1.6)
|
|
|
|
|
* The access to uart register after MDR1 Access
|
|
|
|
|
* causes UART to corrupt data.
|
|
|
|
|
*
|
|
|
|
|
* Need a delay =
|
|
|
|
|
* 5 L4 clock cycles + 5 UART functional clock cycle (@48MHz = ~0.2uS)
|
|
|
|
|
* give 10 times as much
|
|
|
|
|
*/
|
|
|
|
|
static void omap_uart_mdr1_errataset(struct omap_uart_state *uart, u8 mdr1_val,
|
|
|
|
|
u8 fcr_val)
|
|
|
|
|
{
|
|
|
|
|
u8 timeout = 255;
|
|
|
|
|
|
2010-09-27 14:49:38 +00:00
|
|
|
serial_write_reg(uart, UART_OMAP_MDR1, mdr1_val);
|
2010-08-02 10:18:12 +00:00
|
|
|
udelay(2);
|
2010-09-27 14:49:38 +00:00
|
|
|
serial_write_reg(uart, UART_FCR, fcr_val | UART_FCR_CLEAR_XMIT |
|
2010-08-02 10:18:12 +00:00
|
|
|
UART_FCR_CLEAR_RCVR);
|
|
|
|
|
/*
|
|
|
|
|
* Wait for FIFO to empty: when empty, RX_FIFO_E bit is 0 and
|
|
|
|
|
* TX_FIFO_E bit is 1.
|
|
|
|
|
*/
|
2010-09-27 14:49:38 +00:00
|
|
|
while (UART_LSR_THRE != (serial_read_reg(uart, UART_LSR) &
|
2010-08-02 10:18:12 +00:00
|
|
|
(UART_LSR_THRE | UART_LSR_DR))) {
|
|
|
|
|
timeout--;
|
|
|
|
|
if (!timeout) {
|
|
|
|
|
/* Should *never* happen. we warn and carry on */
|
2010-09-27 14:49:38 +00:00
|
|
|
dev_crit(&uart->pdev->dev, "Errata i202: timedout %x\n",
|
|
|
|
|
serial_read_reg(uart, UART_LSR));
|
2010-08-02 10:18:12 +00:00
|
|
|
break;
|
|
|
|
|
}
|
|
|
|
|
udelay(1);
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
OMAP3: PM: UART: disable clocks when idle and off-mode support
This patch allows the UART clocks to be disabled when the OMAP UARTs
are inactive, thus permitting the chip to hit retention in idle.
After the expiration of an activity timer, each UART is allowed to
disable its clocks so the system can enter retention. The activity
timer is (re)activated on any UART interrupt, UART wake event or any
IO pad wakeup. The actual disable of the UART clocks is done in the
'prepare_idle' hook called from the OMAP idle loop.
While the activity timer is active, the smart-idle mode of the UART is
also disabled. This is due to a "feature" of the UART module that
after a UART wakeup, the smart-idle mode may be entered before the
UART has communicated the interrupt, or upon TX, an idle mode may be
entered before the TX FIFOs are emptied.
Upon suspend, the 'prepare_suspend' hook cancels any pending activity
timers and allows the clocks to be disabled immediately.
In addition, upon disabling clocks the UART state is saved in case
of an off-mode transition while clocks are off.
Special thanks to Tero Kristo for the initial ideas and first versions
of UART idle support, and to Jouni Hogander for extra testing and
bugfixes.
Tested on OMAP3 (Beagle, RX51, SDP, EVM) and OMAP2 (n810)
Cc: Tero Kristo <tero.kristo@nokia.com>
Cc: Jouni Hogander <jouni.hogander@nokia.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-02-04 18:51:40 +00:00
|
|
|
#endif /* CONFIG_PM && CONFIG_ARCH_OMAP3 */
|
|
|
|
|
|
|
|
|
|
static inline void omap_uart_enable_clocks(struct omap_uart_state *uart)
|
|
|
|
|
{
|
|
|
|
|
if (uart->clocked)
|
|
|
|
|
return;
|
|
|
|
|
|
2010-09-27 14:49:38 +00:00
|
|
|
omap_device_enable(uart->pdev);
|
OMAP3: PM: UART: disable clocks when idle and off-mode support
This patch allows the UART clocks to be disabled when the OMAP UARTs
are inactive, thus permitting the chip to hit retention in idle.
After the expiration of an activity timer, each UART is allowed to
disable its clocks so the system can enter retention. The activity
timer is (re)activated on any UART interrupt, UART wake event or any
IO pad wakeup. The actual disable of the UART clocks is done in the
'prepare_idle' hook called from the OMAP idle loop.
While the activity timer is active, the smart-idle mode of the UART is
also disabled. This is due to a "feature" of the UART module that
after a UART wakeup, the smart-idle mode may be entered before the
UART has communicated the interrupt, or upon TX, an idle mode may be
entered before the TX FIFOs are emptied.
Upon suspend, the 'prepare_suspend' hook cancels any pending activity
timers and allows the clocks to be disabled immediately.
In addition, upon disabling clocks the UART state is saved in case
of an off-mode transition while clocks are off.
Special thanks to Tero Kristo for the initial ideas and first versions
of UART idle support, and to Jouni Hogander for extra testing and
bugfixes.
Tested on OMAP3 (Beagle, RX51, SDP, EVM) and OMAP2 (n810)
Cc: Tero Kristo <tero.kristo@nokia.com>
Cc: Jouni Hogander <jouni.hogander@nokia.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-02-04 18:51:40 +00:00
|
|
|
uart->clocked = 1;
|
|
|
|
|
omap_uart_restore_context(uart);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
#ifdef CONFIG_PM
|
|
|
|
|
|
|
|
|
|
static inline void omap_uart_disable_clocks(struct omap_uart_state *uart)
|
|
|
|
|
{
|
|
|
|
|
if (!uart->clocked)
|
|
|
|
|
return;
|
|
|
|
|
|
|
|
|
|
omap_uart_save_context(uart);
|
|
|
|
|
uart->clocked = 0;
|
2010-09-27 14:49:38 +00:00
|
|
|
omap_device_idle(uart->pdev);
|
OMAP3: PM: UART: disable clocks when idle and off-mode support
This patch allows the UART clocks to be disabled when the OMAP UARTs
are inactive, thus permitting the chip to hit retention in idle.
After the expiration of an activity timer, each UART is allowed to
disable its clocks so the system can enter retention. The activity
timer is (re)activated on any UART interrupt, UART wake event or any
IO pad wakeup. The actual disable of the UART clocks is done in the
'prepare_idle' hook called from the OMAP idle loop.
While the activity timer is active, the smart-idle mode of the UART is
also disabled. This is due to a "feature" of the UART module that
after a UART wakeup, the smart-idle mode may be entered before the
UART has communicated the interrupt, or upon TX, an idle mode may be
entered before the TX FIFOs are emptied.
Upon suspend, the 'prepare_suspend' hook cancels any pending activity
timers and allows the clocks to be disabled immediately.
In addition, upon disabling clocks the UART state is saved in case
of an off-mode transition while clocks are off.
Special thanks to Tero Kristo for the initial ideas and first versions
of UART idle support, and to Jouni Hogander for extra testing and
bugfixes.
Tested on OMAP3 (Beagle, RX51, SDP, EVM) and OMAP2 (n810)
Cc: Tero Kristo <tero.kristo@nokia.com>
Cc: Jouni Hogander <jouni.hogander@nokia.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-02-04 18:51:40 +00:00
|
|
|
}
|
|
|
|
|
|
2009-04-27 19:27:36 +00:00
|
|
|
static void omap_uart_enable_wakeup(struct omap_uart_state *uart)
|
|
|
|
|
{
|
|
|
|
|
/* Set wake-enable bit */
|
|
|
|
|
if (uart->wk_en && uart->wk_mask) {
|
|
|
|
|
u32 v = __raw_readl(uart->wk_en);
|
|
|
|
|
v |= uart->wk_mask;
|
|
|
|
|
__raw_writel(v, uart->wk_en);
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static void omap_uart_disable_wakeup(struct omap_uart_state *uart)
|
|
|
|
|
{
|
|
|
|
|
/* Clear wake-enable bit */
|
|
|
|
|
if (uart->wk_en && uart->wk_mask) {
|
|
|
|
|
u32 v = __raw_readl(uart->wk_en);
|
|
|
|
|
v &= ~uart->wk_mask;
|
|
|
|
|
__raw_writel(v, uart->wk_en);
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
OMAP3: PM: UART: disable clocks when idle and off-mode support
This patch allows the UART clocks to be disabled when the OMAP UARTs
are inactive, thus permitting the chip to hit retention in idle.
After the expiration of an activity timer, each UART is allowed to
disable its clocks so the system can enter retention. The activity
timer is (re)activated on any UART interrupt, UART wake event or any
IO pad wakeup. The actual disable of the UART clocks is done in the
'prepare_idle' hook called from the OMAP idle loop.
While the activity timer is active, the smart-idle mode of the UART is
also disabled. This is due to a "feature" of the UART module that
after a UART wakeup, the smart-idle mode may be entered before the
UART has communicated the interrupt, or upon TX, an idle mode may be
entered before the TX FIFOs are emptied.
Upon suspend, the 'prepare_suspend' hook cancels any pending activity
timers and allows the clocks to be disabled immediately.
In addition, upon disabling clocks the UART state is saved in case
of an off-mode transition while clocks are off.
Special thanks to Tero Kristo for the initial ideas and first versions
of UART idle support, and to Jouni Hogander for extra testing and
bugfixes.
Tested on OMAP3 (Beagle, RX51, SDP, EVM) and OMAP2 (n810)
Cc: Tero Kristo <tero.kristo@nokia.com>
Cc: Jouni Hogander <jouni.hogander@nokia.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-02-04 18:51:40 +00:00
|
|
|
static void omap_uart_smart_idle_enable(struct omap_uart_state *uart,
|
2010-09-27 14:49:38 +00:00
|
|
|
int enable)
|
OMAP3: PM: UART: disable clocks when idle and off-mode support
This patch allows the UART clocks to be disabled when the OMAP UARTs
are inactive, thus permitting the chip to hit retention in idle.
After the expiration of an activity timer, each UART is allowed to
disable its clocks so the system can enter retention. The activity
timer is (re)activated on any UART interrupt, UART wake event or any
IO pad wakeup. The actual disable of the UART clocks is done in the
'prepare_idle' hook called from the OMAP idle loop.
While the activity timer is active, the smart-idle mode of the UART is
also disabled. This is due to a "feature" of the UART module that
after a UART wakeup, the smart-idle mode may be entered before the
UART has communicated the interrupt, or upon TX, an idle mode may be
entered before the TX FIFOs are emptied.
Upon suspend, the 'prepare_suspend' hook cancels any pending activity
timers and allows the clocks to be disabled immediately.
In addition, upon disabling clocks the UART state is saved in case
of an off-mode transition while clocks are off.
Special thanks to Tero Kristo for the initial ideas and first versions
of UART idle support, and to Jouni Hogander for extra testing and
bugfixes.
Tested on OMAP3 (Beagle, RX51, SDP, EVM) and OMAP2 (n810)
Cc: Tero Kristo <tero.kristo@nokia.com>
Cc: Jouni Hogander <jouni.hogander@nokia.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-02-04 18:51:40 +00:00
|
|
|
{
|
2010-09-27 14:49:38 +00:00
|
|
|
u8 idlemode;
|
OMAP3: PM: UART: disable clocks when idle and off-mode support
This patch allows the UART clocks to be disabled when the OMAP UARTs
are inactive, thus permitting the chip to hit retention in idle.
After the expiration of an activity timer, each UART is allowed to
disable its clocks so the system can enter retention. The activity
timer is (re)activated on any UART interrupt, UART wake event or any
IO pad wakeup. The actual disable of the UART clocks is done in the
'prepare_idle' hook called from the OMAP idle loop.
While the activity timer is active, the smart-idle mode of the UART is
also disabled. This is due to a "feature" of the UART module that
after a UART wakeup, the smart-idle mode may be entered before the
UART has communicated the interrupt, or upon TX, an idle mode may be
entered before the TX FIFOs are emptied.
Upon suspend, the 'prepare_suspend' hook cancels any pending activity
timers and allows the clocks to be disabled immediately.
In addition, upon disabling clocks the UART state is saved in case
of an off-mode transition while clocks are off.
Special thanks to Tero Kristo for the initial ideas and first versions
of UART idle support, and to Jouni Hogander for extra testing and
bugfixes.
Tested on OMAP3 (Beagle, RX51, SDP, EVM) and OMAP2 (n810)
Cc: Tero Kristo <tero.kristo@nokia.com>
Cc: Jouni Hogander <jouni.hogander@nokia.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-02-04 18:51:40 +00:00
|
|
|
|
2010-09-27 14:49:38 +00:00
|
|
|
if (enable) {
|
|
|
|
|
/**
|
|
|
|
|
* Errata 2.15: [UART]:Cannot Acknowledge Idle Requests
|
|
|
|
|
* in Smartidle Mode When Configured for DMA Operations.
|
|
|
|
|
*/
|
|
|
|
|
if (uart->dma_enabled)
|
|
|
|
|
idlemode = HWMOD_IDLEMODE_FORCE;
|
|
|
|
|
else
|
|
|
|
|
idlemode = HWMOD_IDLEMODE_SMART;
|
|
|
|
|
} else {
|
|
|
|
|
idlemode = HWMOD_IDLEMODE_NO;
|
|
|
|
|
}
|
OMAP3: PM: UART: disable clocks when idle and off-mode support
This patch allows the UART clocks to be disabled when the OMAP UARTs
are inactive, thus permitting the chip to hit retention in idle.
After the expiration of an activity timer, each UART is allowed to
disable its clocks so the system can enter retention. The activity
timer is (re)activated on any UART interrupt, UART wake event or any
IO pad wakeup. The actual disable of the UART clocks is done in the
'prepare_idle' hook called from the OMAP idle loop.
While the activity timer is active, the smart-idle mode of the UART is
also disabled. This is due to a "feature" of the UART module that
after a UART wakeup, the smart-idle mode may be entered before the
UART has communicated the interrupt, or upon TX, an idle mode may be
entered before the TX FIFOs are emptied.
Upon suspend, the 'prepare_suspend' hook cancels any pending activity
timers and allows the clocks to be disabled immediately.
In addition, upon disabling clocks the UART state is saved in case
of an off-mode transition while clocks are off.
Special thanks to Tero Kristo for the initial ideas and first versions
of UART idle support, and to Jouni Hogander for extra testing and
bugfixes.
Tested on OMAP3 (Beagle, RX51, SDP, EVM) and OMAP2 (n810)
Cc: Tero Kristo <tero.kristo@nokia.com>
Cc: Jouni Hogander <jouni.hogander@nokia.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-02-04 18:51:40 +00:00
|
|
|
|
2010-09-27 14:49:38 +00:00
|
|
|
omap_hwmod_set_slave_idlemode(uart->oh, idlemode);
|
OMAP3: PM: UART: disable clocks when idle and off-mode support
This patch allows the UART clocks to be disabled when the OMAP UARTs
are inactive, thus permitting the chip to hit retention in idle.
After the expiration of an activity timer, each UART is allowed to
disable its clocks so the system can enter retention. The activity
timer is (re)activated on any UART interrupt, UART wake event or any
IO pad wakeup. The actual disable of the UART clocks is done in the
'prepare_idle' hook called from the OMAP idle loop.
While the activity timer is active, the smart-idle mode of the UART is
also disabled. This is due to a "feature" of the UART module that
after a UART wakeup, the smart-idle mode may be entered before the
UART has communicated the interrupt, or upon TX, an idle mode may be
entered before the TX FIFOs are emptied.
Upon suspend, the 'prepare_suspend' hook cancels any pending activity
timers and allows the clocks to be disabled immediately.
In addition, upon disabling clocks the UART state is saved in case
of an off-mode transition while clocks are off.
Special thanks to Tero Kristo for the initial ideas and first versions
of UART idle support, and to Jouni Hogander for extra testing and
bugfixes.
Tested on OMAP3 (Beagle, RX51, SDP, EVM) and OMAP2 (n810)
Cc: Tero Kristo <tero.kristo@nokia.com>
Cc: Jouni Hogander <jouni.hogander@nokia.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-02-04 18:51:40 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static void omap_uart_block_sleep(struct omap_uart_state *uart)
|
|
|
|
|
{
|
|
|
|
|
omap_uart_enable_clocks(uart);
|
|
|
|
|
|
|
|
|
|
omap_uart_smart_idle_enable(uart, 0);
|
|
|
|
|
uart->can_sleep = 0;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
int omap_uart_can_sleep(void)
|
|
|
|
|
{
|
|
|
|
|
struct omap_uart_state *uart;
|
|
|
|
|
int can_sleep = 1;
|
|
|
|
|
|
|
|
|
|
list_for_each_entry(uart, &uart_list, node) {
|
|
|
|
|
if (!uart->clocked)
|
|
|
|
|
continue;
|
|
|
|
|
|
|
|
|
|
if (!uart->can_sleep) {
|
|
|
|
|
can_sleep = 0;
|
|
|
|
|
continue;
|
2008-10-06 12:49:15 +00:00
|
|
|
}
|
OMAP3: PM: UART: disable clocks when idle and off-mode support
This patch allows the UART clocks to be disabled when the OMAP UARTs
are inactive, thus permitting the chip to hit retention in idle.
After the expiration of an activity timer, each UART is allowed to
disable its clocks so the system can enter retention. The activity
timer is (re)activated on any UART interrupt, UART wake event or any
IO pad wakeup. The actual disable of the UART clocks is done in the
'prepare_idle' hook called from the OMAP idle loop.
While the activity timer is active, the smart-idle mode of the UART is
also disabled. This is due to a "feature" of the UART module that
after a UART wakeup, the smart-idle mode may be entered before the
UART has communicated the interrupt, or upon TX, an idle mode may be
entered before the TX FIFOs are emptied.
Upon suspend, the 'prepare_suspend' hook cancels any pending activity
timers and allows the clocks to be disabled immediately.
In addition, upon disabling clocks the UART state is saved in case
of an off-mode transition while clocks are off.
Special thanks to Tero Kristo for the initial ideas and first versions
of UART idle support, and to Jouni Hogander for extra testing and
bugfixes.
Tested on OMAP3 (Beagle, RX51, SDP, EVM) and OMAP2 (n810)
Cc: Tero Kristo <tero.kristo@nokia.com>
Cc: Jouni Hogander <jouni.hogander@nokia.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-02-04 18:51:40 +00:00
|
|
|
|
|
|
|
|
/* This UART can now safely sleep. */
|
|
|
|
|
omap_uart_allow_sleep(uart);
|
2008-10-06 12:49:15 +00:00
|
|
|
}
|
OMAP3: PM: UART: disable clocks when idle and off-mode support
This patch allows the UART clocks to be disabled when the OMAP UARTs
are inactive, thus permitting the chip to hit retention in idle.
After the expiration of an activity timer, each UART is allowed to
disable its clocks so the system can enter retention. The activity
timer is (re)activated on any UART interrupt, UART wake event or any
IO pad wakeup. The actual disable of the UART clocks is done in the
'prepare_idle' hook called from the OMAP idle loop.
While the activity timer is active, the smart-idle mode of the UART is
also disabled. This is due to a "feature" of the UART module that
after a UART wakeup, the smart-idle mode may be entered before the
UART has communicated the interrupt, or upon TX, an idle mode may be
entered before the TX FIFOs are emptied.
Upon suspend, the 'prepare_suspend' hook cancels any pending activity
timers and allows the clocks to be disabled immediately.
In addition, upon disabling clocks the UART state is saved in case
of an off-mode transition while clocks are off.
Special thanks to Tero Kristo for the initial ideas and first versions
of UART idle support, and to Jouni Hogander for extra testing and
bugfixes.
Tested on OMAP3 (Beagle, RX51, SDP, EVM) and OMAP2 (n810)
Cc: Tero Kristo <tero.kristo@nokia.com>
Cc: Jouni Hogander <jouni.hogander@nokia.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-02-04 18:51:40 +00:00
|
|
|
|
|
|
|
|
return can_sleep;
|
2008-10-06 12:49:15 +00:00
|
|
|
}
|
|
|
|
|
|
OMAP3: PM: UART: disable clocks when idle and off-mode support
This patch allows the UART clocks to be disabled when the OMAP UARTs
are inactive, thus permitting the chip to hit retention in idle.
After the expiration of an activity timer, each UART is allowed to
disable its clocks so the system can enter retention. The activity
timer is (re)activated on any UART interrupt, UART wake event or any
IO pad wakeup. The actual disable of the UART clocks is done in the
'prepare_idle' hook called from the OMAP idle loop.
While the activity timer is active, the smart-idle mode of the UART is
also disabled. This is due to a "feature" of the UART module that
after a UART wakeup, the smart-idle mode may be entered before the
UART has communicated the interrupt, or upon TX, an idle mode may be
entered before the TX FIFOs are emptied.
Upon suspend, the 'prepare_suspend' hook cancels any pending activity
timers and allows the clocks to be disabled immediately.
In addition, upon disabling clocks the UART state is saved in case
of an off-mode transition while clocks are off.
Special thanks to Tero Kristo for the initial ideas and first versions
of UART idle support, and to Jouni Hogander for extra testing and
bugfixes.
Tested on OMAP3 (Beagle, RX51, SDP, EVM) and OMAP2 (n810)
Cc: Tero Kristo <tero.kristo@nokia.com>
Cc: Jouni Hogander <jouni.hogander@nokia.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-02-04 18:51:40 +00:00
|
|
|
static void omap_uart_idle_init(struct omap_uart_state *uart)
|
|
|
|
|
{
|
|
|
|
|
int ret;
|
|
|
|
|
|
|
|
|
|
uart->can_sleep = 0;
|
|
|
|
|
omap_uart_smart_idle_enable(uart, 0);
|
|
|
|
|
|
2011-12-13 18:46:44 +00:00
|
|
|
if (cpu_is_omap34xx() && !(cpu_is_ti81xx() || cpu_is_am33xx())) {
|
2010-09-27 14:50:41 +00:00
|
|
|
u32 mod = (uart->num > 1) ? OMAP3430_PER_MOD : CORE_MOD;
|
OMAP3: PM: UART: disable clocks when idle and off-mode support
This patch allows the UART clocks to be disabled when the OMAP UARTs
are inactive, thus permitting the chip to hit retention in idle.
After the expiration of an activity timer, each UART is allowed to
disable its clocks so the system can enter retention. The activity
timer is (re)activated on any UART interrupt, UART wake event or any
IO pad wakeup. The actual disable of the UART clocks is done in the
'prepare_idle' hook called from the OMAP idle loop.
While the activity timer is active, the smart-idle mode of the UART is
also disabled. This is due to a "feature" of the UART module that
after a UART wakeup, the smart-idle mode may be entered before the
UART has communicated the interrupt, or upon TX, an idle mode may be
entered before the TX FIFOs are emptied.
Upon suspend, the 'prepare_suspend' hook cancels any pending activity
timers and allows the clocks to be disabled immediately.
In addition, upon disabling clocks the UART state is saved in case
of an off-mode transition while clocks are off.
Special thanks to Tero Kristo for the initial ideas and first versions
of UART idle support, and to Jouni Hogander for extra testing and
bugfixes.
Tested on OMAP3 (Beagle, RX51, SDP, EVM) and OMAP2 (n810)
Cc: Tero Kristo <tero.kristo@nokia.com>
Cc: Jouni Hogander <jouni.hogander@nokia.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-02-04 18:51:40 +00:00
|
|
|
u32 wk_mask = 0;
|
|
|
|
|
|
2010-12-22 04:05:14 +00:00
|
|
|
/* XXX These PRM accesses do not belong here */
|
OMAP3: PM: UART: disable clocks when idle and off-mode support
This patch allows the UART clocks to be disabled when the OMAP UARTs
are inactive, thus permitting the chip to hit retention in idle.
After the expiration of an activity timer, each UART is allowed to
disable its clocks so the system can enter retention. The activity
timer is (re)activated on any UART interrupt, UART wake event or any
IO pad wakeup. The actual disable of the UART clocks is done in the
'prepare_idle' hook called from the OMAP idle loop.
While the activity timer is active, the smart-idle mode of the UART is
also disabled. This is due to a "feature" of the UART module that
after a UART wakeup, the smart-idle mode may be entered before the
UART has communicated the interrupt, or upon TX, an idle mode may be
entered before the TX FIFOs are emptied.
Upon suspend, the 'prepare_suspend' hook cancels any pending activity
timers and allows the clocks to be disabled immediately.
In addition, upon disabling clocks the UART state is saved in case
of an off-mode transition while clocks are off.
Special thanks to Tero Kristo for the initial ideas and first versions
of UART idle support, and to Jouni Hogander for extra testing and
bugfixes.
Tested on OMAP3 (Beagle, RX51, SDP, EVM) and OMAP2 (n810)
Cc: Tero Kristo <tero.kristo@nokia.com>
Cc: Jouni Hogander <jouni.hogander@nokia.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-02-04 18:51:40 +00:00
|
|
|
uart->wk_en = OMAP34XX_PRM_REGADDR(mod, PM_WKEN1);
|
|
|
|
|
uart->wk_st = OMAP34XX_PRM_REGADDR(mod, PM_WKST1);
|
|
|
|
|
switch (uart->num) {
|
|
|
|
|
case 0:
|
|
|
|
|
wk_mask = OMAP3430_ST_UART1_MASK;
|
|
|
|
|
break;
|
|
|
|
|
case 1:
|
|
|
|
|
wk_mask = OMAP3430_ST_UART2_MASK;
|
|
|
|
|
break;
|
|
|
|
|
case 2:
|
|
|
|
|
wk_mask = OMAP3430_ST_UART3_MASK;
|
|
|
|
|
break;
|
2010-09-27 14:50:41 +00:00
|
|
|
case 3:
|
|
|
|
|
wk_mask = OMAP3630_ST_UART4_MASK;
|
|
|
|
|
break;
|
OMAP3: PM: UART: disable clocks when idle and off-mode support
This patch allows the UART clocks to be disabled when the OMAP UARTs
are inactive, thus permitting the chip to hit retention in idle.
After the expiration of an activity timer, each UART is allowed to
disable its clocks so the system can enter retention. The activity
timer is (re)activated on any UART interrupt, UART wake event or any
IO pad wakeup. The actual disable of the UART clocks is done in the
'prepare_idle' hook called from the OMAP idle loop.
While the activity timer is active, the smart-idle mode of the UART is
also disabled. This is due to a "feature" of the UART module that
after a UART wakeup, the smart-idle mode may be entered before the
UART has communicated the interrupt, or upon TX, an idle mode may be
entered before the TX FIFOs are emptied.
Upon suspend, the 'prepare_suspend' hook cancels any pending activity
timers and allows the clocks to be disabled immediately.
In addition, upon disabling clocks the UART state is saved in case
of an off-mode transition while clocks are off.
Special thanks to Tero Kristo for the initial ideas and first versions
of UART idle support, and to Jouni Hogander for extra testing and
bugfixes.
Tested on OMAP3 (Beagle, RX51, SDP, EVM) and OMAP2 (n810)
Cc: Tero Kristo <tero.kristo@nokia.com>
Cc: Jouni Hogander <jouni.hogander@nokia.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-02-04 18:51:40 +00:00
|
|
|
}
|
|
|
|
|
uart->wk_mask = wk_mask;
|
|
|
|
|
} else if (cpu_is_omap24xx()) {
|
|
|
|
|
u32 wk_mask = 0;
|
2010-10-20 23:19:03 +00:00
|
|
|
u32 wk_en = PM_WKEN1, wk_st = PM_WKST1;
|
OMAP3: PM: UART: disable clocks when idle and off-mode support
This patch allows the UART clocks to be disabled when the OMAP UARTs
are inactive, thus permitting the chip to hit retention in idle.
After the expiration of an activity timer, each UART is allowed to
disable its clocks so the system can enter retention. The activity
timer is (re)activated on any UART interrupt, UART wake event or any
IO pad wakeup. The actual disable of the UART clocks is done in the
'prepare_idle' hook called from the OMAP idle loop.
While the activity timer is active, the smart-idle mode of the UART is
also disabled. This is due to a "feature" of the UART module that
after a UART wakeup, the smart-idle mode may be entered before the
UART has communicated the interrupt, or upon TX, an idle mode may be
entered before the TX FIFOs are emptied.
Upon suspend, the 'prepare_suspend' hook cancels any pending activity
timers and allows the clocks to be disabled immediately.
In addition, upon disabling clocks the UART state is saved in case
of an off-mode transition while clocks are off.
Special thanks to Tero Kristo for the initial ideas and first versions
of UART idle support, and to Jouni Hogander for extra testing and
bugfixes.
Tested on OMAP3 (Beagle, RX51, SDP, EVM) and OMAP2 (n810)
Cc: Tero Kristo <tero.kristo@nokia.com>
Cc: Jouni Hogander <jouni.hogander@nokia.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-02-04 18:51:40 +00:00
|
|
|
|
|
|
|
|
switch (uart->num) {
|
|
|
|
|
case 0:
|
|
|
|
|
wk_mask = OMAP24XX_ST_UART1_MASK;
|
|
|
|
|
break;
|
|
|
|
|
case 1:
|
|
|
|
|
wk_mask = OMAP24XX_ST_UART2_MASK;
|
|
|
|
|
break;
|
|
|
|
|
case 2:
|
2010-10-20 23:19:03 +00:00
|
|
|
wk_en = OMAP24XX_PM_WKEN2;
|
|
|
|
|
wk_st = OMAP24XX_PM_WKST2;
|
OMAP3: PM: UART: disable clocks when idle and off-mode support
This patch allows the UART clocks to be disabled when the OMAP UARTs
are inactive, thus permitting the chip to hit retention in idle.
After the expiration of an activity timer, each UART is allowed to
disable its clocks so the system can enter retention. The activity
timer is (re)activated on any UART interrupt, UART wake event or any
IO pad wakeup. The actual disable of the UART clocks is done in the
'prepare_idle' hook called from the OMAP idle loop.
While the activity timer is active, the smart-idle mode of the UART is
also disabled. This is due to a "feature" of the UART module that
after a UART wakeup, the smart-idle mode may be entered before the
UART has communicated the interrupt, or upon TX, an idle mode may be
entered before the TX FIFOs are emptied.
Upon suspend, the 'prepare_suspend' hook cancels any pending activity
timers and allows the clocks to be disabled immediately.
In addition, upon disabling clocks the UART state is saved in case
of an off-mode transition while clocks are off.
Special thanks to Tero Kristo for the initial ideas and first versions
of UART idle support, and to Jouni Hogander for extra testing and
bugfixes.
Tested on OMAP3 (Beagle, RX51, SDP, EVM) and OMAP2 (n810)
Cc: Tero Kristo <tero.kristo@nokia.com>
Cc: Jouni Hogander <jouni.hogander@nokia.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-02-04 18:51:40 +00:00
|
|
|
wk_mask = OMAP24XX_ST_UART3_MASK;
|
|
|
|
|
break;
|
|
|
|
|
}
|
|
|
|
|
uart->wk_mask = wk_mask;
|
2010-10-20 23:19:03 +00:00
|
|
|
if (cpu_is_omap2430()) {
|
|
|
|
|
uart->wk_en = OMAP2430_PRM_REGADDR(CORE_MOD, wk_en);
|
|
|
|
|
uart->wk_st = OMAP2430_PRM_REGADDR(CORE_MOD, wk_st);
|
|
|
|
|
} else if (cpu_is_omap2420()) {
|
|
|
|
|
uart->wk_en = OMAP2420_PRM_REGADDR(CORE_MOD, wk_en);
|
|
|
|
|
uart->wk_st = OMAP2420_PRM_REGADDR(CORE_MOD, wk_st);
|
|
|
|
|
}
|
OMAP3: PM: UART: disable clocks when idle and off-mode support
This patch allows the UART clocks to be disabled when the OMAP UARTs
are inactive, thus permitting the chip to hit retention in idle.
After the expiration of an activity timer, each UART is allowed to
disable its clocks so the system can enter retention. The activity
timer is (re)activated on any UART interrupt, UART wake event or any
IO pad wakeup. The actual disable of the UART clocks is done in the
'prepare_idle' hook called from the OMAP idle loop.
While the activity timer is active, the smart-idle mode of the UART is
also disabled. This is due to a "feature" of the UART module that
after a UART wakeup, the smart-idle mode may be entered before the
UART has communicated the interrupt, or upon TX, an idle mode may be
entered before the TX FIFOs are emptied.
Upon suspend, the 'prepare_suspend' hook cancels any pending activity
timers and allows the clocks to be disabled immediately.
In addition, upon disabling clocks the UART state is saved in case
of an off-mode transition while clocks are off.
Special thanks to Tero Kristo for the initial ideas and first versions
of UART idle support, and to Jouni Hogander for extra testing and
bugfixes.
Tested on OMAP3 (Beagle, RX51, SDP, EVM) and OMAP2 (n810)
Cc: Tero Kristo <tero.kristo@nokia.com>
Cc: Jouni Hogander <jouni.hogander@nokia.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-02-04 18:51:40 +00:00
|
|
|
} else {
|
2010-08-02 10:18:11 +00:00
|
|
|
uart->wk_en = NULL;
|
|
|
|
|
uart->wk_st = NULL;
|
OMAP3: PM: UART: disable clocks when idle and off-mode support
This patch allows the UART clocks to be disabled when the OMAP UARTs
are inactive, thus permitting the chip to hit retention in idle.
After the expiration of an activity timer, each UART is allowed to
disable its clocks so the system can enter retention. The activity
timer is (re)activated on any UART interrupt, UART wake event or any
IO pad wakeup. The actual disable of the UART clocks is done in the
'prepare_idle' hook called from the OMAP idle loop.
While the activity timer is active, the smart-idle mode of the UART is
also disabled. This is due to a "feature" of the UART module that
after a UART wakeup, the smart-idle mode may be entered before the
UART has communicated the interrupt, or upon TX, an idle mode may be
entered before the TX FIFOs are emptied.
Upon suspend, the 'prepare_suspend' hook cancels any pending activity
timers and allows the clocks to be disabled immediately.
In addition, upon disabling clocks the UART state is saved in case
of an off-mode transition while clocks are off.
Special thanks to Tero Kristo for the initial ideas and first versions
of UART idle support, and to Jouni Hogander for extra testing and
bugfixes.
Tested on OMAP3 (Beagle, RX51, SDP, EVM) and OMAP2 (n810)
Cc: Tero Kristo <tero.kristo@nokia.com>
Cc: Jouni Hogander <jouni.hogander@nokia.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-02-04 18:51:40 +00:00
|
|
|
uart->wk_mask = 0;
|
|
|
|
|
}
|
2008-12-09 11:36:50 +00:00
|
|
|
}
|
|
|
|
|
|
OMAP3: PM: UART: disable clocks when idle and off-mode support
This patch allows the UART clocks to be disabled when the OMAP UARTs
are inactive, thus permitting the chip to hit retention in idle.
After the expiration of an activity timer, each UART is allowed to
disable its clocks so the system can enter retention. The activity
timer is (re)activated on any UART interrupt, UART wake event or any
IO pad wakeup. The actual disable of the UART clocks is done in the
'prepare_idle' hook called from the OMAP idle loop.
While the activity timer is active, the smart-idle mode of the UART is
also disabled. This is due to a "feature" of the UART module that
after a UART wakeup, the smart-idle mode may be entered before the
UART has communicated the interrupt, or upon TX, an idle mode may be
entered before the TX FIFOs are emptied.
Upon suspend, the 'prepare_suspend' hook cancels any pending activity
timers and allows the clocks to be disabled immediately.
In addition, upon disabling clocks the UART state is saved in case
of an off-mode transition while clocks are off.
Special thanks to Tero Kristo for the initial ideas and first versions
of UART idle support, and to Jouni Hogander for extra testing and
bugfixes.
Tested on OMAP3 (Beagle, RX51, SDP, EVM) and OMAP2 (n810)
Cc: Tero Kristo <tero.kristo@nokia.com>
Cc: Jouni Hogander <jouni.hogander@nokia.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-02-04 18:51:40 +00:00
|
|
|
#else
|
2010-10-11 11:05:18 +00:00
|
|
|
static void omap_uart_block_sleep(struct omap_uart_state *uart)
|
|
|
|
|
{
|
|
|
|
|
/* Needed to enable UART clocks when built without CONFIG_PM */
|
|
|
|
|
omap_uart_enable_clocks(uart);
|
|
|
|
|
}
|
OMAP3: PM: UART: disable clocks when idle and off-mode support
This patch allows the UART clocks to be disabled when the OMAP UARTs
are inactive, thus permitting the chip to hit retention in idle.
After the expiration of an activity timer, each UART is allowed to
disable its clocks so the system can enter retention. The activity
timer is (re)activated on any UART interrupt, UART wake event or any
IO pad wakeup. The actual disable of the UART clocks is done in the
'prepare_idle' hook called from the OMAP idle loop.
While the activity timer is active, the smart-idle mode of the UART is
also disabled. This is due to a "feature" of the UART module that
after a UART wakeup, the smart-idle mode may be entered before the
UART has communicated the interrupt, or upon TX, an idle mode may be
entered before the TX FIFOs are emptied.
Upon suspend, the 'prepare_suspend' hook cancels any pending activity
timers and allows the clocks to be disabled immediately.
In addition, upon disabling clocks the UART state is saved in case
of an off-mode transition while clocks are off.
Special thanks to Tero Kristo for the initial ideas and first versions
of UART idle support, and to Jouni Hogander for extra testing and
bugfixes.
Tested on OMAP3 (Beagle, RX51, SDP, EVM) and OMAP2 (n810)
Cc: Tero Kristo <tero.kristo@nokia.com>
Cc: Jouni Hogander <jouni.hogander@nokia.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-02-04 18:51:40 +00:00
|
|
|
#endif /* CONFIG_PM */
|
|
|
|
|
|
2011-11-07 13:25:05 +00:00
|
|
|
#ifdef CONFIG_OMAP_MUX
|
|
|
|
|
static struct omap_device_pad default_uart1_pads[] __initdata = {
|
|
|
|
|
{
|
|
|
|
|
.name = "uart1_cts.uart1_cts",
|
|
|
|
|
.enable = OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0,
|
|
|
|
|
},
|
|
|
|
|
{
|
|
|
|
|
.name = "uart1_rts.uart1_rts",
|
|
|
|
|
.enable = OMAP_PIN_OUTPUT | OMAP_MUX_MODE0,
|
|
|
|
|
},
|
|
|
|
|
{
|
|
|
|
|
.name = "uart1_tx.uart1_tx",
|
|
|
|
|
.enable = OMAP_PIN_OUTPUT | OMAP_MUX_MODE0,
|
|
|
|
|
},
|
|
|
|
|
{
|
|
|
|
|
.name = "uart1_rx.uart1_rx",
|
|
|
|
|
.flags = OMAP_DEVICE_PAD_REMUX | OMAP_DEVICE_PAD_WAKEUP,
|
|
|
|
|
.enable = OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0,
|
|
|
|
|
.idle = OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0,
|
|
|
|
|
},
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
static struct omap_device_pad default_uart2_pads[] __initdata = {
|
|
|
|
|
{
|
|
|
|
|
.name = "uart2_cts.uart2_cts",
|
|
|
|
|
.enable = OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0,
|
|
|
|
|
},
|
|
|
|
|
{
|
|
|
|
|
.name = "uart2_rts.uart2_rts",
|
|
|
|
|
.enable = OMAP_PIN_OUTPUT | OMAP_MUX_MODE0,
|
|
|
|
|
},
|
|
|
|
|
{
|
|
|
|
|
.name = "uart2_tx.uart2_tx",
|
|
|
|
|
.enable = OMAP_PIN_OUTPUT | OMAP_MUX_MODE0,
|
|
|
|
|
},
|
|
|
|
|
{
|
|
|
|
|
.name = "uart2_rx.uart2_rx",
|
|
|
|
|
.flags = OMAP_DEVICE_PAD_REMUX | OMAP_DEVICE_PAD_WAKEUP,
|
|
|
|
|
.enable = OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0,
|
|
|
|
|
.idle = OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0,
|
|
|
|
|
},
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
static struct omap_device_pad default_uart3_pads[] __initdata = {
|
|
|
|
|
{
|
|
|
|
|
.name = "uart3_cts_rctx.uart3_cts_rctx",
|
|
|
|
|
.enable = OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0,
|
|
|
|
|
},
|
|
|
|
|
{
|
|
|
|
|
.name = "uart3_rts_sd.uart3_rts_sd",
|
|
|
|
|
.enable = OMAP_PIN_OUTPUT | OMAP_MUX_MODE0,
|
|
|
|
|
},
|
|
|
|
|
{
|
|
|
|
|
.name = "uart3_tx_irtx.uart3_tx_irtx",
|
|
|
|
|
.enable = OMAP_PIN_OUTPUT | OMAP_MUX_MODE0,
|
|
|
|
|
},
|
|
|
|
|
{
|
|
|
|
|
.name = "uart3_rx_irrx.uart3_rx_irrx",
|
|
|
|
|
.flags = OMAP_DEVICE_PAD_REMUX | OMAP_DEVICE_PAD_WAKEUP,
|
|
|
|
|
.enable = OMAP_PIN_INPUT | OMAP_MUX_MODE0,
|
|
|
|
|
.idle = OMAP_PIN_INPUT | OMAP_MUX_MODE0,
|
|
|
|
|
},
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
static struct omap_device_pad default_omap36xx_uart4_pads[] __initdata = {
|
|
|
|
|
{
|
|
|
|
|
.name = "gpmc_wait2.uart4_tx",
|
|
|
|
|
.enable = OMAP_PIN_OUTPUT | OMAP_MUX_MODE0,
|
|
|
|
|
},
|
|
|
|
|
{
|
|
|
|
|
.name = "gpmc_wait3.uart4_rx",
|
|
|
|
|
.flags = OMAP_DEVICE_PAD_REMUX | OMAP_DEVICE_PAD_WAKEUP,
|
|
|
|
|
.enable = OMAP_PIN_INPUT | OMAP_MUX_MODE2,
|
|
|
|
|
.idle = OMAP_PIN_INPUT | OMAP_MUX_MODE2,
|
|
|
|
|
},
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
static struct omap_device_pad default_omap4_uart4_pads[] __initdata = {
|
|
|
|
|
{
|
|
|
|
|
.name = "uart4_tx.uart4_tx",
|
|
|
|
|
.enable = OMAP_PIN_OUTPUT | OMAP_MUX_MODE0,
|
|
|
|
|
},
|
|
|
|
|
{
|
|
|
|
|
.name = "uart4_rx.uart4_rx",
|
|
|
|
|
.flags = OMAP_DEVICE_PAD_REMUX | OMAP_DEVICE_PAD_WAKEUP,
|
|
|
|
|
.enable = OMAP_PIN_INPUT | OMAP_MUX_MODE0,
|
|
|
|
|
.idle = OMAP_PIN_INPUT | OMAP_MUX_MODE0,
|
|
|
|
|
},
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
static void omap_serial_fill_default_pads(struct omap_board_data *bdata)
|
|
|
|
|
{
|
|
|
|
|
switch (bdata->id) {
|
|
|
|
|
case 0:
|
|
|
|
|
bdata->pads = default_uart1_pads;
|
|
|
|
|
bdata->pads_cnt = ARRAY_SIZE(default_uart1_pads);
|
|
|
|
|
break;
|
|
|
|
|
case 1:
|
|
|
|
|
bdata->pads = default_uart2_pads;
|
|
|
|
|
bdata->pads_cnt = ARRAY_SIZE(default_uart2_pads);
|
|
|
|
|
break;
|
|
|
|
|
case 2:
|
|
|
|
|
bdata->pads = default_uart3_pads;
|
|
|
|
|
bdata->pads_cnt = ARRAY_SIZE(default_uart3_pads);
|
|
|
|
|
break;
|
|
|
|
|
case 3:
|
|
|
|
|
if (cpu_is_omap44xx()) {
|
|
|
|
|
bdata->pads = default_omap4_uart4_pads;
|
|
|
|
|
bdata->pads_cnt =
|
|
|
|
|
ARRAY_SIZE(default_omap4_uart4_pads);
|
|
|
|
|
} else if (cpu_is_omap3630()) {
|
|
|
|
|
bdata->pads = default_omap36xx_uart4_pads;
|
|
|
|
|
bdata->pads_cnt =
|
|
|
|
|
ARRAY_SIZE(default_omap36xx_uart4_pads);
|
|
|
|
|
}
|
|
|
|
|
break;
|
|
|
|
|
default:
|
|
|
|
|
break;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
#else
|
|
|
|
|
static void omap_serial_fill_default_pads(struct omap_board_data *bdata) {}
|
|
|
|
|
#endif
|
|
|
|
|
|
2011-02-14 23:40:20 +00:00
|
|
|
static int __init omap_serial_early_init(void)
|
2005-11-10 14:26:51 +00:00
|
|
|
{
|
2010-09-27 14:49:38 +00:00
|
|
|
int i = 0;
|
2005-11-10 14:26:51 +00:00
|
|
|
|
2010-09-27 14:49:38 +00:00
|
|
|
do {
|
|
|
|
|
char oh_name[MAX_UART_HWMOD_NAME_LEN];
|
|
|
|
|
struct omap_hwmod *oh;
|
|
|
|
|
struct omap_uart_state *uart;
|
2010-02-25 09:40:19 +00:00
|
|
|
|
2010-09-27 14:49:38 +00:00
|
|
|
snprintf(oh_name, MAX_UART_HWMOD_NAME_LEN,
|
|
|
|
|
"uart%d", i + 1);
|
|
|
|
|
oh = omap_hwmod_lookup(oh_name);
|
|
|
|
|
if (!oh)
|
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
uart = kzalloc(sizeof(struct omap_uart_state), GFP_KERNEL);
|
|
|
|
|
if (WARN_ON(!uart))
|
2011-02-14 23:40:20 +00:00
|
|
|
return -ENODEV;
|
2005-11-10 14:26:51 +00:00
|
|
|
|
2010-09-27 14:49:38 +00:00
|
|
|
uart->oh = oh;
|
|
|
|
|
uart->num = i++;
|
|
|
|
|
list_add_tail(&uart->node, &uart_list);
|
|
|
|
|
num_uarts++;
|
2005-11-10 14:26:51 +00:00
|
|
|
|
2009-10-16 16:53:00 +00:00
|
|
|
/*
|
2011-02-28 18:58:14 +00:00
|
|
|
* NOTE: omap_hwmod_setup*() has not yet been called,
|
2010-09-27 14:49:38 +00:00
|
|
|
* so no hwmod functions will work yet.
|
2009-10-16 16:53:00 +00:00
|
|
|
*/
|
2008-10-06 12:49:15 +00:00
|
|
|
|
2010-09-27 14:49:38 +00:00
|
|
|
/*
|
|
|
|
|
* During UART early init, device need to be probed
|
|
|
|
|
* to determine SoC specific init before omap_device
|
|
|
|
|
* is ready. Therefore, don't allow idle here
|
|
|
|
|
*/
|
|
|
|
|
uart->oh->flags |= HWMOD_INIT_NO_IDLE | HWMOD_INIT_NO_RESET;
|
|
|
|
|
} while (1);
|
2011-02-14 23:40:20 +00:00
|
|
|
|
|
|
|
|
return 0;
|
2009-09-03 17:14:02 +00:00
|
|
|
}
|
2011-02-14 23:40:20 +00:00
|
|
|
core_initcall(omap_serial_early_init);
|
2009-09-03 17:14:02 +00:00
|
|
|
|
2009-12-12 00:16:35 +00:00
|
|
|
/**
|
|
|
|
|
* omap_serial_init_port() - initialize single serial port
|
2010-12-23 02:42:35 +00:00
|
|
|
* @bdata: port specific board data pointer
|
2009-12-12 00:16:35 +00:00
|
|
|
*
|
2010-12-23 02:42:35 +00:00
|
|
|
* This function initialies serial driver for given port only.
|
2009-12-12 00:16:35 +00:00
|
|
|
* Platforms can call this function instead of omap_serial_init()
|
|
|
|
|
* if they don't plan to use all available UARTs as serial ports.
|
|
|
|
|
*
|
|
|
|
|
* Don't mix calls to omap_serial_init_port() and omap_serial_init(),
|
|
|
|
|
* use only one of the two.
|
|
|
|
|
*/
|
2010-12-23 02:42:35 +00:00
|
|
|
void __init omap_serial_init_port(struct omap_board_data *bdata)
|
2009-09-03 17:14:02 +00:00
|
|
|
{
|
2009-12-12 00:16:35 +00:00
|
|
|
struct omap_uart_state *uart;
|
2010-09-27 14:49:38 +00:00
|
|
|
struct omap_hwmod *oh;
|
2011-07-21 20:48:45 +00:00
|
|
|
struct platform_device *pdev;
|
2010-09-27 14:49:38 +00:00
|
|
|
void *pdata = NULL;
|
|
|
|
|
u32 pdata_size = 0;
|
|
|
|
|
char *name;
|
|
|
|
|
struct omap_uart_port_info omap_up;
|
2009-05-28 22:44:54 +00:00
|
|
|
|
2010-12-23 02:42:35 +00:00
|
|
|
if (WARN_ON(!bdata))
|
2010-09-27 14:49:38 +00:00
|
|
|
return;
|
2010-12-23 02:42:35 +00:00
|
|
|
if (WARN_ON(bdata->id < 0))
|
|
|
|
|
return;
|
|
|
|
|
if (WARN_ON(bdata->id >= num_uarts))
|
2010-02-27 20:13:43 +00:00
|
|
|
return;
|
2009-12-12 00:16:35 +00:00
|
|
|
|
2010-09-27 14:49:38 +00:00
|
|
|
list_for_each_entry(uart, &uart_list, node)
|
2010-12-23 02:42:35 +00:00
|
|
|
if (bdata->id == uart->num)
|
2010-09-27 14:49:38 +00:00
|
|
|
break;
|
2009-12-14 13:59:18 +00:00
|
|
|
|
2010-09-27 14:49:38 +00:00
|
|
|
oh = uart->oh;
|
|
|
|
|
uart->dma_enabled = 0;
|
|
|
|
|
name = DRIVER_NAME;
|
|
|
|
|
|
|
|
|
|
omap_up.dma_enabled = uart->dma_enabled;
|
|
|
|
|
omap_up.uartclk = OMAP24XX_BASE_BAUD * 16;
|
2011-09-13 08:31:01 +00:00
|
|
|
omap_up.flags = UPF_BOOT_AUTOCONF;
|
2010-09-27 14:49:38 +00:00
|
|
|
|
|
|
|
|
pdata = &omap_up;
|
|
|
|
|
pdata_size = sizeof(struct omap_uart_port_info);
|
|
|
|
|
|
|
|
|
|
if (WARN_ON(!oh))
|
|
|
|
|
return;
|
|
|
|
|
|
2011-07-21 20:48:45 +00:00
|
|
|
pdev = omap_device_build(name, uart->num, oh, pdata, pdata_size,
|
2011-08-10 13:30:09 +00:00
|
|
|
NULL, 0, false);
|
2011-07-21 20:48:45 +00:00
|
|
|
WARN(IS_ERR(pdev), "Could not build omap_device for %s: %s.\n",
|
2010-09-27 14:49:38 +00:00
|
|
|
name, oh->name);
|
|
|
|
|
|
2011-08-01 16:33:13 +00:00
|
|
|
omap_device_disable_idle_on_suspend(pdev);
|
2010-12-23 02:42:35 +00:00
|
|
|
oh->mux = omap_hwmod_mux_init(bdata->pads, bdata->pads_cnt);
|
|
|
|
|
|
2011-07-21 20:48:45 +00:00
|
|
|
uart->pdev = pdev;
|
2010-09-27 14:49:38 +00:00
|
|
|
|
|
|
|
|
oh->dev_attr = uart;
|
|
|
|
|
|
2011-01-25 23:07:35 +00:00
|
|
|
console_lock(); /* in case the earlycon is on the UART */
|
OMAP2+: PM/serial: hold console semaphore while OMAP UARTs are disabled
The console semaphore must be held while the OMAP UART devices are
disabled, lest a console write cause an ARM abort (and a kernel crash)
when the underlying console device is inaccessible. These crashes
only occur when the console is on one of the OMAP internal serial
ports.
While this problem has been latent in the PM idle loop for some time,
the crash was not triggerable with an unmodified kernel until commit
6f251e9db1093c187addc309b5f2f7fe3efd2995 ("OMAP: UART: omap_device
conversions, remove implicit 8520 assumptions"). After this patch, a
console write often occurs after the console UART has been disabled in
the idle loop, crashing the system. Several users have encountered
this bug:
http://www.mail-archive.com/linux-omap@vger.kernel.org/msg38396.html
http://www.mail-archive.com/linux-omap@vger.kernel.org/msg36602.html
The same commit also introduced new code that disabled the UARTs
during init, in omap_serial_init_port(). The kernel will also crash
in this code when earlyconsole and extra debugging is enabled:
http://www.mail-archive.com/linux-omap@vger.kernel.org/msg36411.html
The minimal fix for the -rc series is to hold the console semaphore
while the OMAP UARTs are disabled. This is a somewhat overbroad fix,
since the console may not be located on an OMAP UART, as is the case
with the GPMC UART on Zoom3. While it is technically possible to
determine which devices the console or earlyconsole is actually
running on, it is not a trivial problem to solve, and the code to do
so is not really appropriate for the -rc series.
The right long-term fix is to ensure that no code outside of the OMAP
serial driver can disable an OMAP UART. As I understand it, code to
implement this is under development by TI.
This patch is a collaboration between Paul Walmsley <paul@pwsan.com>
and Tony Lindgren <tony@atomide.com>. Thanks to Ming Lei
<tom.leiming@gmail.com> and Pramod <pramod.gurav@ti.com> for their
feedback on earlier versions of this patch.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Acked-by: Kevin Hilman <khilman@deeprootsystems.com>
Cc: Ming Lei <tom.leiming@gmail.com>
Cc: Pramod <pramod.gurav@ti.com>
Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Cc: Jean Pihet <jean.pihet@newoldbits.com>
Cc: Govindraj.R <govindraj.raja@ti.com>
2010-11-24 23:49:05 +00:00
|
|
|
|
2010-09-27 14:49:38 +00:00
|
|
|
/*
|
|
|
|
|
* Because of early UART probing, UART did not get idled
|
|
|
|
|
* on init. Now that omap_device is ready, ensure full idle
|
|
|
|
|
* before doing omap_device_enable().
|
|
|
|
|
*/
|
|
|
|
|
omap_hwmod_idle(uart->oh);
|
|
|
|
|
|
|
|
|
|
omap_device_enable(uart->pdev);
|
|
|
|
|
omap_uart_idle_init(uart);
|
|
|
|
|
omap_hwmod_enable_wakeup(uart->oh);
|
|
|
|
|
omap_device_idle(uart->pdev);
|
|
|
|
|
|
|
|
|
|
omap_uart_block_sleep(uart);
|
2011-01-25 23:07:35 +00:00
|
|
|
console_unlock();
|
OMAP2+: PM/serial: hold console semaphore while OMAP UARTs are disabled
The console semaphore must be held while the OMAP UART devices are
disabled, lest a console write cause an ARM abort (and a kernel crash)
when the underlying console device is inaccessible. These crashes
only occur when the console is on one of the OMAP internal serial
ports.
While this problem has been latent in the PM idle loop for some time,
the crash was not triggerable with an unmodified kernel until commit
6f251e9db1093c187addc309b5f2f7fe3efd2995 ("OMAP: UART: omap_device
conversions, remove implicit 8520 assumptions"). After this patch, a
console write often occurs after the console UART has been disabled in
the idle loop, crashing the system. Several users have encountered
this bug:
http://www.mail-archive.com/linux-omap@vger.kernel.org/msg38396.html
http://www.mail-archive.com/linux-omap@vger.kernel.org/msg36602.html
The same commit also introduced new code that disabled the UARTs
during init, in omap_serial_init_port(). The kernel will also crash
in this code when earlyconsole and extra debugging is enabled:
http://www.mail-archive.com/linux-omap@vger.kernel.org/msg36411.html
The minimal fix for the -rc series is to hold the console semaphore
while the OMAP UARTs are disabled. This is a somewhat overbroad fix,
since the console may not be located on an OMAP UART, as is the case
with the GPMC UART on Zoom3. While it is technically possible to
determine which devices the console or earlyconsole is actually
running on, it is not a trivial problem to solve, and the code to do
so is not really appropriate for the -rc series.
The right long-term fix is to ensure that no code outside of the OMAP
serial driver can disable an OMAP UART. As I understand it, code to
implement this is under development by TI.
This patch is a collaboration between Paul Walmsley <paul@pwsan.com>
and Tony Lindgren <tony@atomide.com>. Thanks to Ming Lei
<tom.leiming@gmail.com> and Pramod <pramod.gurav@ti.com> for their
feedback on earlier versions of this patch.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Acked-by: Kevin Hilman <khilman@deeprootsystems.com>
Cc: Ming Lei <tom.leiming@gmail.com>
Cc: Pramod <pramod.gurav@ti.com>
Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Cc: Jean Pihet <jean.pihet@newoldbits.com>
Cc: Govindraj.R <govindraj.raja@ti.com>
2010-11-24 23:49:05 +00:00
|
|
|
|
2011-11-07 13:25:05 +00:00
|
|
|
if (((cpu_is_omap34xx() || cpu_is_omap44xx()) && bdata->pads) ||
|
|
|
|
|
(pdata->wk_en && pdata->wk_mask))
|
2011-07-21 20:48:45 +00:00
|
|
|
device_init_wakeup(&pdev->dev, true);
|
2010-08-02 10:18:12 +00:00
|
|
|
|
|
|
|
|
/* Enable the MDR1 errata for OMAP3 */
|
2011-12-13 18:46:44 +00:00
|
|
|
if (cpu_is_omap34xx() && !(cpu_is_ti81xx() || cpu_is_am33xx()))
|
2010-08-02 10:18:12 +00:00
|
|
|
uart->errata |= UART_ERRATA_i202_MDR1_ACCESS;
|
2009-12-12 00:16:35 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/**
|
tree-wide: fix comment/printk typos
"gadget", "through", "command", "maintain", "maintain", "controller", "address",
"between", "initiali[zs]e", "instead", "function", "select", "already",
"equal", "access", "management", "hierarchy", "registration", "interest",
"relative", "memory", "offset", "already",
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Jiri Kosina <jkosina@suse.cz>
2010-11-01 19:38:34 +00:00
|
|
|
* omap_serial_init() - initialize all supported serial ports
|
2009-12-12 00:16:35 +00:00
|
|
|
*
|
|
|
|
|
* Initializes all available UARTs as serial ports. Platforms
|
|
|
|
|
* can call this function when they want to have default behaviour
|
|
|
|
|
* for serial ports (e.g initialize them all as serial ports).
|
|
|
|
|
*/
|
|
|
|
|
void __init omap_serial_init(void)
|
|
|
|
|
{
|
2010-09-27 14:49:38 +00:00
|
|
|
struct omap_uart_state *uart;
|
2010-12-23 02:42:35 +00:00
|
|
|
struct omap_board_data bdata;
|
2009-12-12 00:16:35 +00:00
|
|
|
|
2010-12-23 02:42:35 +00:00
|
|
|
list_for_each_entry(uart, &uart_list, node) {
|
|
|
|
|
bdata.id = uart->num;
|
|
|
|
|
bdata.flags = 0;
|
|
|
|
|
bdata.pads = NULL;
|
|
|
|
|
bdata.pads_cnt = 0;
|
2011-11-07 13:25:05 +00:00
|
|
|
|
|
|
|
|
if (cpu_is_omap44xx() || cpu_is_omap34xx())
|
|
|
|
|
omap_serial_fill_default_pads(&bdata);
|
|
|
|
|
|
2010-12-23 02:42:35 +00:00
|
|
|
omap_serial_init_port(&bdata);
|
|
|
|
|
|
|
|
|
|
}
|
2005-11-10 14:26:51 +00:00
|
|
|
}
|
