2011-04-07 19:27:43 +00:00
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/*
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* Sony CXD2820R demodulator driver
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*
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* Copyright (C) 2010 Antti Palosaari <crope@iki.fi>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
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*/
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#include "cxd2820r_priv.h"
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int cxd2820r_debug;
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module_param_named(debug, cxd2820r_debug, int, 0644);
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MODULE_PARM_DESC(debug, "Turn on/off frontend debugging (default:off).");
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/* TODO: temporary hack, will be removed later when there is app support */
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unsigned int cxd2820r_dvbt2_freq[5];
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int cxd2820r_dvbt2_count;
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module_param_array_named(dvbt2_freq, cxd2820r_dvbt2_freq, int,
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&cxd2820r_dvbt2_count, 0644);
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MODULE_PARM_DESC(dvbt2_freq, "RF frequencies forced to DVB-T2 (unit Hz)");
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/* write multiple registers */
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static int cxd2820r_wr_regs_i2c(struct cxd2820r_priv *priv, u8 i2c, u8 reg,
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u8 *val, int len)
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{
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int ret;
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u8 buf[len+1];
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struct i2c_msg msg[1] = {
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{
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.addr = i2c,
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.flags = 0,
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.len = sizeof(buf),
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.buf = buf,
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}
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};
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buf[0] = reg;
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memcpy(&buf[1], val, len);
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ret = i2c_transfer(priv->i2c, msg, 1);
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if (ret == 1) {
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ret = 0;
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} else {
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warn("i2c wr failed ret:%d reg:%02x len:%d", ret, reg, len);
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ret = -EREMOTEIO;
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}
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return ret;
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}
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/* read multiple registers */
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static int cxd2820r_rd_regs_i2c(struct cxd2820r_priv *priv, u8 i2c, u8 reg,
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u8 *val, int len)
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{
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int ret;
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u8 buf[len];
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struct i2c_msg msg[2] = {
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{
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.addr = i2c,
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.flags = 0,
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.len = 1,
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.buf = ®,
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}, {
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.addr = i2c,
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.flags = I2C_M_RD,
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.len = sizeof(buf),
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.buf = buf,
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}
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};
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ret = i2c_transfer(priv->i2c, msg, 2);
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if (ret == 2) {
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memcpy(val, buf, len);
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ret = 0;
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} else {
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warn("i2c rd failed ret:%d reg:%02x len:%d", ret, reg, len);
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ret = -EREMOTEIO;
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}
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return ret;
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}
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/* write multiple registers */
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2011-05-02 21:19:13 +00:00
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int cxd2820r_wr_regs(struct cxd2820r_priv *priv, u32 reginfo, u8 *val,
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2011-04-07 19:27:43 +00:00
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int len)
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{
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int ret;
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u8 i2c_addr;
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u8 reg = (reginfo >> 0) & 0xff;
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u8 bank = (reginfo >> 8) & 0xff;
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u8 i2c = (reginfo >> 16) & 0x01;
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/* select I2C */
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if (i2c)
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i2c_addr = priv->cfg.i2c_address | (1 << 1); /* DVB-C */
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else
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i2c_addr = priv->cfg.i2c_address; /* DVB-T/T2 */
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/* switch bank if needed */
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if (bank != priv->bank[i2c]) {
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ret = cxd2820r_wr_regs_i2c(priv, i2c_addr, 0x00, &bank, 1);
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if (ret)
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return ret;
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priv->bank[i2c] = bank;
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}
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return cxd2820r_wr_regs_i2c(priv, i2c_addr, reg, val, len);
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}
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/* read multiple registers */
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2011-05-02 21:19:13 +00:00
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int cxd2820r_rd_regs(struct cxd2820r_priv *priv, u32 reginfo, u8 *val,
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2011-04-07 19:27:43 +00:00
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int len)
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{
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int ret;
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u8 i2c_addr;
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u8 reg = (reginfo >> 0) & 0xff;
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u8 bank = (reginfo >> 8) & 0xff;
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u8 i2c = (reginfo >> 16) & 0x01;
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/* select I2C */
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if (i2c)
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i2c_addr = priv->cfg.i2c_address | (1 << 1); /* DVB-C */
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else
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i2c_addr = priv->cfg.i2c_address; /* DVB-T/T2 */
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/* switch bank if needed */
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if (bank != priv->bank[i2c]) {
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ret = cxd2820r_wr_regs_i2c(priv, i2c_addr, 0x00, &bank, 1);
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if (ret)
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return ret;
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priv->bank[i2c] = bank;
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}
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return cxd2820r_rd_regs_i2c(priv, i2c_addr, reg, val, len);
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}
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/* write single register */
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2011-05-02 21:19:13 +00:00
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int cxd2820r_wr_reg(struct cxd2820r_priv *priv, u32 reg, u8 val)
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2011-04-07 19:27:43 +00:00
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{
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return cxd2820r_wr_regs(priv, reg, &val, 1);
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}
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/* read single register */
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2011-05-02 21:19:13 +00:00
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int cxd2820r_rd_reg(struct cxd2820r_priv *priv, u32 reg, u8 *val)
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2011-04-07 19:27:43 +00:00
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{
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return cxd2820r_rd_regs(priv, reg, val, 1);
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}
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/* write single register with mask */
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2011-05-02 21:19:13 +00:00
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int cxd2820r_wr_reg_mask(struct cxd2820r_priv *priv, u32 reg, u8 val,
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2011-04-07 19:27:43 +00:00
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u8 mask)
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{
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int ret;
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u8 tmp;
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/* no need for read if whole reg is written */
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if (mask != 0xff) {
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ret = cxd2820r_rd_reg(priv, reg, &tmp);
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if (ret)
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return ret;
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val &= mask;
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tmp &= ~mask;
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val |= tmp;
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}
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return cxd2820r_wr_reg(priv, reg, val);
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}
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2011-05-02 21:19:13 +00:00
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int cxd2820r_gpio(struct dvb_frontend *fe)
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2011-04-07 19:27:43 +00:00
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{
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struct cxd2820r_priv *priv = fe->demodulator_priv;
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int ret, i;
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u8 *gpio, tmp0, tmp1;
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dbg("%s: delsys=%d", __func__, fe->dtv_property_cache.delivery_system);
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switch (fe->dtv_property_cache.delivery_system) {
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case SYS_DVBT:
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gpio = priv->cfg.gpio_dvbt;
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break;
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case SYS_DVBT2:
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gpio = priv->cfg.gpio_dvbt2;
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break;
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case SYS_DVBC_ANNEX_AC:
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gpio = priv->cfg.gpio_dvbc;
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break;
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default:
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ret = -EINVAL;
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goto error;
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}
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/* update GPIOs only when needed */
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if (!memcmp(gpio, priv->gpio, sizeof(priv->gpio)))
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return 0;
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tmp0 = 0x00;
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tmp1 = 0x00;
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for (i = 0; i < sizeof(priv->gpio); i++) {
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/* enable / disable */
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if (gpio[i] & CXD2820R_GPIO_E)
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tmp0 |= (2 << 6) >> (2 * i);
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else
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tmp0 |= (1 << 6) >> (2 * i);
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/* input / output */
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if (gpio[i] & CXD2820R_GPIO_I)
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tmp1 |= (1 << (3 + i));
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else
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tmp1 |= (0 << (3 + i));
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/* high / low */
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if (gpio[i] & CXD2820R_GPIO_H)
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tmp1 |= (1 << (0 + i));
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else
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tmp1 |= (0 << (0 + i));
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dbg("%s: GPIO i=%d %02x %02x", __func__, i, tmp0, tmp1);
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}
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dbg("%s: wr gpio=%02x %02x", __func__, tmp0, tmp1);
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/* write bits [7:2] */
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ret = cxd2820r_wr_reg_mask(priv, 0x00089, tmp0, 0xfc);
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if (ret)
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goto error;
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/* write bits [5:0] */
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ret = cxd2820r_wr_reg_mask(priv, 0x0008e, tmp1, 0x3f);
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if (ret)
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goto error;
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memcpy(priv->gpio, gpio, sizeof(priv->gpio));
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return ret;
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error:
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dbg("%s: failed:%d", __func__, ret);
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return ret;
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}
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/* lock FE */
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static int cxd2820r_lock(struct cxd2820r_priv *priv, int active_fe)
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{
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int ret = 0;
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dbg("%s: active_fe=%d", __func__, active_fe);
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mutex_lock(&priv->fe_lock);
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/* -1=NONE, 0=DVB-T/T2, 1=DVB-C */
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if (priv->active_fe == active_fe)
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;
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else if (priv->active_fe == -1)
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priv->active_fe = active_fe;
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else
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ret = -EBUSY;
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mutex_unlock(&priv->fe_lock);
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return ret;
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}
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/* unlock FE */
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static void cxd2820r_unlock(struct cxd2820r_priv *priv, int active_fe)
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{
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dbg("%s: active_fe=%d", __func__, active_fe);
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mutex_lock(&priv->fe_lock);
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/* -1=NONE, 0=DVB-T/T2, 1=DVB-C */
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if (priv->active_fe == active_fe)
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priv->active_fe = -1;
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mutex_unlock(&priv->fe_lock);
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return;
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}
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/* 64 bit div with round closest, like DIV_ROUND_CLOSEST but 64 bit */
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2011-05-02 21:19:13 +00:00
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u32 cxd2820r_div_u64_round_closest(u64 dividend, u32 divisor)
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2011-04-07 19:27:43 +00:00
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{
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return div_u64(dividend + (divisor / 2), divisor);
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}
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static int cxd2820r_set_frontend(struct dvb_frontend *fe,
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struct dvb_frontend_parameters *p)
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{
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struct cxd2820r_priv *priv = fe->demodulator_priv;
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struct dtv_frontend_properties *c = &fe->dtv_property_cache;
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int ret;
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dbg("%s: delsys=%d", __func__, fe->dtv_property_cache.delivery_system);
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if (fe->ops.info.type == FE_OFDM) {
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/* DVB-T/T2 */
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ret = cxd2820r_lock(priv, 0);
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if (ret)
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return ret;
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switch (priv->delivery_system) {
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case SYS_UNDEFINED:
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if (c->delivery_system == SYS_DVBT) {
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/* SLEEP => DVB-T */
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ret = cxd2820r_set_frontend_t(fe, p);
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} else {
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/* SLEEP => DVB-T2 */
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ret = cxd2820r_set_frontend_t2(fe, p);
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}
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break;
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case SYS_DVBT:
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if (c->delivery_system == SYS_DVBT) {
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/* DVB-T => DVB-T */
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ret = cxd2820r_set_frontend_t(fe, p);
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} else if (c->delivery_system == SYS_DVBT2) {
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/* DVB-T => DVB-T2 */
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ret = cxd2820r_sleep_t(fe);
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ret = cxd2820r_set_frontend_t2(fe, p);
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}
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break;
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case SYS_DVBT2:
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if (c->delivery_system == SYS_DVBT2) {
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/* DVB-T2 => DVB-T2 */
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ret = cxd2820r_set_frontend_t2(fe, p);
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} else if (c->delivery_system == SYS_DVBT) {
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/* DVB-T2 => DVB-T */
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ret = cxd2820r_sleep_t2(fe);
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ret = cxd2820r_set_frontend_t(fe, p);
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}
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break;
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default:
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dbg("%s: error state=%d", __func__,
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priv->delivery_system);
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ret = -EINVAL;
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}
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} else {
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/* DVB-C */
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ret = cxd2820r_lock(priv, 1);
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if (ret)
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return ret;
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ret = cxd2820r_set_frontend_c(fe, p);
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}
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return ret;
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}
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static int cxd2820r_read_status(struct dvb_frontend *fe, fe_status_t *status)
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{
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struct cxd2820r_priv *priv = fe->demodulator_priv;
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int ret;
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|
|
dbg("%s: delsys=%d", __func__, fe->dtv_property_cache.delivery_system);
|
|
|
|
|
|
|
|
if (fe->ops.info.type == FE_OFDM) {
|
|
|
|
/* DVB-T/T2 */
|
|
|
|
ret = cxd2820r_lock(priv, 0);
|
|
|
|
if (ret)
|
|
|
|
return ret;
|
|
|
|
|
|
|
|
switch (fe->dtv_property_cache.delivery_system) {
|
|
|
|
case SYS_DVBT:
|
|
|
|
ret = cxd2820r_read_status_t(fe, status);
|
|
|
|
break;
|
|
|
|
case SYS_DVBT2:
|
|
|
|
ret = cxd2820r_read_status_t2(fe, status);
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
ret = -EINVAL;
|
|
|
|
}
|
|
|
|
} else {
|
|
|
|
/* DVB-C */
|
|
|
|
ret = cxd2820r_lock(priv, 1);
|
|
|
|
if (ret)
|
|
|
|
return ret;
|
|
|
|
|
|
|
|
ret = cxd2820r_read_status_c(fe, status);
|
|
|
|
}
|
|
|
|
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int cxd2820r_get_frontend(struct dvb_frontend *fe,
|
|
|
|
struct dvb_frontend_parameters *p)
|
|
|
|
{
|
|
|
|
struct cxd2820r_priv *priv = fe->demodulator_priv;
|
|
|
|
int ret;
|
|
|
|
dbg("%s: delsys=%d", __func__, fe->dtv_property_cache.delivery_system);
|
|
|
|
|
|
|
|
if (fe->ops.info.type == FE_OFDM) {
|
|
|
|
/* DVB-T/T2 */
|
|
|
|
ret = cxd2820r_lock(priv, 0);
|
|
|
|
if (ret)
|
|
|
|
return ret;
|
|
|
|
|
|
|
|
switch (fe->dtv_property_cache.delivery_system) {
|
|
|
|
case SYS_DVBT:
|
|
|
|
ret = cxd2820r_get_frontend_t(fe, p);
|
|
|
|
break;
|
|
|
|
case SYS_DVBT2:
|
|
|
|
ret = cxd2820r_get_frontend_t2(fe, p);
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
ret = -EINVAL;
|
|
|
|
}
|
|
|
|
} else {
|
|
|
|
/* DVB-C */
|
|
|
|
ret = cxd2820r_lock(priv, 1);
|
|
|
|
if (ret)
|
|
|
|
return ret;
|
|
|
|
|
|
|
|
ret = cxd2820r_get_frontend_c(fe, p);
|
|
|
|
}
|
|
|
|
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int cxd2820r_read_ber(struct dvb_frontend *fe, u32 *ber)
|
|
|
|
{
|
|
|
|
struct cxd2820r_priv *priv = fe->demodulator_priv;
|
|
|
|
int ret;
|
|
|
|
dbg("%s: delsys=%d", __func__, fe->dtv_property_cache.delivery_system);
|
|
|
|
|
|
|
|
if (fe->ops.info.type == FE_OFDM) {
|
|
|
|
/* DVB-T/T2 */
|
|
|
|
ret = cxd2820r_lock(priv, 0);
|
|
|
|
if (ret)
|
|
|
|
return ret;
|
|
|
|
|
|
|
|
switch (fe->dtv_property_cache.delivery_system) {
|
|
|
|
case SYS_DVBT:
|
|
|
|
ret = cxd2820r_read_ber_t(fe, ber);
|
|
|
|
break;
|
|
|
|
case SYS_DVBT2:
|
|
|
|
ret = cxd2820r_read_ber_t2(fe, ber);
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
ret = -EINVAL;
|
|
|
|
}
|
|
|
|
} else {
|
|
|
|
/* DVB-C */
|
|
|
|
ret = cxd2820r_lock(priv, 1);
|
|
|
|
if (ret)
|
|
|
|
return ret;
|
|
|
|
|
|
|
|
ret = cxd2820r_read_ber_c(fe, ber);
|
|
|
|
}
|
|
|
|
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int cxd2820r_read_signal_strength(struct dvb_frontend *fe, u16 *strength)
|
|
|
|
{
|
|
|
|
struct cxd2820r_priv *priv = fe->demodulator_priv;
|
|
|
|
int ret;
|
|
|
|
dbg("%s: delsys=%d", __func__, fe->dtv_property_cache.delivery_system);
|
|
|
|
|
|
|
|
if (fe->ops.info.type == FE_OFDM) {
|
|
|
|
/* DVB-T/T2 */
|
|
|
|
ret = cxd2820r_lock(priv, 0);
|
|
|
|
if (ret)
|
|
|
|
return ret;
|
|
|
|
|
|
|
|
switch (fe->dtv_property_cache.delivery_system) {
|
|
|
|
case SYS_DVBT:
|
|
|
|
ret = cxd2820r_read_signal_strength_t(fe, strength);
|
|
|
|
break;
|
|
|
|
case SYS_DVBT2:
|
|
|
|
ret = cxd2820r_read_signal_strength_t2(fe, strength);
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
ret = -EINVAL;
|
|
|
|
}
|
|
|
|
} else {
|
|
|
|
/* DVB-C */
|
|
|
|
ret = cxd2820r_lock(priv, 1);
|
|
|
|
if (ret)
|
|
|
|
return ret;
|
|
|
|
|
|
|
|
ret = cxd2820r_read_signal_strength_c(fe, strength);
|
|
|
|
}
|
|
|
|
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int cxd2820r_read_snr(struct dvb_frontend *fe, u16 *snr)
|
|
|
|
{
|
|
|
|
struct cxd2820r_priv *priv = fe->demodulator_priv;
|
|
|
|
int ret;
|
|
|
|
dbg("%s: delsys=%d", __func__, fe->dtv_property_cache.delivery_system);
|
|
|
|
|
|
|
|
if (fe->ops.info.type == FE_OFDM) {
|
|
|
|
/* DVB-T/T2 */
|
|
|
|
ret = cxd2820r_lock(priv, 0);
|
|
|
|
if (ret)
|
|
|
|
return ret;
|
|
|
|
|
|
|
|
switch (fe->dtv_property_cache.delivery_system) {
|
|
|
|
case SYS_DVBT:
|
|
|
|
ret = cxd2820r_read_snr_t(fe, snr);
|
|
|
|
break;
|
|
|
|
case SYS_DVBT2:
|
|
|
|
ret = cxd2820r_read_snr_t2(fe, snr);
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
ret = -EINVAL;
|
|
|
|
}
|
|
|
|
} else {
|
|
|
|
/* DVB-C */
|
|
|
|
ret = cxd2820r_lock(priv, 1);
|
|
|
|
if (ret)
|
|
|
|
return ret;
|
|
|
|
|
|
|
|
ret = cxd2820r_read_snr_c(fe, snr);
|
|
|
|
}
|
|
|
|
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int cxd2820r_read_ucblocks(struct dvb_frontend *fe, u32 *ucblocks)
|
|
|
|
{
|
|
|
|
struct cxd2820r_priv *priv = fe->demodulator_priv;
|
|
|
|
int ret;
|
|
|
|
dbg("%s: delsys=%d", __func__, fe->dtv_property_cache.delivery_system);
|
|
|
|
|
|
|
|
if (fe->ops.info.type == FE_OFDM) {
|
|
|
|
/* DVB-T/T2 */
|
|
|
|
ret = cxd2820r_lock(priv, 0);
|
|
|
|
if (ret)
|
|
|
|
return ret;
|
|
|
|
|
|
|
|
switch (fe->dtv_property_cache.delivery_system) {
|
|
|
|
case SYS_DVBT:
|
|
|
|
ret = cxd2820r_read_ucblocks_t(fe, ucblocks);
|
|
|
|
break;
|
|
|
|
case SYS_DVBT2:
|
|
|
|
ret = cxd2820r_read_ucblocks_t2(fe, ucblocks);
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
ret = -EINVAL;
|
|
|
|
}
|
|
|
|
} else {
|
|
|
|
/* DVB-C */
|
|
|
|
ret = cxd2820r_lock(priv, 1);
|
|
|
|
if (ret)
|
|
|
|
return ret;
|
|
|
|
|
|
|
|
ret = cxd2820r_read_ucblocks_c(fe, ucblocks);
|
|
|
|
}
|
|
|
|
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int cxd2820r_init(struct dvb_frontend *fe)
|
|
|
|
{
|
|
|
|
struct cxd2820r_priv *priv = fe->demodulator_priv;
|
|
|
|
int ret;
|
|
|
|
dbg("%s: delsys=%d", __func__, fe->dtv_property_cache.delivery_system);
|
|
|
|
|
|
|
|
priv->delivery_system = SYS_UNDEFINED;
|
|
|
|
/* delivery system is unknown at that (init) phase */
|
|
|
|
|
|
|
|
if (fe->ops.info.type == FE_OFDM) {
|
|
|
|
/* DVB-T/T2 */
|
|
|
|
ret = cxd2820r_lock(priv, 0);
|
|
|
|
if (ret)
|
|
|
|
return ret;
|
|
|
|
|
|
|
|
ret = cxd2820r_init_t(fe);
|
|
|
|
} else {
|
|
|
|
/* DVB-C */
|
|
|
|
ret = cxd2820r_lock(priv, 1);
|
|
|
|
if (ret)
|
|
|
|
return ret;
|
|
|
|
|
|
|
|
ret = cxd2820r_init_c(fe);
|
|
|
|
}
|
|
|
|
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int cxd2820r_sleep(struct dvb_frontend *fe)
|
|
|
|
{
|
|
|
|
struct cxd2820r_priv *priv = fe->demodulator_priv;
|
|
|
|
int ret;
|
|
|
|
dbg("%s: delsys=%d", __func__, fe->dtv_property_cache.delivery_system);
|
|
|
|
|
|
|
|
if (fe->ops.info.type == FE_OFDM) {
|
|
|
|
/* DVB-T/T2 */
|
|
|
|
ret = cxd2820r_lock(priv, 0);
|
|
|
|
if (ret)
|
|
|
|
return ret;
|
|
|
|
|
|
|
|
switch (fe->dtv_property_cache.delivery_system) {
|
|
|
|
case SYS_DVBT:
|
|
|
|
ret = cxd2820r_sleep_t(fe);
|
|
|
|
break;
|
|
|
|
case SYS_DVBT2:
|
|
|
|
ret = cxd2820r_sleep_t2(fe);
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
ret = -EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
cxd2820r_unlock(priv, 0);
|
|
|
|
} else {
|
|
|
|
/* DVB-C */
|
|
|
|
ret = cxd2820r_lock(priv, 1);
|
|
|
|
if (ret)
|
|
|
|
return ret;
|
|
|
|
|
|
|
|
ret = cxd2820r_sleep_c(fe);
|
|
|
|
|
|
|
|
cxd2820r_unlock(priv, 1);
|
|
|
|
}
|
|
|
|
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int cxd2820r_get_tune_settings(struct dvb_frontend *fe,
|
|
|
|
struct dvb_frontend_tune_settings *s)
|
|
|
|
{
|
|
|
|
struct cxd2820r_priv *priv = fe->demodulator_priv;
|
|
|
|
int ret, i;
|
|
|
|
unsigned int rf1, rf2;
|
|
|
|
dbg("%s: delsys=%d", __func__, fe->dtv_property_cache.delivery_system);
|
|
|
|
|
|
|
|
if (fe->ops.info.type == FE_OFDM) {
|
|
|
|
/* DVB-T/T2 */
|
|
|
|
ret = cxd2820r_lock(priv, 0);
|
|
|
|
if (ret)
|
|
|
|
return ret;
|
|
|
|
|
|
|
|
/* TODO: hack! This will be removed later when there is better
|
|
|
|
* app support for DVB-T2... */
|
|
|
|
|
|
|
|
/* Hz => MHz */
|
|
|
|
rf1 = DIV_ROUND_CLOSEST(fe->dtv_property_cache.frequency,
|
|
|
|
1000000);
|
|
|
|
for (i = 0; i < cxd2820r_dvbt2_count; i++) {
|
|
|
|
if (cxd2820r_dvbt2_freq[i] > 100000000) {
|
|
|
|
/* Hz => MHz */
|
|
|
|
rf2 = DIV_ROUND_CLOSEST(cxd2820r_dvbt2_freq[i],
|
|
|
|
1000000);
|
|
|
|
} else if (cxd2820r_dvbt2_freq[i] > 100000) {
|
|
|
|
/* kHz => MHz */
|
|
|
|
rf2 = DIV_ROUND_CLOSEST(cxd2820r_dvbt2_freq[i],
|
|
|
|
1000);
|
|
|
|
} else {
|
|
|
|
rf2 = cxd2820r_dvbt2_freq[i];
|
|
|
|
}
|
|
|
|
|
|
|
|
dbg("%s: rf1=%d rf2=%d", __func__, rf1, rf2);
|
|
|
|
|
|
|
|
if (rf1 == rf2) {
|
|
|
|
dbg("%s: forcing DVB-T2, frequency=%d",
|
|
|
|
__func__, fe->dtv_property_cache.frequency);
|
|
|
|
fe->dtv_property_cache.delivery_system =
|
|
|
|
SYS_DVBT2;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
switch (fe->dtv_property_cache.delivery_system) {
|
|
|
|
case SYS_DVBT:
|
|
|
|
ret = cxd2820r_get_tune_settings_t(fe, s);
|
|
|
|
break;
|
|
|
|
case SYS_DVBT2:
|
|
|
|
ret = cxd2820r_get_tune_settings_t2(fe, s);
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
ret = -EINVAL;
|
|
|
|
}
|
|
|
|
} else {
|
|
|
|
/* DVB-C */
|
|
|
|
ret = cxd2820r_lock(priv, 1);
|
|
|
|
if (ret)
|
|
|
|
return ret;
|
|
|
|
|
|
|
|
ret = cxd2820r_get_tune_settings_c(fe, s);
|
|
|
|
}
|
|
|
|
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void cxd2820r_release(struct dvb_frontend *fe)
|
|
|
|
{
|
|
|
|
struct cxd2820r_priv *priv = fe->demodulator_priv;
|
|
|
|
dbg("%s", __func__);
|
|
|
|
|
|
|
|
if (fe->ops.info.type == FE_OFDM) {
|
|
|
|
i2c_del_adapter(&priv->tuner_i2c_adapter);
|
|
|
|
kfree(priv);
|
|
|
|
}
|
|
|
|
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
static u32 cxd2820r_tuner_i2c_func(struct i2c_adapter *adapter)
|
|
|
|
{
|
|
|
|
return I2C_FUNC_I2C;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int cxd2820r_tuner_i2c_xfer(struct i2c_adapter *i2c_adap,
|
|
|
|
struct i2c_msg msg[], int num)
|
|
|
|
{
|
|
|
|
struct cxd2820r_priv *priv = i2c_get_adapdata(i2c_adap);
|
|
|
|
u8 obuf[msg[0].len + 2];
|
|
|
|
struct i2c_msg msg2[2] = {
|
|
|
|
{
|
|
|
|
.addr = priv->cfg.i2c_address,
|
|
|
|
.flags = 0,
|
|
|
|
.len = sizeof(obuf),
|
|
|
|
.buf = obuf,
|
|
|
|
}, {
|
|
|
|
.addr = priv->cfg.i2c_address,
|
|
|
|
.flags = I2C_M_RD,
|
|
|
|
.len = msg[1].len,
|
|
|
|
.buf = msg[1].buf,
|
|
|
|
}
|
|
|
|
};
|
|
|
|
|
|
|
|
obuf[0] = 0x09;
|
|
|
|
obuf[1] = (msg[0].addr << 1);
|
|
|
|
if (num == 2) { /* I2C read */
|
|
|
|
obuf[1] = (msg[0].addr << 1) | I2C_M_RD; /* I2C RD flag */
|
|
|
|
msg2[0].len = sizeof(obuf) - 1; /* maybe HW bug ? */
|
|
|
|
}
|
|
|
|
memcpy(&obuf[2], msg[0].buf, msg[0].len);
|
|
|
|
|
|
|
|
return i2c_transfer(priv->i2c, msg2, num);
|
|
|
|
}
|
|
|
|
|
|
|
|
static struct i2c_algorithm cxd2820r_tuner_i2c_algo = {
|
|
|
|
.master_xfer = cxd2820r_tuner_i2c_xfer,
|
|
|
|
.functionality = cxd2820r_tuner_i2c_func,
|
|
|
|
};
|
|
|
|
|
|
|
|
struct i2c_adapter *cxd2820r_get_tuner_i2c_adapter(struct dvb_frontend *fe)
|
|
|
|
{
|
|
|
|
struct cxd2820r_priv *priv = fe->demodulator_priv;
|
|
|
|
return &priv->tuner_i2c_adapter;
|
|
|
|
}
|
|
|
|
EXPORT_SYMBOL(cxd2820r_get_tuner_i2c_adapter);
|
|
|
|
|
|
|
|
static struct dvb_frontend_ops cxd2820r_ops[2];
|
|
|
|
|
|
|
|
struct dvb_frontend *cxd2820r_attach(const struct cxd2820r_config *cfg,
|
|
|
|
struct i2c_adapter *i2c, struct dvb_frontend *fe)
|
|
|
|
{
|
|
|
|
int ret;
|
|
|
|
struct cxd2820r_priv *priv = NULL;
|
|
|
|
u8 tmp;
|
|
|
|
|
|
|
|
if (fe == NULL) {
|
|
|
|
/* FE0 */
|
|
|
|
/* allocate memory for the internal priv */
|
|
|
|
priv = kzalloc(sizeof(struct cxd2820r_priv), GFP_KERNEL);
|
|
|
|
if (priv == NULL)
|
|
|
|
goto error;
|
|
|
|
|
|
|
|
/* setup the priv */
|
|
|
|
priv->i2c = i2c;
|
|
|
|
memcpy(&priv->cfg, cfg, sizeof(struct cxd2820r_config));
|
|
|
|
mutex_init(&priv->fe_lock);
|
|
|
|
|
|
|
|
priv->active_fe = -1; /* NONE */
|
|
|
|
|
|
|
|
/* check if the demod is there */
|
|
|
|
priv->bank[0] = priv->bank[1] = 0xff;
|
|
|
|
ret = cxd2820r_rd_reg(priv, 0x000fd, &tmp);
|
|
|
|
dbg("%s: chip id=%02x", __func__, tmp);
|
|
|
|
if (ret || tmp != 0xe1)
|
|
|
|
goto error;
|
|
|
|
|
|
|
|
/* create frontends */
|
|
|
|
memcpy(&priv->fe[0].ops, &cxd2820r_ops[0],
|
|
|
|
sizeof(struct dvb_frontend_ops));
|
|
|
|
memcpy(&priv->fe[1].ops, &cxd2820r_ops[1],
|
|
|
|
sizeof(struct dvb_frontend_ops));
|
|
|
|
|
|
|
|
priv->fe[0].demodulator_priv = priv;
|
|
|
|
priv->fe[1].demodulator_priv = priv;
|
|
|
|
|
|
|
|
/* create tuner i2c adapter */
|
|
|
|
strlcpy(priv->tuner_i2c_adapter.name,
|
|
|
|
"CXD2820R tuner I2C adapter",
|
|
|
|
sizeof(priv->tuner_i2c_adapter.name));
|
|
|
|
priv->tuner_i2c_adapter.algo = &cxd2820r_tuner_i2c_algo;
|
|
|
|
priv->tuner_i2c_adapter.algo_data = NULL;
|
|
|
|
i2c_set_adapdata(&priv->tuner_i2c_adapter, priv);
|
|
|
|
if (i2c_add_adapter(&priv->tuner_i2c_adapter) < 0) {
|
|
|
|
err("tuner I2C bus could not be initialized");
|
|
|
|
goto error;
|
|
|
|
}
|
|
|
|
|
|
|
|
return &priv->fe[0];
|
|
|
|
|
|
|
|
} else {
|
|
|
|
/* FE1: FE0 given as pointer, just return FE1 we have
|
|
|
|
* already created */
|
|
|
|
priv = fe->demodulator_priv;
|
|
|
|
return &priv->fe[1];
|
|
|
|
}
|
|
|
|
|
|
|
|
error:
|
|
|
|
kfree(priv);
|
|
|
|
return NULL;
|
|
|
|
}
|
|
|
|
EXPORT_SYMBOL(cxd2820r_attach);
|
|
|
|
|
|
|
|
static struct dvb_frontend_ops cxd2820r_ops[2] = {
|
|
|
|
{
|
|
|
|
/* DVB-T/T2 */
|
|
|
|
.info = {
|
|
|
|
.name = "Sony CXD2820R (DVB-T/T2)",
|
|
|
|
.type = FE_OFDM,
|
|
|
|
.caps =
|
|
|
|
FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 |
|
|
|
|
FE_CAN_FEC_3_4 | FE_CAN_FEC_5_6 |
|
|
|
|
FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO |
|
|
|
|
FE_CAN_QPSK | FE_CAN_QAM_16 |
|
|
|
|
FE_CAN_QAM_64 | FE_CAN_QAM_AUTO |
|
|
|
|
FE_CAN_TRANSMISSION_MODE_AUTO |
|
|
|
|
FE_CAN_GUARD_INTERVAL_AUTO |
|
|
|
|
FE_CAN_HIERARCHY_AUTO |
|
|
|
|
FE_CAN_MUTE_TS |
|
|
|
|
FE_CAN_2G_MODULATION
|
|
|
|
},
|
|
|
|
|
|
|
|
.release = cxd2820r_release,
|
|
|
|
.init = cxd2820r_init,
|
|
|
|
.sleep = cxd2820r_sleep,
|
|
|
|
|
|
|
|
.get_tune_settings = cxd2820r_get_tune_settings,
|
|
|
|
|
|
|
|
.set_frontend = cxd2820r_set_frontend,
|
|
|
|
.get_frontend = cxd2820r_get_frontend,
|
|
|
|
|
|
|
|
.read_status = cxd2820r_read_status,
|
|
|
|
.read_snr = cxd2820r_read_snr,
|
|
|
|
.read_ber = cxd2820r_read_ber,
|
|
|
|
.read_ucblocks = cxd2820r_read_ucblocks,
|
|
|
|
.read_signal_strength = cxd2820r_read_signal_strength,
|
|
|
|
},
|
|
|
|
{
|
|
|
|
/* DVB-C */
|
|
|
|
.info = {
|
|
|
|
.name = "Sony CXD2820R (DVB-C)",
|
|
|
|
.type = FE_QAM,
|
|
|
|
.caps =
|
|
|
|
FE_CAN_QAM_16 | FE_CAN_QAM_32 | FE_CAN_QAM_64 |
|
|
|
|
FE_CAN_QAM_128 | FE_CAN_QAM_256 |
|
|
|
|
FE_CAN_FEC_AUTO
|
|
|
|
},
|
|
|
|
|
|
|
|
.release = cxd2820r_release,
|
|
|
|
.init = cxd2820r_init,
|
|
|
|
.sleep = cxd2820r_sleep,
|
|
|
|
|
|
|
|
.get_tune_settings = cxd2820r_get_tune_settings,
|
|
|
|
|
|
|
|
.set_frontend = cxd2820r_set_frontend,
|
|
|
|
.get_frontend = cxd2820r_get_frontend,
|
|
|
|
|
|
|
|
.read_status = cxd2820r_read_status,
|
|
|
|
.read_snr = cxd2820r_read_snr,
|
|
|
|
.read_ber = cxd2820r_read_ber,
|
|
|
|
.read_ucblocks = cxd2820r_read_ucblocks,
|
|
|
|
.read_signal_strength = cxd2820r_read_signal_strength,
|
|
|
|
},
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
|
|
MODULE_AUTHOR("Antti Palosaari <crope@iki.fi>");
|
|
|
|
MODULE_DESCRIPTION("Sony CXD2820R demodulator driver");
|
|
|
|
MODULE_LICENSE("GPL");
|