2014-02-03 02:34:23 +00:00
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/*
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* Mirics MSi001 silicon tuner driver
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*
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* Copyright (C) 2013 Antti Palosaari <crope@iki.fi>
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* Copyright (C) 2014 Antti Palosaari <crope@iki.fi>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <linux/module.h>
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#include <linux/gcd.h>
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#include <media/v4l2-device.h>
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#include <media/v4l2-ctrls.h>
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static const struct v4l2_frequency_band bands[] = {
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{
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.type = V4L2_TUNER_RF,
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.index = 0,
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.capability = V4L2_TUNER_CAP_1HZ | V4L2_TUNER_CAP_FREQ_BANDS,
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.rangelow = 49000000,
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.rangehigh = 263000000,
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}, {
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.type = V4L2_TUNER_RF,
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.index = 1,
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.capability = V4L2_TUNER_CAP_1HZ | V4L2_TUNER_CAP_FREQ_BANDS,
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.rangelow = 390000000,
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.rangehigh = 960000000,
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},
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};
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struct msi001 {
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struct spi_device *spi;
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struct v4l2_subdev sd;
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/* Controls */
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struct v4l2_ctrl_handler hdl;
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struct v4l2_ctrl *bandwidth_auto;
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struct v4l2_ctrl *bandwidth;
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struct v4l2_ctrl *lna_gain;
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struct v4l2_ctrl *mixer_gain;
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struct v4l2_ctrl *if_gain;
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unsigned int f_tuner;
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};
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static inline struct msi001 *sd_to_msi001(struct v4l2_subdev *sd)
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{
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return container_of(sd, struct msi001, sd);
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}
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static int msi001_wreg(struct msi001 *s, u32 data)
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{
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/* Register format: 4 bits addr + 20 bits value */
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return spi_write(s->spi, &data, 3);
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};
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static int msi001_set_gain(struct msi001 *s, int lna_gain, int mixer_gain,
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int if_gain)
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{
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int ret;
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u32 reg;
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2014-08-25 02:12:13 +00:00
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dev_dbg(&s->spi->dev, "lna=%d mixer=%d if=%d\n",
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2014-02-03 02:34:23 +00:00
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lna_gain, mixer_gain, if_gain);
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reg = 1 << 0;
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reg |= (59 - if_gain) << 4;
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reg |= 0 << 10;
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reg |= (1 - mixer_gain) << 12;
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reg |= (1 - lna_gain) << 13;
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reg |= 4 << 14;
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reg |= 0 << 17;
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ret = msi001_wreg(s, reg);
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if (ret)
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goto err;
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return 0;
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err:
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2014-08-25 02:12:13 +00:00
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dev_dbg(&s->spi->dev, "failed %d\n", ret);
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2014-02-03 02:34:23 +00:00
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return ret;
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};
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static int msi001_set_tuner(struct msi001 *s)
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{
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int ret, i;
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unsigned int n, m, thresh, frac, vco_step, tmp, f_if1;
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u32 reg;
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u64 f_vco, tmp64;
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u8 mode, filter_mode, lo_div;
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2014-08-25 02:12:13 +00:00
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2014-02-03 02:34:23 +00:00
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static const struct {
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u32 rf;
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u8 mode;
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u8 lo_div;
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} band_lut[] = {
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{ 50000000, 0xe1, 16}, /* AM_MODE2, antenna 2 */
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{108000000, 0x42, 32}, /* VHF_MODE */
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{330000000, 0x44, 16}, /* B3_MODE */
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{960000000, 0x48, 4}, /* B45_MODE */
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{ ~0U, 0x50, 2}, /* BL_MODE */
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};
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static const struct {
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u32 freq;
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u8 filter_mode;
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} if_freq_lut[] = {
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{ 0, 0x03}, /* Zero IF */
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{ 450000, 0x02}, /* 450 kHz IF */
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{1620000, 0x01}, /* 1.62 MHz IF */
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{2048000, 0x00}, /* 2.048 MHz IF */
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};
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static const struct {
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u32 freq;
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u8 val;
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} bandwidth_lut[] = {
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{ 200000, 0x00}, /* 200 kHz */
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{ 300000, 0x01}, /* 300 kHz */
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{ 600000, 0x02}, /* 600 kHz */
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{1536000, 0x03}, /* 1.536 MHz */
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{5000000, 0x04}, /* 5 MHz */
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{6000000, 0x05}, /* 6 MHz */
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{7000000, 0x06}, /* 7 MHz */
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{8000000, 0x07}, /* 8 MHz */
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};
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unsigned int f_rf = s->f_tuner;
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/*
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* bandwidth (Hz)
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* 200000, 300000, 600000, 1536000, 5000000, 6000000, 7000000, 8000000
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*/
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unsigned int bandwidth;
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/*
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* intermediate frequency (Hz)
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* 0, 450000, 1620000, 2048000
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*/
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unsigned int f_if = 0;
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#define F_REF 24000000
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#define R_REF 4
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#define F_OUT_STEP 1
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2014-08-25 02:12:13 +00:00
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dev_dbg(&s->spi->dev, "f_rf=%d f_if=%d\n", f_rf, f_if);
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2014-02-03 02:34:23 +00:00
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for (i = 0; i < ARRAY_SIZE(band_lut); i++) {
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if (f_rf <= band_lut[i].rf) {
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mode = band_lut[i].mode;
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lo_div = band_lut[i].lo_div;
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break;
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}
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}
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if (i == ARRAY_SIZE(band_lut)) {
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ret = -EINVAL;
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goto err;
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}
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/* AM_MODE is upconverted */
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if ((mode >> 0) & 0x1)
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f_if1 = 5 * F_REF;
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else
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f_if1 = 0;
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for (i = 0; i < ARRAY_SIZE(if_freq_lut); i++) {
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if (f_if == if_freq_lut[i].freq) {
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filter_mode = if_freq_lut[i].filter_mode;
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break;
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}
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}
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if (i == ARRAY_SIZE(if_freq_lut)) {
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ret = -EINVAL;
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goto err;
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}
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/* filters */
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bandwidth = s->bandwidth->val;
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bandwidth = clamp(bandwidth, 200000U, 8000000U);
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for (i = 0; i < ARRAY_SIZE(bandwidth_lut); i++) {
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if (bandwidth <= bandwidth_lut[i].freq) {
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bandwidth = bandwidth_lut[i].val;
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break;
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}
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}
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if (i == ARRAY_SIZE(bandwidth_lut)) {
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ret = -EINVAL;
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goto err;
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}
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s->bandwidth->val = bandwidth_lut[i].freq;
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2014-08-25 02:12:13 +00:00
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dev_dbg(&s->spi->dev, "bandwidth selected=%d\n", bandwidth_lut[i].freq);
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2014-02-03 02:34:23 +00:00
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2014-04-05 20:23:41 +00:00
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f_vco = (u64) (f_rf + f_if + f_if1) * lo_div;
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2014-02-03 02:34:23 +00:00
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tmp64 = f_vco;
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m = do_div(tmp64, F_REF * R_REF);
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n = (unsigned int) tmp64;
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vco_step = F_OUT_STEP * lo_div;
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thresh = (F_REF * R_REF) / vco_step;
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frac = 1ul * thresh * m / (F_REF * R_REF);
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/* Find out greatest common divisor and divide to smaller. */
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tmp = gcd(thresh, frac);
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thresh /= tmp;
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frac /= tmp;
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/* Force divide to reg max. Resolution will be reduced. */
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tmp = DIV_ROUND_UP(thresh, 4095);
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thresh = DIV_ROUND_CLOSEST(thresh, tmp);
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frac = DIV_ROUND_CLOSEST(frac, tmp);
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/* calc real RF set */
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tmp = 1ul * F_REF * R_REF * n;
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tmp += 1ul * F_REF * R_REF * frac / thresh;
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tmp /= lo_div;
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2014-08-25 02:12:13 +00:00
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dev_dbg(&s->spi->dev, "rf=%u:%u n=%d thresh=%d frac=%d\n",
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f_rf, tmp, n, thresh, frac);
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2014-02-03 02:34:23 +00:00
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ret = msi001_wreg(s, 0x00000e);
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if (ret)
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goto err;
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ret = msi001_wreg(s, 0x000003);
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if (ret)
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goto err;
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reg = 0 << 0;
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reg |= mode << 4;
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reg |= filter_mode << 12;
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reg |= bandwidth << 14;
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reg |= 0x02 << 17;
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reg |= 0x00 << 20;
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ret = msi001_wreg(s, reg);
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if (ret)
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goto err;
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reg = 5 << 0;
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reg |= thresh << 4;
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reg |= 1 << 19;
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reg |= 1 << 21;
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ret = msi001_wreg(s, reg);
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if (ret)
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goto err;
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reg = 2 << 0;
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reg |= frac << 4;
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reg |= n << 16;
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ret = msi001_wreg(s, reg);
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if (ret)
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goto err;
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ret = msi001_set_gain(s, s->lna_gain->cur.val, s->mixer_gain->cur.val,
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s->if_gain->cur.val);
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if (ret)
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goto err;
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reg = 6 << 0;
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reg |= 63 << 4;
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reg |= 4095 << 10;
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ret = msi001_wreg(s, reg);
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if (ret)
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goto err;
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return 0;
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err:
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2014-08-25 02:12:13 +00:00
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dev_dbg(&s->spi->dev, "failed %d\n", ret);
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2014-02-03 02:34:23 +00:00
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return ret;
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};
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static int msi001_s_power(struct v4l2_subdev *sd, int on)
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{
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struct msi001 *s = sd_to_msi001(sd);
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int ret;
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2014-08-25 02:12:13 +00:00
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dev_dbg(&s->spi->dev, "on=%d\n", on);
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2014-02-03 02:34:23 +00:00
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if (on)
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ret = 0;
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else
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ret = msi001_wreg(s, 0x000000);
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return ret;
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}
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static const struct v4l2_subdev_core_ops msi001_core_ops = {
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.s_power = msi001_s_power,
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};
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static int msi001_g_tuner(struct v4l2_subdev *sd, struct v4l2_tuner *v)
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{
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struct msi001 *s = sd_to_msi001(sd);
|
2014-08-25 02:12:13 +00:00
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dev_dbg(&s->spi->dev, "index=%d\n", v->index);
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2014-02-03 02:34:23 +00:00
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strlcpy(v->name, "Mirics MSi001", sizeof(v->name));
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v->type = V4L2_TUNER_RF;
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v->capability = V4L2_TUNER_CAP_1HZ | V4L2_TUNER_CAP_FREQ_BANDS;
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v->rangelow = 49000000;
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v->rangehigh = 960000000;
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return 0;
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}
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static int msi001_s_tuner(struct v4l2_subdev *sd, const struct v4l2_tuner *v)
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{
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struct msi001 *s = sd_to_msi001(sd);
|
2014-08-25 02:12:13 +00:00
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dev_dbg(&s->spi->dev, "index=%d\n", v->index);
|
2014-02-03 02:34:23 +00:00
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return 0;
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}
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static int msi001_g_frequency(struct v4l2_subdev *sd, struct v4l2_frequency *f)
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{
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struct msi001 *s = sd_to_msi001(sd);
|
2014-08-25 02:12:13 +00:00
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dev_dbg(&s->spi->dev, "tuner=%d\n", f->tuner);
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2014-02-03 02:34:23 +00:00
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f->frequency = s->f_tuner;
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return 0;
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}
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static int msi001_s_frequency(struct v4l2_subdev *sd,
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const struct v4l2_frequency *f)
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{
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struct msi001 *s = sd_to_msi001(sd);
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unsigned int band;
|
2014-08-25 02:12:13 +00:00
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dev_dbg(&s->spi->dev, "tuner=%d type=%d frequency=%u\n",
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f->tuner, f->type, f->frequency);
|
2014-02-03 02:34:23 +00:00
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if (f->frequency < ((bands[0].rangehigh + bands[1].rangelow) / 2))
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band = 0;
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else
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band = 1;
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s->f_tuner = clamp_t(unsigned int, f->frequency,
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bands[band].rangelow, bands[band].rangehigh);
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return msi001_set_tuner(s);
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}
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static int msi001_enum_freq_bands(struct v4l2_subdev *sd,
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struct v4l2_frequency_band *band)
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{
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|
|
struct msi001 *s = sd_to_msi001(sd);
|
2014-08-25 02:12:13 +00:00
|
|
|
|
|
|
|
dev_dbg(&s->spi->dev, "tuner=%d type=%d index=%d\n",
|
|
|
|
band->tuner, band->type, band->index);
|
2014-02-03 02:34:23 +00:00
|
|
|
|
|
|
|
if (band->index >= ARRAY_SIZE(bands))
|
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
band->capability = bands[band->index].capability;
|
|
|
|
band->rangelow = bands[band->index].rangelow;
|
|
|
|
band->rangehigh = bands[band->index].rangehigh;
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static const struct v4l2_subdev_tuner_ops msi001_tuner_ops = {
|
|
|
|
.g_tuner = msi001_g_tuner,
|
|
|
|
.s_tuner = msi001_s_tuner,
|
|
|
|
.g_frequency = msi001_g_frequency,
|
|
|
|
.s_frequency = msi001_s_frequency,
|
|
|
|
.enum_freq_bands = msi001_enum_freq_bands,
|
|
|
|
};
|
|
|
|
|
|
|
|
static const struct v4l2_subdev_ops msi001_ops = {
|
|
|
|
.core = &msi001_core_ops,
|
|
|
|
.tuner = &msi001_tuner_ops,
|
|
|
|
};
|
|
|
|
|
|
|
|
static int msi001_s_ctrl(struct v4l2_ctrl *ctrl)
|
|
|
|
{
|
|
|
|
struct msi001 *s = container_of(ctrl->handler, struct msi001, hdl);
|
|
|
|
|
|
|
|
int ret;
|
2014-08-25 02:12:13 +00:00
|
|
|
|
2014-02-03 02:34:23 +00:00
|
|
|
dev_dbg(&s->spi->dev,
|
2014-08-25 02:12:13 +00:00
|
|
|
"id=%d name=%s val=%d min=%lld max=%lld step=%lld\n",
|
|
|
|
ctrl->id, ctrl->name, ctrl->val,
|
2014-02-03 02:34:23 +00:00
|
|
|
ctrl->minimum, ctrl->maximum, ctrl->step);
|
|
|
|
|
|
|
|
switch (ctrl->id) {
|
|
|
|
case V4L2_CID_RF_TUNER_BANDWIDTH_AUTO:
|
|
|
|
case V4L2_CID_RF_TUNER_BANDWIDTH:
|
|
|
|
ret = msi001_set_tuner(s);
|
|
|
|
break;
|
|
|
|
case V4L2_CID_RF_TUNER_LNA_GAIN:
|
|
|
|
ret = msi001_set_gain(s, s->lna_gain->val,
|
|
|
|
s->mixer_gain->cur.val, s->if_gain->cur.val);
|
|
|
|
break;
|
|
|
|
case V4L2_CID_RF_TUNER_MIXER_GAIN:
|
|
|
|
ret = msi001_set_gain(s, s->lna_gain->cur.val,
|
|
|
|
s->mixer_gain->val, s->if_gain->cur.val);
|
|
|
|
break;
|
|
|
|
case V4L2_CID_RF_TUNER_IF_GAIN:
|
|
|
|
ret = msi001_set_gain(s, s->lna_gain->cur.val,
|
|
|
|
s->mixer_gain->cur.val, s->if_gain->val);
|
|
|
|
break;
|
|
|
|
default:
|
2014-08-25 02:12:13 +00:00
|
|
|
dev_dbg(&s->spi->dev, "unkown control %d\n", ctrl->id);
|
2014-02-03 02:34:23 +00:00
|
|
|
ret = -EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
static const struct v4l2_ctrl_ops msi001_ctrl_ops = {
|
|
|
|
.s_ctrl = msi001_s_ctrl,
|
|
|
|
};
|
|
|
|
|
|
|
|
static int msi001_probe(struct spi_device *spi)
|
|
|
|
{
|
|
|
|
struct msi001 *s;
|
|
|
|
int ret;
|
2014-08-25 02:12:13 +00:00
|
|
|
|
|
|
|
dev_dbg(&spi->dev, "\n");
|
2014-02-03 02:34:23 +00:00
|
|
|
|
|
|
|
s = kzalloc(sizeof(struct msi001), GFP_KERNEL);
|
|
|
|
if (s == NULL) {
|
|
|
|
ret = -ENOMEM;
|
|
|
|
dev_dbg(&spi->dev, "Could not allocate memory for msi001\n");
|
|
|
|
goto err_kfree;
|
|
|
|
}
|
|
|
|
|
|
|
|
s->spi = spi;
|
2014-03-10 19:28:18 +00:00
|
|
|
s->f_tuner = bands[0].rangelow;
|
2014-02-03 02:34:23 +00:00
|
|
|
v4l2_spi_subdev_init(&s->sd, spi, &msi001_ops);
|
|
|
|
|
|
|
|
/* Register controls */
|
|
|
|
v4l2_ctrl_handler_init(&s->hdl, 5);
|
|
|
|
s->bandwidth_auto = v4l2_ctrl_new_std(&s->hdl, &msi001_ctrl_ops,
|
|
|
|
V4L2_CID_RF_TUNER_BANDWIDTH_AUTO, 0, 1, 1, 1);
|
|
|
|
s->bandwidth = v4l2_ctrl_new_std(&s->hdl, &msi001_ctrl_ops,
|
|
|
|
V4L2_CID_RF_TUNER_BANDWIDTH, 200000, 8000000, 1, 200000);
|
|
|
|
v4l2_ctrl_auto_cluster(2, &s->bandwidth_auto, 0, false);
|
|
|
|
s->lna_gain = v4l2_ctrl_new_std(&s->hdl, &msi001_ctrl_ops,
|
|
|
|
V4L2_CID_RF_TUNER_LNA_GAIN, 0, 1, 1, 1);
|
|
|
|
s->mixer_gain = v4l2_ctrl_new_std(&s->hdl, &msi001_ctrl_ops,
|
|
|
|
V4L2_CID_RF_TUNER_MIXER_GAIN, 0, 1, 1, 1);
|
|
|
|
s->if_gain = v4l2_ctrl_new_std(&s->hdl, &msi001_ctrl_ops,
|
|
|
|
V4L2_CID_RF_TUNER_IF_GAIN, 0, 59, 1, 0);
|
|
|
|
if (s->hdl.error) {
|
|
|
|
ret = s->hdl.error;
|
|
|
|
dev_err(&s->spi->dev, "Could not initialize controls\n");
|
|
|
|
/* control init failed, free handler */
|
|
|
|
goto err_ctrl_handler_free;
|
|
|
|
}
|
|
|
|
|
|
|
|
s->sd.ctrl_handler = &s->hdl;
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
err_ctrl_handler_free:
|
|
|
|
v4l2_ctrl_handler_free(&s->hdl);
|
|
|
|
err_kfree:
|
|
|
|
kfree(s);
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int msi001_remove(struct spi_device *spi)
|
|
|
|
{
|
|
|
|
struct v4l2_subdev *sd = spi_get_drvdata(spi);
|
|
|
|
struct msi001 *s = sd_to_msi001(sd);
|
2014-08-25 02:12:13 +00:00
|
|
|
|
|
|
|
dev_dbg(&spi->dev, "\n");
|
2014-02-03 02:34:23 +00:00
|
|
|
|
|
|
|
/*
|
|
|
|
* Registered by v4l2_spi_new_subdev() from master driver, but we must
|
|
|
|
* unregister it from here. Weird.
|
|
|
|
*/
|
|
|
|
v4l2_device_unregister_subdev(&s->sd);
|
|
|
|
v4l2_ctrl_handler_free(&s->hdl);
|
|
|
|
kfree(s);
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static const struct spi_device_id msi001_id[] = {
|
|
|
|
{"msi001", 0},
|
|
|
|
{}
|
|
|
|
};
|
|
|
|
MODULE_DEVICE_TABLE(spi, msi001_id);
|
|
|
|
|
|
|
|
static struct spi_driver msi001_driver = {
|
|
|
|
.driver = {
|
|
|
|
.name = "msi001",
|
|
|
|
.owner = THIS_MODULE,
|
|
|
|
},
|
|
|
|
.probe = msi001_probe,
|
|
|
|
.remove = msi001_remove,
|
|
|
|
.id_table = msi001_id,
|
|
|
|
};
|
|
|
|
module_spi_driver(msi001_driver);
|
|
|
|
|
|
|
|
MODULE_AUTHOR("Antti Palosaari <crope@iki.fi>");
|
|
|
|
MODULE_DESCRIPTION("Mirics MSi001");
|
|
|
|
MODULE_LICENSE("GPL");
|