2021-12-17 11:57:05 +00:00
|
|
|
// SPDX-License-Identifier: GPL-2.0
|
|
|
|
//
|
2022-01-17 16:08:30 +00:00
|
|
|
// CS35l41 ALSA HDA audio driver
|
2021-12-17 11:57:05 +00:00
|
|
|
//
|
|
|
|
// Copyright 2021 Cirrus Logic, Inc.
|
|
|
|
//
|
|
|
|
// Author: Lucas Tanure <tanureal@opensource.cirrus.com>
|
|
|
|
|
|
|
|
#include <linux/acpi.h>
|
|
|
|
#include <linux/module.h>
|
|
|
|
#include <sound/hda_codec.h>
|
2022-06-30 00:23:25 +00:00
|
|
|
#include <sound/soc.h>
|
2021-12-17 11:57:05 +00:00
|
|
|
#include "hda_local.h"
|
|
|
|
#include "hda_auto_parser.h"
|
|
|
|
#include "hda_jack.h"
|
|
|
|
#include "hda_generic.h"
|
|
|
|
#include "hda_component.h"
|
|
|
|
#include "cs35l41_hda.h"
|
2022-06-30 00:23:25 +00:00
|
|
|
#include "hda_cs_dsp_ctl.h"
|
|
|
|
|
|
|
|
#define CS35L41_FIRMWARE_ROOT "cirrus/"
|
|
|
|
#define CS35L41_PART "cs35l41"
|
|
|
|
#define FW_NAME "CSPL"
|
|
|
|
|
|
|
|
#define HALO_STATE_DSP_CTL_NAME "HALO_STATE"
|
|
|
|
#define HALO_STATE_DSP_CTL_TYPE 5
|
|
|
|
#define HALO_STATE_DSP_CTL_ALG 262308
|
2021-12-17 11:57:05 +00:00
|
|
|
|
|
|
|
static const struct reg_sequence cs35l41_hda_config[] = {
|
2022-04-13 08:37:16 +00:00
|
|
|
{ CS35L41_PLL_CLK_CTRL, 0x00000430 }, // 3072000Hz, BCLK Input, PLL_REFCLK_EN = 1
|
2022-01-17 16:08:30 +00:00
|
|
|
{ CS35L41_GLOBAL_CLK_CTRL, 0x00000003 }, // GLOBAL_FS = 48 kHz
|
|
|
|
{ CS35L41_SP_ENABLES, 0x00010000 }, // ASP_RX1_EN = 1
|
|
|
|
{ CS35L41_SP_RATE_CTRL, 0x00000021 }, // ASP_BCLK_FREQ = 3.072 MHz
|
2022-04-13 08:37:16 +00:00
|
|
|
{ CS35L41_SP_FORMAT, 0x20200200 }, // 32 bits RX/TX slots, I2S, clk consumer
|
2022-01-17 16:08:30 +00:00
|
|
|
{ CS35L41_DAC_PCM1_SRC, 0x00000008 }, // DACPCM1_SRC = ASPRX1
|
|
|
|
{ CS35L41_AMP_DIG_VOL_CTRL, 0x00000000 }, // AMP_VOL_PCM 0.0 dB
|
|
|
|
{ CS35L41_AMP_GAIN_CTRL, 0x00000084 }, // AMP_GAIN_PCM 4.5 dB
|
2021-12-17 11:57:05 +00:00
|
|
|
};
|
|
|
|
|
2022-06-30 00:23:25 +00:00
|
|
|
static const struct reg_sequence cs35l41_hda_config_dsp[] = {
|
|
|
|
{ CS35L41_PLL_CLK_CTRL, 0x00000430 }, // 3072000Hz, BCLK Input, PLL_REFCLK_EN = 1
|
|
|
|
{ CS35L41_DSP_CLK_CTRL, 0x00000003 }, // DSP CLK EN
|
|
|
|
{ CS35L41_GLOBAL_CLK_CTRL, 0x00000003 }, // GLOBAL_FS = 48 kHz
|
|
|
|
{ CS35L41_SP_ENABLES, 0x00010001 }, // ASP_RX1_EN = 1, ASP_TX1_EN = 1
|
|
|
|
{ CS35L41_SP_RATE_CTRL, 0x00000021 }, // ASP_BCLK_FREQ = 3.072 MHz
|
|
|
|
{ CS35L41_SP_FORMAT, 0x20200200 }, // 32 bits RX/TX slots, I2S, clk consumer
|
|
|
|
{ CS35L41_SP_HIZ_CTRL, 0x00000003 }, // Hi-Z unused/disabled
|
|
|
|
{ CS35L41_SP_TX_WL, 0x00000018 }, // 24 cycles/slot
|
|
|
|
{ CS35L41_SP_RX_WL, 0x00000018 }, // 24 cycles/slot
|
|
|
|
{ CS35L41_DAC_PCM1_SRC, 0x00000032 }, // DACPCM1_SRC = ERR_VOL
|
|
|
|
{ CS35L41_ASP_TX1_SRC, 0x00000018 }, // ASPTX1 SRC = VMON
|
|
|
|
{ CS35L41_ASP_TX2_SRC, 0x00000019 }, // ASPTX2 SRC = IMON
|
|
|
|
{ CS35L41_ASP_TX3_SRC, 0x00000028 }, // ASPTX3 SRC = VPMON
|
|
|
|
{ CS35L41_ASP_TX4_SRC, 0x00000029 }, // ASPTX4 SRC = VBSTMON
|
|
|
|
{ CS35L41_DSP1_RX1_SRC, 0x00000008 }, // DSP1RX1 SRC = ASPRX1
|
|
|
|
{ CS35L41_DSP1_RX2_SRC, 0x00000008 }, // DSP1RX2 SRC = ASPRX1
|
|
|
|
{ CS35L41_DSP1_RX3_SRC, 0x00000018 }, // DSP1RX3 SRC = VMON
|
|
|
|
{ CS35L41_DSP1_RX4_SRC, 0x00000019 }, // DSP1RX4 SRC = IMON
|
|
|
|
{ CS35L41_DSP1_RX5_SRC, 0x00000029 }, // DSP1RX5 SRC = VBSTMON
|
|
|
|
{ CS35L41_AMP_DIG_VOL_CTRL, 0x00000000 }, // AMP_VOL_PCM 0.0 dB
|
|
|
|
{ CS35L41_AMP_GAIN_CTRL, 0x00000233 }, // AMP_GAIN_PCM = 17.5dB AMP_GAIN_PDM = 19.5dB
|
|
|
|
};
|
|
|
|
|
2022-04-13 08:37:20 +00:00
|
|
|
static const struct reg_sequence cs35l41_hda_mute[] = {
|
|
|
|
{ CS35L41_AMP_GAIN_CTRL, 0x00000000 }, // AMP_GAIN_PCM 0.5 dB
|
|
|
|
{ CS35L41_AMP_DIG_VOL_CTRL, 0x0000A678 }, // AMP_VOL_PCM Mute
|
|
|
|
};
|
|
|
|
|
2022-06-30 00:23:25 +00:00
|
|
|
static int cs35l41_control_add(struct cs_dsp_coeff_ctl *cs_ctl)
|
|
|
|
{
|
|
|
|
struct cs35l41_hda *cs35l41 = container_of(cs_ctl->dsp, struct cs35l41_hda, cs_dsp);
|
|
|
|
struct hda_cs_dsp_ctl_info info;
|
|
|
|
|
|
|
|
info.device_name = cs35l41->amp_name;
|
|
|
|
info.fw_type = HDA_CS_DSP_FW_SPK_PROT;
|
|
|
|
info.card = cs35l41->codec->card;
|
|
|
|
|
|
|
|
return hda_cs_dsp_control_add(cs_ctl, &info);
|
|
|
|
}
|
|
|
|
|
|
|
|
static const struct cs_dsp_client_ops client_ops = {
|
|
|
|
.control_add = cs35l41_control_add,
|
|
|
|
.control_remove = hda_cs_dsp_control_remove,
|
|
|
|
};
|
|
|
|
|
|
|
|
static int cs35l41_request_firmware_file(struct cs35l41_hda *cs35l41,
|
|
|
|
const struct firmware **firmware, char **filename,
|
2022-06-30 00:23:28 +00:00
|
|
|
const char *dir, const char *ssid, const char *amp_name,
|
2022-06-30 00:23:29 +00:00
|
|
|
int spkid, const char *filetype)
|
2022-06-30 00:23:25 +00:00
|
|
|
{
|
|
|
|
const char * const dsp_name = cs35l41->cs_dsp.name;
|
|
|
|
char *s, c;
|
|
|
|
int ret = 0;
|
|
|
|
|
2022-06-30 00:23:29 +00:00
|
|
|
if (spkid > -1 && ssid && amp_name)
|
|
|
|
*filename = kasprintf(GFP_KERNEL, "%s%s-%s-%s-%s-spkid%d-%s.%s", dir, CS35L41_PART,
|
|
|
|
dsp_name, "spk-prot", ssid, spkid, amp_name, filetype);
|
|
|
|
else if (spkid > -1 && ssid)
|
|
|
|
*filename = kasprintf(GFP_KERNEL, "%s%s-%s-%s-%s-spkid%d.%s", dir, CS35L41_PART,
|
|
|
|
dsp_name, "spk-prot", ssid, spkid, filetype);
|
|
|
|
else if (ssid && amp_name)
|
2022-06-30 00:23:28 +00:00
|
|
|
*filename = kasprintf(GFP_KERNEL, "%s%s-%s-%s-%s-%s.%s", dir, CS35L41_PART,
|
|
|
|
dsp_name, "spk-prot", ssid, amp_name,
|
|
|
|
filetype);
|
|
|
|
else if (ssid)
|
|
|
|
*filename = kasprintf(GFP_KERNEL, "%s%s-%s-%s-%s.%s", dir, CS35L41_PART,
|
|
|
|
dsp_name, "spk-prot", ssid, filetype);
|
|
|
|
else
|
|
|
|
*filename = kasprintf(GFP_KERNEL, "%s%s-%s-%s.%s", dir, CS35L41_PART,
|
|
|
|
dsp_name, "spk-prot", filetype);
|
2022-06-30 00:23:25 +00:00
|
|
|
|
|
|
|
if (*filename == NULL)
|
|
|
|
return -ENOMEM;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Make sure that filename is lower-case and any non alpha-numeric
|
|
|
|
* characters except full stop and '/' are replaced with hyphens.
|
|
|
|
*/
|
|
|
|
s = *filename;
|
|
|
|
while (*s) {
|
|
|
|
c = *s;
|
|
|
|
if (isalnum(c))
|
|
|
|
*s = tolower(c);
|
|
|
|
else if (c != '.' && c != '/')
|
|
|
|
*s = '-';
|
|
|
|
s++;
|
|
|
|
}
|
|
|
|
|
|
|
|
ret = firmware_request_nowarn(firmware, *filename, cs35l41->dev);
|
|
|
|
if (ret != 0) {
|
|
|
|
dev_dbg(cs35l41->dev, "Failed to request '%s'\n", *filename);
|
|
|
|
kfree(*filename);
|
|
|
|
*filename = NULL;
|
|
|
|
}
|
|
|
|
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
2022-06-30 00:23:29 +00:00
|
|
|
static int cs35l41_request_firmware_files_spkid(struct cs35l41_hda *cs35l41,
|
|
|
|
const struct firmware **wmfw_firmware,
|
|
|
|
char **wmfw_filename,
|
|
|
|
const struct firmware **coeff_firmware,
|
|
|
|
char **coeff_filename)
|
|
|
|
{
|
|
|
|
int ret;
|
|
|
|
|
|
|
|
/* try cirrus/part-dspN-fwtype-sub<-spkidN><-ampname>.wmfw */
|
|
|
|
ret = cs35l41_request_firmware_file(cs35l41, wmfw_firmware, wmfw_filename,
|
|
|
|
CS35L41_FIRMWARE_ROOT,
|
|
|
|
cs35l41->acpi_subsystem_id, cs35l41->amp_name,
|
|
|
|
cs35l41->speaker_id, "wmfw");
|
|
|
|
if (!ret) {
|
|
|
|
/* try cirrus/part-dspN-fwtype-sub<-spkidN><-ampname>.bin */
|
|
|
|
cs35l41_request_firmware_file(cs35l41, coeff_firmware, coeff_filename,
|
|
|
|
CS35L41_FIRMWARE_ROOT,
|
|
|
|
cs35l41->acpi_subsystem_id, cs35l41->amp_name,
|
|
|
|
cs35l41->speaker_id, "bin");
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* try cirrus/part-dspN-fwtype-sub<-ampname>.wmfw */
|
|
|
|
ret = cs35l41_request_firmware_file(cs35l41, wmfw_firmware, wmfw_filename,
|
|
|
|
CS35L41_FIRMWARE_ROOT, cs35l41->acpi_subsystem_id,
|
|
|
|
cs35l41->amp_name, -1, "wmfw");
|
|
|
|
if (!ret) {
|
|
|
|
/* try cirrus/part-dspN-fwtype-sub<-spkidN><-ampname>.bin */
|
|
|
|
cs35l41_request_firmware_file(cs35l41, coeff_firmware, coeff_filename,
|
|
|
|
CS35L41_FIRMWARE_ROOT, cs35l41->acpi_subsystem_id,
|
|
|
|
cs35l41->amp_name, cs35l41->speaker_id, "bin");
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* try cirrus/part-dspN-fwtype-sub<-spkidN>.wmfw */
|
|
|
|
ret = cs35l41_request_firmware_file(cs35l41, wmfw_firmware, wmfw_filename,
|
|
|
|
CS35L41_FIRMWARE_ROOT, cs35l41->acpi_subsystem_id,
|
|
|
|
NULL, cs35l41->speaker_id, "wmfw");
|
|
|
|
if (!ret) {
|
|
|
|
/* try cirrus/part-dspN-fwtype-sub<-spkidN><-ampname>.bin */
|
|
|
|
ret = cs35l41_request_firmware_file(cs35l41, coeff_firmware, coeff_filename,
|
|
|
|
CS35L41_FIRMWARE_ROOT,
|
|
|
|
cs35l41->acpi_subsystem_id,
|
|
|
|
cs35l41->amp_name, cs35l41->speaker_id, "bin");
|
|
|
|
if (ret)
|
|
|
|
/* try cirrus/part-dspN-fwtype-sub<-spkidN>.bin */
|
|
|
|
cs35l41_request_firmware_file(cs35l41, coeff_firmware, coeff_filename,
|
|
|
|
CS35L41_FIRMWARE_ROOT,
|
|
|
|
cs35l41->acpi_subsystem_id,
|
|
|
|
NULL, cs35l41->speaker_id, "bin");
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* try cirrus/part-dspN-fwtype-sub.wmfw */
|
|
|
|
ret = cs35l41_request_firmware_file(cs35l41, wmfw_firmware, wmfw_filename,
|
|
|
|
CS35L41_FIRMWARE_ROOT, cs35l41->acpi_subsystem_id,
|
|
|
|
NULL, -1, "wmfw");
|
|
|
|
if (!ret) {
|
|
|
|
/* try cirrus/part-dspN-fwtype-sub<-spkidN><-ampname>.bin */
|
|
|
|
ret = cs35l41_request_firmware_file(cs35l41, coeff_firmware, coeff_filename,
|
|
|
|
CS35L41_FIRMWARE_ROOT,
|
|
|
|
cs35l41->acpi_subsystem_id,
|
|
|
|
cs35l41->amp_name, cs35l41->speaker_id, "bin");
|
|
|
|
if (ret)
|
|
|
|
/* try cirrus/part-dspN-fwtype-sub<-spkidN>.bin */
|
|
|
|
cs35l41_request_firmware_file(cs35l41, coeff_firmware, coeff_filename,
|
|
|
|
CS35L41_FIRMWARE_ROOT,
|
|
|
|
cs35l41->acpi_subsystem_id,
|
|
|
|
NULL, cs35l41->speaker_id, "bin");
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* fallback try cirrus/part-dspN-fwtype.wmfw */
|
|
|
|
ret = cs35l41_request_firmware_file(cs35l41, wmfw_firmware, wmfw_filename,
|
|
|
|
CS35L41_FIRMWARE_ROOT, NULL, NULL, -1, "wmfw");
|
|
|
|
if (!ret) {
|
|
|
|
/* fallback try cirrus/part-dspN-fwtype.bin */
|
|
|
|
cs35l41_request_firmware_file(cs35l41, coeff_firmware, coeff_filename,
|
|
|
|
CS35L41_FIRMWARE_ROOT, NULL, NULL, -1, "bin");
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
dev_warn(cs35l41->dev, "Failed to request firmware\n");
|
|
|
|
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
2022-06-30 00:23:25 +00:00
|
|
|
static int cs35l41_request_firmware_files(struct cs35l41_hda *cs35l41,
|
|
|
|
const struct firmware **wmfw_firmware,
|
|
|
|
char **wmfw_filename,
|
|
|
|
const struct firmware **coeff_firmware,
|
|
|
|
char **coeff_filename)
|
|
|
|
{
|
|
|
|
int ret;
|
|
|
|
|
2022-06-30 00:23:29 +00:00
|
|
|
if (cs35l41->speaker_id > -1)
|
|
|
|
return cs35l41_request_firmware_files_spkid(cs35l41, wmfw_firmware, wmfw_filename,
|
|
|
|
coeff_firmware, coeff_filename);
|
|
|
|
|
2022-06-30 00:23:28 +00:00
|
|
|
/* try cirrus/part-dspN-fwtype-sub<-ampname>.wmfw */
|
2022-06-30 00:23:25 +00:00
|
|
|
ret = cs35l41_request_firmware_file(cs35l41, wmfw_firmware, wmfw_filename,
|
2022-06-30 00:23:28 +00:00
|
|
|
CS35L41_FIRMWARE_ROOT, cs35l41->acpi_subsystem_id,
|
2022-06-30 00:23:29 +00:00
|
|
|
cs35l41->amp_name, -1, "wmfw");
|
2022-06-30 00:23:25 +00:00
|
|
|
if (!ret) {
|
2022-06-30 00:23:28 +00:00
|
|
|
/* try cirrus/part-dspN-fwtype-sub<-ampname>.bin */
|
2022-06-30 00:23:25 +00:00
|
|
|
cs35l41_request_firmware_file(cs35l41, coeff_firmware, coeff_filename,
|
2022-06-30 00:23:28 +00:00
|
|
|
CS35L41_FIRMWARE_ROOT, cs35l41->acpi_subsystem_id,
|
2022-06-30 00:23:29 +00:00
|
|
|
cs35l41->amp_name, -1, "bin");
|
2022-06-30 00:23:28 +00:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* try cirrus/part-dspN-fwtype-sub.wmfw */
|
|
|
|
ret = cs35l41_request_firmware_file(cs35l41, wmfw_firmware, wmfw_filename,
|
|
|
|
CS35L41_FIRMWARE_ROOT, cs35l41->acpi_subsystem_id,
|
2022-06-30 00:23:29 +00:00
|
|
|
NULL, -1, "wmfw");
|
2022-06-30 00:23:28 +00:00
|
|
|
if (!ret) {
|
|
|
|
/* try cirrus/part-dspN-fwtype-sub<-ampname>.bin */
|
|
|
|
ret = cs35l41_request_firmware_file(cs35l41, coeff_firmware, coeff_filename,
|
|
|
|
CS35L41_FIRMWARE_ROOT,
|
|
|
|
cs35l41->acpi_subsystem_id,
|
2022-06-30 00:23:29 +00:00
|
|
|
cs35l41->amp_name, -1, "bin");
|
2022-06-30 00:23:28 +00:00
|
|
|
if (ret)
|
|
|
|
/* try cirrus/part-dspN-fwtype-sub.bin */
|
|
|
|
cs35l41_request_firmware_file(cs35l41, coeff_firmware, coeff_filename,
|
|
|
|
CS35L41_FIRMWARE_ROOT,
|
2022-06-30 00:23:29 +00:00
|
|
|
cs35l41->acpi_subsystem_id,
|
|
|
|
NULL, -1, "bin");
|
2022-06-30 00:23:28 +00:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* fallback try cirrus/part-dspN-fwtype.wmfw */
|
|
|
|
ret = cs35l41_request_firmware_file(cs35l41, wmfw_firmware, wmfw_filename,
|
2022-06-30 00:23:29 +00:00
|
|
|
CS35L41_FIRMWARE_ROOT, NULL, NULL, -1, "wmfw");
|
2022-06-30 00:23:28 +00:00
|
|
|
if (!ret) {
|
|
|
|
/* fallback try cirrus/part-dspN-fwtype.bin */
|
|
|
|
cs35l41_request_firmware_file(cs35l41, coeff_firmware, coeff_filename,
|
2022-06-30 00:23:29 +00:00
|
|
|
CS35L41_FIRMWARE_ROOT, NULL, NULL, -1, "bin");
|
2022-06-30 00:23:25 +00:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
dev_warn(cs35l41->dev, "Failed to request firmware\n");
|
|
|
|
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int cs35l41_init_dsp(struct cs35l41_hda *cs35l41)
|
|
|
|
{
|
|
|
|
const struct firmware *coeff_firmware = NULL;
|
|
|
|
const struct firmware *wmfw_firmware = NULL;
|
|
|
|
struct cs_dsp *dsp = &cs35l41->cs_dsp;
|
|
|
|
char *coeff_filename = NULL;
|
|
|
|
char *wmfw_filename = NULL;
|
|
|
|
int ret;
|
|
|
|
|
|
|
|
if (!cs35l41->halo_initialized) {
|
|
|
|
cs35l41_configure_cs_dsp(cs35l41->dev, cs35l41->regmap, dsp);
|
|
|
|
dsp->client_ops = &client_ops;
|
|
|
|
|
|
|
|
ret = cs_dsp_halo_init(&cs35l41->cs_dsp);
|
|
|
|
if (ret)
|
|
|
|
return ret;
|
|
|
|
cs35l41->halo_initialized = true;
|
|
|
|
}
|
|
|
|
|
|
|
|
ret = cs35l41_request_firmware_files(cs35l41, &wmfw_firmware, &wmfw_filename,
|
|
|
|
&coeff_firmware, &coeff_filename);
|
|
|
|
if (ret < 0)
|
|
|
|
return ret;
|
|
|
|
|
|
|
|
dev_dbg(cs35l41->dev, "Loading WMFW Firmware: %s\n", wmfw_filename);
|
|
|
|
if (coeff_filename)
|
|
|
|
dev_dbg(cs35l41->dev, "Loading Coefficient File: %s\n", coeff_filename);
|
|
|
|
else
|
|
|
|
dev_warn(cs35l41->dev, "No Coefficient File available.\n");
|
|
|
|
|
|
|
|
ret = cs_dsp_power_up(dsp, wmfw_firmware, wmfw_filename, coeff_firmware, coeff_filename,
|
|
|
|
FW_NAME);
|
|
|
|
|
|
|
|
release_firmware(wmfw_firmware);
|
|
|
|
release_firmware(coeff_firmware);
|
|
|
|
kfree(wmfw_filename);
|
|
|
|
kfree(coeff_filename);
|
|
|
|
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void cs35l41_shutdown_dsp(struct cs35l41_hda *cs35l41)
|
|
|
|
{
|
|
|
|
struct cs_dsp *dsp = &cs35l41->cs_dsp;
|
|
|
|
|
|
|
|
cs_dsp_stop(dsp);
|
|
|
|
cs_dsp_power_down(dsp);
|
|
|
|
cs35l41->firmware_running = false;
|
|
|
|
dev_dbg(cs35l41->dev, "Unloaded Firmware\n");
|
|
|
|
}
|
|
|
|
|
|
|
|
static void cs35l41_remove_dsp(struct cs35l41_hda *cs35l41)
|
|
|
|
{
|
|
|
|
struct cs_dsp *dsp = &cs35l41->cs_dsp;
|
|
|
|
|
|
|
|
cs35l41_shutdown_dsp(cs35l41);
|
|
|
|
cs_dsp_remove(dsp);
|
|
|
|
cs35l41->halo_initialized = false;
|
|
|
|
}
|
|
|
|
|
2022-05-09 21:46:41 +00:00
|
|
|
/* Protection release cycle to get the speaker out of Safe-Mode */
|
|
|
|
static void cs35l41_error_release(struct device *dev, struct regmap *regmap, unsigned int mask)
|
|
|
|
{
|
|
|
|
regmap_write(regmap, CS35L41_PROTECT_REL_ERR_IGN, 0);
|
|
|
|
regmap_set_bits(regmap, CS35L41_PROTECT_REL_ERR_IGN, mask);
|
|
|
|
regmap_clear_bits(regmap, CS35L41_PROTECT_REL_ERR_IGN, mask);
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Clear all errors to release safe mode. Global Enable must be cleared first. */
|
|
|
|
static void cs35l41_irq_release(struct cs35l41_hda *cs35l41)
|
|
|
|
{
|
|
|
|
cs35l41_error_release(cs35l41->dev, cs35l41->regmap, cs35l41->irq_errors);
|
|
|
|
cs35l41->irq_errors = 0;
|
|
|
|
}
|
|
|
|
|
2021-12-17 11:57:05 +00:00
|
|
|
static void cs35l41_hda_playback_hook(struct device *dev, int action)
|
|
|
|
{
|
|
|
|
struct cs35l41_hda *cs35l41 = dev_get_drvdata(dev);
|
|
|
|
struct regmap *reg = cs35l41->regmap;
|
|
|
|
int ret = 0;
|
|
|
|
|
2022-06-30 00:23:25 +00:00
|
|
|
mutex_lock(&cs35l41->fw_mutex);
|
|
|
|
|
2021-12-17 11:57:05 +00:00
|
|
|
switch (action) {
|
|
|
|
case HDA_GEN_PCM_ACT_OPEN:
|
2022-06-30 00:23:25 +00:00
|
|
|
if (cs35l41->firmware_running) {
|
|
|
|
regmap_multi_reg_write(reg, cs35l41_hda_config_dsp,
|
|
|
|
ARRAY_SIZE(cs35l41_hda_config_dsp));
|
|
|
|
regmap_update_bits(cs35l41->regmap, CS35L41_PWR_CTRL2,
|
|
|
|
CS35L41_VMON_EN_MASK | CS35L41_IMON_EN_MASK,
|
|
|
|
1 << CS35L41_VMON_EN_SHIFT | 1 << CS35L41_IMON_EN_SHIFT);
|
|
|
|
cs35l41_set_cspl_mbox_cmd(cs35l41->dev, cs35l41->regmap,
|
|
|
|
CSPL_MBOX_CMD_RESUME);
|
|
|
|
} else {
|
|
|
|
regmap_multi_reg_write(reg, cs35l41_hda_config,
|
|
|
|
ARRAY_SIZE(cs35l41_hda_config));
|
|
|
|
}
|
2022-04-13 08:37:24 +00:00
|
|
|
ret = regmap_update_bits(reg, CS35L41_PWR_CTRL2,
|
|
|
|
CS35L41_AMP_EN_MASK, 1 << CS35L41_AMP_EN_SHIFT);
|
2022-04-13 08:37:25 +00:00
|
|
|
if (cs35l41->hw_cfg.bst_type == CS35L41_EXT_BOOST)
|
|
|
|
regmap_write(reg, CS35L41_GPIO1_CTRL1, 0x00008001);
|
2021-12-17 11:57:05 +00:00
|
|
|
break;
|
|
|
|
case HDA_GEN_PCM_ACT_PREPARE:
|
2022-04-13 08:37:26 +00:00
|
|
|
ret = cs35l41_global_enable(reg, cs35l41->hw_cfg.bst_type, 1);
|
2021-12-17 11:57:05 +00:00
|
|
|
break;
|
|
|
|
case HDA_GEN_PCM_ACT_CLEANUP:
|
2022-04-13 08:37:20 +00:00
|
|
|
regmap_multi_reg_write(reg, cs35l41_hda_mute, ARRAY_SIZE(cs35l41_hda_mute));
|
2022-04-13 08:37:26 +00:00
|
|
|
ret = cs35l41_global_enable(reg, cs35l41->hw_cfg.bst_type, 0);
|
2021-12-17 11:57:05 +00:00
|
|
|
break;
|
|
|
|
case HDA_GEN_PCM_ACT_CLOSE:
|
2022-04-13 08:37:24 +00:00
|
|
|
ret = regmap_update_bits(reg, CS35L41_PWR_CTRL2,
|
|
|
|
CS35L41_AMP_EN_MASK, 0 << CS35L41_AMP_EN_SHIFT);
|
2022-04-13 08:37:25 +00:00
|
|
|
if (cs35l41->hw_cfg.bst_type == CS35L41_EXT_BOOST)
|
|
|
|
regmap_write(reg, CS35L41_GPIO1_CTRL1, 0x00000001);
|
2022-06-30 00:23:25 +00:00
|
|
|
if (cs35l41->firmware_running) {
|
|
|
|
cs35l41_set_cspl_mbox_cmd(cs35l41->dev, cs35l41->regmap,
|
|
|
|
CSPL_MBOX_CMD_PAUSE);
|
|
|
|
regmap_update_bits(cs35l41->regmap, CS35L41_PWR_CTRL2,
|
|
|
|
CS35L41_VMON_EN_MASK | CS35L41_IMON_EN_MASK,
|
|
|
|
0 << CS35L41_VMON_EN_SHIFT | 0 << CS35L41_IMON_EN_SHIFT);
|
|
|
|
}
|
2022-05-09 21:46:41 +00:00
|
|
|
cs35l41_irq_release(cs35l41);
|
2021-12-17 11:57:05 +00:00
|
|
|
break;
|
2022-01-17 16:08:28 +00:00
|
|
|
default:
|
2022-04-13 08:37:24 +00:00
|
|
|
dev_warn(cs35l41->dev, "Playback action not supported: %d\n", action);
|
2022-01-17 16:08:28 +00:00
|
|
|
break;
|
2021-12-17 11:57:05 +00:00
|
|
|
}
|
|
|
|
|
2022-06-30 00:23:25 +00:00
|
|
|
mutex_unlock(&cs35l41->fw_mutex);
|
|
|
|
|
2021-12-17 11:57:05 +00:00
|
|
|
if (ret)
|
2022-04-13 08:37:24 +00:00
|
|
|
dev_err(cs35l41->dev, "Regmap access fail: %d\n", ret);
|
2021-12-17 11:57:05 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
static int cs35l41_hda_channel_map(struct device *dev, unsigned int tx_num, unsigned int *tx_slot,
|
|
|
|
unsigned int rx_num, unsigned int *rx_slot)
|
|
|
|
{
|
|
|
|
struct cs35l41_hda *cs35l41 = dev_get_drvdata(dev);
|
2022-05-09 21:46:46 +00:00
|
|
|
static const char * const channel_name[] = { "L", "R" };
|
|
|
|
|
|
|
|
if (!cs35l41->amp_name) {
|
|
|
|
if (*rx_slot >= ARRAY_SIZE(channel_name))
|
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
cs35l41->amp_name = devm_kasprintf(cs35l41->dev, GFP_KERNEL, "%s%d",
|
|
|
|
channel_name[*rx_slot], cs35l41->channel_index);
|
|
|
|
if (!cs35l41->amp_name)
|
|
|
|
return -ENOMEM;
|
|
|
|
}
|
2021-12-17 11:57:05 +00:00
|
|
|
|
|
|
|
return cs35l41_set_channels(cs35l41->dev, cs35l41->regmap, tx_num, tx_slot, rx_num,
|
|
|
|
rx_slot);
|
|
|
|
}
|
|
|
|
|
2022-06-30 00:23:25 +00:00
|
|
|
static int cs35l41_smart_amp(struct cs35l41_hda *cs35l41)
|
|
|
|
{
|
|
|
|
int halo_sts;
|
|
|
|
int ret;
|
|
|
|
|
|
|
|
ret = cs35l41_init_dsp(cs35l41);
|
|
|
|
if (ret) {
|
|
|
|
dev_warn(cs35l41->dev, "Cannot Initialize Firmware. Error: %d\n", ret);
|
|
|
|
goto clean_dsp;
|
|
|
|
}
|
|
|
|
|
|
|
|
ret = cs35l41_write_fs_errata(cs35l41->dev, cs35l41->regmap);
|
|
|
|
if (ret) {
|
|
|
|
dev_err(cs35l41->dev, "Cannot Write FS Errata: %d\n", ret);
|
|
|
|
goto clean_dsp;
|
|
|
|
}
|
|
|
|
|
|
|
|
ret = cs_dsp_run(&cs35l41->cs_dsp);
|
|
|
|
if (ret) {
|
|
|
|
dev_err(cs35l41->dev, "Fail to start dsp: %d\n", ret);
|
|
|
|
goto clean_dsp;
|
|
|
|
}
|
|
|
|
|
|
|
|
ret = read_poll_timeout(hda_cs_dsp_read_ctl, ret,
|
|
|
|
be32_to_cpu(halo_sts) == HALO_STATE_CODE_RUN,
|
|
|
|
1000, 15000, false, &cs35l41->cs_dsp, HALO_STATE_DSP_CTL_NAME,
|
|
|
|
HALO_STATE_DSP_CTL_TYPE, HALO_STATE_DSP_CTL_ALG,
|
|
|
|
&halo_sts, sizeof(halo_sts));
|
|
|
|
|
|
|
|
if (ret) {
|
|
|
|
dev_err(cs35l41->dev, "Timeout waiting for HALO Core to start. State: %d\n",
|
|
|
|
halo_sts);
|
|
|
|
goto clean_dsp;
|
|
|
|
}
|
|
|
|
|
|
|
|
cs35l41_set_cspl_mbox_cmd(cs35l41->dev, cs35l41->regmap, CSPL_MBOX_CMD_PAUSE);
|
|
|
|
cs35l41->firmware_running = true;
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
clean_dsp:
|
|
|
|
cs35l41_shutdown_dsp(cs35l41);
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
2021-12-17 11:57:05 +00:00
|
|
|
static int cs35l41_hda_bind(struct device *dev, struct device *master, void *master_data)
|
|
|
|
{
|
|
|
|
struct cs35l41_hda *cs35l41 = dev_get_drvdata(dev);
|
|
|
|
struct hda_component *comps = master_data;
|
|
|
|
|
2022-01-17 16:08:30 +00:00
|
|
|
if (!comps || cs35l41->index < 0 || cs35l41->index >= HDA_MAX_COMPONENTS)
|
2021-12-17 11:57:05 +00:00
|
|
|
return -EINVAL;
|
|
|
|
|
2022-01-17 16:08:30 +00:00
|
|
|
comps = &comps[cs35l41->index];
|
|
|
|
if (comps->dev)
|
|
|
|
return -EBUSY;
|
2021-12-17 11:57:05 +00:00
|
|
|
|
2022-01-17 16:08:30 +00:00
|
|
|
comps->dev = dev;
|
2022-06-30 00:23:26 +00:00
|
|
|
if (!cs35l41->acpi_subsystem_id)
|
|
|
|
cs35l41->acpi_subsystem_id = devm_kasprintf(dev, GFP_KERNEL, "%.8x",
|
|
|
|
comps->codec->core.subsystem_id);
|
2022-06-30 00:23:24 +00:00
|
|
|
cs35l41->codec = comps->codec;
|
2022-01-17 16:08:30 +00:00
|
|
|
strscpy(comps->name, dev_name(dev), sizeof(comps->name));
|
|
|
|
comps->playback_hook = cs35l41_hda_playback_hook;
|
|
|
|
|
2022-06-30 00:23:25 +00:00
|
|
|
mutex_lock(&cs35l41->fw_mutex);
|
|
|
|
if (cs35l41_smart_amp(cs35l41) < 0)
|
|
|
|
dev_warn(cs35l41->dev, "Cannot Run Firmware, reverting to dsp bypass...\n");
|
|
|
|
mutex_unlock(&cs35l41->fw_mutex);
|
|
|
|
|
2022-01-17 16:08:30 +00:00
|
|
|
return 0;
|
2021-12-17 11:57:05 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
static void cs35l41_hda_unbind(struct device *dev, struct device *master, void *master_data)
|
|
|
|
{
|
|
|
|
struct cs35l41_hda *cs35l41 = dev_get_drvdata(dev);
|
|
|
|
struct hda_component *comps = master_data;
|
|
|
|
|
|
|
|
if (comps[cs35l41->index].dev == dev)
|
|
|
|
memset(&comps[cs35l41->index], 0, sizeof(*comps));
|
|
|
|
}
|
|
|
|
|
|
|
|
static const struct component_ops cs35l41_hda_comp_ops = {
|
|
|
|
.bind = cs35l41_hda_bind,
|
|
|
|
.unbind = cs35l41_hda_unbind,
|
|
|
|
};
|
|
|
|
|
2022-05-09 21:46:41 +00:00
|
|
|
static irqreturn_t cs35l41_bst_short_err(int irq, void *data)
|
|
|
|
{
|
|
|
|
struct cs35l41_hda *cs35l41 = data;
|
|
|
|
|
|
|
|
dev_crit_ratelimited(cs35l41->dev, "LBST Error\n");
|
|
|
|
set_bit(CS35L41_BST_SHORT_ERR_RLS_SHIFT, &cs35l41->irq_errors);
|
|
|
|
|
|
|
|
return IRQ_HANDLED;
|
|
|
|
}
|
|
|
|
|
|
|
|
static irqreturn_t cs35l41_bst_dcm_uvp_err(int irq, void *data)
|
|
|
|
{
|
|
|
|
struct cs35l41_hda *cs35l41 = data;
|
|
|
|
|
|
|
|
dev_crit_ratelimited(cs35l41->dev, "DCM VBST Under Voltage Error\n");
|
|
|
|
set_bit(CS35L41_BST_UVP_ERR_RLS_SHIFT, &cs35l41->irq_errors);
|
|
|
|
|
|
|
|
return IRQ_HANDLED;
|
|
|
|
}
|
|
|
|
|
|
|
|
static irqreturn_t cs35l41_bst_ovp_err(int irq, void *data)
|
|
|
|
{
|
|
|
|
struct cs35l41_hda *cs35l41 = data;
|
|
|
|
|
|
|
|
dev_crit_ratelimited(cs35l41->dev, "VBST Over Voltage error\n");
|
|
|
|
set_bit(CS35L41_BST_OVP_ERR_RLS_SHIFT, &cs35l41->irq_errors);
|
|
|
|
|
|
|
|
return IRQ_HANDLED;
|
|
|
|
}
|
|
|
|
|
|
|
|
static irqreturn_t cs35l41_temp_err(int irq, void *data)
|
|
|
|
{
|
|
|
|
struct cs35l41_hda *cs35l41 = data;
|
|
|
|
|
|
|
|
dev_crit_ratelimited(cs35l41->dev, "Over temperature error\n");
|
|
|
|
set_bit(CS35L41_TEMP_ERR_RLS_SHIFT, &cs35l41->irq_errors);
|
|
|
|
|
|
|
|
return IRQ_HANDLED;
|
|
|
|
}
|
|
|
|
|
|
|
|
static irqreturn_t cs35l41_temp_warn(int irq, void *data)
|
|
|
|
{
|
|
|
|
struct cs35l41_hda *cs35l41 = data;
|
|
|
|
|
|
|
|
dev_crit_ratelimited(cs35l41->dev, "Over temperature warning\n");
|
|
|
|
set_bit(CS35L41_TEMP_WARN_ERR_RLS_SHIFT, &cs35l41->irq_errors);
|
|
|
|
|
|
|
|
return IRQ_HANDLED;
|
|
|
|
}
|
|
|
|
|
|
|
|
static irqreturn_t cs35l41_amp_short(int irq, void *data)
|
|
|
|
{
|
|
|
|
struct cs35l41_hda *cs35l41 = data;
|
|
|
|
|
|
|
|
dev_crit_ratelimited(cs35l41->dev, "Amp short error\n");
|
|
|
|
set_bit(CS35L41_AMP_SHORT_ERR_RLS_SHIFT, &cs35l41->irq_errors);
|
|
|
|
|
|
|
|
return IRQ_HANDLED;
|
|
|
|
}
|
|
|
|
|
|
|
|
static const struct cs35l41_irq cs35l41_irqs[] = {
|
|
|
|
CS35L41_IRQ(BST_OVP_ERR, "Boost Overvoltage Error", cs35l41_bst_ovp_err),
|
|
|
|
CS35L41_IRQ(BST_DCM_UVP_ERR, "Boost Undervoltage Error", cs35l41_bst_dcm_uvp_err),
|
|
|
|
CS35L41_IRQ(BST_SHORT_ERR, "Boost Inductor Short Error", cs35l41_bst_short_err),
|
|
|
|
CS35L41_IRQ(TEMP_WARN, "Temperature Warning", cs35l41_temp_warn),
|
|
|
|
CS35L41_IRQ(TEMP_ERR, "Temperature Error", cs35l41_temp_err),
|
|
|
|
CS35L41_IRQ(AMP_SHORT_ERR, "Amp Short", cs35l41_amp_short),
|
|
|
|
};
|
|
|
|
|
|
|
|
static const struct regmap_irq cs35l41_reg_irqs[] = {
|
|
|
|
CS35L41_REG_IRQ(IRQ1_STATUS1, BST_OVP_ERR),
|
|
|
|
CS35L41_REG_IRQ(IRQ1_STATUS1, BST_DCM_UVP_ERR),
|
|
|
|
CS35L41_REG_IRQ(IRQ1_STATUS1, BST_SHORT_ERR),
|
|
|
|
CS35L41_REG_IRQ(IRQ1_STATUS1, TEMP_WARN),
|
|
|
|
CS35L41_REG_IRQ(IRQ1_STATUS1, TEMP_ERR),
|
|
|
|
CS35L41_REG_IRQ(IRQ1_STATUS1, AMP_SHORT_ERR),
|
|
|
|
};
|
|
|
|
|
|
|
|
static const struct regmap_irq_chip cs35l41_regmap_irq_chip = {
|
|
|
|
.name = "cs35l41 IRQ1 Controller",
|
|
|
|
.status_base = CS35L41_IRQ1_STATUS1,
|
|
|
|
.mask_base = CS35L41_IRQ1_MASK1,
|
|
|
|
.ack_base = CS35L41_IRQ1_STATUS1,
|
|
|
|
.num_regs = 4,
|
|
|
|
.irqs = cs35l41_reg_irqs,
|
|
|
|
.num_irqs = ARRAY_SIZE(cs35l41_reg_irqs),
|
|
|
|
};
|
|
|
|
|
2022-04-13 08:37:13 +00:00
|
|
|
static int cs35l41_hda_apply_properties(struct cs35l41_hda *cs35l41)
|
2021-12-17 11:57:05 +00:00
|
|
|
{
|
2022-04-13 08:37:13 +00:00
|
|
|
struct cs35l41_hw_cfg *hw_cfg = &cs35l41->hw_cfg;
|
2022-05-09 21:46:41 +00:00
|
|
|
bool using_irq = false;
|
|
|
|
int irq, irq_pol;
|
2021-12-17 11:57:05 +00:00
|
|
|
int ret;
|
2022-05-09 21:46:41 +00:00
|
|
|
int i;
|
2021-12-17 11:57:05 +00:00
|
|
|
|
2022-04-13 08:37:14 +00:00
|
|
|
if (!cs35l41->hw_cfg.valid)
|
|
|
|
return -EINVAL;
|
|
|
|
|
2022-04-13 08:37:26 +00:00
|
|
|
ret = cs35l41_init_boost(cs35l41->dev, cs35l41->regmap, hw_cfg);
|
|
|
|
if (ret)
|
|
|
|
return ret;
|
2021-12-17 11:57:05 +00:00
|
|
|
|
2022-04-13 08:37:14 +00:00
|
|
|
if (hw_cfg->gpio1.valid) {
|
|
|
|
switch (hw_cfg->gpio1.func) {
|
|
|
|
case CS35L41_NOT_USED:
|
|
|
|
break;
|
|
|
|
case CS35l41_VSPK_SWITCH:
|
2022-04-13 08:37:15 +00:00
|
|
|
hw_cfg->gpio1.func = CS35L41_GPIO1_GPIO;
|
|
|
|
hw_cfg->gpio1.out_en = true;
|
2022-04-13 08:37:14 +00:00
|
|
|
break;
|
|
|
|
case CS35l41_SYNC:
|
2022-04-13 08:37:15 +00:00
|
|
|
hw_cfg->gpio1.func = CS35L41_GPIO1_MDSYNC;
|
2022-04-13 08:37:14 +00:00
|
|
|
break;
|
|
|
|
default:
|
|
|
|
dev_err(cs35l41->dev, "Invalid function %d for GPIO1\n",
|
|
|
|
hw_cfg->gpio1.func);
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
2021-12-17 11:57:05 +00:00
|
|
|
}
|
|
|
|
|
2022-04-13 08:37:14 +00:00
|
|
|
if (hw_cfg->gpio2.valid) {
|
|
|
|
switch (hw_cfg->gpio2.func) {
|
|
|
|
case CS35L41_NOT_USED:
|
|
|
|
break;
|
|
|
|
case CS35L41_INTERRUPT:
|
2022-05-09 21:46:41 +00:00
|
|
|
using_irq = true;
|
2022-04-13 08:37:14 +00:00
|
|
|
break;
|
|
|
|
default:
|
|
|
|
dev_err(cs35l41->dev, "Invalid GPIO2 function %d\n", hw_cfg->gpio2.func);
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
2021-12-17 11:57:05 +00:00
|
|
|
}
|
|
|
|
|
2022-05-09 21:46:41 +00:00
|
|
|
irq_pol = cs35l41_gpio_config(cs35l41->regmap, hw_cfg);
|
|
|
|
|
|
|
|
if (cs35l41->irq && using_irq) {
|
|
|
|
ret = devm_regmap_add_irq_chip(cs35l41->dev, cs35l41->regmap, cs35l41->irq,
|
|
|
|
IRQF_ONESHOT | IRQF_SHARED | irq_pol,
|
|
|
|
0, &cs35l41_regmap_irq_chip, &cs35l41->irq_data);
|
|
|
|
if (ret)
|
|
|
|
return ret;
|
|
|
|
|
|
|
|
for (i = 0; i < ARRAY_SIZE(cs35l41_irqs); i++) {
|
|
|
|
irq = regmap_irq_get_virq(cs35l41->irq_data, cs35l41_irqs[i].irq);
|
|
|
|
if (irq < 0)
|
|
|
|
return irq;
|
|
|
|
|
|
|
|
ret = devm_request_threaded_irq(cs35l41->dev, irq, NULL,
|
|
|
|
cs35l41_irqs[i].handler,
|
|
|
|
IRQF_ONESHOT | IRQF_SHARED | irq_pol,
|
|
|
|
cs35l41_irqs[i].name, cs35l41);
|
|
|
|
if (ret)
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
}
|
2022-04-13 08:37:15 +00:00
|
|
|
|
2022-04-13 08:37:13 +00:00
|
|
|
return cs35l41_hda_channel_map(cs35l41->dev, 0, NULL, 1, &hw_cfg->spk_pos);
|
2021-12-17 11:57:05 +00:00
|
|
|
}
|
|
|
|
|
2022-06-30 00:23:27 +00:00
|
|
|
static int cs35l41_get_acpi_sub_string(struct device *dev, struct acpi_device *adev,
|
|
|
|
const char **subsysid)
|
|
|
|
{
|
|
|
|
struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL };
|
|
|
|
union acpi_object *obj;
|
|
|
|
acpi_status status;
|
|
|
|
int ret = 0;
|
|
|
|
|
|
|
|
status = acpi_evaluate_object(adev->handle, "_SUB", NULL, &buffer);
|
|
|
|
if (ACPI_SUCCESS(status)) {
|
|
|
|
obj = buffer.pointer;
|
|
|
|
if (obj->type == ACPI_TYPE_STRING) {
|
|
|
|
*subsysid = devm_kstrdup(dev, obj->string.pointer, GFP_KERNEL);
|
|
|
|
if (*subsysid == NULL) {
|
|
|
|
dev_err(dev, "Cannot allocate Subsystem ID");
|
|
|
|
ret = -ENOMEM;
|
|
|
|
}
|
|
|
|
} else {
|
|
|
|
dev_warn(dev, "Warning ACPI _SUB did not return a string\n");
|
|
|
|
ret = -ENODEV;
|
|
|
|
}
|
|
|
|
acpi_os_free(buffer.pointer);
|
|
|
|
} else {
|
|
|
|
dev_dbg(dev, "Warning ACPI _SUB failed: %#x\n", status);
|
|
|
|
ret = -ENODEV;
|
|
|
|
}
|
|
|
|
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
2022-06-30 00:23:29 +00:00
|
|
|
static int cs35l41_get_speaker_id(struct device *dev, int amp_index,
|
|
|
|
int num_amps, int fixed_gpio_id)
|
|
|
|
{
|
|
|
|
struct gpio_desc *speaker_id_desc;
|
|
|
|
int speaker_id = -ENODEV;
|
|
|
|
|
|
|
|
if (fixed_gpio_id >= 0) {
|
|
|
|
dev_dbg(dev, "Found Fixed Speaker ID GPIO (index = %d)\n", fixed_gpio_id);
|
|
|
|
speaker_id_desc = gpiod_get_index(dev, NULL, fixed_gpio_id, GPIOD_IN);
|
|
|
|
if (IS_ERR(speaker_id_desc)) {
|
|
|
|
speaker_id = PTR_ERR(speaker_id_desc);
|
|
|
|
return speaker_id;
|
|
|
|
}
|
|
|
|
speaker_id = gpiod_get_value_cansleep(speaker_id_desc);
|
|
|
|
gpiod_put(speaker_id_desc);
|
|
|
|
dev_dbg(dev, "Speaker ID = %d\n", speaker_id);
|
|
|
|
} else {
|
|
|
|
int base_index;
|
|
|
|
int gpios_per_amp;
|
|
|
|
int count;
|
|
|
|
int tmp;
|
|
|
|
int i;
|
|
|
|
|
|
|
|
count = gpiod_count(dev, "spk-id");
|
|
|
|
if (count > 0) {
|
|
|
|
speaker_id = 0;
|
|
|
|
gpios_per_amp = count / num_amps;
|
|
|
|
base_index = gpios_per_amp * amp_index;
|
|
|
|
|
|
|
|
if (count % num_amps)
|
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
dev_dbg(dev, "Found %d Speaker ID GPIOs per Amp\n", gpios_per_amp);
|
|
|
|
|
|
|
|
for (i = 0; i < gpios_per_amp; i++) {
|
|
|
|
speaker_id_desc = gpiod_get_index(dev, "spk-id", i + base_index,
|
|
|
|
GPIOD_IN);
|
|
|
|
if (IS_ERR(speaker_id_desc)) {
|
|
|
|
speaker_id = PTR_ERR(speaker_id_desc);
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
tmp = gpiod_get_value_cansleep(speaker_id_desc);
|
|
|
|
gpiod_put(speaker_id_desc);
|
|
|
|
if (tmp < 0) {
|
|
|
|
speaker_id = tmp;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
speaker_id |= tmp << i;
|
|
|
|
}
|
|
|
|
dev_dbg(dev, "Speaker ID = %d\n", speaker_id);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
return speaker_id;
|
|
|
|
}
|
|
|
|
|
2022-04-13 08:37:13 +00:00
|
|
|
static int cs35l41_hda_read_acpi(struct cs35l41_hda *cs35l41, const char *hid, int id)
|
2021-12-17 11:57:05 +00:00
|
|
|
{
|
2022-04-13 08:37:13 +00:00
|
|
|
struct cs35l41_hw_cfg *hw_cfg = &cs35l41->hw_cfg;
|
2021-12-17 11:57:05 +00:00
|
|
|
u32 values[HDA_MAX_COMPONENTS];
|
|
|
|
struct acpi_device *adev;
|
2022-01-17 16:08:30 +00:00
|
|
|
struct device *physdev;
|
2021-12-17 11:57:05 +00:00
|
|
|
char *property;
|
|
|
|
size_t nval;
|
|
|
|
int i, ret;
|
|
|
|
|
|
|
|
adev = acpi_dev_get_first_match_dev(hid, NULL, -1);
|
|
|
|
if (!adev) {
|
|
|
|
dev_err(cs35l41->dev, "Failed to find an ACPI device for %s\n", hid);
|
2022-04-13 08:37:13 +00:00
|
|
|
return -ENODEV;
|
2021-12-17 11:57:05 +00:00
|
|
|
}
|
|
|
|
|
2022-01-17 16:08:30 +00:00
|
|
|
physdev = get_device(acpi_get_first_physical_node(adev));
|
2021-12-17 11:57:05 +00:00
|
|
|
acpi_dev_put(adev);
|
|
|
|
|
2022-06-30 00:23:27 +00:00
|
|
|
ret = cs35l41_get_acpi_sub_string(cs35l41->dev, adev, &cs35l41->acpi_subsystem_id);
|
|
|
|
if (ret)
|
|
|
|
dev_info(cs35l41->dev, "No Subsystem ID found in ACPI: %d", ret);
|
|
|
|
else
|
|
|
|
dev_dbg(cs35l41->dev, "Subsystem ID %s found", cs35l41->acpi_subsystem_id);
|
|
|
|
|
2021-12-17 11:57:05 +00:00
|
|
|
property = "cirrus,dev-index";
|
2022-01-17 16:08:30 +00:00
|
|
|
ret = device_property_count_u32(physdev, property);
|
2021-12-17 11:57:05 +00:00
|
|
|
if (ret <= 0)
|
|
|
|
goto no_acpi_dsd;
|
|
|
|
|
|
|
|
if (ret > ARRAY_SIZE(values)) {
|
|
|
|
ret = -EINVAL;
|
|
|
|
goto err;
|
|
|
|
}
|
|
|
|
nval = ret;
|
|
|
|
|
2022-01-17 16:08:30 +00:00
|
|
|
ret = device_property_read_u32_array(physdev, property, values, nval);
|
2021-12-17 11:57:05 +00:00
|
|
|
if (ret)
|
|
|
|
goto err;
|
|
|
|
|
|
|
|
cs35l41->index = -1;
|
|
|
|
for (i = 0; i < nval; i++) {
|
|
|
|
if (values[i] == id) {
|
|
|
|
cs35l41->index = i;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
if (cs35l41->index == -1) {
|
|
|
|
dev_err(cs35l41->dev, "No index found in %s\n", property);
|
|
|
|
ret = -ENODEV;
|
|
|
|
goto err;
|
|
|
|
}
|
|
|
|
|
2022-01-17 16:08:30 +00:00
|
|
|
/* To use the same release code for all laptop variants we can't use devm_ version of
|
|
|
|
* gpiod_get here, as CLSA010* don't have a fully functional bios with an _DSD node
|
|
|
|
*/
|
2022-07-12 15:35:16 +00:00
|
|
|
cs35l41->reset_gpio = fwnode_gpiod_get_index(acpi_fwnode_handle(adev), "reset", cs35l41->index,
|
2021-12-17 11:57:05 +00:00
|
|
|
GPIOD_OUT_LOW, "cs35l41-reset");
|
|
|
|
|
|
|
|
property = "cirrus,speaker-position";
|
2022-01-17 16:08:30 +00:00
|
|
|
ret = device_property_read_u32_array(physdev, property, values, nval);
|
2021-12-17 11:57:05 +00:00
|
|
|
if (ret)
|
2022-04-13 08:37:13 +00:00
|
|
|
goto err;
|
2021-12-17 11:57:05 +00:00
|
|
|
hw_cfg->spk_pos = values[cs35l41->index];
|
|
|
|
|
2022-05-09 21:46:46 +00:00
|
|
|
cs35l41->channel_index = 0;
|
|
|
|
for (i = 0; i < cs35l41->index; i++)
|
|
|
|
if (values[i] == hw_cfg->spk_pos)
|
|
|
|
cs35l41->channel_index++;
|
|
|
|
|
2021-12-17 11:57:05 +00:00
|
|
|
property = "cirrus,gpio1-func";
|
2022-01-17 16:08:30 +00:00
|
|
|
ret = device_property_read_u32_array(physdev, property, values, nval);
|
2021-12-17 11:57:05 +00:00
|
|
|
if (ret)
|
2022-04-13 08:37:13 +00:00
|
|
|
goto err;
|
|
|
|
hw_cfg->gpio1.func = values[cs35l41->index];
|
2022-04-13 08:37:14 +00:00
|
|
|
hw_cfg->gpio1.valid = true;
|
2021-12-17 11:57:05 +00:00
|
|
|
|
|
|
|
property = "cirrus,gpio2-func";
|
2022-01-17 16:08:30 +00:00
|
|
|
ret = device_property_read_u32_array(physdev, property, values, nval);
|
2021-12-17 11:57:05 +00:00
|
|
|
if (ret)
|
2022-04-13 08:37:13 +00:00
|
|
|
goto err;
|
|
|
|
hw_cfg->gpio2.func = values[cs35l41->index];
|
2022-04-13 08:37:14 +00:00
|
|
|
hw_cfg->gpio2.valid = true;
|
2021-12-17 11:57:05 +00:00
|
|
|
|
|
|
|
property = "cirrus,boost-peak-milliamp";
|
2022-01-17 16:08:30 +00:00
|
|
|
ret = device_property_read_u32_array(physdev, property, values, nval);
|
2021-12-17 11:57:05 +00:00
|
|
|
if (ret == 0)
|
|
|
|
hw_cfg->bst_ipk = values[cs35l41->index];
|
2022-04-13 08:37:14 +00:00
|
|
|
else
|
|
|
|
hw_cfg->bst_ipk = -1;
|
2021-12-17 11:57:05 +00:00
|
|
|
|
|
|
|
property = "cirrus,boost-ind-nanohenry";
|
2022-01-17 16:08:30 +00:00
|
|
|
ret = device_property_read_u32_array(physdev, property, values, nval);
|
2021-12-17 11:57:05 +00:00
|
|
|
if (ret == 0)
|
|
|
|
hw_cfg->bst_ind = values[cs35l41->index];
|
2022-04-13 08:37:14 +00:00
|
|
|
else
|
|
|
|
hw_cfg->bst_ind = -1;
|
2021-12-17 11:57:05 +00:00
|
|
|
|
|
|
|
property = "cirrus,boost-cap-microfarad";
|
2022-01-17 16:08:30 +00:00
|
|
|
ret = device_property_read_u32_array(physdev, property, values, nval);
|
2021-12-17 11:57:05 +00:00
|
|
|
if (ret == 0)
|
|
|
|
hw_cfg->bst_cap = values[cs35l41->index];
|
2022-04-13 08:37:14 +00:00
|
|
|
else
|
|
|
|
hw_cfg->bst_cap = -1;
|
2021-12-17 11:57:05 +00:00
|
|
|
|
2022-06-30 00:23:29 +00:00
|
|
|
cs35l41->speaker_id = cs35l41_get_speaker_id(physdev, cs35l41->index, nval, -1);
|
|
|
|
|
2022-04-13 08:37:18 +00:00
|
|
|
if (hw_cfg->bst_ind > 0 || hw_cfg->bst_cap > 0 || hw_cfg->bst_ipk > 0)
|
|
|
|
hw_cfg->bst_type = CS35L41_INT_BOOST;
|
|
|
|
else
|
|
|
|
hw_cfg->bst_type = CS35L41_EXT_BOOST;
|
|
|
|
|
2022-04-13 08:37:14 +00:00
|
|
|
hw_cfg->valid = true;
|
2022-01-17 16:08:30 +00:00
|
|
|
put_device(physdev);
|
2021-12-17 11:57:05 +00:00
|
|
|
|
2022-04-13 08:37:13 +00:00
|
|
|
return 0;
|
2021-12-17 11:57:05 +00:00
|
|
|
|
|
|
|
err:
|
2022-01-17 16:08:30 +00:00
|
|
|
put_device(physdev);
|
2021-12-17 11:57:05 +00:00
|
|
|
dev_err(cs35l41->dev, "Failed property %s: %d\n", property, ret);
|
|
|
|
|
2022-04-13 08:37:13 +00:00
|
|
|
return ret;
|
2021-12-17 11:57:05 +00:00
|
|
|
|
|
|
|
no_acpi_dsd:
|
|
|
|
/*
|
|
|
|
* Device CLSA0100 doesn't have _DSD so a gpiod_get by the label reset won't work.
|
2022-07-11 10:01:29 +00:00
|
|
|
* And devices created by serial-multi-instantiate don't have their device struct
|
|
|
|
* pointing to the correct fwnode, so acpi_dev must be used here.
|
2021-12-17 11:57:05 +00:00
|
|
|
* And devm functions expect that the device requesting the resource has the correct
|
2022-01-17 16:08:30 +00:00
|
|
|
* fwnode.
|
2021-12-17 11:57:05 +00:00
|
|
|
*/
|
|
|
|
if (strncmp(hid, "CLSA0100", 8) != 0)
|
2022-04-13 08:37:13 +00:00
|
|
|
return -EINVAL;
|
2021-12-17 11:57:05 +00:00
|
|
|
|
|
|
|
/* check I2C address to assign the index */
|
|
|
|
cs35l41->index = id == 0x40 ? 0 : 1;
|
2022-05-09 21:46:39 +00:00
|
|
|
cs35l41->hw_cfg.spk_pos = cs35l41->index;
|
2022-05-09 21:46:46 +00:00
|
|
|
cs35l41->channel_index = 0;
|
2022-01-17 16:08:30 +00:00
|
|
|
cs35l41->reset_gpio = gpiod_get_index(physdev, NULL, 0, GPIOD_OUT_HIGH);
|
2022-04-13 08:37:18 +00:00
|
|
|
cs35l41->hw_cfg.bst_type = CS35L41_EXT_BOOST_NO_VSPK_SWITCH;
|
2022-06-30 00:23:29 +00:00
|
|
|
cs35l41->speaker_id = cs35l41_get_speaker_id(physdev, 0, 0, 2);
|
2022-05-09 21:46:42 +00:00
|
|
|
hw_cfg->gpio2.func = CS35L41_GPIO2_INT_OPEN_DRAIN;
|
|
|
|
hw_cfg->gpio2.valid = true;
|
2022-04-13 08:37:14 +00:00
|
|
|
cs35l41->hw_cfg.valid = true;
|
2022-01-17 16:08:30 +00:00
|
|
|
put_device(physdev);
|
2021-12-17 11:57:05 +00:00
|
|
|
|
2022-04-13 08:37:13 +00:00
|
|
|
return 0;
|
2021-12-17 11:57:05 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
int cs35l41_hda_probe(struct device *dev, const char *device_name, int id, int irq,
|
|
|
|
struct regmap *regmap)
|
|
|
|
{
|
|
|
|
unsigned int int_sts, regid, reg_revid, mtl_revid, chipid, int_status;
|
|
|
|
struct cs35l41_hda *cs35l41;
|
|
|
|
int ret;
|
|
|
|
|
2022-05-09 21:46:41 +00:00
|
|
|
BUILD_BUG_ON(ARRAY_SIZE(cs35l41_irqs) != ARRAY_SIZE(cs35l41_reg_irqs));
|
|
|
|
BUILD_BUG_ON(ARRAY_SIZE(cs35l41_irqs) != CS35L41_NUM_IRQ);
|
|
|
|
|
2021-12-17 11:57:05 +00:00
|
|
|
if (IS_ERR(regmap))
|
|
|
|
return PTR_ERR(regmap);
|
|
|
|
|
|
|
|
cs35l41 = devm_kzalloc(dev, sizeof(*cs35l41), GFP_KERNEL);
|
|
|
|
if (!cs35l41)
|
|
|
|
return -ENOMEM;
|
|
|
|
|
|
|
|
cs35l41->dev = dev;
|
|
|
|
cs35l41->irq = irq;
|
|
|
|
cs35l41->regmap = regmap;
|
|
|
|
dev_set_drvdata(dev, cs35l41);
|
|
|
|
|
2022-04-13 08:37:13 +00:00
|
|
|
ret = cs35l41_hda_read_acpi(cs35l41, device_name, id);
|
2022-07-11 09:52:16 +00:00
|
|
|
if (ret)
|
|
|
|
return dev_err_probe(cs35l41->dev, ret, "Platform not supported\n");
|
2021-12-17 11:57:05 +00:00
|
|
|
|
|
|
|
if (IS_ERR(cs35l41->reset_gpio)) {
|
|
|
|
ret = PTR_ERR(cs35l41->reset_gpio);
|
|
|
|
cs35l41->reset_gpio = NULL;
|
|
|
|
if (ret == -EBUSY) {
|
|
|
|
dev_info(cs35l41->dev, "Reset line busy, assuming shared reset\n");
|
|
|
|
} else {
|
2022-07-11 09:52:16 +00:00
|
|
|
dev_err_probe(cs35l41->dev, ret, "Failed to get reset GPIO\n");
|
2021-12-17 11:57:05 +00:00
|
|
|
goto err;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
if (cs35l41->reset_gpio) {
|
|
|
|
usleep_range(2000, 2100);
|
|
|
|
gpiod_set_value_cansleep(cs35l41->reset_gpio, 1);
|
|
|
|
}
|
|
|
|
|
|
|
|
usleep_range(2000, 2100);
|
|
|
|
|
|
|
|
ret = regmap_read_poll_timeout(cs35l41->regmap, CS35L41_IRQ1_STATUS4, int_status,
|
|
|
|
int_status & CS35L41_OTP_BOOT_DONE, 1000, 100000);
|
|
|
|
if (ret) {
|
|
|
|
dev_err(cs35l41->dev, "Failed waiting for OTP_BOOT_DONE: %d\n", ret);
|
|
|
|
goto err;
|
|
|
|
}
|
|
|
|
|
|
|
|
ret = regmap_read(cs35l41->regmap, CS35L41_IRQ1_STATUS3, &int_sts);
|
|
|
|
if (ret || (int_sts & CS35L41_OTP_BOOT_ERR)) {
|
2022-01-17 16:08:30 +00:00
|
|
|
dev_err(cs35l41->dev, "OTP Boot status %x error: %d\n",
|
|
|
|
int_sts & CS35L41_OTP_BOOT_ERR, ret);
|
2021-12-17 11:57:05 +00:00
|
|
|
ret = -EIO;
|
|
|
|
goto err;
|
|
|
|
}
|
|
|
|
|
|
|
|
ret = regmap_read(cs35l41->regmap, CS35L41_DEVID, ®id);
|
|
|
|
if (ret) {
|
|
|
|
dev_err(cs35l41->dev, "Get Device ID failed: %d\n", ret);
|
|
|
|
goto err;
|
|
|
|
}
|
|
|
|
|
|
|
|
ret = regmap_read(cs35l41->regmap, CS35L41_REVID, ®_revid);
|
|
|
|
if (ret) {
|
|
|
|
dev_err(cs35l41->dev, "Get Revision ID failed: %d\n", ret);
|
|
|
|
goto err;
|
|
|
|
}
|
|
|
|
|
|
|
|
mtl_revid = reg_revid & CS35L41_MTLREVID_MASK;
|
|
|
|
|
|
|
|
chipid = (mtl_revid % 2) ? CS35L41R_CHIP_ID : CS35L41_CHIP_ID;
|
|
|
|
if (regid != chipid) {
|
|
|
|
dev_err(cs35l41->dev, "CS35L41 Device ID (%X). Expected ID %X\n", regid, chipid);
|
|
|
|
ret = -ENODEV;
|
|
|
|
goto err;
|
|
|
|
}
|
|
|
|
|
2022-01-17 16:08:26 +00:00
|
|
|
ret = cs35l41_test_key_unlock(cs35l41->dev, cs35l41->regmap);
|
|
|
|
if (ret)
|
|
|
|
goto err;
|
|
|
|
|
2021-12-17 11:57:05 +00:00
|
|
|
ret = cs35l41_register_errata_patch(cs35l41->dev, cs35l41->regmap, reg_revid);
|
|
|
|
if (ret)
|
|
|
|
goto err;
|
|
|
|
|
|
|
|
ret = cs35l41_otp_unpack(cs35l41->dev, cs35l41->regmap);
|
|
|
|
if (ret) {
|
|
|
|
dev_err(cs35l41->dev, "OTP Unpack failed: %d\n", ret);
|
|
|
|
goto err;
|
|
|
|
}
|
|
|
|
|
2022-01-17 16:08:26 +00:00
|
|
|
ret = cs35l41_test_key_lock(cs35l41->dev, cs35l41->regmap);
|
|
|
|
if (ret)
|
|
|
|
goto err;
|
|
|
|
|
2022-06-30 00:23:25 +00:00
|
|
|
mutex_init(&cs35l41->fw_mutex);
|
|
|
|
|
2022-04-13 08:37:13 +00:00
|
|
|
ret = cs35l41_hda_apply_properties(cs35l41);
|
2021-12-17 11:57:05 +00:00
|
|
|
if (ret)
|
|
|
|
goto err;
|
|
|
|
|
|
|
|
ret = component_add(cs35l41->dev, &cs35l41_hda_comp_ops);
|
|
|
|
if (ret) {
|
|
|
|
dev_err(cs35l41->dev, "Register component failed: %d\n", ret);
|
|
|
|
goto err;
|
|
|
|
}
|
|
|
|
|
|
|
|
dev_info(cs35l41->dev, "Cirrus Logic CS35L41 (%x), Revision: %02X\n", regid, reg_revid);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
err:
|
2022-04-13 08:37:26 +00:00
|
|
|
if (cs35l41_safe_reset(cs35l41->regmap, cs35l41->hw_cfg.bst_type))
|
2021-12-17 11:57:05 +00:00
|
|
|
gpiod_set_value_cansleep(cs35l41->reset_gpio, 0);
|
|
|
|
gpiod_put(cs35l41->reset_gpio);
|
|
|
|
|
|
|
|
return ret;
|
|
|
|
}
|
2022-01-17 16:08:27 +00:00
|
|
|
EXPORT_SYMBOL_NS_GPL(cs35l41_hda_probe, SND_HDA_SCODEC_CS35L41);
|
2021-12-17 11:57:05 +00:00
|
|
|
|
2022-01-17 22:00:55 +00:00
|
|
|
void cs35l41_hda_remove(struct device *dev)
|
2021-12-17 11:57:05 +00:00
|
|
|
{
|
|
|
|
struct cs35l41_hda *cs35l41 = dev_get_drvdata(dev);
|
|
|
|
|
2022-06-30 00:23:25 +00:00
|
|
|
if (cs35l41->halo_initialized)
|
|
|
|
cs35l41_remove_dsp(cs35l41);
|
|
|
|
|
2021-12-17 11:57:05 +00:00
|
|
|
component_del(cs35l41->dev, &cs35l41_hda_comp_ops);
|
|
|
|
|
2022-04-13 08:37:26 +00:00
|
|
|
if (cs35l41_safe_reset(cs35l41->regmap, cs35l41->hw_cfg.bst_type))
|
2021-12-17 11:57:05 +00:00
|
|
|
gpiod_set_value_cansleep(cs35l41->reset_gpio, 0);
|
|
|
|
gpiod_put(cs35l41->reset_gpio);
|
|
|
|
}
|
2022-01-17 16:08:27 +00:00
|
|
|
EXPORT_SYMBOL_NS_GPL(cs35l41_hda_remove, SND_HDA_SCODEC_CS35L41);
|
2021-12-17 11:57:05 +00:00
|
|
|
|
|
|
|
MODULE_DESCRIPTION("CS35L41 HDA Driver");
|
2022-06-30 00:23:25 +00:00
|
|
|
MODULE_IMPORT_NS(SND_HDA_CS_DSP_CONTROLS);
|
2021-12-17 11:57:05 +00:00
|
|
|
MODULE_AUTHOR("Lucas Tanure, Cirrus Logic Inc, <tanureal@opensource.cirrus.com>");
|
|
|
|
MODULE_LICENSE("GPL");
|