2014-03-18 02:29:55 +00:00
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Renesas R-Car sound
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Required properties:
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2014-11-10 19:00:42 +00:00
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- compatible : "renesas,rcar_sound-<soctype>", fallbacks
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"renesas,rcar_sound-gen1" if generation1, and
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2014-03-18 02:29:55 +00:00
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"renesas,rcar_sound-gen2" if generation2
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2015-09-10 07:01:58 +00:00
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"renesas,rcar_sound-gen3" if generation3
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2014-11-10 19:00:42 +00:00
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Examples with soctypes are:
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2015-06-01 10:44:15 +00:00
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- "renesas,rcar_sound-r8a7778" (R-Car M1A)
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2014-11-10 19:00:42 +00:00
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- "renesas,rcar_sound-r8a7790" (R-Car H2)
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- "renesas,rcar_sound-r8a7791" (R-Car M2-W)
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2015-09-10 07:01:58 +00:00
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- "renesas,rcar_sound-r8a7795" (R-Car H3)
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2014-03-18 02:29:55 +00:00
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- reg : Should contain the register physical address.
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required register is
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SRU/ADG/SSI if generation1
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SRU/ADG/SSIU/SSI if generation2
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2014-03-24 03:29:15 +00:00
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- rcar_sound,ssi : Should contain SSI feature.
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The number of SSI subnode should be same as HW.
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see below for detail.
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- rcar_sound,src : Should contain SRC feature.
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The number of SRC subnode should be same as HW.
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see below for detail.
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2015-07-15 07:17:17 +00:00
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- rcar_sound,ctu : Should contain CTU feature.
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The number of CTU subnode should be same as HW.
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see below for detail.
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2015-07-15 07:17:36 +00:00
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- rcar_sound,mix : Should contain MIX feature.
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The number of MIX subnode should be same as HW.
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see below for detail.
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2014-06-23 00:59:28 +00:00
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- rcar_sound,dvc : Should contain DVC feature.
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The number of DVC subnode should be same as HW.
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see below for detail.
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2014-03-24 03:29:15 +00:00
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- rcar_sound,dai : DAI contents.
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The number of DAI subnode should be same as HW.
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see below for detail.
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2015-09-10 06:49:54 +00:00
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- #sound-dai-cells : it must be 0 if your system is using single DAI
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it must be 1 if your system is using multi DAI
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2015-09-10 07:04:45 +00:00
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- #clock-cells : it must be 0 if your system has audio_clkout
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it must be 1 if your system has audio_clkout0/1/2/3
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- clock-frequency : for all audio_clkout0/1/2/3
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2014-03-18 02:29:55 +00:00
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SSI subnode properties:
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- interrupts : Should contain SSI interrupt for PIO transfer
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- shared-pin : if shared clock pin
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2014-05-23 06:25:49 +00:00
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- pio-transfer : use PIO transfer mode
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2014-06-23 00:56:23 +00:00
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- no-busif : BUSIF is not ussed when [mem -> SSI] via DMA case
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2015-02-20 10:32:49 +00:00
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- dma : Should contain Audio DMAC entry
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- dma-names : SSI case "rx" (=playback), "tx" (=capture)
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SSIU case "rxu" (=playback), "txu" (=capture)
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2014-03-18 02:29:55 +00:00
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2014-03-24 03:29:15 +00:00
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SRC subnode properties:
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2015-02-20 10:32:49 +00:00
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- dma : Should contain Audio DMAC entry
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- dma-names : "rx" (=playback), "tx" (=capture)
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DVC subnode properties:
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- dma : Should contain Audio DMAC entry
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- dma-names : "tx" (=playback/capture)
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2014-03-24 03:29:15 +00:00
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2014-03-18 02:29:55 +00:00
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DAI subnode properties:
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- playback : list of playback modules
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- capture : list of capture modules
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Example:
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2015-04-27 12:49:09 +00:00
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rcar_sound: sound@ec500000 {
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2014-03-18 02:29:55 +00:00
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#sound-dai-cells = <1>;
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2014-11-10 19:00:42 +00:00
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compatible = "renesas,rcar_sound-r8a7791", "renesas,rcar_sound-gen2";
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2014-03-18 02:29:55 +00:00
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reg = <0 0xec500000 0 0x1000>, /* SCU */
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<0 0xec5a0000 0 0x100>, /* ADG */
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<0 0xec540000 0 0x1000>, /* SSIU */
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2015-02-20 10:33:09 +00:00
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<0 0xec541000 0 0x1280>, /* SSI */
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<0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/
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reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
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2014-03-18 02:29:55 +00:00
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2015-02-20 10:32:15 +00:00
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clocks = <&mstp10_clks R8A7790_CLK_SSI_ALL>,
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<&mstp10_clks R8A7790_CLK_SSI9>, <&mstp10_clks R8A7790_CLK_SSI8>,
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<&mstp10_clks R8A7790_CLK_SSI7>, <&mstp10_clks R8A7790_CLK_SSI6>,
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<&mstp10_clks R8A7790_CLK_SSI5>, <&mstp10_clks R8A7790_CLK_SSI4>,
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<&mstp10_clks R8A7790_CLK_SSI3>, <&mstp10_clks R8A7790_CLK_SSI2>,
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<&mstp10_clks R8A7790_CLK_SSI1>, <&mstp10_clks R8A7790_CLK_SSI0>,
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<&mstp10_clks R8A7790_CLK_SCU_SRC9>, <&mstp10_clks R8A7790_CLK_SCU_SRC8>,
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<&mstp10_clks R8A7790_CLK_SCU_SRC7>, <&mstp10_clks R8A7790_CLK_SCU_SRC6>,
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<&mstp10_clks R8A7790_CLK_SCU_SRC5>, <&mstp10_clks R8A7790_CLK_SCU_SRC4>,
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<&mstp10_clks R8A7790_CLK_SCU_SRC3>, <&mstp10_clks R8A7790_CLK_SCU_SRC2>,
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<&mstp10_clks R8A7790_CLK_SCU_SRC1>, <&mstp10_clks R8A7790_CLK_SCU_SRC0>,
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<&mstp10_clks R8A7790_CLK_SCU_DVC0>, <&mstp10_clks R8A7790_CLK_SCU_DVC1>,
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<&audio_clk_a>, <&audio_clk_b>, <&audio_clk_c>, <&m2_clk>;
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clock-names = "ssi-all",
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"ssi.9", "ssi.8", "ssi.7", "ssi.6", "ssi.5",
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"ssi.4", "ssi.3", "ssi.2", "ssi.1", "ssi.0",
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"src.9", "src.8", "src.7", "src.6", "src.5",
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"src.4", "src.3", "src.2", "src.1", "src.0",
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"dvc.0", "dvc.1",
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"clk_a", "clk_b", "clk_c", "clk_i";
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2014-06-23 00:59:28 +00:00
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rcar_sound,dvc {
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2015-02-20 10:32:49 +00:00
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dvc0: dvc@0 {
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dmas = <&audma0 0xbc>;
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dma-names = "tx";
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};
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dvc1: dvc@1 {
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dmas = <&audma0 0xbe>;
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dma-names = "tx";
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};
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2014-06-23 00:59:28 +00:00
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};
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2015-07-15 07:17:36 +00:00
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rcar_sound,mix {
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mix0: mix@0 { };
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mix1: mix@1 { };
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};
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2015-07-15 07:17:17 +00:00
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rcar_sound,ctu {
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ctu00: ctu@0 { };
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ctu01: ctu@1 { };
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ctu02: ctu@2 { };
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ctu03: ctu@3 { };
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ctu10: ctu@4 { };
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ctu11: ctu@5 { };
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ctu12: ctu@6 { };
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ctu13: ctu@7 { };
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};
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2014-03-18 02:29:55 +00:00
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rcar_sound,src {
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2015-02-20 10:31:55 +00:00
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src0: src@0 {
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interrupts = <0 352 IRQ_TYPE_LEVEL_HIGH>;
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2015-02-20 10:32:49 +00:00
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dmas = <&audma0 0x85>, <&audma1 0x9a>;
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dma-names = "rx", "tx";
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2015-02-20 10:31:55 +00:00
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};
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src1: src@1 {
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interrupts = <0 353 IRQ_TYPE_LEVEL_HIGH>;
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2015-02-20 10:32:49 +00:00
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dmas = <&audma0 0x87>, <&audma1 0x9c>;
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dma-names = "rx", "tx";
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2015-02-20 10:31:55 +00:00
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};
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src2: src@2 {
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interrupts = <0 354 IRQ_TYPE_LEVEL_HIGH>;
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2015-02-20 10:32:49 +00:00
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dmas = <&audma0 0x89>, <&audma1 0x9e>;
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dma-names = "rx", "tx";
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2015-02-20 10:31:55 +00:00
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};
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src3: src@3 {
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interrupts = <0 355 IRQ_TYPE_LEVEL_HIGH>;
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2015-02-20 10:32:49 +00:00
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dmas = <&audma0 0x8b>, <&audma1 0xa0>;
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dma-names = "rx", "tx";
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2015-02-20 10:31:55 +00:00
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};
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src4: src@4 {
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interrupts = <0 356 IRQ_TYPE_LEVEL_HIGH>;
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2015-02-20 10:32:49 +00:00
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dmas = <&audma0 0x8d>, <&audma1 0xb0>;
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dma-names = "rx", "tx";
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2015-02-20 10:31:55 +00:00
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};
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src5: src@5 {
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interrupts = <0 357 IRQ_TYPE_LEVEL_HIGH>;
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2015-02-20 10:32:49 +00:00
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dmas = <&audma0 0x8f>, <&audma1 0xb2>;
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dma-names = "rx", "tx";
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2015-02-20 10:31:55 +00:00
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};
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src6: src@6 {
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interrupts = <0 358 IRQ_TYPE_LEVEL_HIGH>;
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2015-02-20 10:32:49 +00:00
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dmas = <&audma0 0x91>, <&audma1 0xb4>;
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dma-names = "rx", "tx";
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2015-02-20 10:31:55 +00:00
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};
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src7: src@7 {
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interrupts = <0 359 IRQ_TYPE_LEVEL_HIGH>;
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2015-02-20 10:32:49 +00:00
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dmas = <&audma0 0x93>, <&audma1 0xb6>;
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dma-names = "rx", "tx";
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2015-02-20 10:31:55 +00:00
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};
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src8: src@8 {
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interrupts = <0 360 IRQ_TYPE_LEVEL_HIGH>;
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2015-02-20 10:32:49 +00:00
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dmas = <&audma0 0x95>, <&audma1 0xb8>;
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dma-names = "rx", "tx";
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2015-02-20 10:31:55 +00:00
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};
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src9: src@9 {
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interrupts = <0 361 IRQ_TYPE_LEVEL_HIGH>;
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2015-02-20 10:32:49 +00:00
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dmas = <&audma0 0x97>, <&audma1 0xba>;
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dma-names = "rx", "tx";
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2015-02-20 10:31:55 +00:00
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};
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2014-03-18 02:29:55 +00:00
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};
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rcar_sound,ssi {
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ssi0: ssi@0 {
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interrupts = <0 370 IRQ_TYPE_LEVEL_HIGH>;
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2015-02-20 10:32:49 +00:00
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dmas = <&audma0 0x01>, <&audma1 0x02>, <&audma0 0x15>, <&audma1 0x16>;
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dma-names = "rx", "tx", "rxu", "txu";
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2014-03-18 02:29:55 +00:00
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};
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ssi1: ssi@1 {
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interrupts = <0 371 IRQ_TYPE_LEVEL_HIGH>;
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2015-02-20 10:32:49 +00:00
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dmas = <&audma0 0x03>, <&audma1 0x04>, <&audma0 0x49>, <&audma1 0x4a>;
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dma-names = "rx", "tx", "rxu", "txu";
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2014-03-18 02:29:55 +00:00
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};
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ssi2: ssi@2 {
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interrupts = <0 372 IRQ_TYPE_LEVEL_HIGH>;
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2015-02-20 10:32:49 +00:00
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dmas = <&audma0 0x05>, <&audma1 0x06>, <&audma0 0x63>, <&audma1 0x64>;
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dma-names = "rx", "tx", "rxu", "txu";
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2014-03-18 02:29:55 +00:00
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};
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ssi3: ssi@3 {
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interrupts = <0 373 IRQ_TYPE_LEVEL_HIGH>;
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2015-02-20 10:32:49 +00:00
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dmas = <&audma0 0x07>, <&audma1 0x08>, <&audma0 0x6f>, <&audma1 0x70>;
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dma-names = "rx", "tx", "rxu", "txu";
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2014-03-18 02:29:55 +00:00
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};
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ssi4: ssi@4 {
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interrupts = <0 374 IRQ_TYPE_LEVEL_HIGH>;
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2015-02-20 10:32:49 +00:00
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dmas = <&audma0 0x09>, <&audma1 0x0a>, <&audma0 0x71>, <&audma1 0x72>;
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dma-names = "rx", "tx", "rxu", "txu";
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2014-03-18 02:29:55 +00:00
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};
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ssi5: ssi@5 {
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interrupts = <0 375 IRQ_TYPE_LEVEL_HIGH>;
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2015-02-20 10:32:49 +00:00
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dmas = <&audma0 0x0b>, <&audma1 0x0c>, <&audma0 0x73>, <&audma1 0x74>;
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dma-names = "rx", "tx", "rxu", "txu";
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2014-03-18 02:29:55 +00:00
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};
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ssi6: ssi@6 {
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interrupts = <0 376 IRQ_TYPE_LEVEL_HIGH>;
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2015-02-20 10:32:49 +00:00
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dmas = <&audma0 0x0d>, <&audma1 0x0e>, <&audma0 0x75>, <&audma1 0x76>;
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dma-names = "rx", "tx", "rxu", "txu";
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2014-03-18 02:29:55 +00:00
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};
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ssi7: ssi@7 {
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interrupts = <0 377 IRQ_TYPE_LEVEL_HIGH>;
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2015-02-20 10:32:49 +00:00
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dmas = <&audma0 0x0f>, <&audma1 0x10>, <&audma0 0x79>, <&audma1 0x7a>;
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dma-names = "rx", "tx", "rxu", "txu";
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2014-03-18 02:29:55 +00:00
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};
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ssi8: ssi@8 {
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interrupts = <0 378 IRQ_TYPE_LEVEL_HIGH>;
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2015-02-20 10:32:49 +00:00
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dmas = <&audma0 0x11>, <&audma1 0x12>, <&audma0 0x7b>, <&audma1 0x7c>;
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dma-names = "rx", "tx", "rxu", "txu";
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2014-03-18 02:29:55 +00:00
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};
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ssi9: ssi@9 {
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interrupts = <0 379 IRQ_TYPE_LEVEL_HIGH>;
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2015-02-20 10:32:49 +00:00
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dmas = <&audma0 0x13>, <&audma1 0x14>, <&audma0 0x7d>, <&audma1 0x7e>;
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dma-names = "rx", "tx", "rxu", "txu";
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2014-03-18 02:29:55 +00:00
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};
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};
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rcar_sound,dai {
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dai0 {
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playback = <&ssi5 &src5>;
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capture = <&ssi6>;
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};
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dai1 {
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playback = <&ssi3>;
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};
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dai2 {
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capture = <&ssi4>;
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};
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dai3 {
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playback = <&ssi7>;
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};
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dai4 {
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capture = <&ssi8>;
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};
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};
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};
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