2012-06-22 09:40:49 +00:00
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/*
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* Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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/dts-v1/;
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2013-06-03 14:12:22 +00:00
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#include "am33xx.dtsi"
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2012-06-22 09:40:49 +00:00
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/ {
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model = "TI AM335x EVM";
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compatible = "ti,am335x-evm", "ti,am33xx";
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2012-08-31 09:37:20 +00:00
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cpus {
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cpu@0 {
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cpu0-supply = <&vdd1_reg>;
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};
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};
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2012-06-22 09:40:49 +00:00
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memory {
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device_type = "memory";
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reg = <0x80000000 0x10000000>; /* 256 MB */
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};
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2012-08-15 11:23:25 +00:00
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2012-11-06 13:48:29 +00:00
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am33xx_pinmux: pinmux@44e10800 {
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pinctrl-names = "default";
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2013-05-20 13:28:10 +00:00
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pinctrl-0 = <&matrix_keypad_s0 &volume_keys_s0 &clkout2_pin>;
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2012-11-06 13:48:29 +00:00
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matrix_keypad_s0: matrix_keypad_s0 {
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pinctrl-single,pins = <
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2013-06-03 14:12:25 +00:00
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0x54 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a5.gpio1_21 */
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0x58 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a6.gpio1_22 */
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0x64 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_a9.gpio1_25 */
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0x68 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_a10.gpio1_26 */
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0x6c (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_a11.gpio1_27 */
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2012-11-06 13:48:29 +00:00
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>;
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};
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2012-11-06 13:48:31 +00:00
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volume_keys_s0: volume_keys_s0 {
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pinctrl-single,pins = <
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2013-06-03 14:12:25 +00:00
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0x150 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* spi0_sclk.gpio0_2 */
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0x154 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* spi0_d0.gpio0_3 */
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2012-11-06 13:48:31 +00:00
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>;
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};
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2013-03-26 08:44:01 +00:00
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i2c0_pins: pinmux_i2c0_pins {
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pinctrl-single,pins = <
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2013-06-03 14:12:25 +00:00
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0x188 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_sda.i2c0_sda */
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0x18c (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_scl.i2c0_scl */
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2013-03-26 08:44:01 +00:00
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>;
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};
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i2c1_pins: pinmux_i2c1_pins {
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pinctrl-single,pins = <
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2013-06-03 14:12:25 +00:00
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0x158 (PIN_INPUT_PULLUP | MUX_MODE2) /* spi0_d1.i2c1_sda */
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0x15c (PIN_INPUT_PULLUP | MUX_MODE2) /* spi0_cs0.i2c1_scl */
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2013-03-26 08:44:01 +00:00
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>;
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};
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2013-03-27 11:01:34 +00:00
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uart0_pins: pinmux_uart0_pins {
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pinctrl-single,pins = <
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2013-06-03 14:12:25 +00:00
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0x170 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */
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0x174 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */
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2013-03-27 11:01:34 +00:00
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>;
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};
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2013-05-20 13:28:10 +00:00
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clkout2_pin: pinmux_clkout2_pin {
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pinctrl-single,pins = <
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2013-06-03 14:12:25 +00:00
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0x1b4 (PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* xdma_event_intr1.clkout2 */
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2013-05-20 13:28:10 +00:00
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>;
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};
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2013-05-31 07:49:05 +00:00
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nandflash_pins_s0: nandflash_pins_s0 {
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pinctrl-single,pins = <
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2013-06-03 14:12:25 +00:00
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0x0 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad0.gpmc_ad0 */
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0x4 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad1.gpmc_ad1 */
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0x8 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad2.gpmc_ad2 */
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0xc (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad3.gpmc_ad3 */
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0x10 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad4.gpmc_ad4 */
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0x14 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad5.gpmc_ad5 */
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0x18 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad6.gpmc_ad6 */
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0x1c (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad7.gpmc_ad7 */
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0x70 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_wait0.gpmc_wait0 */
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0x74 (PIN_INPUT_PULLUP | MUX_MODE7) /* gpmc_wpn.gpio0_30 */
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0x7c (PIN_OUTPUT | MUX_MODE0) /* gpmc_csn0.gpmc_csn0 */
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0x90 (PIN_OUTPUT | MUX_MODE0) /* gpmc_advn_ale.gpmc_advn_ale */
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0x94 (PIN_OUTPUT | MUX_MODE0) /* gpmc_oen_ren.gpmc_oen_ren */
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0x98 (PIN_OUTPUT | MUX_MODE0) /* gpmc_wen.gpmc_wen */
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0x9c (PIN_OUTPUT | MUX_MODE0) /* gpmc_be0n_cle.gpmc_be0n_cle */
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2013-05-31 07:49:05 +00:00
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>;
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};
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2013-06-06 13:52:38 +00:00
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ecap0_pins: backlight_pins {
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pinctrl-single,pins = <
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0x164 0x0 /* eCAP0_in_PWM0_out.eCAP0_in_PWM0_out MODE0 */
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>;
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};
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2013-06-07 11:32:54 +00:00
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cpsw_default: cpsw_default {
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pinctrl-single,pins = <
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/* Slave 1 */
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0x114 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txen.rgmii1_tctl */
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0x118 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxdv.rgmii1_rctl */
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0x11c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd3.rgmii1_td3 */
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0x120 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd2.rgmii1_td2 */
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0x124 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd1.rgmii1_td1 */
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0x128 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd0.rgmii1_td0 */
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0x12c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txclk.rgmii1_tclk */
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0x130 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxclk.rgmii1_rclk */
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0x134 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd3.rgmii1_rd3 */
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0x138 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd2.rgmii1_rd2 */
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0x13c (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd1.rgmii1_rd1 */
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0x140 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd0.rgmii1_rd0 */
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>;
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};
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cpsw_sleep: cpsw_sleep {
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pinctrl-single,pins = <
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/* Slave 1 reset value */
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0x114 (PIN_INPUT_PULLDOWN | MUX_MODE7)
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0x118 (PIN_INPUT_PULLDOWN | MUX_MODE7)
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0x11c (PIN_INPUT_PULLDOWN | MUX_MODE7)
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0x120 (PIN_INPUT_PULLDOWN | MUX_MODE7)
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0x124 (PIN_INPUT_PULLDOWN | MUX_MODE7)
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0x128 (PIN_INPUT_PULLDOWN | MUX_MODE7)
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0x12c (PIN_INPUT_PULLDOWN | MUX_MODE7)
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0x130 (PIN_INPUT_PULLDOWN | MUX_MODE7)
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0x134 (PIN_INPUT_PULLDOWN | MUX_MODE7)
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0x138 (PIN_INPUT_PULLDOWN | MUX_MODE7)
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0x13c (PIN_INPUT_PULLDOWN | MUX_MODE7)
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0x140 (PIN_INPUT_PULLDOWN | MUX_MODE7)
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>;
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};
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davinci_mdio_default: davinci_mdio_default {
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pinctrl-single,pins = <
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/* MDIO */
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0x148 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */
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0x14c (PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */
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>;
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};
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davinci_mdio_sleep: davinci_mdio_sleep {
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pinctrl-single,pins = <
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/* MDIO reset value */
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0x148 (PIN_INPUT_PULLDOWN | MUX_MODE7)
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0x14c (PIN_INPUT_PULLDOWN | MUX_MODE7)
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>;
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};
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2012-11-06 13:48:29 +00:00
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};
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2012-08-15 11:23:25 +00:00
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ocp {
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2013-03-28 06:06:05 +00:00
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uart0: serial@44e09000 {
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2013-03-27 11:01:34 +00:00
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pinctrl-names = "default";
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pinctrl-0 = <&uart0_pins>;
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2012-08-15 11:23:25 +00:00
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status = "okay";
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};
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2012-08-21 11:17:29 +00:00
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2012-11-21 11:52:17 +00:00
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i2c0: i2c@44e0b000 {
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2013-03-26 08:44:01 +00:00
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pinctrl-names = "default";
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pinctrl-0 = <&i2c0_pins>;
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2012-08-21 11:17:29 +00:00
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status = "okay";
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clock-frequency = <400000>;
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2012-08-27 11:29:08 +00:00
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tps: tps@2d {
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reg = <0x2d>;
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2012-08-21 11:17:29 +00:00
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};
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};
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2012-09-19 21:19:29 +00:00
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2012-11-21 11:52:17 +00:00
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i2c1: i2c@4802a000 {
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2013-03-26 08:44:01 +00:00
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pinctrl-names = "default";
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pinctrl-0 = <&i2c1_pins>;
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2012-09-19 21:19:29 +00:00
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status = "okay";
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2012-09-21 15:49:11 +00:00
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clock-frequency = <100000>;
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2012-09-19 21:19:29 +00:00
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lis331dlh: lis331dlh@18 {
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compatible = "st,lis331dlh", "st,lis3lv02d";
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reg = <0x18>;
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Vdd-supply = <&lis3_reg>;
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Vdd_IO-supply = <&lis3_reg>;
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st,click-single-x;
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st,click-single-y;
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st,click-single-z;
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st,click-thresh-x = <10>;
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st,click-thresh-y = <10>;
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st,click-thresh-z = <10>;
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st,irq1-click;
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st,irq2-click;
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st,wakeup-x-lo;
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st,wakeup-x-hi;
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st,wakeup-y-lo;
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st,wakeup-y-hi;
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st,wakeup-z-lo;
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st,wakeup-z-hi;
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st,min-limit-x = <120>;
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st,min-limit-y = <120>;
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st,min-limit-z = <140>;
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st,max-limit-x = <550>;
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st,max-limit-y = <550>;
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st,max-limit-z = <750>;
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};
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2012-09-19 21:19:30 +00:00
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2012-09-21 15:49:11 +00:00
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tsl2550: tsl2550@39 {
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compatible = "taos,tsl2550";
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reg = <0x39>;
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};
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2012-09-19 21:19:30 +00:00
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tmp275: tmp275@48 {
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compatible = "ti,tmp275";
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reg = <0x48>;
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};
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2012-09-19 21:19:29 +00:00
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};
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2013-05-31 07:49:05 +00:00
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elm: elm@48080000 {
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status = "okay";
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};
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2013-06-06 13:52:38 +00:00
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epwmss0: epwmss@48300000 {
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status = "okay";
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ecap0: ecap@48300100 {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&ecap0_pins>;
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};
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};
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2013-05-31 07:49:05 +00:00
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gpmc: gpmc@50000000 {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&nandflash_pins_s0>;
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ranges = <0 0 0x08000000 0x10000000>; /* CS0: NAND */
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nand@0,0 {
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reg = <0 0 0>; /* CS0, offset 0 */
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nand-bus-width = <8>;
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ti,nand-ecc-opt = "bch8";
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gpmc,device-nand = "true";
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gpmc,device-width = <1>;
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gpmc,sync-clk-ps = <0>;
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gpmc,cs-on-ns = <0>;
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gpmc,cs-rd-off-ns = <44>;
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gpmc,cs-wr-off-ns = <44>;
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gpmc,adv-on-ns = <6>;
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gpmc,adv-rd-off-ns = <34>;
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gpmc,adv-wr-off-ns = <44>;
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gpmc,we-on-ns = <0>;
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gpmc,we-off-ns = <40>;
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gpmc,oe-on-ns = <0>;
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gpmc,oe-off-ns = <54>;
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gpmc,access-ns = <64>;
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gpmc,rd-cycle-ns = <82>;
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gpmc,wr-cycle-ns = <82>;
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gpmc,wait-on-read = "true";
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gpmc,wait-on-write = "true";
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gpmc,bus-turnaround-ns = <0>;
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gpmc,cycle2cycle-delay-ns = <0>;
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gpmc,clk-activation-ns = <0>;
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gpmc,wait-monitoring-ns = <0>;
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gpmc,wr-access-ns = <40>;
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gpmc,wr-data-mux-bus-ns = <0>;
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#address-cells = <1>;
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#size-cells = <1>;
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elm_id = <&elm>;
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/* MTD partition table */
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partition@0 {
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label = "SPL1";
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reg = <0x00000000 0x000020000>;
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};
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partition@1 {
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label = "SPL2";
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reg = <0x00020000 0x00020000>;
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};
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partition@2 {
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label = "SPL3";
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reg = <0x00040000 0x00020000>;
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};
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partition@3 {
|
|
|
|
label = "SPL4";
|
|
|
|
reg = <0x00060000 0x00020000>;
|
|
|
|
};
|
|
|
|
|
|
|
|
partition@4 {
|
|
|
|
label = "U-boot";
|
|
|
|
reg = <0x00080000 0x001e0000>;
|
|
|
|
};
|
|
|
|
|
|
|
|
partition@5 {
|
|
|
|
label = "environment";
|
|
|
|
reg = <0x00260000 0x00020000>;
|
|
|
|
};
|
|
|
|
|
|
|
|
partition@6 {
|
|
|
|
label = "Kernel";
|
|
|
|
reg = <0x00280000 0x00500000>;
|
|
|
|
};
|
|
|
|
|
|
|
|
partition@7 {
|
|
|
|
label = "File-System";
|
|
|
|
reg = <0x00780000 0x0F880000>;
|
|
|
|
};
|
|
|
|
};
|
|
|
|
};
|
2012-08-21 11:17:29 +00:00
|
|
|
};
|
|
|
|
|
|
|
|
vbat: fixedregulator@0 {
|
|
|
|
compatible = "regulator-fixed";
|
|
|
|
regulator-name = "vbat";
|
|
|
|
regulator-min-microvolt = <5000000>;
|
|
|
|
regulator-max-microvolt = <5000000>;
|
|
|
|
regulator-boot-on;
|
|
|
|
};
|
2012-09-19 21:19:29 +00:00
|
|
|
|
|
|
|
lis3_reg: fixedregulator@1 {
|
|
|
|
compatible = "regulator-fixed";
|
|
|
|
regulator-name = "lis3_reg";
|
|
|
|
regulator-boot-on;
|
|
|
|
};
|
2012-11-06 13:48:30 +00:00
|
|
|
|
|
|
|
matrix_keypad: matrix_keypad@0 {
|
|
|
|
compatible = "gpio-matrix-keypad";
|
|
|
|
debounce-delay-ms = <5>;
|
|
|
|
col-scan-delay-us = <2>;
|
|
|
|
|
2013-06-03 14:12:23 +00:00
|
|
|
row-gpios = <&gpio1 25 GPIO_ACTIVE_HIGH /* Bank1, pin25 */
|
|
|
|
&gpio1 26 GPIO_ACTIVE_HIGH /* Bank1, pin26 */
|
|
|
|
&gpio1 27 GPIO_ACTIVE_HIGH>; /* Bank1, pin27 */
|
2012-11-06 13:48:30 +00:00
|
|
|
|
2013-06-03 14:12:23 +00:00
|
|
|
col-gpios = <&gpio1 21 GPIO_ACTIVE_HIGH /* Bank1, pin21 */
|
|
|
|
&gpio1 22 GPIO_ACTIVE_HIGH>; /* Bank1, pin22 */
|
2012-11-06 13:48:30 +00:00
|
|
|
|
|
|
|
linux,keymap = <0x0000008b /* MENU */
|
|
|
|
0x0100009e /* BACK */
|
|
|
|
0x02000069 /* LEFT */
|
|
|
|
0x0001006a /* RIGHT */
|
|
|
|
0x0101001c /* ENTER */
|
|
|
|
0x0201006c>; /* DOWN */
|
|
|
|
};
|
2012-11-06 13:48:32 +00:00
|
|
|
|
|
|
|
gpio_keys: volume_keys@0 {
|
|
|
|
compatible = "gpio-keys";
|
|
|
|
#address-cells = <1>;
|
|
|
|
#size-cells = <0>;
|
|
|
|
autorepeat;
|
|
|
|
|
|
|
|
switch@9 {
|
|
|
|
label = "volume-up";
|
|
|
|
linux,code = <115>;
|
2013-06-03 14:12:23 +00:00
|
|
|
gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
|
2012-11-06 13:48:32 +00:00
|
|
|
gpio-key,wakeup;
|
|
|
|
};
|
|
|
|
|
|
|
|
switch@10 {
|
|
|
|
label = "volume-down";
|
|
|
|
linux,code = <114>;
|
2013-06-03 14:12:23 +00:00
|
|
|
gpios = <&gpio0 3 GPIO_ACTIVE_LOW>;
|
2012-11-06 13:48:32 +00:00
|
|
|
gpio-key,wakeup;
|
|
|
|
};
|
|
|
|
};
|
2013-06-06 13:52:38 +00:00
|
|
|
|
|
|
|
backlight {
|
|
|
|
compatible = "pwm-backlight";
|
|
|
|
pwms = <&ecap0 0 50000 0>;
|
|
|
|
brightness-levels = <0 51 53 56 62 75 101 152 255>;
|
|
|
|
default-brightness-level = <8>;
|
|
|
|
};
|
2012-08-21 11:17:29 +00:00
|
|
|
};
|
|
|
|
|
2013-06-03 14:12:22 +00:00
|
|
|
#include "tps65910.dtsi"
|
2012-08-21 11:17:29 +00:00
|
|
|
|
|
|
|
&tps {
|
|
|
|
vcc1-supply = <&vbat>;
|
|
|
|
vcc2-supply = <&vbat>;
|
|
|
|
vcc3-supply = <&vbat>;
|
|
|
|
vcc4-supply = <&vbat>;
|
|
|
|
vcc5-supply = <&vbat>;
|
|
|
|
vcc6-supply = <&vbat>;
|
|
|
|
vcc7-supply = <&vbat>;
|
|
|
|
vccio-supply = <&vbat>;
|
|
|
|
|
|
|
|
regulators {
|
|
|
|
vrtc_reg: regulator@0 {
|
|
|
|
regulator-always-on;
|
|
|
|
};
|
|
|
|
|
|
|
|
vio_reg: regulator@1 {
|
|
|
|
regulator-always-on;
|
|
|
|
};
|
|
|
|
|
|
|
|
vdd1_reg: regulator@2 {
|
|
|
|
/* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */
|
|
|
|
regulator-name = "vdd_mpu";
|
|
|
|
regulator-min-microvolt = <912500>;
|
|
|
|
regulator-max-microvolt = <1312500>;
|
|
|
|
regulator-boot-on;
|
|
|
|
regulator-always-on;
|
|
|
|
};
|
|
|
|
|
|
|
|
vdd2_reg: regulator@3 {
|
|
|
|
/* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */
|
|
|
|
regulator-name = "vdd_core";
|
|
|
|
regulator-min-microvolt = <912500>;
|
|
|
|
regulator-max-microvolt = <1150000>;
|
|
|
|
regulator-boot-on;
|
|
|
|
regulator-always-on;
|
|
|
|
};
|
|
|
|
|
|
|
|
vdd3_reg: regulator@4 {
|
|
|
|
regulator-always-on;
|
|
|
|
};
|
|
|
|
|
|
|
|
vdig1_reg: regulator@5 {
|
|
|
|
regulator-always-on;
|
|
|
|
};
|
|
|
|
|
|
|
|
vdig2_reg: regulator@6 {
|
|
|
|
regulator-always-on;
|
|
|
|
};
|
|
|
|
|
|
|
|
vpll_reg: regulator@7 {
|
|
|
|
regulator-always-on;
|
|
|
|
};
|
|
|
|
|
|
|
|
vdac_reg: regulator@8 {
|
|
|
|
regulator-always-on;
|
|
|
|
};
|
|
|
|
|
|
|
|
vaux1_reg: regulator@9 {
|
|
|
|
regulator-always-on;
|
|
|
|
};
|
|
|
|
|
|
|
|
vaux2_reg: regulator@10 {
|
|
|
|
regulator-always-on;
|
|
|
|
};
|
|
|
|
|
|
|
|
vaux33_reg: regulator@11 {
|
|
|
|
regulator-always-on;
|
|
|
|
};
|
|
|
|
|
|
|
|
vmmc_reg: regulator@12 {
|
|
|
|
regulator-always-on;
|
|
|
|
};
|
2012-08-15 11:23:25 +00:00
|
|
|
};
|
2012-06-22 09:40:49 +00:00
|
|
|
};
|
2012-11-14 09:08:00 +00:00
|
|
|
|
2013-06-07 11:32:54 +00:00
|
|
|
&mac {
|
|
|
|
pinctrl-names = "default", "sleep";
|
|
|
|
pinctrl-0 = <&cpsw_default>;
|
|
|
|
pinctrl-1 = <&cpsw_sleep>;
|
|
|
|
};
|
|
|
|
|
|
|
|
&davinci_mdio {
|
|
|
|
pinctrl-names = "default", "sleep";
|
|
|
|
pinctrl-0 = <&davinci_mdio_default>;
|
|
|
|
pinctrl-1 = <&davinci_mdio_sleep>;
|
|
|
|
};
|
|
|
|
|
2012-11-14 09:08:00 +00:00
|
|
|
&cpsw_emac0 {
|
|
|
|
phy_id = <&davinci_mdio>, <0>;
|
2013-06-03 20:10:11 +00:00
|
|
|
phy-mode = "rgmii-txid";
|
2012-11-14 09:08:00 +00:00
|
|
|
};
|
|
|
|
|
|
|
|
&cpsw_emac1 {
|
|
|
|
phy_id = <&davinci_mdio>, <1>;
|
2013-06-03 20:10:11 +00:00
|
|
|
phy-mode = "rgmii-txid";
|
2012-11-14 09:08:00 +00:00
|
|
|
};
|
2013-01-24 03:45:12 +00:00
|
|
|
|
|
|
|
&tscadc {
|
|
|
|
status = "okay";
|
|
|
|
tsc {
|
|
|
|
ti,wires = <4>;
|
|
|
|
ti,x-plate-resistance = <200>;
|
|
|
|
ti,coordiante-readouts = <5>;
|
|
|
|
ti,wire-config = <0x00 0x11 0x22 0x33>;
|
|
|
|
};
|
|
|
|
|
|
|
|
adc {
|
2013-05-29 15:39:02 +00:00
|
|
|
ti,adc-channels = <4 5 6 7>;
|
2013-01-24 03:45:12 +00:00
|
|
|
};
|
|
|
|
};
|