crypto: keembay - Add support for Keem Bay OCS AES/SM4
Add support for the AES/SM4 crypto engine included in the Offload and
Crypto Subsystem (OCS) of the Intel Keem Bay SoC, thus enabling
hardware-acceleration for the following transformations:
- ecb(aes), cbc(aes), ctr(aes), cts(cbc(aes)), gcm(aes) and cbc(aes);
supported for 128-bit and 256-bit keys.
- ecb(sm4), cbc(sm4), ctr(sm4), cts(cbc(sm4)), gcm(sm4) and cbc(sm4);
supported for 128-bit keys.
The driver passes crypto manager self-tests, including the extra tests
(CRYPTO_MANAGER_EXTRA_TESTS=y).
Signed-off-by: Mike Healy <mikex.healy@intel.com>
Co-developed-by: Daniele Alessandrelli <daniele.alessandrelli@intel.com>
Signed-off-by: Daniele Alessandrelli <daniele.alessandrelli@intel.com>
Acked-by: Mark Gross <mgross@linux.intel.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2020-11-26 11:51:48 +00:00
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config CRYPTO_DEV_KEEMBAY_OCS_AES_SM4
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tristate "Support for Intel Keem Bay OCS AES/SM4 HW acceleration"
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2020-12-17 16:35:10 +00:00
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depends on HAS_IOMEM
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2020-12-16 13:14:59 +00:00
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depends on ARCH_KEEMBAY || COMPILE_TEST
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crypto: keembay - Add support for Keem Bay OCS AES/SM4
Add support for the AES/SM4 crypto engine included in the Offload and
Crypto Subsystem (OCS) of the Intel Keem Bay SoC, thus enabling
hardware-acceleration for the following transformations:
- ecb(aes), cbc(aes), ctr(aes), cts(cbc(aes)), gcm(aes) and cbc(aes);
supported for 128-bit and 256-bit keys.
- ecb(sm4), cbc(sm4), ctr(sm4), cts(cbc(sm4)), gcm(sm4) and cbc(sm4);
supported for 128-bit keys.
The driver passes crypto manager self-tests, including the extra tests
(CRYPTO_MANAGER_EXTRA_TESTS=y).
Signed-off-by: Mike Healy <mikex.healy@intel.com>
Co-developed-by: Daniele Alessandrelli <daniele.alessandrelli@intel.com>
Signed-off-by: Daniele Alessandrelli <daniele.alessandrelli@intel.com>
Acked-by: Mark Gross <mgross@linux.intel.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2020-11-26 11:51:48 +00:00
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select CRYPTO_SKCIPHER
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select CRYPTO_AEAD
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select CRYPTO_ENGINE
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help
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Support for Intel Keem Bay Offload and Crypto Subsystem (OCS) AES and
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2020-12-16 13:14:59 +00:00
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SM4 cipher hardware acceleration for use with Crypto API.
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crypto: keembay - Add support for Keem Bay OCS AES/SM4
Add support for the AES/SM4 crypto engine included in the Offload and
Crypto Subsystem (OCS) of the Intel Keem Bay SoC, thus enabling
hardware-acceleration for the following transformations:
- ecb(aes), cbc(aes), ctr(aes), cts(cbc(aes)), gcm(aes) and cbc(aes);
supported for 128-bit and 256-bit keys.
- ecb(sm4), cbc(sm4), ctr(sm4), cts(cbc(sm4)), gcm(sm4) and cbc(sm4);
supported for 128-bit keys.
The driver passes crypto manager self-tests, including the extra tests
(CRYPTO_MANAGER_EXTRA_TESTS=y).
Signed-off-by: Mike Healy <mikex.healy@intel.com>
Co-developed-by: Daniele Alessandrelli <daniele.alessandrelli@intel.com>
Signed-off-by: Daniele Alessandrelli <daniele.alessandrelli@intel.com>
Acked-by: Mark Gross <mgross@linux.intel.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2020-11-26 11:51:48 +00:00
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Provides HW acceleration for the following transformations:
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cbc(aes), ctr(aes), ccm(aes), gcm(aes), cbc(sm4), ctr(sm4), ccm(sm4)
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and gcm(sm4).
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Optionally, support for the following transformations can also be
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enabled: ecb(aes), cts(cbc(aes)), ecb(sm4) and cts(cbc(sm4)).
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config CRYPTO_DEV_KEEMBAY_OCS_AES_SM4_ECB
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bool "Support for Intel Keem Bay OCS AES/SM4 ECB HW acceleration"
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depends on CRYPTO_DEV_KEEMBAY_OCS_AES_SM4
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help
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Support for Intel Keem Bay Offload and Crypto Subsystem (OCS)
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AES/SM4 ECB mode hardware acceleration for use with Crypto API.
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Provides OCS version of ecb(aes) and ecb(sm4)
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Intel does not recommend use of ECB mode with AES/SM4.
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config CRYPTO_DEV_KEEMBAY_OCS_AES_SM4_CTS
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bool "Support for Intel Keem Bay OCS AES/SM4 CTS HW acceleration"
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depends on CRYPTO_DEV_KEEMBAY_OCS_AES_SM4
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help
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Support for Intel Keem Bay Offload and Crypto Subsystem (OCS)
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AES/SM4 CBC with CTS mode hardware acceleration for use with
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Crypto API.
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Provides OCS version of cts(cbc(aes)) and cts(cbc(sm4)).
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Intel does not recommend use of CTS mode with AES/SM4.
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2020-12-16 11:46:36 +00:00
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config CRYPTO_DEV_KEEMBAY_OCS_HCU
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tristate "Support for Intel Keem Bay OCS HCU HW acceleration"
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select CRYPTO_HASH
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select CRYPTO_ENGINE
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2021-01-06 15:27:33 +00:00
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depends on HAS_IOMEM
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depends on ARCH_KEEMBAY || COMPILE_TEST
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2020-12-16 11:46:36 +00:00
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depends on OF || COMPILE_TEST
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help
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Support for Intel Keem Bay Offload and Crypto Subsystem (OCS) Hash
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Control Unit (HCU) hardware acceleration for use with Crypto API.
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Provides OCS HCU hardware acceleration of sha256, sha384, sha512, and
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2020-12-16 11:46:37 +00:00
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sm3, as well as the HMAC variant of these algorithms.
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2020-12-16 11:46:36 +00:00
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Say Y or M if you're building for the Intel Keem Bay SoC. If compiled
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as a module, the module will be called keembay-ocs-hcu.
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If unsure, say N.
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2020-12-16 11:46:38 +00:00
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config CRYPTO_DEV_KEEMBAY_OCS_HCU_HMAC_SHA224
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bool "Enable sha224 and hmac(sha224) support in Intel Keem Bay OCS HCU"
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depends on CRYPTO_DEV_KEEMBAY_OCS_HCU
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help
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Enables support for sha224 and hmac(sha224) algorithms in the Intel
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Keem Bay OCS HCU driver. Intel recommends not to use these
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algorithms.
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Provides OCS HCU hardware acceleration of sha224 and hmac(224).
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If unsure, say N.
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