2009-11-23 19:40:01 +00:00
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# au1000-style gpio and interrupt controllers
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config ALCHEMY_GPIOINT_AU1000
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MIPS: Alchemy: Rewrite GPIO support.
The current in-kernel Alchemy GPIO support is far too inflexible for
all my use cases. To address this, the following changes are made:
* create generic functions which deal with manipulating the on-chip
GPIO1/2 blocks. Such functions are universally useful.
* Macros for GPIO2 shared interrupt management and block control.
* support for both built-in CONFIG_GPIOLIB and fast, inlined GPIO macros.
If CONFIG_GPIOLIB is not enabled, provide linux gpio framework
compatibility by directly inlining the GPIO1/2 functions. GPIO access
is limited to on-chip ones and they can be accessed as documented in
the datasheets (GPIO0-31 and 200-215).
If CONFIG_GPIOLIB is selected, two (2) gpio_chip-s, one for GPIO1 and
one for GPIO2, are registered. GPIOs can still be accessed by using
the numberspace established in the databooks.
However this is not yet flexible enough for my uses: My Alchemy
systems have a documented "external" gpio interface (fixed, different
numberspace) and can support a variety of baseboards, some of which
are equipped with I2C gpio expanders. I want to be able to provide
the default 16 GPIOs of the CPU board numbered as 0..15 and also
support gpio expanders, if present, starting as gpio16.
To achieve this, a new Kconfig symbol for Alchemy is introduced,
CONFIG_ALCHEMY_GPIO_INDIRECT, which boards can enable to signal
that they don't want the Alchemy numberspace exposed to the outside
world, but instead want to provide their own. Boards are now respon-
sible for providing the linux gpio interface glue code (either in a
custom gpio.h header (in board include directory) or with gpio_chips).
To make the board-specific inlined gpio functions work, the MIPS
Makefile must be changed so that the mach-au1x00/gpio.h header is
included _after_ the board headers, by moving the inclusion of
the mach-au1x00/ to the end of the header list.
See arch/mips/include/asm/mach-au1x00/gpio.h for more info.
Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
Acked-by: Florian Fainelli <florian@openwrt.org>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-06-06 12:09:55 +00:00
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bool
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2011-11-01 19:03:30 +00:00
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# au1300-style GPIO/INT controller
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config ALCHEMY_GPIOINT_AU1300
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bool
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2007-05-11 11:44:30 +00:00
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choice
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prompt "Machine type"
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2010-07-15 19:45:04 +00:00
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depends on MIPS_ALCHEMY
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2014-02-20 13:59:24 +00:00
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default MIPS_DB1XXX
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2007-05-11 11:44:30 +00:00
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config MIPS_MTX1
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bool "4G Systems MTX-1 board"
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select HW_HAS_PCI
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2011-08-12 09:39:45 +00:00
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select ALCHEMY_GPIOINT_AU1000
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2007-05-11 11:44:30 +00:00
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select SYS_SUPPORTS_LITTLE_ENDIAN
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2009-10-15 16:49:27 +00:00
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select SYS_HAS_EARLY_PRINTK
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2007-05-11 11:44:30 +00:00
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2014-02-20 13:59:24 +00:00
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config MIPS_DB1XXX
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bool "Alchemy DB1XXX / PB1XXX boards"
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2016-04-19 09:23:22 +00:00
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select GPIOLIB
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2007-05-11 11:44:30 +00:00
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select HW_HAS_PCI
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select SYS_SUPPORTS_LITTLE_ENDIAN
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2009-10-15 16:49:27 +00:00
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select SYS_HAS_EARLY_PRINTK
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2014-02-20 13:59:24 +00:00
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help
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Select this option if you have one of the following Alchemy
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development boards: DB1000 DB1500 DB1100 DB1550 DB1200 DB1300
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PB1500 PB1100 PB1550 PB1200
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Board type is autodetected during boot.
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2007-05-11 11:44:30 +00:00
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config MIPS_XXS1500
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bool "MyCable XXS1500 board"
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2011-08-12 09:39:45 +00:00
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select ALCHEMY_GPIOINT_AU1000
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2007-05-11 11:44:30 +00:00
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select SYS_SUPPORTS_LITTLE_ENDIAN
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2009-10-15 16:49:27 +00:00
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select SYS_HAS_EARLY_PRINTK
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2007-05-11 11:44:30 +00:00
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2010-07-15 09:21:23 +00:00
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config MIPS_GPR
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bool "Trapeze ITS GPR board"
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2011-08-12 09:39:45 +00:00
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select ALCHEMY_GPIOINT_AU1000
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2010-07-15 09:21:23 +00:00
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select HW_HAS_PCI
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select SYS_SUPPORTS_LITTLE_ENDIAN
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select SYS_HAS_EARLY_PRINTK
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2007-05-11 11:44:30 +00:00
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endchoice
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