linux/arch/arm/lib/io-readsb.S

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/* SPDX-License-Identifier: GPL-2.0-only */
/*
* linux/arch/arm/lib/io-readsb.S
*
* Copyright (C) 1995-2000 Russell King
*/
#include <linux/linkage.h>
#include <asm/assembler.h>
.Linsb_align: rsb ip, ip, #4
cmp ip, r2
movgt ip, r2
cmp ip, #2
ldrb r3, [r0]
strb r3, [r1], #1
ldrbge r3, [r0]
strbge r3, [r1], #1
ldrbgt r3, [r0]
strbgt r3, [r1], #1
subs r2, r2, ip
bne .Linsb_aligned
ENTRY(__raw_readsb)
teq r2, #0 @ do we have to check for the zero len?
ARM: convert all "mov.* pc, reg" to "bx reg" for ARMv6+ ARMv6 and greater introduced a new instruction ("bx") which can be used to return from function calls. Recent CPUs perform better when the "bx lr" instruction is used rather than the "mov pc, lr" instruction, and this sequence is strongly recommended to be used by the ARM architecture manual (section A.4.1.1). We provide a new macro "ret" with all its variants for the condition code which will resolve to the appropriate instruction. Rather than doing this piecemeal, and miss some instances, change all the "mov pc" instances to use the new macro, with the exception of the "movs" instruction and the kprobes code. This allows us to detect the "mov pc, lr" case and fix it up - and also gives us the possibility of deploying this for other registers depending on the CPU selection. Reported-by: Will Deacon <will.deacon@arm.com> Tested-by: Stephen Warren <swarren@nvidia.com> # Tegra Jetson TK1 Tested-by: Robert Jarzmik <robert.jarzmik@free.fr> # mioa701_bootresume.S Tested-by: Andrew Lunn <andrew@lunn.ch> # Kirkwood Tested-by: Shawn Guo <shawn.guo@freescale.com> Tested-by: Tony Lindgren <tony@atomide.com> # OMAPs Tested-by: Gregory CLEMENT <gregory.clement@free-electrons.com> # Armada XP, 375, 385 Acked-by: Sekhar Nori <nsekhar@ti.com> # DaVinci Acked-by: Christoffer Dall <christoffer.dall@linaro.org> # kvm/hyp Acked-by: Haojian Zhuang <haojian.zhuang@gmail.com> # PXA3xx Acked-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com> # Xen Tested-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> # ARMv7M Tested-by: Simon Horman <horms+renesas@verge.net.au> # Shmobile Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2014-06-30 15:29:12 +00:00
reteq lr
ands ip, r1, #3
bne .Linsb_align
.Linsb_aligned: stmfd sp!, {r4 - r6, lr}
subs r2, r2, #16
bmi .Linsb_no_16
.Linsb_16_lp: ldrb r3, [r0]
ldrb r4, [r0]
ldrb r5, [r0]
mov r3, r3, put_byte_0
ldrb r6, [r0]
orr r3, r3, r4, put_byte_1
ldrb r4, [r0]
orr r3, r3, r5, put_byte_2
ldrb r5, [r0]
orr r3, r3, r6, put_byte_3
ldrb r6, [r0]
mov r4, r4, put_byte_0
ldrb ip, [r0]
orr r4, r4, r5, put_byte_1
ldrb r5, [r0]
orr r4, r4, r6, put_byte_2
ldrb r6, [r0]
orr r4, r4, ip, put_byte_3
ldrb ip, [r0]
mov r5, r5, put_byte_0
ldrb lr, [r0]
orr r5, r5, r6, put_byte_1
ldrb r6, [r0]
orr r5, r5, ip, put_byte_2
ldrb ip, [r0]
orr r5, r5, lr, put_byte_3
ldrb lr, [r0]
mov r6, r6, put_byte_0
orr r6, r6, ip, put_byte_1
ldrb ip, [r0]
orr r6, r6, lr, put_byte_2
orr r6, r6, ip, put_byte_3
stmia r1!, {r3 - r6}
subs r2, r2, #16
bpl .Linsb_16_lp
tst r2, #15
ldmfdeq sp!, {r4 - r6, pc}
.Linsb_no_16: tst r2, #8
beq .Linsb_no_8
ldrb r3, [r0]
ldrb r4, [r0]
ldrb r5, [r0]
mov r3, r3, put_byte_0
ldrb r6, [r0]
orr r3, r3, r4, put_byte_1
ldrb r4, [r0]
orr r3, r3, r5, put_byte_2
ldrb r5, [r0]
orr r3, r3, r6, put_byte_3
ldrb r6, [r0]
mov r4, r4, put_byte_0
ldrb ip, [r0]
orr r4, r4, r5, put_byte_1
orr r4, r4, r6, put_byte_2
orr r4, r4, ip, put_byte_3
stmia r1!, {r3, r4}
.Linsb_no_8: tst r2, #4
beq .Linsb_no_4
ldrb r3, [r0]
ldrb r4, [r0]
ldrb r5, [r0]
ldrb r6, [r0]
mov r3, r3, put_byte_0
orr r3, r3, r4, put_byte_1
orr r3, r3, r5, put_byte_2
orr r3, r3, r6, put_byte_3
str r3, [r1], #4
.Linsb_no_4: ands r2, r2, #3
ldmfdeq sp!, {r4 - r6, pc}
cmp r2, #2
ldrb r3, [r0]
strb r3, [r1], #1
ldrbge r3, [r0]
strbge r3, [r1], #1
ldrbgt r3, [r0]
strbgt r3, [r1]
ldmfd sp!, {r4 - r6, pc}
ENDPROC(__raw_readsb)