forked from Minki/linux
101 lines
3.3 KiB
C
101 lines
3.3 KiB
C
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/*
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* Copyright 2014 Advanced Micro Devices, Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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*/
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#ifndef SMU_UCODE_XFER_VI_H
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#define SMU_UCODE_XFER_VI_H
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#define SMU_DRAMData_TOC_VERSION 1
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#define MAX_IH_REGISTER_COUNT 65535
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#define SMU_DIGEST_SIZE_BYTES 20
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#define SMU_FB_SIZE_BYTES 1048576
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#define SMU_MAX_ENTRIES 12
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#define UCODE_ID_SMU 0
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#define UCODE_ID_SDMA0 1
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#define UCODE_ID_SDMA1 2
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#define UCODE_ID_CP_CE 3
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#define UCODE_ID_CP_PFP 4
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#define UCODE_ID_CP_ME 5
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#define UCODE_ID_CP_MEC 6
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#define UCODE_ID_CP_MEC_JT1 7
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#define UCODE_ID_CP_MEC_JT2 8
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#define UCODE_ID_GMCON_RENG 9
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#define UCODE_ID_RLC_G 10
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#define UCODE_ID_IH_REG_RESTORE 11
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#define UCODE_ID_VBIOS 12
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#define UCODE_ID_MISC_METADATA 13
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#define UCODE_ID_RLC_SCRATCH 32
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#define UCODE_ID_RLC_SRM_ARAM 33
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#define UCODE_ID_RLC_SRM_DRAM 34
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#define UCODE_ID_MEC_STORAGE 35
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#define UCODE_ID_VBIOS_PARAMETERS 36
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#define UCODE_META_DATA 0xFF
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#define UCODE_ID_SMU_MASK 0x00000001
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#define UCODE_ID_SDMA0_MASK 0x00000002
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#define UCODE_ID_SDMA1_MASK 0x00000004
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#define UCODE_ID_CP_CE_MASK 0x00000008
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#define UCODE_ID_CP_PFP_MASK 0x00000010
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#define UCODE_ID_CP_ME_MASK 0x00000020
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#define UCODE_ID_CP_MEC_MASK 0x00000040
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#define UCODE_ID_CP_MEC_JT1_MASK 0x00000080
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#define UCODE_ID_CP_MEC_JT2_MASK 0x00000100
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#define UCODE_ID_GMCON_RENG_MASK 0x00000200
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#define UCODE_ID_RLC_G_MASK 0x00000400
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#define UCODE_ID_IH_REG_RESTORE_MASK 0x00000800
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#define UCODE_ID_VBIOS_MASK 0x00001000
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#define UCODE_FLAG_UNHALT_MASK 0x1
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struct SMU_Entry {
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#ifndef __BIG_ENDIAN
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uint16_t id;
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uint16_t version;
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uint32_t image_addr_high;
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uint32_t image_addr_low;
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uint32_t meta_data_addr_high;
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uint32_t meta_data_addr_low;
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uint32_t data_size_byte;
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uint16_t flags;
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uint16_t num_register_entries;
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#else
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uint16_t version;
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uint16_t id;
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uint32_t image_addr_high;
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uint32_t image_addr_low;
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uint32_t meta_data_addr_high;
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uint32_t meta_data_addr_low;
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uint32_t data_size_byte;
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uint16_t num_register_entries;
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uint16_t flags;
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#endif
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};
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struct SMU_DRAMData_TOC {
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uint32_t structure_version;
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uint32_t num_entries;
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struct SMU_Entry entry[SMU_MAX_ENTRIES];
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};
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#endif
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