2012-03-04 16:11:57 +00:00
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/*
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* TI Touch Screen driver
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*
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* Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation version 2.
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*
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* This program is distributed "as is" WITHOUT ANY WARRANTY of any
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* kind, whether express or implied; without even the implied warranty
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* of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <linux/init.h>
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#include <linux/kernel.h>
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#include <linux/err.h>
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#include <linux/module.h>
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#include <linux/input.h>
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#include <linux/slab.h>
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#include <linux/interrupt.h>
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#include <linux/clk.h>
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#include <linux/platform_device.h>
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#include <linux/io.h>
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2012-10-16 07:25:42 +00:00
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#include <linux/input/ti_am335x_tsc.h>
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2012-03-04 16:11:57 +00:00
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#include <linux/delay.h>
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#define REG_RAWIRQSTATUS 0x024
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#define REG_IRQSTATUS 0x028
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#define REG_IRQENABLE 0x02C
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#define REG_IRQWAKEUP 0x034
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#define REG_CTRL 0x040
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#define REG_ADCFSM 0x044
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#define REG_CLKDIV 0x04C
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#define REG_SE 0x054
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#define REG_IDLECONFIG 0x058
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#define REG_CHARGECONFIG 0x05C
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#define REG_CHARGEDELAY 0x060
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#define REG_STEPCONFIG(n) (0x64 + ((n - 1) * 8))
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#define REG_STEPDELAY(n) (0x68 + ((n - 1) * 8))
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#define REG_FIFO0CNT 0xE4
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2012-10-16 07:25:40 +00:00
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#define REG_FIFO0THR 0xE8
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2012-03-04 16:11:57 +00:00
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#define REG_FIFO1THR 0xF4
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#define REG_FIFO0 0x100
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#define REG_FIFO1 0x200
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/* Register Bitfields */
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#define IRQWKUP_ENB BIT(0)
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2012-10-16 07:25:38 +00:00
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/* Step Enable */
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#define STEPENB_MASK (0x1FFFF << 0)
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#define STEPENB(val) (val << 0)
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#define STPENB_STEPENB STEPENB(0x7FFF)
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/* IRQ enable */
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2012-10-16 07:25:40 +00:00
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#define IRQENB_FIFO0THRES BIT(2)
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2012-03-04 16:11:57 +00:00
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#define IRQENB_FIFO1THRES BIT(5)
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#define IRQENB_PENUP BIT(9)
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2012-10-16 07:25:38 +00:00
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/* Step Configuration */
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#define STEPCONFIG_MODE_MASK (3 << 0)
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#define STEPCONFIG_MODE(val) (val << 0)
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#define STEPCONFIG_MODE_HWSYNC STEPCONFIG_MODE(2)
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#define STEPCONFIG_AVG_MASK (7 << 2)
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#define STEPCONFIG_AVG(val) (val << 2)
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#define STEPCONFIG_AVG_16 STEPCONFIG_AVG(4)
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#define STEPCONFIG_XPP BIT(5)
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#define STEPCONFIG_XNN BIT(6)
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#define STEPCONFIG_YPP BIT(7)
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#define STEPCONFIG_YNN BIT(8)
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#define STEPCONFIG_XNP BIT(9)
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#define STEPCONFIG_YPN BIT(10)
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#define STEPCONFIG_INM_MASK (0xF << 15)
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#define STEPCONFIG_INM(val) (val << 15)
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#define STEPCONFIG_INM_ADCREFM STEPCONFIG_INM(8)
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#define STEPCONFIG_INP_MASK (0xF << 19)
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#define STEPCONFIG_INP(val) (val << 19)
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#define STEPCONFIG_INP_AN2 STEPCONFIG_INP(2)
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#define STEPCONFIG_INP_AN3 STEPCONFIG_INP(3)
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#define STEPCONFIG_INP_AN4 STEPCONFIG_INP(4)
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#define STEPCONFIG_INP_ADCREFM STEPCONFIG_INP(8)
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#define STEPCONFIG_FIFO1 BIT(26)
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/* Delay register */
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#define STEPDELAY_OPEN_MASK (0x3FFFF << 0)
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#define STEPDELAY_OPEN(val) (val << 0)
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#define STEPCONFIG_OPENDLY STEPDELAY_OPEN(0x098)
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/* Charge Config */
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#define STEPCHARGE_RFP_MASK (7 << 12)
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#define STEPCHARGE_RFP(val) (val << 12)
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#define STEPCHARGE_RFP_XPUL STEPCHARGE_RFP(1)
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#define STEPCHARGE_INM_MASK (0xF << 15)
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#define STEPCHARGE_INM(val) (val << 15)
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#define STEPCHARGE_INM_AN1 STEPCHARGE_INM(1)
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#define STEPCHARGE_INP_MASK (0xF << 19)
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#define STEPCHARGE_INP(val) (val << 19)
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#define STEPCHARGE_INP_AN1 STEPCHARGE_INP(1)
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#define STEPCHARGE_RFM_MASK (3 << 23)
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#define STEPCHARGE_RFM(val) (val << 23)
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#define STEPCHARGE_RFM_XNUR STEPCHARGE_RFM(1)
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/* Charge delay */
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#define CHARGEDLY_OPEN_MASK (0x3FFFF << 0)
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#define CHARGEDLY_OPEN(val) (val << 0)
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#define CHARGEDLY_OPENDLY CHARGEDLY_OPEN(1)
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/* Control register */
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#define CNTRLREG_TSCSSENB BIT(0)
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#define CNTRLREG_STEPID BIT(1)
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#define CNTRLREG_STEPCONFIGWRT BIT(2)
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#define CNTRLREG_AFE_CTRL_MASK (3 << 5)
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#define CNTRLREG_AFE_CTRL(val) (val << 5)
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#define CNTRLREG_4WIRE CNTRLREG_AFE_CTRL(1)
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#define CNTRLREG_5WIRE CNTRLREG_AFE_CTRL(2)
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#define CNTRLREG_8WIRE CNTRLREG_AFE_CTRL(3)
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#define CNTRLREG_TSCENB BIT(7)
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#define ADCFSM_STEPID 0x10
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2012-03-04 16:11:57 +00:00
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#define SEQ_SETTLE 275
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#define ADC_CLK 3000000
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#define MAX_12BIT ((1 << 12) - 1)
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2012-10-16 07:25:42 +00:00
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struct titsc {
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2012-03-04 16:11:57 +00:00
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struct input_dev *input;
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struct clk *tsc_ick;
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void __iomem *tsc_base;
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unsigned int irq;
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unsigned int wires;
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unsigned int x_plate_resistance;
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bool pen_down;
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2012-10-16 07:25:39 +00:00
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int steps_to_configure;
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2012-03-04 16:11:57 +00:00
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};
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2012-10-16 07:25:42 +00:00
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static unsigned int titsc_readl(struct titsc *ts, unsigned int reg)
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2012-03-04 16:11:57 +00:00
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{
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return readl(ts->tsc_base + reg);
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}
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2012-10-16 07:25:42 +00:00
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static void titsc_writel(struct titsc *tsc, unsigned int reg,
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2012-03-04 16:11:57 +00:00
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unsigned int val)
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{
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writel(val, tsc->tsc_base + reg);
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}
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2012-10-16 07:25:42 +00:00
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static void titsc_step_config(struct titsc *ts_dev)
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2012-03-04 16:11:57 +00:00
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{
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unsigned int config;
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2012-10-16 07:25:39 +00:00
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int i, total_steps;
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2012-03-04 16:11:57 +00:00
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/* Configure the Step registers */
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2012-10-16 07:25:39 +00:00
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total_steps = 2 * ts_dev->steps_to_configure;
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2012-03-04 16:11:57 +00:00
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config = STEPCONFIG_MODE_HWSYNC |
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2012-10-16 07:25:38 +00:00
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STEPCONFIG_AVG_16 | STEPCONFIG_XPP;
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2012-03-04 16:11:57 +00:00
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switch (ts_dev->wires) {
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case 4:
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2012-10-16 07:25:38 +00:00
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config |= STEPCONFIG_INP_AN2 | STEPCONFIG_XNN;
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2012-03-04 16:11:57 +00:00
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break;
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case 5:
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config |= STEPCONFIG_YNN |
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2012-10-16 07:25:38 +00:00
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STEPCONFIG_INP_AN4 | STEPCONFIG_XNN |
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2012-03-04 16:11:57 +00:00
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STEPCONFIG_YPP;
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break;
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case 8:
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2012-10-16 07:25:38 +00:00
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config |= STEPCONFIG_INP_AN2 | STEPCONFIG_XNN;
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2012-03-04 16:11:57 +00:00
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break;
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}
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2012-10-16 07:25:39 +00:00
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for (i = 1; i <= ts_dev->steps_to_configure; i++) {
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2012-10-16 07:25:42 +00:00
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titsc_writel(ts_dev, REG_STEPCONFIG(i), config);
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titsc_writel(ts_dev, REG_STEPDELAY(i), STEPCONFIG_OPENDLY);
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2012-03-04 16:11:57 +00:00
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}
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config = 0;
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config = STEPCONFIG_MODE_HWSYNC |
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2012-10-16 07:25:38 +00:00
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STEPCONFIG_AVG_16 | STEPCONFIG_YNN |
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STEPCONFIG_INM_ADCREFM | STEPCONFIG_FIFO1;
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2012-03-04 16:11:57 +00:00
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switch (ts_dev->wires) {
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case 4:
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config |= STEPCONFIG_YPP;
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break;
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case 5:
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2012-10-16 07:25:38 +00:00
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config |= STEPCONFIG_XPP | STEPCONFIG_INP_AN4 |
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2012-03-04 16:11:57 +00:00
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STEPCONFIG_XNP | STEPCONFIG_YPN;
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break;
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case 8:
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config |= STEPCONFIG_YPP;
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break;
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}
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2012-10-16 07:25:39 +00:00
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for (i = (ts_dev->steps_to_configure + 1); i <= total_steps; i++) {
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2012-10-16 07:25:42 +00:00
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titsc_writel(ts_dev, REG_STEPCONFIG(i), config);
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titsc_writel(ts_dev, REG_STEPDELAY(i), STEPCONFIG_OPENDLY);
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2012-03-04 16:11:57 +00:00
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}
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config = 0;
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/* Charge step configuration */
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config = STEPCONFIG_XPP | STEPCONFIG_YNN |
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2012-10-16 07:25:38 +00:00
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STEPCHARGE_RFP_XPUL | STEPCHARGE_RFM_XNUR |
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STEPCHARGE_INM_AN1 | STEPCHARGE_INP_AN1;
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2012-03-04 16:11:57 +00:00
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2012-10-16 07:25:42 +00:00
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titsc_writel(ts_dev, REG_CHARGECONFIG, config);
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titsc_writel(ts_dev, REG_CHARGEDELAY, CHARGEDLY_OPENDLY);
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2012-03-04 16:11:57 +00:00
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config = 0;
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/* Configure to calculate pressure */
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config = STEPCONFIG_MODE_HWSYNC |
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2012-10-16 07:25:38 +00:00
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STEPCONFIG_AVG_16 | STEPCONFIG_YPP |
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STEPCONFIG_XNN | STEPCONFIG_INM_ADCREFM;
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2012-10-16 07:25:42 +00:00
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titsc_writel(ts_dev, REG_STEPCONFIG(total_steps + 1), config);
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titsc_writel(ts_dev, REG_STEPDELAY(total_steps + 1),
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2012-10-16 07:25:39 +00:00
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STEPCONFIG_OPENDLY);
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2012-03-04 16:11:57 +00:00
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2012-10-16 07:25:38 +00:00
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config |= STEPCONFIG_INP_AN3 | STEPCONFIG_FIFO1;
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2012-10-16 07:25:42 +00:00
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titsc_writel(ts_dev, REG_STEPCONFIG(total_steps + 2), config);
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titsc_writel(ts_dev, REG_STEPDELAY(total_steps + 2),
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2012-10-16 07:25:39 +00:00
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STEPCONFIG_OPENDLY);
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2012-03-04 16:11:57 +00:00
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2012-10-16 07:25:42 +00:00
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titsc_writel(ts_dev, REG_SE, STPENB_STEPENB);
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2012-03-04 16:11:57 +00:00
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}
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2012-10-16 07:25:42 +00:00
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static void titsc_idle_config(struct titsc *ts_config)
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2012-03-04 16:11:57 +00:00
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{
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unsigned int idleconfig;
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idleconfig = STEPCONFIG_YNN |
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2012-10-16 07:25:38 +00:00
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STEPCONFIG_INM_ADCREFM |
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STEPCONFIG_YPN | STEPCONFIG_INP_ADCREFM;
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2012-10-16 07:25:42 +00:00
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titsc_writel(ts_config, REG_IDLECONFIG, idleconfig);
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2012-03-04 16:11:57 +00:00
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}
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2012-10-16 07:25:42 +00:00
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static void titsc_read_coordinates(struct titsc *ts_dev,
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2012-03-04 16:11:57 +00:00
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unsigned int *x, unsigned int *y)
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{
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2012-10-16 07:25:42 +00:00
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unsigned int fifocount = titsc_readl(ts_dev, REG_FIFO0CNT);
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2012-03-04 16:11:57 +00:00
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unsigned int prev_val_x = ~0, prev_val_y = ~0;
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unsigned int prev_diff_x = ~0, prev_diff_y = ~0;
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unsigned int read, diff;
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unsigned int i;
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/*
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* Delta filter is used to remove large variations in sampled
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* values from ADC. The filter tries to predict where the next
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* coordinate could be. This is done by taking a previous
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* coordinate and subtracting it form current one. Further the
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* algorithm compares the difference with that of a present value,
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* if true the value is reported to the sub system.
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*/
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for (i = 0; i < fifocount - 1; i++) {
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2012-10-16 07:25:42 +00:00
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read = titsc_readl(ts_dev, REG_FIFO0) & 0xfff;
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2012-03-04 16:11:57 +00:00
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diff = abs(read - prev_val_x);
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if (diff < prev_diff_x) {
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prev_diff_x = diff;
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*x = read;
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}
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prev_val_x = read;
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2012-10-16 07:25:42 +00:00
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read = titsc_readl(ts_dev, REG_FIFO1) & 0xfff;
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2012-03-04 16:11:57 +00:00
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diff = abs(read - prev_val_y);
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if (diff < prev_diff_y) {
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prev_diff_y = diff;
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*y = read;
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}
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prev_val_y = read;
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}
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}
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2012-10-16 07:25:42 +00:00
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static irqreturn_t titsc_irq(int irq, void *dev)
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2012-03-04 16:11:57 +00:00
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{
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2012-10-16 07:25:42 +00:00
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struct titsc *ts_dev = dev;
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2012-03-04 16:11:57 +00:00
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struct input_dev *input_dev = ts_dev->input;
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unsigned int status, irqclr = 0;
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unsigned int x = 0, y = 0;
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unsigned int z1, z2, z;
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unsigned int fsm;
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2012-10-16 07:25:42 +00:00
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status = titsc_readl(ts_dev, REG_IRQSTATUS);
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2012-10-16 07:25:40 +00:00
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if (status & IRQENB_FIFO0THRES) {
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2012-10-16 07:25:42 +00:00
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titsc_read_coordinates(ts_dev, &x, &y);
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2012-03-04 16:11:57 +00:00
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2012-10-16 07:25:42 +00:00
|
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|
z1 = titsc_readl(ts_dev, REG_FIFO0) & 0xfff;
|
|
|
|
z2 = titsc_readl(ts_dev, REG_FIFO1) & 0xfff;
|
2012-03-04 16:11:57 +00:00
|
|
|
|
|
|
|
if (ts_dev->pen_down && z1 != 0 && z2 != 0) {
|
|
|
|
/*
|
|
|
|
* Calculate pressure using formula
|
|
|
|
* Resistance(touch) = x plate resistance *
|
|
|
|
* x postion/4096 * ((z2 / z1) - 1)
|
|
|
|
*/
|
|
|
|
z = z2 - z1;
|
|
|
|
z *= x;
|
|
|
|
z *= ts_dev->x_plate_resistance;
|
|
|
|
z /= z1;
|
|
|
|
z = (z + 2047) >> 12;
|
|
|
|
|
|
|
|
if (z <= MAX_12BIT) {
|
|
|
|
input_report_abs(input_dev, ABS_X, x);
|
|
|
|
input_report_abs(input_dev, ABS_Y, y);
|
|
|
|
input_report_abs(input_dev, ABS_PRESSURE, z);
|
|
|
|
input_report_key(input_dev, BTN_TOUCH, 1);
|
|
|
|
input_sync(input_dev);
|
|
|
|
}
|
|
|
|
}
|
2012-10-16 07:25:40 +00:00
|
|
|
irqclr |= IRQENB_FIFO0THRES;
|
2012-03-04 16:11:57 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Time for sequencer to settle, to read
|
|
|
|
* correct state of the sequencer.
|
|
|
|
*/
|
|
|
|
udelay(SEQ_SETTLE);
|
|
|
|
|
2012-10-16 07:25:42 +00:00
|
|
|
status = titsc_readl(ts_dev, REG_RAWIRQSTATUS);
|
2012-03-04 16:11:57 +00:00
|
|
|
if (status & IRQENB_PENUP) {
|
|
|
|
/* Pen up event */
|
2012-10-16 07:25:42 +00:00
|
|
|
fsm = titsc_readl(ts_dev, REG_ADCFSM);
|
2012-03-04 16:11:57 +00:00
|
|
|
if (fsm == ADCFSM_STEPID) {
|
|
|
|
ts_dev->pen_down = false;
|
|
|
|
input_report_key(input_dev, BTN_TOUCH, 0);
|
|
|
|
input_report_abs(input_dev, ABS_PRESSURE, 0);
|
|
|
|
input_sync(input_dev);
|
|
|
|
} else {
|
|
|
|
ts_dev->pen_down = true;
|
|
|
|
}
|
|
|
|
irqclr |= IRQENB_PENUP;
|
|
|
|
}
|
|
|
|
|
2012-10-16 07:25:42 +00:00
|
|
|
titsc_writel(ts_dev, REG_IRQSTATUS, irqclr);
|
2012-03-04 16:11:57 +00:00
|
|
|
|
2012-10-16 07:25:42 +00:00
|
|
|
titsc_writel(ts_dev, REG_SE, STPENB_STEPENB);
|
2012-03-04 16:11:57 +00:00
|
|
|
return IRQ_HANDLED;
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* The functions for inserting/removing driver as a module.
|
|
|
|
*/
|
|
|
|
|
2012-10-16 07:25:42 +00:00
|
|
|
static int __devinit titsc_probe(struct platform_device *pdev)
|
2012-03-04 16:11:57 +00:00
|
|
|
{
|
|
|
|
const struct tsc_data *pdata = pdev->dev.platform_data;
|
|
|
|
struct resource *res;
|
2012-10-16 07:25:42 +00:00
|
|
|
struct titsc *ts_dev;
|
2012-03-04 16:11:57 +00:00
|
|
|
struct input_dev *input_dev;
|
|
|
|
struct clk *clk;
|
|
|
|
int err;
|
|
|
|
int clk_value, ctrl, irq;
|
|
|
|
|
|
|
|
if (!pdata) {
|
|
|
|
dev_err(&pdev->dev, "missing platform data.\n");
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
|
|
|
if (!res) {
|
|
|
|
dev_err(&pdev->dev, "no memory resource defined.\n");
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
irq = platform_get_irq(pdev, 0);
|
|
|
|
if (irq < 0) {
|
|
|
|
dev_err(&pdev->dev, "no irq ID is specified.\n");
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Allocate memory for device */
|
2012-10-16 07:25:42 +00:00
|
|
|
ts_dev = kzalloc(sizeof(struct titsc), GFP_KERNEL);
|
2012-03-04 16:11:57 +00:00
|
|
|
input_dev = input_allocate_device();
|
|
|
|
if (!ts_dev || !input_dev) {
|
|
|
|
dev_err(&pdev->dev, "failed to allocate memory.\n");
|
|
|
|
err = -ENOMEM;
|
|
|
|
goto err_free_mem;
|
|
|
|
}
|
|
|
|
|
|
|
|
ts_dev->input = input_dev;
|
|
|
|
ts_dev->irq = irq;
|
|
|
|
ts_dev->wires = pdata->wires;
|
|
|
|
ts_dev->x_plate_resistance = pdata->x_plate_resistance;
|
2012-10-16 07:25:39 +00:00
|
|
|
ts_dev->steps_to_configure = pdata->steps_to_configure;
|
2012-03-04 16:11:57 +00:00
|
|
|
|
|
|
|
res = request_mem_region(res->start, resource_size(res), pdev->name);
|
|
|
|
if (!res) {
|
|
|
|
dev_err(&pdev->dev, "failed to reserve registers.\n");
|
|
|
|
err = -EBUSY;
|
|
|
|
goto err_free_mem;
|
|
|
|
}
|
|
|
|
|
|
|
|
ts_dev->tsc_base = ioremap(res->start, resource_size(res));
|
|
|
|
if (!ts_dev->tsc_base) {
|
|
|
|
dev_err(&pdev->dev, "failed to map registers.\n");
|
|
|
|
err = -ENOMEM;
|
|
|
|
goto err_release_mem_region;
|
|
|
|
}
|
|
|
|
|
2012-10-16 07:25:42 +00:00
|
|
|
err = request_irq(ts_dev->irq, titsc_irq,
|
2012-03-04 16:11:57 +00:00
|
|
|
0, pdev->dev.driver->name, ts_dev);
|
|
|
|
if (err) {
|
|
|
|
dev_err(&pdev->dev, "failed to allocate irq.\n");
|
|
|
|
goto err_unmap_regs;
|
|
|
|
}
|
|
|
|
|
|
|
|
ts_dev->tsc_ick = clk_get(&pdev->dev, "adc_tsc_ick");
|
|
|
|
if (IS_ERR(ts_dev->tsc_ick)) {
|
|
|
|
dev_err(&pdev->dev, "failed to get TSC ick\n");
|
|
|
|
goto err_free_irq;
|
|
|
|
}
|
|
|
|
clk_enable(ts_dev->tsc_ick);
|
|
|
|
|
|
|
|
clk = clk_get(&pdev->dev, "adc_tsc_fck");
|
|
|
|
if (IS_ERR(clk)) {
|
|
|
|
dev_err(&pdev->dev, "failed to get TSC fck\n");
|
|
|
|
err = PTR_ERR(clk);
|
|
|
|
goto err_disable_clk;
|
|
|
|
}
|
|
|
|
|
|
|
|
clk_value = clk_get_rate(clk) / ADC_CLK;
|
|
|
|
clk_put(clk);
|
|
|
|
|
|
|
|
if (clk_value < 7) {
|
|
|
|
dev_err(&pdev->dev, "clock input less than min clock requirement\n");
|
|
|
|
goto err_disable_clk;
|
|
|
|
}
|
|
|
|
/* CLKDIV needs to be configured to the value minus 1 */
|
2012-10-16 07:25:42 +00:00
|
|
|
titsc_writel(ts_dev, REG_CLKDIV, clk_value - 1);
|
2012-03-04 16:11:57 +00:00
|
|
|
|
|
|
|
/* Enable wake-up of the SoC using touchscreen */
|
2012-10-16 07:25:42 +00:00
|
|
|
titsc_writel(ts_dev, REG_IRQWAKEUP, IRQWKUP_ENB);
|
2012-03-04 16:11:57 +00:00
|
|
|
|
|
|
|
ctrl = CNTRLREG_STEPCONFIGWRT |
|
|
|
|
CNTRLREG_TSCENB |
|
|
|
|
CNTRLREG_STEPID;
|
|
|
|
switch (ts_dev->wires) {
|
|
|
|
case 4:
|
|
|
|
ctrl |= CNTRLREG_4WIRE;
|
|
|
|
break;
|
|
|
|
case 5:
|
|
|
|
ctrl |= CNTRLREG_5WIRE;
|
|
|
|
break;
|
|
|
|
case 8:
|
|
|
|
ctrl |= CNTRLREG_8WIRE;
|
|
|
|
break;
|
|
|
|
}
|
2012-10-16 07:25:42 +00:00
|
|
|
titsc_writel(ts_dev, REG_CTRL, ctrl);
|
2012-03-04 16:11:57 +00:00
|
|
|
|
2012-10-16 07:25:42 +00:00
|
|
|
titsc_idle_config(ts_dev);
|
|
|
|
titsc_writel(ts_dev, REG_IRQENABLE, IRQENB_FIFO0THRES);
|
|
|
|
titsc_step_config(ts_dev);
|
|
|
|
titsc_writel(ts_dev, REG_FIFO0THR, ts_dev->steps_to_configure);
|
2012-03-04 16:11:57 +00:00
|
|
|
|
|
|
|
ctrl |= CNTRLREG_TSCSSENB;
|
2012-10-16 07:25:42 +00:00
|
|
|
titsc_writel(ts_dev, REG_CTRL, ctrl);
|
2012-03-04 16:11:57 +00:00
|
|
|
|
|
|
|
input_dev->name = "ti-tsc-adc";
|
|
|
|
input_dev->dev.parent = &pdev->dev;
|
|
|
|
|
|
|
|
input_dev->evbit[0] = BIT_MASK(EV_KEY) | BIT_MASK(EV_ABS);
|
|
|
|
input_dev->keybit[BIT_WORD(BTN_TOUCH)] = BIT_MASK(BTN_TOUCH);
|
|
|
|
|
|
|
|
input_set_abs_params(input_dev, ABS_X, 0, MAX_12BIT, 0, 0);
|
|
|
|
input_set_abs_params(input_dev, ABS_Y, 0, MAX_12BIT, 0, 0);
|
|
|
|
input_set_abs_params(input_dev, ABS_PRESSURE, 0, MAX_12BIT, 0, 0);
|
|
|
|
|
|
|
|
/* register to the input system */
|
|
|
|
err = input_register_device(input_dev);
|
|
|
|
if (err)
|
|
|
|
goto err_disable_clk;
|
|
|
|
|
|
|
|
platform_set_drvdata(pdev, ts_dev);
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
err_disable_clk:
|
|
|
|
clk_disable(ts_dev->tsc_ick);
|
|
|
|
clk_put(ts_dev->tsc_ick);
|
|
|
|
err_free_irq:
|
|
|
|
free_irq(ts_dev->irq, ts_dev);
|
|
|
|
err_unmap_regs:
|
|
|
|
iounmap(ts_dev->tsc_base);
|
|
|
|
err_release_mem_region:
|
|
|
|
release_mem_region(res->start, resource_size(res));
|
|
|
|
err_free_mem:
|
|
|
|
input_free_device(input_dev);
|
|
|
|
kfree(ts_dev);
|
|
|
|
return err;
|
|
|
|
}
|
|
|
|
|
2012-10-16 07:25:42 +00:00
|
|
|
static int __devexit titsc_remove(struct platform_device *pdev)
|
2012-03-04 16:11:57 +00:00
|
|
|
{
|
2012-10-16 07:25:42 +00:00
|
|
|
struct titsc *ts_dev = platform_get_drvdata(pdev);
|
2012-03-04 16:11:57 +00:00
|
|
|
struct resource *res;
|
|
|
|
|
|
|
|
free_irq(ts_dev->irq, ts_dev);
|
|
|
|
|
|
|
|
input_unregister_device(ts_dev->input);
|
|
|
|
|
|
|
|
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
|
|
|
iounmap(ts_dev->tsc_base);
|
|
|
|
release_mem_region(res->start, resource_size(res));
|
|
|
|
|
|
|
|
clk_disable(ts_dev->tsc_ick);
|
|
|
|
clk_put(ts_dev->tsc_ick);
|
|
|
|
|
|
|
|
kfree(ts_dev);
|
|
|
|
|
|
|
|
platform_set_drvdata(pdev, NULL);
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static struct platform_driver ti_tsc_driver = {
|
2012-10-16 07:25:42 +00:00
|
|
|
.probe = titsc_probe,
|
|
|
|
.remove = __devexit_p(titsc_remove),
|
2012-03-04 16:11:57 +00:00
|
|
|
.driver = {
|
|
|
|
.name = "tsc",
|
|
|
|
.owner = THIS_MODULE,
|
|
|
|
},
|
|
|
|
};
|
|
|
|
module_platform_driver(ti_tsc_driver);
|
|
|
|
|
|
|
|
MODULE_DESCRIPTION("TI touchscreen controller driver");
|
|
|
|
MODULE_AUTHOR("Rachna Patil <rachna@ti.com>");
|
|
|
|
MODULE_LICENSE("GPL");
|