2020-03-25 09:57:21 +00:00
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: "http://devicetree.org/schemas/serial/renesas,scifa.yaml#"
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$schema: "http://devicetree.org/meta-schemas/core.yaml#"
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title: Renesas Serial Communications Interface with FIFO A (SCIFA)
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maintainers:
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- Geert Uytterhoeven <geert+renesas@glider.be>
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allOf:
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- $ref: serial.yaml#
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properties:
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compatible:
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oneOf:
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- items:
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- enum:
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- renesas,scifa-r8a73a4 # R-Mobile APE6
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- renesas,scifa-r8a7740 # R-Mobile A1
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- renesas,scifa-sh73a0 # SH-Mobile AG5
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- const: renesas,scifa # generic SCIFA compatible UART
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- items:
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- enum:
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2020-05-15 13:12:02 +00:00
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- renesas,scifa-r8a7742 # RZ/G1H
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- renesas,scifa-r8a7743 # RZ/G1M
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- renesas,scifa-r8a7744 # RZ/G1N
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- renesas,scifa-r8a7745 # RZ/G1E
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- renesas,scifa-r8a7790 # R-Car H2
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- renesas,scifa-r8a7791 # R-Car M2-W
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- renesas,scifa-r8a7793 # R-Car M2-N
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- renesas,scifa-r8a7794 # R-Car E2
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2020-03-25 09:57:21 +00:00
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- const: renesas,rcar-gen2-scifa # R-Car Gen2 and RZ/G1
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- const: renesas,scifa # generic SCIFA compatible UART
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reg:
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maxItems: 1
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interrupts:
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maxItems: 1
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clocks:
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maxItems: 1
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clock-names:
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enum:
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- fck # UART functional clock
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power-domains:
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maxItems: 1
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resets:
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maxItems: 1
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dmas:
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2021-01-04 23:02:53 +00:00
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minItems: 2
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maxItems: 4
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2020-03-25 09:57:21 +00:00
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description:
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Must contain a list of pairs of references to DMA specifiers, one for
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transmission, and one for reception.
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dma-names:
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minItems: 2
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maxItems: 4
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items:
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enum:
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- tx
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- rx
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required:
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- compatible
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- reg
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- interrupts
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- clocks
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- clock-names
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- power-domains
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2020-10-05 18:38:27 +00:00
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unevaluatedProperties: false
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2020-03-25 09:57:21 +00:00
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if:
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properties:
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compatible:
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contains:
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enum:
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- renesas,rcar-gen2-scifa
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then:
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required:
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- resets
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examples:
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- |
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#include <dt-bindings/clock/r8a7790-cpg-mssr.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/power/r8a7790-sysc.h>
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aliases {
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serial0 = &scifa0;
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};
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scifa0: serial@e6c40000 {
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compatible = "renesas,scifa-r8a7790", "renesas,rcar-gen2-scifa",
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"renesas,scifa";
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reg = <0xe6c40000 64>;
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interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cpg CPG_MOD 204>;
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clock-names = "fck";
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power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
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resets = <&cpg 204>;
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dmas = <&dmac0 0x21>, <&dmac0 0x22>, <&dmac1 0x21>, <&dmac1 0x22>;
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dma-names = "tx", "rx", "tx", "rx";
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};
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